smc91x platform support; requires patch to smc91x.h which was sent
[linux-2.6/verdex.git] / include / asm-x86_64 / smp.h
blobc57ce40713426d6ef69b657adccb8d3e274745bb
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #ifndef __ASSEMBLY__
8 #include <linux/config.h>
9 #include <linux/threads.h>
10 #include <linux/cpumask.h>
11 #include <linux/bitops.h>
12 extern int disable_apic;
13 #endif
15 #ifdef CONFIG_X86_LOCAL_APIC
16 #ifndef __ASSEMBLY__
17 #include <asm/fixmap.h>
18 #include <asm/mpspec.h>
19 #ifdef CONFIG_X86_IO_APIC
20 #include <asm/io_apic.h>
21 #endif
22 #include <asm/apic.h>
23 #include <asm/thread_info.h>
24 #endif
25 #endif
27 #ifdef CONFIG_SMP
28 #ifndef ASSEMBLY
30 #include <asm/pda.h>
32 struct pt_regs;
34 extern cpumask_t cpu_present_mask;
35 extern cpumask_t cpu_possible_map;
36 extern cpumask_t cpu_online_map;
37 extern cpumask_t cpu_callout_map;
40 * Private routines/data
43 extern void smp_alloc_memory(void);
44 extern volatile unsigned long smp_invalidate_needed;
45 extern int pic_mode;
46 extern void lock_ipi_call_lock(void);
47 extern void unlock_ipi_call_lock(void);
48 extern int smp_num_siblings;
49 extern void smp_send_reschedule(int cpu);
50 extern void zap_low_mappings(void);
51 void smp_stop_cpu(void);
52 extern int smp_call_function_single(int cpuid, void (*func) (void *info),
53 void *info, int retry, int wait);
55 extern cpumask_t cpu_sibling_map[NR_CPUS];
56 extern cpumask_t cpu_core_map[NR_CPUS];
57 extern u8 phys_proc_id[NR_CPUS];
58 extern u8 cpu_core_id[NR_CPUS];
60 #define SMP_TRAMPOLINE_BASE 0x6000
63 * On x86 all CPUs are mapped 1:1 to the APIC space.
64 * This simplifies scheduling and IPI sending and
65 * compresses data structures.
68 static inline int num_booting_cpus(void)
70 return cpus_weight(cpu_callout_map);
73 #define raw_smp_processor_id() read_pda(cpunumber)
75 static inline int hard_smp_processor_id(void)
77 /* we don't want to mark this access volatile - bad code generation */
78 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
81 extern int safe_smp_processor_id(void);
82 extern int __cpu_disable(void);
83 extern void __cpu_die(unsigned int cpu);
84 extern void prefill_possible_map(void);
86 #endif /* !ASSEMBLY */
88 #define NO_PROC_ID 0xFF /* No processor magic marker */
90 #endif
92 #ifndef ASSEMBLY
94 * Some lowlevel functions might want to know about
95 * the real APIC ID <-> CPU # mapping.
97 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
98 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
99 extern u8 bios_cpu_apicid[];
101 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
103 return cpus_addr(cpumask)[0];
106 static inline int cpu_present_to_apicid(int mps_cpu)
108 if (mps_cpu < NR_CPUS)
109 return (int)bios_cpu_apicid[mps_cpu];
110 else
111 return BAD_APICID;
114 #endif /* !ASSEMBLY */
116 #ifndef CONFIG_SMP
117 #define stack_smp_processor_id() 0
118 #define safe_smp_processor_id() 0
119 #define cpu_logical_map(x) (x)
120 #else
121 #include <asm/thread_info.h>
122 #define stack_smp_processor_id() \
123 ({ \
124 struct thread_info *ti; \
125 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
126 ti->cpu; \
128 #endif
130 #ifndef __ASSEMBLY__
131 static __inline int logical_smp_processor_id(void)
133 /* we don't want to mark this access volatile - bad code generation */
134 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
136 #endif
138 #endif