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e1000: resolve tx multiqueue bug
[linux-2.6/verdex.git] / drivers / net / e1000 / e1000_main.c
blobcf12b05cd011fcbd4db80d12273731d4c4ff9c03
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1075),
77 INTEL_E1000_ETHERNET_DEVICE(0x1076),
78 INTEL_E1000_ETHERNET_DEVICE(0x1077),
79 INTEL_E1000_ETHERNET_DEVICE(0x1078),
80 INTEL_E1000_ETHERNET_DEVICE(0x1079),
81 INTEL_E1000_ETHERNET_DEVICE(0x107A),
82 INTEL_E1000_ETHERNET_DEVICE(0x107B),
83 INTEL_E1000_ETHERNET_DEVICE(0x107C),
84 INTEL_E1000_ETHERNET_DEVICE(0x108A),
85 INTEL_E1000_ETHERNET_DEVICE(0x1099),
86 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
87 /* required last entry */
88 {0,}
89 };
90
91 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
93 int e1000_up(struct e1000_adapter *adapter);
94 void e1000_down(struct e1000_adapter *adapter);
95 void e1000_reinit_locked(struct e1000_adapter *adapter);
96 void e1000_reset(struct e1000_adapter *adapter);
97 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
98 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
99 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
100 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
101 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
102 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
103 struct e1000_tx_ring *txdr);
104 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
105 struct e1000_rx_ring *rxdr);
106 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
107 struct e1000_tx_ring *tx_ring);
108 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
109 struct e1000_rx_ring *rx_ring);
110 void e1000_update_stats(struct e1000_adapter *adapter);
111
112 static int e1000_init_module(void);
113 static void e1000_exit_module(void);
114 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
115 static void __devexit e1000_remove(struct pci_dev *pdev);
116 static int e1000_alloc_queues(struct e1000_adapter *adapter);
117 static int e1000_sw_init(struct e1000_adapter *adapter);
118 static int e1000_open(struct net_device *netdev);
119 static int e1000_close(struct net_device *netdev);
120 static void e1000_configure_tx(struct e1000_adapter *adapter);
121 static void e1000_configure_rx(struct e1000_adapter *adapter);
122 static void e1000_setup_rctl(struct e1000_adapter *adapter);
123 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
124 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
125 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 static void e1000_set_rx_mode(struct net_device *netdev);
130 static void e1000_update_phy_info(unsigned long data);
131 static void e1000_watchdog(unsigned long data);
132 static void e1000_82547_tx_fifo_stall(unsigned long data);
133 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
134 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136 static int e1000_set_mac(struct net_device *netdev, void *p);
137 static irqreturn_t e1000_intr(int irq, void *data);
138 static irqreturn_t e1000_intr_msi(int irq, void *data);
139 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
140 struct e1000_tx_ring *tx_ring);
141 #ifdef CONFIG_E1000_NAPI
142 static int e1000_clean(struct napi_struct *napi, int budget);
143 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
144 struct e1000_rx_ring *rx_ring,
145 int *work_done, int work_to_do);
146 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int *work_done, int work_to_do);
149 #else
150 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
153 struct e1000_rx_ring *rx_ring);
154 #endif
155 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring,
157 int cleaned_count);
158 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
159 struct e1000_rx_ring *rx_ring,
160 int cleaned_count);
161 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
162 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
163 int cmd);
164 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
165 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
166 static void e1000_tx_timeout(struct net_device *dev);
167 static void e1000_reset_task(struct work_struct *work);
168 static void e1000_smartspeed(struct e1000_adapter *adapter);
169 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
170 struct sk_buff *skb);
171
172 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
173 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
174 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
175 static void e1000_restore_vlan(struct e1000_adapter *adapter);
176
177 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
178 #ifdef CONFIG_PM
179 static int e1000_resume(struct pci_dev *pdev);
180 #endif
181 static void e1000_shutdown(struct pci_dev *pdev);
182
183 #ifdef CONFIG_NET_POLL_CONTROLLER
184 /* for netdump / net console */
185 static void e1000_netpoll (struct net_device *netdev);
186 #endif
187
188 #define COPYBREAK_DEFAULT 256
189 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
190 module_param(copybreak, uint, 0644);
191 MODULE_PARM_DESC(copybreak,
192 "Maximum size of packet that is copied to a new buffer on receive");
193
194 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
195 pci_channel_state_t state);
196 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
197 static void e1000_io_resume(struct pci_dev *pdev);
198
199 static struct pci_error_handlers e1000_err_handler = {
200 .error_detected = e1000_io_error_detected,
201 .slot_reset = e1000_io_slot_reset,
202 .resume = e1000_io_resume,
203 };
204
205 static struct pci_driver e1000_driver = {
206 .name = e1000_driver_name,
207 .id_table = e1000_pci_tbl,
208 .probe = e1000_probe,
209 .remove = __devexit_p(e1000_remove),
210 #ifdef CONFIG_PM
211 /* Power Managment Hooks */
212 .suspend = e1000_suspend,
213 .resume = e1000_resume,
214 #endif
215 .shutdown = e1000_shutdown,
216 .err_handler = &e1000_err_handler
217 };
218
219 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
220 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
221 MODULE_LICENSE("GPL");
222 MODULE_VERSION(DRV_VERSION);
223
224 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
225 module_param(debug, int, 0);
226 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
227
228 /**
229 * e1000_init_module - Driver Registration Routine
230 *
231 * e1000_init_module is the first routine called when the driver is
232 * loaded. All it does is register with the PCI subsystem.
233 **/
234
235 static int __init
236 e1000_init_module(void)
237 {
238 int ret;
239 printk(KERN_INFO "%s - version %s\n",
240 e1000_driver_string, e1000_driver_version);
241
242 printk(KERN_INFO "%s\n", e1000_copyright);
243
244 ret = pci_register_driver(&e1000_driver);
245 if (copybreak != COPYBREAK_DEFAULT) {
246 if (copybreak == 0)
247 printk(KERN_INFO "e1000: copybreak disabled\n");
248 else
249 printk(KERN_INFO "e1000: copybreak enabled for "
250 "packets <= %u bytes\n", copybreak);
251 }
252 return ret;
253 }
254
255 module_init(e1000_init_module);
256
257 /**
258 * e1000_exit_module - Driver Exit Cleanup Routine
259 *
260 * e1000_exit_module is called just before the driver is removed
261 * from memory.
262 **/
263
264 static void __exit
265 e1000_exit_module(void)
266 {
267 pci_unregister_driver(&e1000_driver);
268 }
269
270 module_exit(e1000_exit_module);
271
272 static int e1000_request_irq(struct e1000_adapter *adapter)
273 {
274 struct net_device *netdev = adapter->netdev;
275 irq_handler_t handler = e1000_intr;
276 int irq_flags = IRQF_SHARED;
277 int err;
278
279 if (adapter->hw.mac_type >= e1000_82571) {
280 adapter->have_msi = !pci_enable_msi(adapter->pdev);
281 if (adapter->have_msi) {
282 handler = e1000_intr_msi;
283 irq_flags = 0;
284 }
285 }
286
287 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
288 netdev);
289 if (err) {
290 if (adapter->have_msi)
291 pci_disable_msi(adapter->pdev);
292 DPRINTK(PROBE, ERR,
293 "Unable to allocate interrupt Error: %d\n", err);
294 }
295
296 return err;
297 }
298
299 static void e1000_free_irq(struct e1000_adapter *adapter)
300 {
301 struct net_device *netdev = adapter->netdev;
302
303 free_irq(adapter->pdev->irq, netdev);
304
305 if (adapter->have_msi)
306 pci_disable_msi(adapter->pdev);
307 }
308
309 /**
310 * e1000_irq_disable - Mask off interrupt generation on the NIC
311 * @adapter: board private structure
312 **/
313
314 static void
315 e1000_irq_disable(struct e1000_adapter *adapter)
316 {
317 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
318 E1000_WRITE_FLUSH(&adapter->hw);
319 synchronize_irq(adapter->pdev->irq);
320 }
321
322 /**
323 * e1000_irq_enable - Enable default interrupt generation settings
324 * @adapter: board private structure
325 **/
326
327 static void
328 e1000_irq_enable(struct e1000_adapter *adapter)
329 {
330 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
331 E1000_WRITE_FLUSH(&adapter->hw);
332 }
333
334 static void
335 e1000_update_mng_vlan(struct e1000_adapter *adapter)
336 {
337 struct net_device *netdev = adapter->netdev;
338 u16 vid = adapter->hw.mng_cookie.vlan_id;
339 u16 old_vid = adapter->mng_vlan_id;
340 if (adapter->vlgrp) {
341 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
342 if (adapter->hw.mng_cookie.status &
343 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
344 e1000_vlan_rx_add_vid(netdev, vid);
345 adapter->mng_vlan_id = vid;
346 } else
347 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
348
349 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
350 (vid != old_vid) &&
351 !vlan_group_get_device(adapter->vlgrp, old_vid))
352 e1000_vlan_rx_kill_vid(netdev, old_vid);
353 } else
354 adapter->mng_vlan_id = vid;
355 }
356 }
357
358 /**
359 * e1000_release_hw_control - release control of the h/w to f/w
360 * @adapter: address of board private structure
361 *
362 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
363 * For ASF and Pass Through versions of f/w this means that the
364 * driver is no longer loaded. For AMT version (only with 82573) i
365 * of the f/w this means that the network i/f is closed.
366 *
367 **/
368
369 static void
370 e1000_release_hw_control(struct e1000_adapter *adapter)
371 {
372 u32 ctrl_ext;
373 u32 swsm;
374
375 /* Let firmware taken over control of h/w */
376 switch (adapter->hw.mac_type) {
377 case e1000_82573:
378 swsm = E1000_READ_REG(&adapter->hw, SWSM);
379 E1000_WRITE_REG(&adapter->hw, SWSM,
380 swsm & ~E1000_SWSM_DRV_LOAD);
381 break;
382 case e1000_82571:
383 case e1000_82572:
384 case e1000_80003es2lan:
385 case e1000_ich8lan:
386 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
387 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
388 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
389 break;
390 default:
391 break;
392 }
393 }
394
395 /**
396 * e1000_get_hw_control - get control of the h/w from f/w
397 * @adapter: address of board private structure
398 *
399 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
400 * For ASF and Pass Through versions of f/w this means that
401 * the driver is loaded. For AMT version (only with 82573)
402 * of the f/w this means that the network i/f is open.
403 *
404 **/
405
406 static void
407 e1000_get_hw_control(struct e1000_adapter *adapter)
408 {
409 u32 ctrl_ext;
410 u32 swsm;
411
412 /* Let firmware know the driver has taken over */
413 switch (adapter->hw.mac_type) {
414 case e1000_82573:
415 swsm = E1000_READ_REG(&adapter->hw, SWSM);
416 E1000_WRITE_REG(&adapter->hw, SWSM,
417 swsm | E1000_SWSM_DRV_LOAD);
418 break;
419 case e1000_82571:
420 case e1000_82572:
421 case e1000_80003es2lan:
422 case e1000_ich8lan:
423 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
424 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
425 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
426 break;
427 default:
428 break;
429 }
430 }
431
432 static void
433 e1000_init_manageability(struct e1000_adapter *adapter)
434 {
435 if (adapter->en_mng_pt) {
436 u32 manc = E1000_READ_REG(&adapter->hw, MANC);
437
438 /* disable hardware interception of ARP */
439 manc &= ~(E1000_MANC_ARP_EN);
440
441 /* enable receiving management packets to the host */
442 /* this will probably generate destination unreachable messages
443 * from the host OS, but the packets will be handled on SMBUS */
444 if (adapter->hw.has_manc2h) {
445 u32 manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
446
447 manc |= E1000_MANC_EN_MNG2HOST;
448 #define E1000_MNG2HOST_PORT_623 (1 << 5)
449 #define E1000_MNG2HOST_PORT_664 (1 << 6)
450 manc2h |= E1000_MNG2HOST_PORT_623;
451 manc2h |= E1000_MNG2HOST_PORT_664;
452 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
453 }
454
455 E1000_WRITE_REG(&adapter->hw, MANC, manc);
456 }
457 }
458
459 static void
460 e1000_release_manageability(struct e1000_adapter *adapter)
461 {
462 if (adapter->en_mng_pt) {
463 u32 manc = E1000_READ_REG(&adapter->hw, MANC);
464
465 /* re-enable hardware interception of ARP */
466 manc |= E1000_MANC_ARP_EN;
467
468 if (adapter->hw.has_manc2h)
469 manc &= ~E1000_MANC_EN_MNG2HOST;
470
471 /* don't explicitly have to mess with MANC2H since
472 * MANC has an enable disable that gates MANC2H */
473
474 E1000_WRITE_REG(&adapter->hw, MANC, manc);
475 }
476 }
477
478 /**
479 * e1000_configure - configure the hardware for RX and TX
480 * @adapter = private board structure
481 **/
482 static void e1000_configure(struct e1000_adapter *adapter)
483 {
484 struct net_device *netdev = adapter->netdev;
485 int i;
486
487 e1000_set_rx_mode(netdev);
488
489 e1000_restore_vlan(adapter);
490 e1000_init_manageability(adapter);
491
492 e1000_configure_tx(adapter);
493 e1000_setup_rctl(adapter);
494 e1000_configure_rx(adapter);
495 /* call E1000_DESC_UNUSED which always leaves
496 * at least 1 descriptor unused to make sure
497 * next_to_use != next_to_clean */
498 for (i = 0; i < adapter->num_rx_queues; i++) {
499 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
500 adapter->alloc_rx_buf(adapter, ring,
501 E1000_DESC_UNUSED(ring));
502 }
503
504 adapter->tx_queue_len = netdev->tx_queue_len;
505 }
506
507 int e1000_up(struct e1000_adapter *adapter)
508 {
509 /* hardware has been reset, we need to reload some things */
510 e1000_configure(adapter);
511
512 clear_bit(__E1000_DOWN, &adapter->flags);
513
514 #ifdef CONFIG_E1000_NAPI
515 napi_enable(&adapter->napi);
516 #endif
517 e1000_irq_enable(adapter);
518
519 /* fire a link change interrupt to start the watchdog */
520 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
521 return 0;
522 }
523
524 /**
525 * e1000_power_up_phy - restore link in case the phy was powered down
526 * @adapter: address of board private structure
527 *
528 * The phy may be powered down to save power and turn off link when the
529 * driver is unloaded and wake on lan is not enabled (among others)
530 * *** this routine MUST be followed by a call to e1000_reset ***
531 *
532 **/
533
534 void e1000_power_up_phy(struct e1000_adapter *adapter)
535 {
536 u16 mii_reg = 0;
537
538 /* Just clear the power down bit to wake the phy back up */
539 if (adapter->hw.media_type == e1000_media_type_copper) {
540 /* according to the manual, the phy will retain its
541 * settings across a power-down/up cycle */
542 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
543 mii_reg &= ~MII_CR_POWER_DOWN;
544 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
545 }
546 }
547
548 static void e1000_power_down_phy(struct e1000_adapter *adapter)
549 {
550 /* Power down the PHY so no link is implied when interface is down *
551 * The PHY cannot be powered down if any of the following is true *
552 * (a) WoL is enabled
553 * (b) AMT is active
554 * (c) SoL/IDER session is active */
555 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
556 adapter->hw.media_type == e1000_media_type_copper) {
557 u16 mii_reg = 0;
558
559 switch (adapter->hw.mac_type) {
560 case e1000_82540:
561 case e1000_82545:
562 case e1000_82545_rev_3:
563 case e1000_82546:
564 case e1000_82546_rev_3:
565 case e1000_82541:
566 case e1000_82541_rev_2:
567 case e1000_82547:
568 case e1000_82547_rev_2:
569 if (E1000_READ_REG(&adapter->hw, MANC) &
570 E1000_MANC_SMBUS_EN)
571 goto out;
572 break;
573 case e1000_82571:
574 case e1000_82572:
575 case e1000_82573:
576 case e1000_80003es2lan:
577 case e1000_ich8lan:
578 if (e1000_check_mng_mode(&adapter->hw) ||
579 e1000_check_phy_reset_block(&adapter->hw))
580 goto out;
581 break;
582 default:
583 goto out;
584 }
585 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
586 mii_reg |= MII_CR_POWER_DOWN;
587 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
588 mdelay(1);
589 }
590 out:
591 return;
592 }
593
594 void
595 e1000_down(struct e1000_adapter *adapter)
596 {
597 struct net_device *netdev = adapter->netdev;
598
599 /* signal that we're down so the interrupt handler does not
600 * reschedule our watchdog timer */
601 set_bit(__E1000_DOWN, &adapter->flags);
602
603 #ifdef CONFIG_E1000_NAPI
604 napi_disable(&adapter->napi);
605 #endif
606 e1000_irq_disable(adapter);
607
608 del_timer_sync(&adapter->tx_fifo_stall_timer);
609 del_timer_sync(&adapter->watchdog_timer);
610 del_timer_sync(&adapter->phy_info_timer);
611
612 netdev->tx_queue_len = adapter->tx_queue_len;
613 adapter->link_speed = 0;
614 adapter->link_duplex = 0;
615 netif_carrier_off(netdev);
616 netif_stop_queue(netdev);
617
618 e1000_reset(adapter);
619 e1000_clean_all_tx_rings(adapter);
620 e1000_clean_all_rx_rings(adapter);
621 }
622
623 void
624 e1000_reinit_locked(struct e1000_adapter *adapter)
625 {
626 WARN_ON(in_interrupt());
627 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
628 msleep(1);
629 e1000_down(adapter);
630 e1000_up(adapter);
631 clear_bit(__E1000_RESETTING, &adapter->flags);
632 }
633
634 void
635 e1000_reset(struct e1000_adapter *adapter)
636 {
637 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
638 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
639 bool legacy_pba_adjust = false;
640
641 /* Repartition Pba for greater than 9k mtu
642 * To take effect CTRL.RST is required.
643 */
644
645 switch (adapter->hw.mac_type) {
646 case e1000_82542_rev2_0:
647 case e1000_82542_rev2_1:
648 case e1000_82543:
649 case e1000_82544:
650 case e1000_82540:
651 case e1000_82541:
652 case e1000_82541_rev_2:
653 legacy_pba_adjust = true;
654 pba = E1000_PBA_48K;
655 break;
656 case e1000_82545:
657 case e1000_82545_rev_3:
658 case e1000_82546:
659 case e1000_82546_rev_3:
660 pba = E1000_PBA_48K;
661 break;
662 case e1000_82547:
663 case e1000_82547_rev_2:
664 legacy_pba_adjust = true;
665 pba = E1000_PBA_30K;
666 break;
667 case e1000_82571:
668 case e1000_82572:
669 case e1000_80003es2lan:
670 pba = E1000_PBA_38K;
671 break;
672 case e1000_82573:
673 pba = E1000_PBA_20K;
674 break;
675 case e1000_ich8lan:
676 pba = E1000_PBA_8K;
677 case e1000_undefined:
678 case e1000_num_macs:
679 break;
680 }
681
682 if (legacy_pba_adjust) {
683 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
684 pba -= 8; /* allocate more FIFO for Tx */
685
686 if (adapter->hw.mac_type == e1000_82547) {
687 adapter->tx_fifo_head = 0;
688 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
689 adapter->tx_fifo_size =
690 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
691 atomic_set(&adapter->tx_fifo_stall, 0);
692 }
693 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
694 /* adjust PBA for jumbo frames */
695 E1000_WRITE_REG(&adapter->hw, PBA, pba);
696
697 /* To maintain wire speed transmits, the Tx FIFO should be
698 * large enough to accomodate two full transmit packets,
699 * rounded up to the next 1KB and expressed in KB. Likewise,
700 * the Rx FIFO should be large enough to accomodate at least
701 * one full receive packet and is similarly rounded up and
702 * expressed in KB. */
703 pba = E1000_READ_REG(&adapter->hw, PBA);
704 /* upper 16 bits has Tx packet buffer allocation size in KB */
705 tx_space = pba >> 16;
706 /* lower 16 bits has Rx packet buffer allocation size in KB */
707 pba &= 0xffff;
708 /* don't include ethernet FCS because hardware appends/strips */
709 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
710 VLAN_TAG_SIZE;
711 min_tx_space = min_rx_space;
712 min_tx_space *= 2;
713 min_tx_space = ALIGN(min_tx_space, 1024);
714 min_tx_space >>= 10;
715 min_rx_space = ALIGN(min_rx_space, 1024);
716 min_rx_space >>= 10;
717
718 /* If current Tx allocation is less than the min Tx FIFO size,
719 * and the min Tx FIFO size is less than the current Rx FIFO
720 * allocation, take space away from current Rx allocation */
721 if (tx_space < min_tx_space &&
722 ((min_tx_space - tx_space) < pba)) {
723 pba = pba - (min_tx_space - tx_space);
724
725 /* PCI/PCIx hardware has PBA alignment constraints */
726 switch (adapter->hw.mac_type) {
727 case e1000_82545 ... e1000_82546_rev_3:
728 pba &= ~(E1000_PBA_8K - 1);
729 break;
730 default:
731 break;
732 }
733
734 /* if short on rx space, rx wins and must trump tx
735 * adjustment or use Early Receive if available */
736 if (pba < min_rx_space) {
737 switch (adapter->hw.mac_type) {
738 case e1000_82573:
739 /* ERT enabled in e1000_configure_rx */
740 break;
741 default:
742 pba = min_rx_space;
743 break;
744 }
745 }
746 }
747 }
748
749 E1000_WRITE_REG(&adapter->hw, PBA, pba);
750
751 /* flow control settings */
752 /* Set the FC high water mark to 90% of the FIFO size.
753 * Required to clear last 3 LSB */
754 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
755 /* We can't use 90% on small FIFOs because the remainder
756 * would be less than 1 full frame. In this case, we size
757 * it to allow at least a full frame above the high water
758 * mark. */
759 if (pba < E1000_PBA_16K)
760 fc_high_water_mark = (pba * 1024) - 1600;
761
762 adapter->hw.fc_high_water = fc_high_water_mark;
763 adapter->hw.fc_low_water = fc_high_water_mark - 8;
764 if (adapter->hw.mac_type == e1000_80003es2lan)
765 adapter->hw.fc_pause_time = 0xFFFF;
766 else
767 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
768 adapter->hw.fc_send_xon = 1;
769 adapter->hw.fc = adapter->hw.original_fc;
770
771 /* Allow time for pending master requests to run */
772 e1000_reset_hw(&adapter->hw);
773 if (adapter->hw.mac_type >= e1000_82544)
774 E1000_WRITE_REG(&adapter->hw, WUC, 0);
775
776 if (e1000_init_hw(&adapter->hw))
777 DPRINTK(PROBE, ERR, "Hardware Error\n");
778 e1000_update_mng_vlan(adapter);
779
780 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
781 if (adapter->hw.mac_type >= e1000_82544 &&
782 adapter->hw.mac_type <= e1000_82547_rev_2 &&
783 adapter->hw.autoneg == 1 &&
784 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
785 u32 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
786 /* clear phy power management bit if we are in gig only mode,
787 * which if enabled will attempt negotiation to 100Mb, which
788 * can cause a loss of link at power off or driver unload */
789 ctrl &= ~E1000_CTRL_SWDPIN3;
790 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
791 }
792
793 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
794 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
795
796 e1000_reset_adaptive(&adapter->hw);
797 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
798
799 if (!adapter->smart_power_down &&
800 (adapter->hw.mac_type == e1000_82571 ||
801 adapter->hw.mac_type == e1000_82572)) {
802 u16 phy_data = 0;
803 /* speed up time to link by disabling smart power down, ignore
804 * the return value of this function because there is nothing
805 * different we would do if it failed */
806 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
807 &phy_data);
808 phy_data &= ~IGP02E1000_PM_SPD;
809 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
810 phy_data);
811 }
812
813 e1000_release_manageability(adapter);
814 }
815
816 /**
817 * Dump the eeprom for users having checksum issues
818 **/
819 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
820 {
821 struct net_device *netdev = adapter->netdev;
822 struct ethtool_eeprom eeprom;
823 const struct ethtool_ops *ops = netdev->ethtool_ops;
824 u8 *data;
825 int i;
826 u16 csum_old, csum_new = 0;
827
828 eeprom.len = ops->get_eeprom_len(netdev);
829 eeprom.offset = 0;
830
831 data = kmalloc(eeprom.len, GFP_KERNEL);
832 if (!data) {
833 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
834 " data\n");
835 return;
836 }
837
838 ops->get_eeprom(netdev, &eeprom, data);
839
840 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
841 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
842 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
843 csum_new += data[i] + (data[i + 1] << 8);
844 csum_new = EEPROM_SUM - csum_new;
845
846 printk(KERN_ERR "/*********************/\n");
847 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
848 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
849
850 printk(KERN_ERR "Offset Values\n");
851 printk(KERN_ERR "======== ======\n");
852 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
853
854 printk(KERN_ERR "Include this output when contacting your support "
855 "provider.\n");
856 printk(KERN_ERR "This is not a software error! Something bad "
857 "happened to your hardware or\n");
858 printk(KERN_ERR "EEPROM image. Ignoring this "
859 "problem could result in further problems,\n");
860 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
861 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
862 "which is invalid\n");
863 printk(KERN_ERR "and requires you to set the proper MAC "
864 "address manually before continuing\n");
865 printk(KERN_ERR "to enable this network device.\n");
866 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
867 "to your hardware vendor\n");
868 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
869 printk(KERN_ERR "/*********************/\n");
870
871 kfree(data);
872 }
873
874 /**
875 * e1000_probe - Device Initialization Routine
876 * @pdev: PCI device information struct
877 * @ent: entry in e1000_pci_tbl
878 *
879 * Returns 0 on success, negative on failure
880 *
881 * e1000_probe initializes an adapter identified by a pci_dev structure.
882 * The OS initialization, configuring of the adapter private structure,
883 * and a hardware reset occur.
884 **/
885
886 static int __devinit
887 e1000_probe(struct pci_dev *pdev,
888 const struct pci_device_id *ent)
889 {
890 struct net_device *netdev;
891 struct e1000_adapter *adapter;
892
893 static int cards_found = 0;
894 static int global_quad_port_a = 0; /* global ksp3 port a indication */
895 int i, err, pci_using_dac;
896 u16 eeprom_data = 0;
897 u16 eeprom_apme_mask = E1000_EEPROM_APME;
898 DECLARE_MAC_BUF(mac);
899
900 if ((err = pci_enable_device(pdev)))
901 return err;
902
903 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
904 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
905 pci_using_dac = 1;
906 } else {
907 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
908 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
909 E1000_ERR("No usable DMA configuration, aborting\n");
910 goto err_dma;
911 }
912 pci_using_dac = 0;
913 }
914
915 if ((err = pci_request_regions(pdev, e1000_driver_name)))
916 goto err_pci_reg;
917
918 pci_set_master(pdev);
919
920 err = -ENOMEM;
921 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
922 if (!netdev)
923 goto err_alloc_etherdev;
924
925 SET_NETDEV_DEV(netdev, &pdev->dev);
926
927 pci_set_drvdata(pdev, netdev);
928 adapter = netdev_priv(netdev);
929 adapter->netdev = netdev;
930 adapter->pdev = pdev;
931 adapter->hw.back = adapter;
932 adapter->msg_enable = (1 << debug) - 1;
933
934 err = -EIO;
935 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
936 pci_resource_len(pdev, BAR_0));
937 if (!adapter->hw.hw_addr)
938 goto err_ioremap;
939
940 for (i = BAR_1; i <= BAR_5; i++) {
941 if (pci_resource_len(pdev, i) == 0)
942 continue;
943 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
944 adapter->hw.io_base = pci_resource_start(pdev, i);
945 break;
946 }
947 }
948
949 netdev->open = &e1000_open;
950 netdev->stop = &e1000_close;
951 netdev->hard_start_xmit = &e1000_xmit_frame;
952 netdev->get_stats = &e1000_get_stats;
953 netdev->set_rx_mode = &e1000_set_rx_mode;
954 netdev->set_mac_address = &e1000_set_mac;
955 netdev->change_mtu = &e1000_change_mtu;
956 netdev->do_ioctl = &e1000_ioctl;
957 e1000_set_ethtool_ops(netdev);
958 netdev->tx_timeout = &e1000_tx_timeout;
959 netdev->watchdog_timeo = 5 * HZ;
960 #ifdef CONFIG_E1000_NAPI
961 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
962 #endif
963 netdev->vlan_rx_register = e1000_vlan_rx_register;
964 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
965 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
966 #ifdef CONFIG_NET_POLL_CONTROLLER
967 netdev->poll_controller = e1000_netpoll;
968 #endif
969 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
970
971 adapter->bd_number = cards_found;
972
973 /* setup the private structure */
974
975 if ((err = e1000_sw_init(adapter)))
976 goto err_sw_init;
977
978 err = -EIO;
979 /* Flash BAR mapping must happen after e1000_sw_init
980 * because it depends on mac_type */
981 if ((adapter->hw.mac_type == e1000_ich8lan) &&
982 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
983 adapter->hw.flash_address =
984 ioremap(pci_resource_start(pdev, 1),
985 pci_resource_len(pdev, 1));
986 if (!adapter->hw.flash_address)
987 goto err_flashmap;
988 }
989
990 if (e1000_check_phy_reset_block(&adapter->hw))
991 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
992
993 if (adapter->hw.mac_type >= e1000_82543) {
994 netdev->features = NETIF_F_SG |
995 NETIF_F_HW_CSUM |
996 NETIF_F_HW_VLAN_TX |
997 NETIF_F_HW_VLAN_RX |
998 NETIF_F_HW_VLAN_FILTER;
999 if (adapter->hw.mac_type == e1000_ich8lan)
1000 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1001 }
1002
1003 if ((adapter->hw.mac_type >= e1000_82544) &&
1004 (adapter->hw.mac_type != e1000_82547))
1005 netdev->features |= NETIF_F_TSO;
1006
1007 if (adapter->hw.mac_type > e1000_82547_rev_2)
1008 netdev->features |= NETIF_F_TSO6;
1009 if (pci_using_dac)
1010 netdev->features |= NETIF_F_HIGHDMA;
1011
1012 netdev->features |= NETIF_F_LLTX;
1013
1014 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1015
1016 /* initialize eeprom parameters */
1017 if (e1000_init_eeprom_params(&adapter->hw)) {
1018 E1000_ERR("EEPROM initialization failed\n");
1019 goto err_eeprom;
1020 }
1021
1022 /* before reading the EEPROM, reset the controller to
1023 * put the device in a known good starting state */
1024
1025 e1000_reset_hw(&adapter->hw);
1026
1027 /* make sure the EEPROM is good */
1028 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1029 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1030 e1000_dump_eeprom(adapter);
1031 /*
1032 * set MAC address to all zeroes to invalidate and temporary
1033 * disable this device for the user. This blocks regular
1034 * traffic while still permitting ethtool ioctls from reaching
1035 * the hardware as well as allowing the user to run the
1036 * interface after manually setting a hw addr using
1037 * `ip set address`
1038 */
1039 memset(adapter->hw.mac_addr, 0, netdev->addr_len);
1040 } else {
1041 /* copy the MAC address out of the EEPROM */
1042 if (e1000_read_mac_addr(&adapter->hw))
1043 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1044 }
1045 /* don't block initalization here due to bad MAC address */
1046 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1047 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1048
1049 if (!is_valid_ether_addr(netdev->perm_addr))
1050 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1051
1052 e1000_get_bus_info(&adapter->hw);
1053
1054 init_timer(&adapter->tx_fifo_stall_timer);
1055 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1056 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1057
1058 init_timer(&adapter->watchdog_timer);
1059 adapter->watchdog_timer.function = &e1000_watchdog;
1060 adapter->watchdog_timer.data = (unsigned long) adapter;
1061
1062 init_timer(&adapter->phy_info_timer);
1063 adapter->phy_info_timer.function = &e1000_update_phy_info;
1064 adapter->phy_info_timer.data = (unsigned long) adapter;
1065
1066 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1067
1068 e1000_check_options(adapter);
1069
1070 /* Initial Wake on LAN setting
1071 * If APM wake is enabled in the EEPROM,
1072 * enable the ACPI Magic Packet filter
1073 */
1074
1075 switch (adapter->hw.mac_type) {
1076 case e1000_82542_rev2_0:
1077 case e1000_82542_rev2_1:
1078 case e1000_82543:
1079 break;
1080 case e1000_82544:
1081 e1000_read_eeprom(&adapter->hw,
1082 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1083 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1084 break;
1085 case e1000_ich8lan:
1086 e1000_read_eeprom(&adapter->hw,
1087 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1088 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1089 break;
1090 case e1000_82546:
1091 case e1000_82546_rev_3:
1092 case e1000_82571:
1093 case e1000_80003es2lan:
1094 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1095 e1000_read_eeprom(&adapter->hw,
1096 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1097 break;
1098 }
1099 /* Fall Through */
1100 default:
1101 e1000_read_eeprom(&adapter->hw,
1102 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1103 break;
1104 }
1105 if (eeprom_data & eeprom_apme_mask)
1106 adapter->eeprom_wol |= E1000_WUFC_MAG;
1107
1108 /* now that we have the eeprom settings, apply the special cases
1109 * where the eeprom may be wrong or the board simply won't support
1110 * wake on lan on a particular port */
1111 switch (pdev->device) {
1112 case E1000_DEV_ID_82546GB_PCIE:
1113 adapter->eeprom_wol = 0;
1114 break;
1115 case E1000_DEV_ID_82546EB_FIBER:
1116 case E1000_DEV_ID_82546GB_FIBER:
1117 case E1000_DEV_ID_82571EB_FIBER:
1118 /* Wake events only supported on port A for dual fiber
1119 * regardless of eeprom setting */
1120 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1121 adapter->eeprom_wol = 0;
1122 break;
1123 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1124 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1125 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1126 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1127 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1128 /* if quad port adapter, disable WoL on all but port A */
1129 if (global_quad_port_a != 0)
1130 adapter->eeprom_wol = 0;
1131 else
1132 adapter->quad_port_a = 1;
1133 /* Reset for multiple quad port adapters */
1134 if (++global_quad_port_a == 4)
1135 global_quad_port_a = 0;
1136 break;
1137 }
1138
1139 /* initialize the wol settings based on the eeprom settings */
1140 adapter->wol = adapter->eeprom_wol;
1141
1142 /* print bus type/speed/width info */
1143 {
1144 struct e1000_hw *hw = &adapter->hw;
1145 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1146 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1147 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1148 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1149 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1150 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1151 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1152 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1153 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1154 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1155 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1156 "32-bit"));
1157 }
1158
1159 printk("%s\n", print_mac(mac, netdev->dev_addr));
1160
1161 if (adapter->hw.bus_type == e1000_bus_type_pci_express) {
1162 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1163 "longer be supported by this driver in the future.\n",
1164 pdev->vendor, pdev->device);
1165 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1166 "driver instead.\n");
1167 }
1168
1169 /* reset the hardware with the new settings */
1170 e1000_reset(adapter);
1171
1172 /* If the controller is 82573 and f/w is AMT, do not set
1173 * DRV_LOAD until the interface is up. For all other cases,
1174 * let the f/w know that the h/w is now under the control
1175 * of the driver. */
1176 if (adapter->hw.mac_type != e1000_82573 ||
1177 !e1000_check_mng_mode(&adapter->hw))
1178 e1000_get_hw_control(adapter);
1179
1180 /* tell the stack to leave us alone until e1000_open() is called */
1181 netif_carrier_off(netdev);
1182 netif_stop_queue(netdev);
1183
1184 strcpy(netdev->name, "eth%d");
1185 if ((err = register_netdev(netdev)))
1186 goto err_register;
1187
1188 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1189
1190 cards_found++;
1191 return 0;
1192
1193 err_register:
1194 e1000_release_hw_control(adapter);
1195 err_eeprom:
1196 if (!e1000_check_phy_reset_block(&adapter->hw))
1197 e1000_phy_hw_reset(&adapter->hw);
1198
1199 if (adapter->hw.flash_address)
1200 iounmap(adapter->hw.flash_address);
1201 err_flashmap:
1202 #ifdef CONFIG_E1000_NAPI
1203 for (i = 0; i < adapter->num_rx_queues; i++)
1204 dev_put(&adapter->polling_netdev[i]);
1205 #endif
1206
1207 kfree(adapter->tx_ring);
1208 kfree(adapter->rx_ring);
1209 #ifdef CONFIG_E1000_NAPI
1210 kfree(adapter->polling_netdev);
1211 #endif
1212 err_sw_init:
1213 iounmap(adapter->hw.hw_addr);
1214 err_ioremap:
1215 free_netdev(netdev);
1216 err_alloc_etherdev:
1217 pci_release_regions(pdev);
1218 err_pci_reg:
1219 err_dma:
1220 pci_disable_device(pdev);
1221 return err;
1222 }
1223
1224 /**
1225 * e1000_remove - Device Removal Routine
1226 * @pdev: PCI device information struct
1227 *
1228 * e1000_remove is called by the PCI subsystem to alert the driver
1229 * that it should release a PCI device. The could be caused by a
1230 * Hot-Plug event, or because the driver is going to be removed from
1231 * memory.
1232 **/
1233
1234 static void __devexit
1235 e1000_remove(struct pci_dev *pdev)
1236 {
1237 struct net_device *netdev = pci_get_drvdata(pdev);
1238 struct e1000_adapter *adapter = netdev_priv(netdev);
1239 #ifdef CONFIG_E1000_NAPI
1240 int i;
1241 #endif
1242
1243 cancel_work_sync(&adapter->reset_task);
1244
1245 e1000_release_manageability(adapter);
1246
1247 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1248 * would have already happened in close and is redundant. */
1249 e1000_release_hw_control(adapter);
1250
1251 #ifdef CONFIG_E1000_NAPI
1252 for (i = 0; i < adapter->num_rx_queues; i++)
1253 dev_put(&adapter->polling_netdev[i]);
1254 #endif
1255
1256 unregister_netdev(netdev);
1257
1258 if (!e1000_check_phy_reset_block(&adapter->hw))
1259 e1000_phy_hw_reset(&adapter->hw);
1260
1261 kfree(adapter->tx_ring);
1262 kfree(adapter->rx_ring);
1263 #ifdef CONFIG_E1000_NAPI
1264 kfree(adapter->polling_netdev);
1265 #endif
1266
1267 iounmap(adapter->hw.hw_addr);
1268 if (adapter->hw.flash_address)
1269 iounmap(adapter->hw.flash_address);
1270 pci_release_regions(pdev);
1271
1272 free_netdev(netdev);
1273
1274 pci_disable_device(pdev);
1275 }
1276
1277 /**
1278 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1279 * @adapter: board private structure to initialize
1280 *
1281 * e1000_sw_init initializes the Adapter private data structure.
1282 * Fields are initialized based on PCI device information and
1283 * OS network device settings (MTU size).
1284 **/
1285
1286 static int __devinit
1287 e1000_sw_init(struct e1000_adapter *adapter)
1288 {
1289 struct e1000_hw *hw = &adapter->hw;
1290 struct net_device *netdev = adapter->netdev;
1291 struct pci_dev *pdev = adapter->pdev;
1292 #ifdef CONFIG_E1000_NAPI
1293 int i;
1294 #endif
1295
1296 /* PCI config space info */
1297
1298 hw->vendor_id = pdev->vendor;
1299 hw->device_id = pdev->device;
1300 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1301 hw->subsystem_id = pdev->subsystem_device;
1302 hw->revision_id = pdev->revision;
1303
1304 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1305
1306 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1307 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1308 hw->max_frame_size = netdev->mtu +
1309 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1310 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1311
1312 /* identify the MAC */
1313
1314 if (e1000_set_mac_type(hw)) {
1315 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1316 return -EIO;
1317 }
1318
1319 switch (hw->mac_type) {
1320 default:
1321 break;
1322 case e1000_82541:
1323 case e1000_82547:
1324 case e1000_82541_rev_2:
1325 case e1000_82547_rev_2:
1326 hw->phy_init_script = 1;
1327 break;
1328 }
1329
1330 e1000_set_media_type(hw);
1331
1332 hw->wait_autoneg_complete = false;
1333 hw->tbi_compatibility_en = true;
1334 hw->adaptive_ifs = true;
1335
1336 /* Copper options */
1337
1338 if (hw->media_type == e1000_media_type_copper) {
1339 hw->mdix = AUTO_ALL_MODES;
1340 hw->disable_polarity_correction = false;
1341 hw->master_slave = E1000_MASTER_SLAVE;
1342 }
1343
1344 adapter->num_tx_queues = 1;
1345 adapter->num_rx_queues = 1;
1346
1347 if (e1000_alloc_queues(adapter)) {
1348 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1349 return -ENOMEM;
1350 }
1351
1352 #ifdef CONFIG_E1000_NAPI
1353 for (i = 0; i < adapter->num_rx_queues; i++) {
1354 adapter->polling_netdev[i].priv = adapter;
1355 dev_hold(&adapter->polling_netdev[i]);
1356 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1357 }
1358 spin_lock_init(&adapter->tx_queue_lock);
1359 #endif
1360
1361 /* Explicitly disable IRQ since the NIC can be in any state. */
1362 e1000_irq_disable(adapter);
1363
1364 spin_lock_init(&adapter->stats_lock);
1365
1366 set_bit(__E1000_DOWN, &adapter->flags);
1367
1368 return 0;
1369 }
1370
1371 /**
1372 * e1000_alloc_queues - Allocate memory for all rings
1373 * @adapter: board private structure to initialize
1374 *
1375 * We allocate one ring per queue at run-time since we don't know the
1376 * number of queues at compile-time. The polling_netdev array is
1377 * intended for Multiqueue, but should work fine with a single queue.
1378 **/
1379
1380 static int __devinit
1381 e1000_alloc_queues(struct e1000_adapter *adapter)
1382 {
1383 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1384 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1385 if (!adapter->tx_ring)
1386 return -ENOMEM;
1387
1388 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1389 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1390 if (!adapter->rx_ring) {
1391 kfree(adapter->tx_ring);
1392 return -ENOMEM;
1393 }
1394
1395 #ifdef CONFIG_E1000_NAPI
1396 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1397 sizeof(struct net_device),
1398 GFP_KERNEL);
1399 if (!adapter->polling_netdev) {
1400 kfree(adapter->tx_ring);
1401 kfree(adapter->rx_ring);
1402 return -ENOMEM;
1403 }
1404 #endif
1405
1406 return E1000_SUCCESS;
1407 }
1408
1409 /**
1410 * e1000_open - Called when a network interface is made active
1411 * @netdev: network interface device structure
1412 *
1413 * Returns 0 on success, negative value on failure
1414 *
1415 * The open entry point is called when a network interface is made
1416 * active by the system (IFF_UP). At this point all resources needed
1417 * for transmit and receive operations are allocated, the interrupt
1418 * handler is registered with the OS, the watchdog timer is started,
1419 * and the stack is notified that the interface is ready.
1420 **/
1421
1422 static int
1423 e1000_open(struct net_device *netdev)
1424 {
1425 struct e1000_adapter *adapter = netdev_priv(netdev);
1426 int err;
1427
1428 /* disallow open during test */
1429 if (test_bit(__E1000_TESTING, &adapter->flags))
1430 return -EBUSY;
1431
1432 /* allocate transmit descriptors */
1433 err = e1000_setup_all_tx_resources(adapter);
1434 if (err)
1435 goto err_setup_tx;
1436
1437 /* allocate receive descriptors */
1438 err = e1000_setup_all_rx_resources(adapter);
1439 if (err)
1440 goto err_setup_rx;
1441
1442 e1000_power_up_phy(adapter);
1443
1444 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1445 if ((adapter->hw.mng_cookie.status &
1446 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1447 e1000_update_mng_vlan(adapter);
1448 }
1449
1450 /* If AMT is enabled, let the firmware know that the network
1451 * interface is now open */
1452 if (adapter->hw.mac_type == e1000_82573 &&
1453 e1000_check_mng_mode(&adapter->hw))
1454 e1000_get_hw_control(adapter);
1455
1456 /* before we allocate an interrupt, we must be ready to handle it.
1457 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1458 * as soon as we call pci_request_irq, so we have to setup our
1459 * clean_rx handler before we do so. */
1460 e1000_configure(adapter);
1461
1462 err = e1000_request_irq(adapter);
1463 if (err)
1464 goto err_req_irq;
1465
1466 /* From here on the code is the same as e1000_up() */
1467 clear_bit(__E1000_DOWN, &adapter->flags);
1468
1469 #ifdef CONFIG_E1000_NAPI
1470 napi_enable(&adapter->napi);
1471 #endif
1472
1473 e1000_irq_enable(adapter);
1474
1475 netif_start_queue(netdev);
1476
1477 /* fire a link status change interrupt to start the watchdog */
1478 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1479
1480 return E1000_SUCCESS;
1481
1482 err_req_irq:
1483 e1000_release_hw_control(adapter);
1484 e1000_power_down_phy(adapter);
1485 e1000_free_all_rx_resources(adapter);
1486 err_setup_rx:
1487 e1000_free_all_tx_resources(adapter);
1488 err_setup_tx:
1489 e1000_reset(adapter);
1490
1491 return err;
1492 }
1493
1494 /**
1495 * e1000_close - Disables a network interface
1496 * @netdev: network interface device structure
1497 *
1498 * Returns 0, this is not allowed to fail
1499 *
1500 * The close entry point is called when an interface is de-activated
1501 * by the OS. The hardware is still under the drivers control, but
1502 * needs to be disabled. A global MAC reset is issued to stop the
1503 * hardware, and all transmit and receive resources are freed.
1504 **/
1505
1506 static int
1507 e1000_close(struct net_device *netdev)
1508 {
1509 struct e1000_adapter *adapter = netdev_priv(netdev);
1510
1511 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1512 e1000_down(adapter);
1513 e1000_power_down_phy(adapter);
1514 e1000_free_irq(adapter);
1515
1516 e1000_free_all_tx_resources(adapter);
1517 e1000_free_all_rx_resources(adapter);
1518
1519 /* kill manageability vlan ID if supported, but not if a vlan with
1520 * the same ID is registered on the host OS (let 8021q kill it) */
1521 if ((adapter->hw.mng_cookie.status &
1522 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1523 !(adapter->vlgrp &&
1524 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1525 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1526 }
1527
1528 /* If AMT is enabled, let the firmware know that the network
1529 * interface is now closed */
1530 if (adapter->hw.mac_type == e1000_82573 &&
1531 e1000_check_mng_mode(&adapter->hw))
1532 e1000_release_hw_control(adapter);
1533
1534 return 0;
1535 }
1536
1537 /**
1538 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1539 * @adapter: address of board private structure
1540 * @start: address of beginning of memory
1541 * @len: length of memory
1542 **/
1543 static bool
1544 e1000_check_64k_bound(struct e1000_adapter *adapter,
1545 void *start, unsigned long len)
1546 {
1547 unsigned long begin = (unsigned long) start;
1548 unsigned long end = begin + len;
1549
1550 /* First rev 82545 and 82546 need to not allow any memory
1551 * write location to cross 64k boundary due to errata 23 */
1552 if (adapter->hw.mac_type == e1000_82545 ||
1553 adapter->hw.mac_type == e1000_82546) {
1554 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1555 }
1556
1557 return true;
1558 }
1559
1560 /**
1561 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1562 * @adapter: board private structure
1563 * @txdr: tx descriptor ring (for a specific queue) to setup
1564 *
1565 * Return 0 on success, negative on failure
1566 **/
1567
1568 static int
1569 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1570 struct e1000_tx_ring *txdr)
1571 {
1572 struct pci_dev *pdev = adapter->pdev;
1573 int size;
1574
1575 size = sizeof(struct e1000_buffer) * txdr->count;
1576 txdr->buffer_info = vmalloc(size);
1577 if (!txdr->buffer_info) {
1578 DPRINTK(PROBE, ERR,
1579 "Unable to allocate memory for the transmit descriptor ring\n");
1580 return -ENOMEM;
1581 }
1582 memset(txdr->buffer_info, 0, size);
1583
1584 /* round up to nearest 4K */
1585
1586 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1587 txdr->size = ALIGN(txdr->size, 4096);
1588
1589 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1590 if (!txdr->desc) {
1591 setup_tx_desc_die:
1592 vfree(txdr->buffer_info);
1593 DPRINTK(PROBE, ERR,
1594 "Unable to allocate memory for the transmit descriptor ring\n");
1595 return -ENOMEM;
1596 }
1597
1598 /* Fix for errata 23, can't cross 64kB boundary */
1599 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1600 void *olddesc = txdr->desc;
1601 dma_addr_t olddma = txdr->dma;
1602 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1603 "at %p\n", txdr->size, txdr->desc);
1604 /* Try again, without freeing the previous */
1605 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1606 /* Failed allocation, critical failure */
1607 if (!txdr->desc) {
1608 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1609 goto setup_tx_desc_die;
1610 }
1611
1612 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1613 /* give up */
1614 pci_free_consistent(pdev, txdr->size, txdr->desc,
1615 txdr->dma);
1616 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1617 DPRINTK(PROBE, ERR,
1618 "Unable to allocate aligned memory "
1619 "for the transmit descriptor ring\n");
1620 vfree(txdr->buffer_info);
1621 return -ENOMEM;
1622 } else {
1623 /* Free old allocation, new allocation was successful */
1624 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1625 }
1626 }
1627 memset(txdr->desc, 0, txdr->size);
1628
1629 txdr->next_to_use = 0;
1630 txdr->next_to_clean = 0;
1631 spin_lock_init(&txdr->tx_lock);
1632
1633 return 0;
1634 }
1635
1636 /**
1637 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1638 * (Descriptors) for all queues
1639 * @adapter: board private structure
1640 *
1641 * Return 0 on success, negative on failure
1642 **/
1643
1644 int
1645 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1646 {
1647 int i, err = 0;
1648
1649 for (i = 0; i < adapter->num_tx_queues; i++) {
1650 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1651 if (err) {
1652 DPRINTK(PROBE, ERR,
1653 "Allocation for Tx Queue %u failed\n", i);
1654 for (i-- ; i >= 0; i--)
1655 e1000_free_tx_resources(adapter,
1656 &adapter->tx_ring[i]);
1657 break;
1658 }
1659 }
1660
1661 return err;
1662 }
1663
1664 /**
1665 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1666 * @adapter: board private structure
1667 *
1668 * Configure the Tx unit of the MAC after a reset.
1669 **/
1670
1671 static void
1672 e1000_configure_tx(struct e1000_adapter *adapter)
1673 {
1674 u64 tdba;
1675 struct e1000_hw *hw = &adapter->hw;
1676 u32 tdlen, tctl, tipg, tarc;
1677 u32 ipgr1, ipgr2;
1678
1679 /* Setup the HW Tx Head and Tail descriptor pointers */
1680
1681 switch (adapter->num_tx_queues) {
1682 case 1:
1683 default:
1684 tdba = adapter->tx_ring[0].dma;
1685 tdlen = adapter->tx_ring[0].count *
1686 sizeof(struct e1000_tx_desc);
1687 E1000_WRITE_REG(hw, TDLEN, tdlen);
1688 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1689 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1690 E1000_WRITE_REG(hw, TDT, 0);
1691 E1000_WRITE_REG(hw, TDH, 0);
1692 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1693 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1694 break;
1695 }
1696
1697 /* Set the default values for the Tx Inter Packet Gap timer */
1698 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1699 (hw->media_type == e1000_media_type_fiber ||
1700 hw->media_type == e1000_media_type_internal_serdes))
1701 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1702 else
1703 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1704
1705 switch (hw->mac_type) {
1706 case e1000_82542_rev2_0:
1707 case e1000_82542_rev2_1:
1708 tipg = DEFAULT_82542_TIPG_IPGT;
1709 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1710 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1711 break;
1712 case e1000_80003es2lan:
1713 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1714 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1715 break;
1716 default:
1717 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1718 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1719 break;
1720 }
1721 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1722 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1723 E1000_WRITE_REG(hw, TIPG, tipg);
1724
1725 /* Set the Tx Interrupt Delay register */
1726
1727 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1728 if (hw->mac_type >= e1000_82540)
1729 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1730
1731 /* Program the Transmit Control Register */
1732
1733 tctl = E1000_READ_REG(hw, TCTL);
1734 tctl &= ~E1000_TCTL_CT;
1735 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1736 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1737
1738 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1739 tarc = E1000_READ_REG(hw, TARC0);
1740 /* set the speed mode bit, we'll clear it if we're not at
1741 * gigabit link later */
1742 tarc |= (1 << 21);
1743 E1000_WRITE_REG(hw, TARC0, tarc);
1744 } else if (hw->mac_type == e1000_80003es2lan) {
1745 tarc = E1000_READ_REG(hw, TARC0);
1746 tarc |= 1;
1747 E1000_WRITE_REG(hw, TARC0, tarc);
1748 tarc = E1000_READ_REG(hw, TARC1);
1749 tarc |= 1;
1750 E1000_WRITE_REG(hw, TARC1, tarc);
1751 }
1752
1753 e1000_config_collision_dist(hw);
1754
1755 /* Setup Transmit Descriptor Settings for eop descriptor */
1756 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1757
1758 /* only set IDE if we are delaying interrupts using the timers */
1759 if (adapter->tx_int_delay)
1760 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1761
1762 if (hw->mac_type < e1000_82543)
1763 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1764 else
1765 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1766
1767 /* Cache if we're 82544 running in PCI-X because we'll
1768 * need this to apply a workaround later in the send path. */
1769 if (hw->mac_type == e1000_82544 &&
1770 hw->bus_type == e1000_bus_type_pcix)
1771 adapter->pcix_82544 = 1;
1772
1773 E1000_WRITE_REG(hw, TCTL, tctl);
1774
1775 }
1776
1777 /**
1778 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1779 * @adapter: board private structure
1780 * @rxdr: rx descriptor ring (for a specific queue) to setup
1781 *
1782 * Returns 0 on success, negative on failure
1783 **/
1784
1785 static int
1786 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1787 struct e1000_rx_ring *rxdr)
1788 {
1789 struct pci_dev *pdev = adapter->pdev;
1790 int size, desc_len;
1791
1792 size = sizeof(struct e1000_buffer) * rxdr->count;
1793 rxdr->buffer_info = vmalloc(size);
1794 if (!rxdr->buffer_info) {
1795 DPRINTK(PROBE, ERR,
1796 "Unable to allocate memory for the receive descriptor ring\n");
1797 return -ENOMEM;
1798 }
1799 memset(rxdr->buffer_info, 0, size);
1800
1801 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1802 GFP_KERNEL);
1803 if (!rxdr->ps_page) {
1804 vfree(rxdr->buffer_info);
1805 DPRINTK(PROBE, ERR,
1806 "Unable to allocate memory for the receive descriptor ring\n");
1807 return -ENOMEM;
1808 }
1809
1810 rxdr->ps_page_dma = kcalloc(rxdr->count,
1811 sizeof(struct e1000_ps_page_dma),
1812 GFP_KERNEL);
1813 if (!rxdr->ps_page_dma) {
1814 vfree(rxdr->buffer_info);
1815 kfree(rxdr->ps_page);
1816 DPRINTK(PROBE, ERR,
1817 "Unable to allocate memory for the receive descriptor ring\n");
1818 return -ENOMEM;
1819 }
1820
1821 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1822 desc_len = sizeof(struct e1000_rx_desc);
1823 else
1824 desc_len = sizeof(union e1000_rx_desc_packet_split);
1825
1826 /* Round up to nearest 4K */
1827
1828 rxdr->size = rxdr->count * desc_len;
1829 rxdr->size = ALIGN(rxdr->size, 4096);
1830
1831 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1832
1833 if (!rxdr->desc) {
1834 DPRINTK(PROBE, ERR,
1835 "Unable to allocate memory for the receive descriptor ring\n");
1836 setup_rx_desc_die:
1837 vfree(rxdr->buffer_info);
1838 kfree(rxdr->ps_page);
1839 kfree(rxdr->ps_page_dma);
1840 return -ENOMEM;
1841 }
1842
1843 /* Fix for errata 23, can't cross 64kB boundary */
1844 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1845 void *olddesc = rxdr->desc;
1846 dma_addr_t olddma = rxdr->dma;
1847 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1848 "at %p\n", rxdr->size, rxdr->desc);
1849 /* Try again, without freeing the previous */
1850 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1851 /* Failed allocation, critical failure */
1852 if (!rxdr->desc) {
1853 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1854 DPRINTK(PROBE, ERR,
1855 "Unable to allocate memory "
1856 "for the receive descriptor ring\n");
1857 goto setup_rx_desc_die;
1858 }
1859
1860 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1861 /* give up */
1862 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1863 rxdr->dma);
1864 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1865 DPRINTK(PROBE, ERR,
1866 "Unable to allocate aligned memory "
1867 "for the receive descriptor ring\n");
1868 goto setup_rx_desc_die;
1869 } else {
1870 /* Free old allocation, new allocation was successful */
1871 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1872 }
1873 }
1874 memset(rxdr->desc, 0, rxdr->size);
1875
1876 rxdr->next_to_clean = 0;
1877 rxdr->next_to_use = 0;
1878
1879 return 0;
1880 }
1881
1882 /**
1883 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1884 * (Descriptors) for all queues
1885 * @adapter: board private structure
1886 *
1887 * Return 0 on success, negative on failure
1888 **/
1889
1890 int
1891 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1892 {
1893 int i, err = 0;
1894
1895 for (i = 0; i < adapter->num_rx_queues; i++) {
1896 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1897 if (err) {
1898 DPRINTK(PROBE, ERR,
1899 "Allocation for Rx Queue %u failed\n", i);
1900 for (i-- ; i >= 0; i--)
1901 e1000_free_rx_resources(adapter,
1902 &adapter->rx_ring[i]);
1903 break;
1904 }
1905 }
1906
1907 return err;
1908 }
1909
1910 /**
1911 * e1000_setup_rctl - configure the receive control registers
1912 * @adapter: Board private structure
1913 **/
1914 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1915 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1916 static void
1917 e1000_setup_rctl(struct e1000_adapter *adapter)
1918 {
1919 u32 rctl, rfctl;
1920 u32 psrctl = 0;
1921 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1922 u32 pages = 0;
1923 #endif
1924
1925 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1926
1927 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1928
1929 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1930 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1931 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1932
1933 if (adapter->hw.tbi_compatibility_on == 1)
1934 rctl |= E1000_RCTL_SBP;
1935 else
1936 rctl &= ~E1000_RCTL_SBP;
1937
1938 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1939 rctl &= ~E1000_RCTL_LPE;
1940 else
1941 rctl |= E1000_RCTL_LPE;
1942
1943 /* Setup buffer sizes */
1944 rctl &= ~E1000_RCTL_SZ_4096;
1945 rctl |= E1000_RCTL_BSEX;
1946 switch (adapter->rx_buffer_len) {
1947 case E1000_RXBUFFER_256:
1948 rctl |= E1000_RCTL_SZ_256;
1949 rctl &= ~E1000_RCTL_BSEX;
1950 break;
1951 case E1000_RXBUFFER_512:
1952 rctl |= E1000_RCTL_SZ_512;
1953 rctl &= ~E1000_RCTL_BSEX;
1954 break;
1955 case E1000_RXBUFFER_1024:
1956 rctl |= E1000_RCTL_SZ_1024;
1957 rctl &= ~E1000_RCTL_BSEX;
1958 break;
1959 case E1000_RXBUFFER_2048:
1960 default:
1961 rctl |= E1000_RCTL_SZ_2048;
1962 rctl &= ~E1000_RCTL_BSEX;
1963 break;
1964 case E1000_RXBUFFER_4096:
1965 rctl |= E1000_RCTL_SZ_4096;
1966 break;
1967 case E1000_RXBUFFER_8192:
1968 rctl |= E1000_RCTL_SZ_8192;
1969 break;
1970 case E1000_RXBUFFER_16384:
1971 rctl |= E1000_RCTL_SZ_16384;
1972 break;
1973 }
1974
1975 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1976 /* 82571 and greater support packet-split where the protocol
1977 * header is placed in skb->data and the packet data is
1978 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1979 * In the case of a non-split, skb->data is linearly filled,
1980 * followed by the page buffers. Therefore, skb->data is
1981 * sized to hold the largest protocol header.
1982 */
1983 /* allocations using alloc_page take too long for regular MTU
1984 * so only enable packet split for jumbo frames */
1985 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1986 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1987 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1988 adapter->rx_ps_pages = pages;
1989 else
1990 adapter->rx_ps_pages = 0;
1991 #endif
1992 if (adapter->rx_ps_pages) {
1993 /* Configure extra packet-split registers */
1994 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1995 rfctl |= E1000_RFCTL_EXTEN;
1996 /* disable packet split support for IPv6 extension headers,
1997 * because some malformed IPv6 headers can hang the RX */
1998 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1999 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2000
2001 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
2002
2003 rctl |= E1000_RCTL_DTYP_PS;
2004
2005 psrctl |= adapter->rx_ps_bsize0 >>
2006 E1000_PSRCTL_BSIZE0_SHIFT;
2007
2008 switch (adapter->rx_ps_pages) {
2009 case 3:
2010 psrctl |= PAGE_SIZE <<
2011 E1000_PSRCTL_BSIZE3_SHIFT;
2012 case 2:
2013 psrctl |= PAGE_SIZE <<
2014 E1000_PSRCTL_BSIZE2_SHIFT;
2015 case 1:
2016 psrctl |= PAGE_SIZE >>
2017 E1000_PSRCTL_BSIZE1_SHIFT;
2018 break;
2019 }
2020
2021 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
2022 }
2023
2024 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2025 }
2026
2027 /**
2028 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2029 * @adapter: board private structure
2030 *
2031 * Configure the Rx unit of the MAC after a reset.
2032 **/
2033
2034 static void
2035 e1000_configure_rx(struct e1000_adapter *adapter)
2036 {
2037 u64 rdba;
2038 struct e1000_hw *hw = &adapter->hw;
2039 u32 rdlen, rctl, rxcsum, ctrl_ext;
2040
2041 if (adapter->rx_ps_pages) {
2042 /* this is a 32 byte descriptor */
2043 rdlen = adapter->rx_ring[0].count *
2044 sizeof(union e1000_rx_desc_packet_split);
2045 adapter->clean_rx = e1000_clean_rx_irq_ps;
2046 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2047 } else {
2048 rdlen = adapter->rx_ring[0].count *
2049 sizeof(struct e1000_rx_desc);
2050 adapter->clean_rx = e1000_clean_rx_irq;
2051 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2052 }
2053
2054 /* disable receives while setting up the descriptors */
2055 rctl = E1000_READ_REG(hw, RCTL);
2056 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2057
2058 /* set the Receive Delay Timer Register */
2059 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2060
2061 if (hw->mac_type >= e1000_82540) {
2062 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2063 if (adapter->itr_setting != 0)
2064 E1000_WRITE_REG(hw, ITR,
2065 1000000000 / (adapter->itr * 256));
2066 }
2067
2068 if (hw->mac_type >= e1000_82571) {
2069 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2070 /* Reset delay timers after every interrupt */
2071 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2072 #ifdef CONFIG_E1000_NAPI
2073 /* Auto-Mask interrupts upon ICR access */
2074 ctrl_ext |= E1000_CTRL_EXT_IAME;
2075 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2076 #endif
2077 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2078 E1000_WRITE_FLUSH(hw);
2079 }
2080
2081 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2082 * the Base and Length of the Rx Descriptor Ring */
2083 switch (adapter->num_rx_queues) {
2084 case 1:
2085 default:
2086 rdba = adapter->rx_ring[0].dma;
2087 E1000_WRITE_REG(hw, RDLEN, rdlen);
2088 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2089 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2090 E1000_WRITE_REG(hw, RDT, 0);
2091 E1000_WRITE_REG(hw, RDH, 0);
2092 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2093 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2094 break;
2095 }
2096
2097 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2098 if (hw->mac_type >= e1000_82543) {
2099 rxcsum = E1000_READ_REG(hw, RXCSUM);
2100 if (adapter->rx_csum) {
2101 rxcsum |= E1000_RXCSUM_TUOFL;
2102
2103 /* Enable 82571 IPv4 payload checksum for UDP fragments
2104 * Must be used in conjunction with packet-split. */
2105 if ((hw->mac_type >= e1000_82571) &&
2106 (adapter->rx_ps_pages)) {
2107 rxcsum |= E1000_RXCSUM_IPPCSE;
2108 }
2109 } else {
2110 rxcsum &= ~E1000_RXCSUM_TUOFL;
2111 /* don't need to clear IPPCSE as it defaults to 0 */
2112 }
2113 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2114 }
2115
2116 /* enable early receives on 82573, only takes effect if using > 2048
2117 * byte total frame size. for example only for jumbo frames */
2118 #define E1000_ERT_2048 0x100
2119 if (hw->mac_type == e1000_82573)
2120 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2121
2122 /* Enable Receives */
2123 E1000_WRITE_REG(hw, RCTL, rctl);
2124 }
2125
2126 /**
2127 * e1000_free_tx_resources - Free Tx Resources per Queue
2128 * @adapter: board private structure
2129 * @tx_ring: Tx descriptor ring for a specific queue
2130 *
2131 * Free all transmit software resources
2132 **/
2133
2134 static void
2135 e1000_free_tx_resources(struct e1000_adapter *adapter,
2136 struct e1000_tx_ring *tx_ring)
2137 {
2138 struct pci_dev *pdev = adapter->pdev;
2139
2140 e1000_clean_tx_ring(adapter, tx_ring);
2141
2142 vfree(tx_ring->buffer_info);
2143 tx_ring->buffer_info = NULL;
2144
2145 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2146
2147 tx_ring->desc = NULL;
2148 }
2149
2150 /**
2151 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2152 * @adapter: board private structure
2153 *
2154 * Free all transmit software resources
2155 **/
2156
2157 void
2158 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2159 {
2160 int i;
2161
2162 for (i = 0; i < adapter->num_tx_queues; i++)
2163 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2164 }
2165
2166 static void
2167 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2168 struct e1000_buffer *buffer_info)
2169 {
2170 if (buffer_info->dma) {
2171 pci_unmap_page(adapter->pdev,
2172 buffer_info->dma,
2173 buffer_info->length,
2174 PCI_DMA_TODEVICE);
2175 buffer_info->dma = 0;
2176 }
2177 if (buffer_info->skb) {
2178 dev_kfree_skb_any(buffer_info->skb);
2179 buffer_info->skb = NULL;
2180 }
2181 /* buffer_info must be completely set up in the transmit path */
2182 }
2183
2184 /**
2185 * e1000_clean_tx_ring - Free Tx Buffers
2186 * @adapter: board private structure
2187 * @tx_ring: ring to be cleaned
2188 **/
2189
2190 static void
2191 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2192 struct e1000_tx_ring *tx_ring)
2193 {
2194 struct e1000_buffer *buffer_info;
2195 unsigned long size;
2196 unsigned int i;
2197
2198 /* Free all the Tx ring sk_buffs */
2199
2200 for (i = 0; i < tx_ring->count; i++) {
2201 buffer_info = &tx_ring->buffer_info[i];
2202 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2203 }
2204
2205 size = sizeof(struct e1000_buffer) * tx_ring->count;
2206 memset(tx_ring->buffer_info, 0, size);
2207
2208 /* Zero out the descriptor ring */
2209
2210 memset(tx_ring->desc, 0, tx_ring->size);
2211
2212 tx_ring->next_to_use = 0;
2213 tx_ring->next_to_clean = 0;
2214 tx_ring->last_tx_tso = 0;
2215
2216 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2217 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2218 }
2219
2220 /**
2221 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2222 * @adapter: board private structure
2223 **/
2224
2225 static void
2226 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2227 {
2228 int i;
2229
2230 for (i = 0; i < adapter->num_tx_queues; i++)
2231 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2232 }
2233
2234 /**
2235 * e1000_free_rx_resources - Free Rx Resources
2236 * @adapter: board private structure
2237 * @rx_ring: ring to clean the resources from
2238 *
2239 * Free all receive software resources
2240 **/
2241
2242 static void
2243 e1000_free_rx_resources(struct e1000_adapter *adapter,
2244 struct e1000_rx_ring *rx_ring)
2245 {
2246 struct pci_dev *pdev = adapter->pdev;
2247
2248 e1000_clean_rx_ring(adapter, rx_ring);
2249
2250 vfree(rx_ring->buffer_info);
2251 rx_ring->buffer_info = NULL;
2252 kfree(rx_ring->ps_page);
2253 rx_ring->ps_page = NULL;
2254 kfree(rx_ring->ps_page_dma);
2255 rx_ring->ps_page_dma = NULL;
2256
2257 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2258
2259 rx_ring->desc = NULL;
2260 }
2261
2262 /**
2263 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2264 * @adapter: board private structure
2265 *
2266 * Free all receive software resources
2267 **/
2268
2269 void
2270 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2271 {
2272 int i;
2273
2274 for (i = 0; i < adapter->num_rx_queues; i++)
2275 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2276 }
2277
2278 /**
2279 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2280 * @adapter: board private structure
2281 * @rx_ring: ring to free buffers from
2282 **/
2283
2284 static void
2285 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2286 struct e1000_rx_ring *rx_ring)
2287 {
2288 struct e1000_buffer *buffer_info;
2289 struct e1000_ps_page *ps_page;
2290 struct e1000_ps_page_dma *ps_page_dma;
2291 struct pci_dev *pdev = adapter->pdev;
2292 unsigned long size;
2293 unsigned int i, j;
2294
2295 /* Free all the Rx ring sk_buffs */
2296 for (i = 0; i < rx_ring->count; i++) {
2297 buffer_info = &rx_ring->buffer_info[i];
2298 if (buffer_info->skb) {
2299 pci_unmap_single(pdev,
2300 buffer_info->dma,
2301 buffer_info->length,
2302 PCI_DMA_FROMDEVICE);
2303
2304 dev_kfree_skb(buffer_info->skb);
2305 buffer_info->skb = NULL;
2306 }
2307 ps_page = &rx_ring->ps_page[i];
2308 ps_page_dma = &rx_ring->ps_page_dma[i];
2309 for (j = 0; j < adapter->rx_ps_pages; j++) {
2310 if (!ps_page->ps_page[j]) break;
2311 pci_unmap_page(pdev,
2312 ps_page_dma->ps_page_dma[j],
2313 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2314 ps_page_dma->ps_page_dma[j] = 0;
2315 put_page(ps_page->ps_page[j]);
2316 ps_page->ps_page[j] = NULL;
2317 }
2318 }
2319
2320 size = sizeof(struct e1000_buffer) * rx_ring->count;
2321 memset(rx_ring->buffer_info, 0, size);
2322 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2323 memset(rx_ring->ps_page, 0, size);
2324 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2325 memset(rx_ring->ps_page_dma, 0, size);
2326
2327 /* Zero out the descriptor ring */
2328
2329 memset(rx_ring->desc, 0, rx_ring->size);
2330
2331 rx_ring->next_to_clean = 0;
2332 rx_ring->next_to_use = 0;
2333
2334 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2335 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2336 }
2337
2338 /**
2339 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2340 * @adapter: board private structure
2341 **/
2342
2343 static void
2344 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2345 {
2346 int i;
2347
2348 for (i = 0; i < adapter->num_rx_queues; i++)
2349 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2350 }
2351
2352 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2353 * and memory write and invalidate disabled for certain operations
2354 */
2355 static void
2356 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2357 {
2358 struct net_device *netdev = adapter->netdev;
2359 u32 rctl;
2360
2361 e1000_pci_clear_mwi(&adapter->hw);
2362
2363 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2364 rctl |= E1000_RCTL_RST;
2365 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2366 E1000_WRITE_FLUSH(&adapter->hw);
2367 mdelay(5);
2368
2369 if (netif_running(netdev))
2370 e1000_clean_all_rx_rings(adapter);
2371 }
2372
2373 static void
2374 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2375 {
2376 struct net_device *netdev = adapter->netdev;
2377 u32 rctl;
2378
2379 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2380 rctl &= ~E1000_RCTL_RST;
2381 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2382 E1000_WRITE_FLUSH(&adapter->hw);
2383 mdelay(5);
2384
2385 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2386 e1000_pci_set_mwi(&adapter->hw);
2387
2388 if (netif_running(netdev)) {
2389 /* No need to loop, because 82542 supports only 1 queue */
2390 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2391 e1000_configure_rx(adapter);
2392 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2393 }
2394 }
2395
2396 /**
2397 * e1000_set_mac - Change the Ethernet Address of the NIC
2398 * @netdev: network interface device structure
2399 * @p: pointer to an address structure
2400 *
2401 * Returns 0 on success, negative on failure
2402 **/
2403
2404 static int
2405 e1000_set_mac(struct net_device *netdev, void *p)
2406 {
2407 struct e1000_adapter *adapter = netdev_priv(netdev);
2408 struct sockaddr *addr = p;
2409
2410 if (!is_valid_ether_addr(addr->sa_data))
2411 return -EADDRNOTAVAIL;
2412
2413 /* 82542 2.0 needs to be in reset to write receive address registers */
2414
2415 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2416 e1000_enter_82542_rst(adapter);
2417
2418 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2419 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2420
2421 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2422
2423 /* With 82571 controllers, LAA may be overwritten (with the default)
2424 * due to controller reset from the other port. */
2425 if (adapter->hw.mac_type == e1000_82571) {
2426 /* activate the work around */
2427 adapter->hw.laa_is_present = 1;
2428
2429 /* Hold a copy of the LAA in RAR[14] This is done so that
2430 * between the time RAR[0] gets clobbered and the time it
2431 * gets fixed (in e1000_watchdog), the actual LAA is in one
2432 * of the RARs and no incoming packets directed to this port
2433 * are dropped. Eventaully the LAA will be in RAR[0] and
2434 * RAR[14] */
2435 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2436 E1000_RAR_ENTRIES - 1);
2437 }
2438
2439 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2440 e1000_leave_82542_rst(adapter);
2441
2442 return 0;
2443 }
2444
2445 /**
2446 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2447 * @netdev: network interface device structure
2448 *
2449 * The set_rx_mode entry point is called whenever the unicast or multicast
2450 * address lists or the network interface flags are updated. This routine is
2451 * responsible for configuring the hardware for proper unicast, multicast,
2452 * promiscuous mode, and all-multi behavior.
2453 **/
2454
2455 static void
2456 e1000_set_rx_mode(struct net_device *netdev)
2457 {
2458 struct e1000_adapter *adapter = netdev_priv(netdev);
2459 struct e1000_hw *hw = &adapter->hw;
2460 struct dev_addr_list *uc_ptr;
2461 struct dev_addr_list *mc_ptr;
2462 u32 rctl;
2463 u32 hash_value;
2464 int i, rar_entries = E1000_RAR_ENTRIES;
2465 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2466 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2467 E1000_NUM_MTA_REGISTERS;
2468
2469 if (adapter->hw.mac_type == e1000_ich8lan)
2470 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2471
2472 /* reserve RAR[14] for LAA over-write work-around */
2473 if (adapter->hw.mac_type == e1000_82571)
2474 rar_entries--;
2475
2476 /* Check for Promiscuous and All Multicast modes */
2477
2478 rctl = E1000_READ_REG(hw, RCTL);
2479
2480 if (netdev->flags & IFF_PROMISC) {
2481 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2482 rctl &= ~E1000_RCTL_VFE;
2483 } else {
2484 if (netdev->flags & IFF_ALLMULTI) {
2485 rctl |= E1000_RCTL_MPE;
2486 } else {
2487 rctl &= ~E1000_RCTL_MPE;
2488 }
2489 if (adapter->hw.mac_type != e1000_ich8lan)
2490 rctl |= E1000_RCTL_VFE;
2491 }
2492
2493 uc_ptr = NULL;
2494 if (netdev->uc_count > rar_entries - 1) {
2495 rctl |= E1000_RCTL_UPE;
2496 } else if (!(netdev->flags & IFF_PROMISC)) {
2497 rctl &= ~E1000_RCTL_UPE;
2498 uc_ptr = netdev->uc_list;
2499 }
2500
2501 E1000_WRITE_REG(hw, RCTL, rctl);
2502
2503 /* 82542 2.0 needs to be in reset to write receive address registers */
2504
2505 if (hw->mac_type == e1000_82542_rev2_0)
2506 e1000_enter_82542_rst(adapter);
2507
2508 /* load the first 14 addresses into the exact filters 1-14. Unicast
2509 * addresses take precedence to avoid disabling unicast filtering
2510 * when possible.
2511 *
2512 * RAR 0 is used for the station MAC adddress
2513 * if there are not 14 addresses, go ahead and clear the filters
2514 * -- with 82571 controllers only 0-13 entries are filled here
2515 */
2516 mc_ptr = netdev->mc_list;
2517
2518 for (i = 1; i < rar_entries; i++) {
2519 if (uc_ptr) {
2520 e1000_rar_set(hw, uc_ptr->da_addr, i);
2521 uc_ptr = uc_ptr->next;
2522 } else if (mc_ptr) {
2523 e1000_rar_set(hw, mc_ptr->da_addr, i);
2524 mc_ptr = mc_ptr->next;
2525 } else {
2526 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2527 E1000_WRITE_FLUSH(hw);
2528 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2529 E1000_WRITE_FLUSH(hw);
2530 }
2531 }
2532 WARN_ON(uc_ptr != NULL);
2533
2534 /* clear the old settings from the multicast hash table */
2535
2536 for (i = 0; i < mta_reg_count; i++) {
2537 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2538 E1000_WRITE_FLUSH(hw);
2539 }
2540
2541 /* load any remaining addresses into the hash table */
2542
2543 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2544 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2545 e1000_mta_set(hw, hash_value);
2546 }
2547
2548 if (hw->mac_type == e1000_82542_rev2_0)
2549 e1000_leave_82542_rst(adapter);
2550 }
2551
2552 /* Need to wait a few seconds after link up to get diagnostic information from
2553 * the phy */
2554
2555 static void
2556 e1000_update_phy_info(unsigned long data)
2557 {
2558 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2559 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2560 }
2561
2562 /**
2563 * e1000_82547_tx_fifo_stall - Timer Call-back
2564 * @data: pointer to adapter cast into an unsigned long
2565 **/
2566
2567 static void
2568 e1000_82547_tx_fifo_stall(unsigned long data)
2569 {
2570 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2571 struct net_device *netdev = adapter->netdev;
2572 u32 tctl;
2573
2574 if (atomic_read(&adapter->tx_fifo_stall)) {
2575 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2576 E1000_READ_REG(&adapter->hw, TDH)) &&
2577 (E1000_READ_REG(&adapter->hw, TDFT) ==
2578 E1000_READ_REG(&adapter->hw, TDFH)) &&
2579 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2580 E1000_READ_REG(&adapter->hw, TDFHS))) {
2581 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2582 E1000_WRITE_REG(&adapter->hw, TCTL,
2583 tctl & ~E1000_TCTL_EN);
2584 E1000_WRITE_REG(&adapter->hw, TDFT,
2585 adapter->tx_head_addr);
2586 E1000_WRITE_REG(&adapter->hw, TDFH,
2587 adapter->tx_head_addr);
2588 E1000_WRITE_REG(&adapter->hw, TDFTS,
2589 adapter->tx_head_addr);
2590 E1000_WRITE_REG(&adapter->hw, TDFHS,
2591 adapter->tx_head_addr);
2592 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2593 E1000_WRITE_FLUSH(&adapter->hw);
2594
2595 adapter->tx_fifo_head = 0;
2596 atomic_set(&adapter->tx_fifo_stall, 0);
2597 netif_wake_queue(netdev);
2598 } else {
2599 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2600 }
2601 }
2602 }
2603
2604 /**
2605 * e1000_watchdog - Timer Call-back
2606 * @data: pointer to adapter cast into an unsigned long
2607 **/
2608 static void
2609 e1000_watchdog(unsigned long data)
2610 {
2611 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2612 struct net_device *netdev = adapter->netdev;
2613 struct e1000_tx_ring *txdr = adapter->tx_ring;
2614 u32 link, tctl;
2615 s32 ret_val;
2616
2617 ret_val = e1000_check_for_link(&adapter->hw);
2618 if ((ret_val == E1000_ERR_PHY) &&
2619 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2620 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2621 /* See e1000_kumeran_lock_loss_workaround() */
2622 DPRINTK(LINK, INFO,
2623 "Gigabit has been disabled, downgrading speed\n");
2624 }
2625
2626 if (adapter->hw.mac_type == e1000_82573) {
2627 e1000_enable_tx_pkt_filtering(&adapter->hw);
2628 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2629 e1000_update_mng_vlan(adapter);
2630 }
2631
2632 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2633 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2634 link = !adapter->hw.serdes_link_down;
2635 else
2636 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2637
2638 if (link) {
2639 if (!netif_carrier_ok(netdev)) {
2640 u32 ctrl;
2641 bool txb2b = true;
2642 e1000_get_speed_and_duplex(&adapter->hw,
2643 &adapter->link_speed,
2644 &adapter->link_duplex);
2645
2646 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2647 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2648 "Flow Control: %s\n",
2649 adapter->link_speed,
2650 adapter->link_duplex == FULL_DUPLEX ?
2651 "Full Duplex" : "Half Duplex",
2652 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2653 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2654 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2655 E1000_CTRL_TFCE) ? "TX" : "None" )));
2656
2657 /* tweak tx_queue_len according to speed/duplex
2658 * and adjust the timeout factor */
2659 netdev->tx_queue_len = adapter->tx_queue_len;
2660 adapter->tx_timeout_factor = 1;
2661 switch (adapter->link_speed) {
2662 case SPEED_10:
2663 txb2b = false;
2664 netdev->tx_queue_len = 10;
2665 adapter->tx_timeout_factor = 8;
2666 break;
2667 case SPEED_100:
2668 txb2b = false;
2669 netdev->tx_queue_len = 100;
2670 /* maybe add some timeout factor ? */
2671 break;
2672 }
2673
2674 if ((adapter->hw.mac_type == e1000_82571 ||
2675 adapter->hw.mac_type == e1000_82572) &&
2676 !txb2b) {
2677 u32 tarc0;
2678 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2679 tarc0 &= ~(1 << 21);
2680 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2681 }
2682
2683 /* disable TSO for pcie and 10/100 speeds, to avoid
2684 * some hardware issues */
2685 if (!adapter->tso_force &&
2686 adapter->hw.bus_type == e1000_bus_type_pci_express){
2687 switch (adapter->link_speed) {
2688 case SPEED_10:
2689 case SPEED_100:
2690 DPRINTK(PROBE,INFO,
2691 "10/100 speed: disabling TSO\n");
2692 netdev->features &= ~NETIF_F_TSO;
2693 netdev->features &= ~NETIF_F_TSO6;
2694 break;
2695 case SPEED_1000:
2696 netdev->features |= NETIF_F_TSO;
2697 netdev->features |= NETIF_F_TSO6;
2698 break;
2699 default:
2700 /* oops */
2701 break;
2702 }
2703 }
2704
2705 /* enable transmits in the hardware, need to do this
2706 * after setting TARC0 */
2707 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2708 tctl |= E1000_TCTL_EN;
2709 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2710
2711 netif_carrier_on(netdev);
2712 netif_wake_queue(netdev);
2713 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2714 adapter->smartspeed = 0;
2715 } else {
2716 /* make sure the receive unit is started */
2717 if (adapter->hw.rx_needs_kicking) {
2718 struct e1000_hw *hw = &adapter->hw;
2719 u32 rctl = E1000_READ_REG(hw, RCTL);
2720 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2721 }
2722 }
2723 } else {
2724 if (netif_carrier_ok(netdev)) {
2725 adapter->link_speed = 0;
2726 adapter->link_duplex = 0;
2727 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2728 netif_carrier_off(netdev);
2729 netif_stop_queue(netdev);
2730 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2731
2732 /* 80003ES2LAN workaround--
2733 * For packet buffer work-around on link down event;
2734 * disable receives in the ISR and
2735 * reset device here in the watchdog
2736 */
2737 if (adapter->hw.mac_type == e1000_80003es2lan)
2738 /* reset device */
2739 schedule_work(&adapter->reset_task);
2740 }
2741
2742 e1000_smartspeed(adapter);
2743 }
2744
2745 e1000_update_stats(adapter);
2746
2747 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2748 adapter->tpt_old = adapter->stats.tpt;
2749 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2750 adapter->colc_old = adapter->stats.colc;
2751
2752 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2753 adapter->gorcl_old = adapter->stats.gorcl;
2754 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2755 adapter->gotcl_old = adapter->stats.gotcl;
2756
2757 e1000_update_adaptive(&adapter->hw);
2758
2759 if (!netif_carrier_ok(netdev)) {
2760 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2761 /* We've lost link, so the controller stops DMA,
2762 * but we've got queued Tx work that's never going
2763 * to get done, so reset controller to flush Tx.
2764 * (Do the reset outside of interrupt context). */
2765 adapter->tx_timeout_count++;
2766 schedule_work(&adapter->reset_task);
2767 }
2768 }
2769
2770 /* Cause software interrupt to ensure rx ring is cleaned */
2771 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2772
2773 /* Force detection of hung controller every watchdog period */
2774 adapter->detect_tx_hung = true;
2775
2776 /* With 82571 controllers, LAA may be overwritten due to controller
2777 * reset from the other port. Set the appropriate LAA in RAR[0] */
2778 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2779 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2780
2781 /* Reset the timer */
2782 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2783 }
2784
2785 enum latency_range {
2786 lowest_latency = 0,
2787 low_latency = 1,
2788 bulk_latency = 2,
2789 latency_invalid = 255
2790 };
2791
2792 /**
2793 * e1000_update_itr - update the dynamic ITR value based on statistics
2794 * Stores a new ITR value based on packets and byte
2795 * counts during the last interrupt. The advantage of per interrupt
2796 * computation is faster updates and more accurate ITR for the current
2797 * traffic pattern. Constants in this function were computed
2798 * based on theoretical maximum wire speed and thresholds were set based
2799 * on testing data as well as attempting to minimize response time
2800 * while increasing bulk throughput.
2801 * this functionality is controlled by the InterruptThrottleRate module
2802 * parameter (see e1000_param.c)
2803 * @adapter: pointer to adapter
2804 * @itr_setting: current adapter->itr
2805 * @packets: the number of packets during this measurement interval
2806 * @bytes: the number of bytes during this measurement interval
2807 **/
2808 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2809 u16 itr_setting,
2810 int packets,
2811 int bytes)
2812 {
2813 unsigned int retval = itr_setting;
2814 struct e1000_hw *hw = &adapter->hw;
2815
2816 if (unlikely(hw->mac_type < e1000_82540))
2817 goto update_itr_done;
2818
2819 if (packets == 0)
2820 goto update_itr_done;
2821
2822 switch (itr_setting) {
2823 case lowest_latency:
2824 /* jumbo frames get bulk treatment*/
2825 if (bytes/packets > 8000)
2826 retval = bulk_latency;
2827 else if ((packets < 5) && (bytes > 512))
2828 retval = low_latency;
2829 break;
2830 case low_latency: /* 50 usec aka 20000 ints/s */
2831 if (bytes > 10000) {
2832 /* jumbo frames need bulk latency setting */
2833 if (bytes/packets > 8000)
2834 retval = bulk_latency;
2835 else if ((packets < 10) || ((bytes/packets) > 1200))
2836 retval = bulk_latency;
2837 else if ((packets > 35))
2838 retval = lowest_latency;
2839 } else if (bytes/packets > 2000)
2840 retval = bulk_latency;
2841 else if (packets <= 2 && bytes < 512)
2842 retval = lowest_latency;
2843 break;
2844 case bulk_latency: /* 250 usec aka 4000 ints/s */
2845 if (bytes > 25000) {
2846 if (packets > 35)
2847 retval = low_latency;
2848 } else if (bytes < 6000) {
2849 retval = low_latency;
2850 }
2851 break;
2852 }
2853
2854 update_itr_done:
2855 return retval;
2856 }
2857
2858 static void e1000_set_itr(struct e1000_adapter *adapter)
2859 {
2860 struct e1000_hw *hw = &adapter->hw;
2861 u16 current_itr;
2862 u32 new_itr = adapter->itr;
2863
2864 if (unlikely(hw->mac_type < e1000_82540))
2865 return;
2866
2867 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2868 if (unlikely(adapter->link_speed != SPEED_1000)) {
2869 current_itr = 0;
2870 new_itr = 4000;
2871 goto set_itr_now;
2872 }
2873
2874 adapter->tx_itr = e1000_update_itr(adapter,
2875 adapter->tx_itr,
2876 adapter->total_tx_packets,
2877 adapter->total_tx_bytes);
2878 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2879 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2880 adapter->tx_itr = low_latency;
2881
2882 adapter->rx_itr = e1000_update_itr(adapter,
2883 adapter->rx_itr,
2884 adapter->total_rx_packets,
2885 adapter->total_rx_bytes);
2886 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2887 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2888 adapter->rx_itr = low_latency;
2889
2890 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2891
2892 switch (current_itr) {
2893 /* counts and packets in update_itr are dependent on these numbers */
2894 case lowest_latency:
2895 new_itr = 70000;
2896 break;
2897 case low_latency:
2898 new_itr = 20000; /* aka hwitr = ~200 */
2899 break;
2900 case bulk_latency:
2901 new_itr = 4000;
2902 break;
2903 default:
2904 break;
2905 }
2906
2907 set_itr_now:
2908 if (new_itr != adapter->itr) {
2909 /* this attempts to bias the interrupt rate towards Bulk
2910 * by adding intermediate steps when interrupt rate is
2911 * increasing */
2912 new_itr = new_itr > adapter->itr ?
2913 min(adapter->itr + (new_itr >> 2), new_itr) :
2914 new_itr;
2915 adapter->itr = new_itr;
2916 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2917 }
2918
2919 return;
2920 }
2921
2922 #define E1000_TX_FLAGS_CSUM 0x00000001
2923 #define E1000_TX_FLAGS_VLAN 0x00000002
2924 #define E1000_TX_FLAGS_TSO 0x00000004
2925 #define E1000_TX_FLAGS_IPV4 0x00000008
2926 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2927 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2928
2929 static int
2930 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2931 struct sk_buff *skb)
2932 {
2933 struct e1000_context_desc *context_desc;
2934 struct e1000_buffer *buffer_info;
2935 unsigned int i;
2936 u32 cmd_length = 0;
2937 u16 ipcse = 0, tucse, mss;
2938 u8 ipcss, ipcso, tucss, tucso, hdr_len;
2939 int err;
2940
2941 if (skb_is_gso(skb)) {
2942 if (skb_header_cloned(skb)) {
2943 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2944 if (err)
2945 return err;
2946 }
2947
2948 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2949 mss = skb_shinfo(skb)->gso_size;
2950 if (skb->protocol == htons(ETH_P_IP)) {
2951 struct iphdr *iph = ip_hdr(skb);
2952 iph->tot_len = 0;
2953 iph->check = 0;
2954 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2955 iph->daddr, 0,
2956 IPPROTO_TCP,
2957 0);
2958 cmd_length = E1000_TXD_CMD_IP;
2959 ipcse = skb_transport_offset(skb) - 1;
2960 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2961 ipv6_hdr(skb)->payload_len = 0;
2962 tcp_hdr(skb)->check =
2963 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2964 &ipv6_hdr(skb)->daddr,
2965 0, IPPROTO_TCP, 0);
2966 ipcse = 0;
2967 }
2968 ipcss = skb_network_offset(skb);
2969 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2970 tucss = skb_transport_offset(skb);
2971 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2972 tucse = 0;
2973
2974 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2975 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2976
2977 i = tx_ring->next_to_use;
2978 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2979 buffer_info = &tx_ring->buffer_info[i];
2980
2981 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2982 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2983 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2984 context_desc->upper_setup.tcp_fields.tucss = tucss;
2985 context_desc->upper_setup.tcp_fields.tucso = tucso;
2986 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2987 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2988 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2989 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2990
2991 buffer_info->time_stamp = jiffies;
2992 buffer_info->next_to_watch = i;
2993
2994 if (++i == tx_ring->count) i = 0;
2995 tx_ring->next_to_use = i;
2996
2997 return true;
2998 }
2999 return false;
3000 }
3001
3002 static bool
3003 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3004 struct sk_buff *skb)
3005 {
3006 struct e1000_context_desc *context_desc;
3007 struct e1000_buffer *buffer_info;
3008 unsigned int i;
3009 u8 css;
3010
3011 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
3012 css = skb_transport_offset(skb);
3013
3014 i = tx_ring->next_to_use;
3015 buffer_info = &tx_ring->buffer_info[i];
3016 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3017
3018 context_desc->lower_setup.ip_config = 0;
3019 context_desc->upper_setup.tcp_fields.tucss = css;
3020 context_desc->upper_setup.tcp_fields.tucso =
3021 css + skb->csum_offset;
3022 context_desc->upper_setup.tcp_fields.tucse = 0;
3023 context_desc->tcp_seg_setup.data = 0;
3024 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3025
3026 buffer_info->time_stamp = jiffies;
3027 buffer_info->next_to_watch = i;
3028
3029 if (unlikely(++i == tx_ring->count)) i = 0;
3030 tx_ring->next_to_use = i;
3031
3032 return true;
3033 }
3034
3035 return false;
3036 }
3037
3038 #define E1000_MAX_TXD_PWR 12
3039 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3040
3041 static int
3042 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3043 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3044 unsigned int nr_frags, unsigned int mss)
3045 {
3046 struct e1000_buffer *buffer_info;
3047 unsigned int len = skb->len;
3048 unsigned int offset = 0, size, count = 0, i;
3049 unsigned int f;
3050 len -= skb->data_len;
3051
3052 i = tx_ring->next_to_use;
3053
3054 while (len) {
3055 buffer_info = &tx_ring->buffer_info[i];
3056 size = min(len, max_per_txd);
3057 /* Workaround for Controller erratum --
3058 * descriptor for non-tso packet in a linear SKB that follows a
3059 * tso gets written back prematurely before the data is fully
3060 * DMA'd to the controller */
3061 if (!skb->data_len && tx_ring->last_tx_tso &&
3062 !skb_is_gso(skb)) {
3063 tx_ring->last_tx_tso = 0;
3064 size -= 4;
3065 }
3066
3067 /* Workaround for premature desc write-backs
3068 * in TSO mode. Append 4-byte sentinel desc */
3069 if (unlikely(mss && !nr_frags && size == len && size > 8))
3070 size -= 4;
3071 /* work-around for errata 10 and it applies
3072 * to all controllers in PCI-X mode
3073 * The fix is to make sure that the first descriptor of a
3074 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3075 */
3076 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3077 (size > 2015) && count == 0))
3078 size = 2015;
3079
3080 /* Workaround for potential 82544 hang in PCI-X. Avoid
3081 * terminating buffers within evenly-aligned dwords. */
3082 if (unlikely(adapter->pcix_82544 &&
3083 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3084 size > 4))
3085 size -= 4;
3086
3087 buffer_info->length = size;
3088 buffer_info->dma =
3089 pci_map_single(adapter->pdev,
3090 skb->data + offset,
3091 size,
3092 PCI_DMA_TODEVICE);
3093 buffer_info->time_stamp = jiffies;
3094 buffer_info->next_to_watch = i;
3095
3096 len -= size;
3097 offset += size;
3098 count++;
3099 if (unlikely(++i == tx_ring->count)) i = 0;
3100 }
3101
3102 for (f = 0; f < nr_frags; f++) {
3103 struct skb_frag_struct *frag;
3104
3105 frag = &skb_shinfo(skb)->frags[f];
3106 len = frag->size;
3107 offset = frag->page_offset;
3108
3109 while (len) {
3110 buffer_info = &tx_ring->buffer_info[i];
3111 size = min(len, max_per_txd);
3112 /* Workaround for premature desc write-backs
3113 * in TSO mode. Append 4-byte sentinel desc */
3114 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3115 size -= 4;
3116 /* Workaround for potential 82544 hang in PCI-X.
3117 * Avoid terminating buffers within evenly-aligned
3118 * dwords. */
3119 if (unlikely(adapter->pcix_82544 &&
3120 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3121 size > 4))
3122 size -= 4;
3123
3124 buffer_info->length = size;
3125 buffer_info->dma =
3126 pci_map_page(adapter->pdev,
3127 frag->page,
3128 offset,
3129 size,
3130 PCI_DMA_TODEVICE);
3131 buffer_info->time_stamp = jiffies;
3132 buffer_info->next_to_watch = i;
3133
3134 len -= size;
3135 offset += size;
3136 count++;
3137 if (unlikely(++i == tx_ring->count)) i = 0;
3138 }
3139 }
3140
3141 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3142 tx_ring->buffer_info[i].skb = skb;
3143 tx_ring->buffer_info[first].next_to_watch = i;
3144
3145 return count;
3146 }
3147
3148 static void
3149 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3150 int tx_flags, int count)
3151 {
3152 struct e1000_tx_desc *tx_desc = NULL;
3153 struct e1000_buffer *buffer_info;
3154 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3155 unsigned int i;
3156
3157 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3158 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3159 E1000_TXD_CMD_TSE;
3160 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3161
3162 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3163 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3164 }
3165
3166 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3167 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3168 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3169 }
3170
3171 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3172 txd_lower |= E1000_TXD_CMD_VLE;
3173 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3174 }
3175
3176 i = tx_ring->next_to_use;
3177
3178 while (count--) {
3179 buffer_info = &tx_ring->buffer_info[i];
3180 tx_desc = E1000_TX_DESC(*tx_ring, i);
3181 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3182 tx_desc->lower.data =
3183 cpu_to_le32(txd_lower | buffer_info->length);
3184 tx_desc->upper.data = cpu_to_le32(txd_upper);
3185 if (unlikely(++i == tx_ring->count)) i = 0;
3186 }
3187
3188 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3189
3190 /* Force memory writes to complete before letting h/w
3191 * know there are new descriptors to fetch. (Only
3192 * applicable for weak-ordered memory model archs,
3193 * such as IA-64). */
3194 wmb();
3195
3196 tx_ring->next_to_use = i;
3197 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3198 /* we need this if more than one processor can write to our tail
3199 * at a time, it syncronizes IO on IA64/Altix systems */
3200 mmiowb();
3201 }
3202
3203 /**
3204 * 82547 workaround to avoid controller hang in half-duplex environment.
3205 * The workaround is to avoid queuing a large packet that would span
3206 * the internal Tx FIFO ring boundary by notifying the stack to resend
3207 * the packet at a later time. This gives the Tx FIFO an opportunity to
3208 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3209 * to the beginning of the Tx FIFO.
3210 **/
3211
3212 #define E1000_FIFO_HDR 0x10
3213 #define E1000_82547_PAD_LEN 0x3E0
3214
3215 static int
3216 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3217 {
3218 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3219 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
3220
3221 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3222
3223 if (adapter->link_duplex != HALF_DUPLEX)
3224 goto no_fifo_stall_required;
3225
3226 if (atomic_read(&adapter->tx_fifo_stall))
3227 return 1;
3228
3229 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3230 atomic_set(&adapter->tx_fifo_stall, 1);
3231 return 1;
3232 }
3233
3234 no_fifo_stall_required:
3235 adapter->tx_fifo_head += skb_fifo_len;
3236 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3237 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3238 return 0;
3239 }
3240
3241 #define MINIMUM_DHCP_PACKET_SIZE 282
3242 static int
3243 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3244 {
3245 struct e1000_hw *hw = &adapter->hw;
3246 u16 length, offset;
3247 if (vlan_tx_tag_present(skb)) {
3248 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3249 ( adapter->hw.mng_cookie.status &
3250 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3251 return 0;
3252 }
3253 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3254 struct ethhdr *eth = (struct ethhdr *) skb->data;
3255 if ((htons(ETH_P_IP) == eth->h_proto)) {
3256 const struct iphdr *ip =
3257 (struct iphdr *)((u8 *)skb->data+14);
3258 if (IPPROTO_UDP == ip->protocol) {
3259 struct udphdr *udp =
3260 (struct udphdr *)((u8 *)ip +
3261 (ip->ihl << 2));
3262 if (ntohs(udp->dest) == 67) {
3263 offset = (u8 *)udp + 8 - skb->data;
3264 length = skb->len - offset;
3265
3266 return e1000_mng_write_dhcp_info(hw,
3267 (u8 *)udp + 8,
3268 length);
3269 }
3270 }
3271 }
3272 }
3273 return 0;
3274 }
3275
3276 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3277 {
3278 struct e1000_adapter *adapter = netdev_priv(netdev);
3279 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3280
3281 netif_stop_queue(netdev);
3282 /* Herbert's original patch had:
3283 * smp_mb__after_netif_stop_queue();
3284 * but since that doesn't exist yet, just open code it. */
3285 smp_mb();
3286
3287 /* We need to check again in a case another CPU has just
3288 * made room available. */
3289 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3290 return -EBUSY;
3291
3292 /* A reprieve! */
3293 netif_start_queue(netdev);
3294 ++adapter->restart_queue;
3295 return 0;
3296 }
3297
3298 static int e1000_maybe_stop_tx(struct net_device *netdev,
3299 struct e1000_tx_ring *tx_ring, int size)
3300 {
3301 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3302 return 0;
3303 return __e1000_maybe_stop_tx(netdev, size);
3304 }
3305
3306 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3307 static int
3308 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3309 {
3310 struct e1000_adapter *adapter = netdev_priv(netdev);
3311 struct e1000_tx_ring *tx_ring;
3312 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3313 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3314 unsigned int tx_flags = 0;
3315 unsigned int len = skb->len - skb->data_len;
3316 unsigned long flags;
3317 unsigned int nr_frags;
3318 unsigned int mss;
3319 int count = 0;
3320 int tso;
3321 unsigned int f;
3322
3323 /* This goes back to the question of how to logically map a tx queue
3324 * to a flow. Right now, performance is impacted slightly negatively
3325 * if using multiple tx queues. If the stack breaks away from a
3326 * single qdisc implementation, we can look at this again. */
3327 tx_ring = adapter->tx_ring;
3328
3329 if (unlikely(skb->len <= 0)) {
3330 dev_kfree_skb_any(skb);
3331 return NETDEV_TX_OK;
3332 }
3333
3334 /* 82571 and newer doesn't need the workaround that limited descriptor
3335 * length to 4kB */
3336 if (adapter->hw.mac_type >= e1000_82571)
3337 max_per_txd = 8192;
3338
3339 mss = skb_shinfo(skb)->gso_size;
3340 /* The controller does a simple calculation to
3341 * make sure there is enough room in the FIFO before
3342 * initiating the DMA for each buffer. The calc is:
3343 * 4 = ceil(buffer len/mss). To make sure we don't
3344 * overrun the FIFO, adjust the max buffer len if mss
3345 * drops. */
3346 if (mss) {
3347 u8 hdr_len;
3348 max_per_txd = min(mss << 2, max_per_txd);
3349 max_txd_pwr = fls(max_per_txd) - 1;
3350
3351 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3352 * points to just header, pull a few bytes of payload from
3353 * frags into skb->data */
3354 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3355 if (skb->data_len && hdr_len == len) {
3356 switch (adapter->hw.mac_type) {
3357 unsigned int pull_size;
3358 case e1000_82544:
3359 /* Make sure we have room to chop off 4 bytes,
3360 * and that the end alignment will work out to
3361 * this hardware's requirements
3362 * NOTE: this is a TSO only workaround
3363 * if end byte alignment not correct move us
3364 * into the next dword */
3365 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3366 break;
3367 /* fall through */
3368 case e1000_82571:
3369 case e1000_82572:
3370 case e1000_82573:
3371 case e1000_ich8lan:
3372 pull_size = min((unsigned int)4, skb->data_len);
3373 if (!__pskb_pull_tail(skb, pull_size)) {
3374 DPRINTK(DRV, ERR,
3375 "__pskb_pull_tail failed.\n");
3376 dev_kfree_skb_any(skb);
3377 return NETDEV_TX_OK;
3378 }
3379 len = skb->len - skb->data_len;
3380 break;
3381 default:
3382 /* do nothing */
3383 break;
3384 }
3385 }
3386 }
3387
3388 /* reserve a descriptor for the offload context */
3389 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3390 count++;
3391 count++;
3392
3393 /* Controller Erratum workaround */
3394 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3395 count++;
3396
3397 count += TXD_USE_COUNT(len, max_txd_pwr);
3398
3399 if (adapter->pcix_82544)
3400 count++;
3401
3402 /* work-around for errata 10 and it applies to all controllers
3403 * in PCI-X mode, so add one more descriptor to the count
3404 */
3405 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3406 (len > 2015)))
3407 count++;
3408
3409 nr_frags = skb_shinfo(skb)->nr_frags;
3410 for (f = 0; f < nr_frags; f++)
3411 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3412 max_txd_pwr);
3413 if (adapter->pcix_82544)
3414 count += nr_frags;
3415
3416
3417 if (adapter->hw.tx_pkt_filtering &&
3418 (adapter->hw.mac_type == e1000_82573))
3419 e1000_transfer_dhcp_info(adapter, skb);
3420
3421 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3422 /* Collision - tell upper layer to requeue */
3423 return NETDEV_TX_LOCKED;
3424
3425 /* need: count + 2 desc gap to keep tail from touching
3426 * head, otherwise try next time */
3427 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3428 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3429 return NETDEV_TX_BUSY;
3430 }
3431
3432 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3433 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3434 netif_stop_queue(netdev);
3435 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3436 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3437 return NETDEV_TX_BUSY;
3438 }
3439 }
3440
3441 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3442 tx_flags |= E1000_TX_FLAGS_VLAN;
3443 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3444 }
3445
3446 first = tx_ring->next_to_use;
3447
3448 tso = e1000_tso(adapter, tx_ring, skb);
3449 if (tso < 0) {
3450 dev_kfree_skb_any(skb);
3451 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3452 return NETDEV_TX_OK;
3453 }
3454
3455 if (likely(tso)) {
3456 tx_ring->last_tx_tso = 1;
3457 tx_flags |= E1000_TX_FLAGS_TSO;
3458 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3459 tx_flags |= E1000_TX_FLAGS_CSUM;
3460
3461 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3462 * 82571 hardware supports TSO capabilities for IPv6 as well...
3463 * no longer assume, we must. */
3464 if (likely(skb->protocol == htons(ETH_P_IP)))
3465 tx_flags |= E1000_TX_FLAGS_IPV4;
3466
3467 e1000_tx_queue(adapter, tx_ring, tx_flags,
3468 e1000_tx_map(adapter, tx_ring, skb, first,
3469 max_per_txd, nr_frags, mss));
3470
3471 netdev->trans_start = jiffies;
3472
3473 /* Make sure there is space in the ring for the next send. */
3474 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3475
3476 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3477 return NETDEV_TX_OK;
3478 }
3479
3480 /**
3481 * e1000_tx_timeout - Respond to a Tx Hang
3482 * @netdev: network interface device structure
3483 **/
3484
3485 static void
3486 e1000_tx_timeout(struct net_device *netdev)
3487 {
3488 struct e1000_adapter *adapter = netdev_priv(netdev);
3489
3490 /* Do the reset outside of interrupt context */
3491 adapter->tx_timeout_count++;
3492 schedule_work(&adapter->reset_task);
3493 }
3494
3495 static void
3496 e1000_reset_task(struct work_struct *work)
3497 {
3498 struct e1000_adapter *adapter =
3499 container_of(work, struct e1000_adapter, reset_task);
3500
3501 e1000_reinit_locked(adapter);
3502 }
3503
3504 /**
3505 * e1000_get_stats - Get System Network Statistics
3506 * @netdev: network interface device structure
3507 *
3508 * Returns the address of the device statistics structure.
3509 * The statistics are actually updated from the timer callback.
3510 **/
3511
3512 static struct net_device_stats *
3513 e1000_get_stats(struct net_device *netdev)
3514 {
3515 struct e1000_adapter *adapter = netdev_priv(netdev);
3516
3517 /* only return the current stats */
3518 return &adapter->net_stats;
3519 }
3520
3521 /**
3522 * e1000_change_mtu - Change the Maximum Transfer Unit
3523 * @netdev: network interface device structure
3524 * @new_mtu: new value for maximum frame size
3525 *
3526 * Returns 0 on success, negative on failure
3527 **/
3528
3529 static int
3530 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3531 {
3532 struct e1000_adapter *adapter = netdev_priv(netdev);
3533 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3534 u16 eeprom_data = 0;
3535
3536 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3537 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3538 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3539 return -EINVAL;
3540 }
3541
3542 /* Adapter-specific max frame size limits. */
3543 switch (adapter->hw.mac_type) {
3544 case e1000_undefined ... e1000_82542_rev2_1:
3545 case e1000_ich8lan:
3546 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3547 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3548 return -EINVAL;
3549 }
3550 break;
3551 case e1000_82573:
3552 /* Jumbo Frames not supported if:
3553 * - this is not an 82573L device
3554 * - ASPM is enabled in any way (0x1A bits 3:2) */
3555 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3556 &eeprom_data);
3557 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3558 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3559 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3560 DPRINTK(PROBE, ERR,
3561 "Jumbo Frames not supported.\n");
3562 return -EINVAL;
3563 }
3564 break;
3565 }
3566 /* ERT will be enabled later to enable wire speed receives */
3567
3568 /* fall through to get support */
3569 case e1000_82571:
3570 case e1000_82572:
3571 case e1000_80003es2lan:
3572 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3573 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3574 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3575 return -EINVAL;
3576 }
3577 break;
3578 default:
3579 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3580 break;
3581 }
3582
3583 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3584 * means we reserve 2 more, this pushes us to allocate from the next
3585 * larger slab size
3586 * i.e. RXBUFFER_2048 --> size-4096 slab */
3587
3588 if (max_frame <= E1000_RXBUFFER_256)
3589 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3590 else if (max_frame <= E1000_RXBUFFER_512)
3591 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3592 else if (max_frame <= E1000_RXBUFFER_1024)
3593 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3594 else if (max_frame <= E1000_RXBUFFER_2048)
3595 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3596 else if (max_frame <= E1000_RXBUFFER_4096)
3597 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3598 else if (max_frame <= E1000_RXBUFFER_8192)
3599 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3600 else if (max_frame <= E1000_RXBUFFER_16384)
3601 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3602
3603 /* adjust allocation if LPE protects us, and we aren't using SBP */
3604 if (!adapter->hw.tbi_compatibility_on &&
3605 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3606 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3607 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3608
3609 netdev->mtu = new_mtu;
3610 adapter->hw.max_frame_size = max_frame;
3611
3612 if (netif_running(netdev))
3613 e1000_reinit_locked(adapter);
3614
3615 return 0;
3616 }
3617
3618 /**
3619 * e1000_update_stats - Update the board statistics counters
3620 * @adapter: board private structure
3621 **/
3622
3623 void
3624 e1000_update_stats(struct e1000_adapter *adapter)
3625 {
3626 struct e1000_hw *hw = &adapter->hw;
3627 struct pci_dev *pdev = adapter->pdev;
3628 unsigned long flags;
3629 u16 phy_tmp;
3630
3631 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3632
3633 /*
3634 * Prevent stats update while adapter is being reset, or if the pci
3635 * connection is down.
3636 */
3637 if (adapter->link_speed == 0)
3638 return;
3639 if (pci_channel_offline(pdev))
3640 return;
3641
3642 spin_lock_irqsave(&adapter->stats_lock, flags);
3643
3644 /* these counters are modified from e1000_tbi_adjust_stats,
3645 * called from the interrupt context, so they must only
3646 * be written while holding adapter->stats_lock
3647 */
3648
3649 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3650 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3651 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3652 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3653 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3654 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3655 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3656
3657 if (adapter->hw.mac_type != e1000_ich8lan) {
3658 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3659 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3660 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3661 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3662 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3663 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3664 }
3665
3666 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3667 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3668 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3669 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3670 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3671 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3672 adapter->stats.dc += E1000_READ_REG(hw, DC);
3673 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3674 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3675 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3676 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3677 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3678 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3679 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3680 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3681 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3682 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3683 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3684 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3685 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3686 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3687 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3688 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3689 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3690 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3691 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3692
3693 if (adapter->hw.mac_type != e1000_ich8lan) {
3694 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3695 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3696 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3697 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3698 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3699 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3700 }
3701
3702 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3703 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3704
3705 /* used for adaptive IFS */
3706
3707 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3708 adapter->stats.tpt += hw->tx_packet_delta;
3709 hw->collision_delta = E1000_READ_REG(hw, COLC);
3710 adapter->stats.colc += hw->collision_delta;
3711
3712 if (hw->mac_type >= e1000_82543) {
3713 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3714 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3715 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3716 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3717 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3718 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3719 }
3720 if (hw->mac_type > e1000_82547_rev_2) {
3721 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3722 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3723
3724 if (adapter->hw.mac_type != e1000_ich8lan) {
3725 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3726 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3727 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3728 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3729 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3730 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3731 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3732 }
3733 }
3734
3735 /* Fill out the OS statistics structure */
3736 adapter->net_stats.multicast = adapter->stats.mprc;
3737 adapter->net_stats.collisions = adapter->stats.colc;
3738
3739 /* Rx Errors */
3740
3741 /* RLEC on some newer hardware can be incorrect so build
3742 * our own version based on RUC and ROC */
3743 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3744 adapter->stats.crcerrs + adapter->stats.algnerrc +
3745 adapter->stats.ruc + adapter->stats.roc +
3746 adapter->stats.cexterr;
3747 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3748 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3749 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3750 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3751 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3752
3753 /* Tx Errors */
3754 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3755 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3756 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3757 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3758 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3759 if (adapter->hw.bad_tx_carr_stats_fd &&
3760 adapter->link_duplex == FULL_DUPLEX) {
3761 adapter->net_stats.tx_carrier_errors = 0;
3762 adapter->stats.tncrs = 0;
3763 }
3764
3765 /* Tx Dropped needs to be maintained elsewhere */
3766
3767 /* Phy Stats */
3768 if (hw->media_type == e1000_media_type_copper) {
3769 if ((adapter->link_speed == SPEED_1000) &&
3770 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3771 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3772 adapter->phy_stats.idle_errors += phy_tmp;
3773 }
3774
3775 if ((hw->mac_type <= e1000_82546) &&
3776 (hw->phy_type == e1000_phy_m88) &&
3777 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3778 adapter->phy_stats.receive_errors += phy_tmp;
3779 }
3780
3781 /* Management Stats */
3782 if (adapter->hw.has_smbus) {
3783 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3784 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3785 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3786 }
3787
3788 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3789 }
3790
3791 /**
3792 * e1000_intr_msi - Interrupt Handler
3793 * @irq: interrupt number
3794 * @data: pointer to a network interface device structure
3795 **/
3796
3797 static irqreturn_t
3798 e1000_intr_msi(int irq, void *data)
3799 {
3800 struct net_device *netdev = data;
3801 struct e1000_adapter *adapter = netdev_priv(netdev);
3802 struct e1000_hw *hw = &adapter->hw;
3803 #ifndef CONFIG_E1000_NAPI
3804 int i;
3805 #endif
3806 u32 icr = E1000_READ_REG(hw, ICR);
3807
3808 /* in NAPI mode read ICR disables interrupts using IAM */
3809
3810 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3811 hw->get_link_status = 1;
3812 /* 80003ES2LAN workaround-- For packet buffer work-around on
3813 * link down event; disable receives here in the ISR and reset
3814 * adapter in watchdog */
3815 if (netif_carrier_ok(netdev) &&
3816 (adapter->hw.mac_type == e1000_80003es2lan)) {
3817 /* disable receives */
3818 u32 rctl = E1000_READ_REG(hw, RCTL);
3819 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3820 }
3821 /* guard against interrupt when we're going down */
3822 if (!test_bit(__E1000_DOWN, &adapter->flags))
3823 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3824 }
3825
3826 #ifdef CONFIG_E1000_NAPI
3827 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3828 adapter->total_tx_bytes = 0;
3829 adapter->total_tx_packets = 0;
3830 adapter->total_rx_bytes = 0;
3831 adapter->total_rx_packets = 0;
3832 __netif_rx_schedule(netdev, &adapter->napi);
3833 } else
3834 e1000_irq_enable(adapter);
3835 #else
3836 adapter->total_tx_bytes = 0;
3837 adapter->total_rx_bytes = 0;
3838 adapter->total_tx_packets = 0;
3839 adapter->total_rx_packets = 0;
3840
3841 for (i = 0; i < E1000_MAX_INTR; i++)
3842 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3843 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3844 break;
3845
3846 if (likely(adapter->itr_setting & 3))
3847 e1000_set_itr(adapter);
3848 #endif
3849
3850 return IRQ_HANDLED;
3851 }
3852
3853 /**
3854 * e1000_intr - Interrupt Handler
3855 * @irq: interrupt number
3856 * @data: pointer to a network interface device structure
3857 **/
3858
3859 static irqreturn_t
3860 e1000_intr(int irq, void *data)
3861 {
3862 struct net_device *netdev = data;
3863 struct e1000_adapter *adapter = netdev_priv(netdev);
3864 struct e1000_hw *hw = &adapter->hw;
3865 u32 rctl, icr = E1000_READ_REG(hw, ICR);
3866 #ifndef CONFIG_E1000_NAPI
3867 int i;
3868 #endif
3869 if (unlikely(!icr))
3870 return IRQ_NONE; /* Not our interrupt */
3871
3872 #ifdef CONFIG_E1000_NAPI
3873 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3874 * not set, then the adapter didn't send an interrupt */
3875 if (unlikely(hw->mac_type >= e1000_82571 &&
3876 !(icr & E1000_ICR_INT_ASSERTED)))
3877 return IRQ_NONE;
3878
3879 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3880 * need for the IMC write */
3881 #endif
3882
3883 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3884 hw->get_link_status = 1;
3885 /* 80003ES2LAN workaround--
3886 * For packet buffer work-around on link down event;
3887 * disable receives here in the ISR and
3888 * reset adapter in watchdog
3889 */
3890 if (netif_carrier_ok(netdev) &&
3891 (adapter->hw.mac_type == e1000_80003es2lan)) {
3892 /* disable receives */
3893 rctl = E1000_READ_REG(hw, RCTL);
3894 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3895 }
3896 /* guard against interrupt when we're going down */
3897 if (!test_bit(__E1000_DOWN, &adapter->flags))
3898 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3899 }
3900
3901 #ifdef CONFIG_E1000_NAPI
3902 if (unlikely(hw->mac_type < e1000_82571)) {
3903 /* disable interrupts, without the synchronize_irq bit */
3904 E1000_WRITE_REG(hw, IMC, ~0);
3905 E1000_WRITE_FLUSH(hw);
3906 }
3907 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3908 adapter->total_tx_bytes = 0;
3909 adapter->total_tx_packets = 0;
3910 adapter->total_rx_bytes = 0;
3911 adapter->total_rx_packets = 0;
3912 __netif_rx_schedule(netdev, &adapter->napi);
3913 } else
3914 /* this really should not happen! if it does it is basically a
3915 * bug, but not a hard error, so enable ints and continue */
3916 e1000_irq_enable(adapter);
3917 #else
3918 /* Writing IMC and IMS is needed for 82547.
3919 * Due to Hub Link bus being occupied, an interrupt
3920 * de-assertion message is not able to be sent.
3921 * When an interrupt assertion message is generated later,
3922 * two messages are re-ordered and sent out.
3923 * That causes APIC to think 82547 is in de-assertion
3924 * state, while 82547 is in assertion state, resulting
3925 * in dead lock. Writing IMC forces 82547 into
3926 * de-assertion state.
3927 */
3928 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3929 E1000_WRITE_REG(hw, IMC, ~0);
3930
3931 adapter->total_tx_bytes = 0;
3932 adapter->total_rx_bytes = 0;
3933 adapter->total_tx_packets = 0;
3934 adapter->total_rx_packets = 0;
3935
3936 for (i = 0; i < E1000_MAX_INTR; i++)
3937 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3938 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3939 break;
3940
3941 if (likely(adapter->itr_setting & 3))
3942 e1000_set_itr(adapter);
3943
3944 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3945 e1000_irq_enable(adapter);
3946
3947 #endif
3948 return IRQ_HANDLED;
3949 }
3950
3951 #ifdef CONFIG_E1000_NAPI
3952 /**
3953 * e1000_clean - NAPI Rx polling callback
3954 * @adapter: board private structure
3955 **/
3956
3957 static int
3958 e1000_clean(struct napi_struct *napi, int budget)
3959 {
3960 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3961 struct net_device *poll_dev = adapter->netdev;
3962 int tx_cleaned = 0, work_done = 0;
3963
3964 /* Must NOT use netdev_priv macro here. */
3965 adapter = poll_dev->priv;
3966
3967 /* e1000_clean is called per-cpu. This lock protects
3968 * tx_ring[0] from being cleaned by multiple cpus
3969 * simultaneously. A failure obtaining the lock means
3970 * tx_ring[0] is currently being cleaned anyway. */
3971 if (spin_trylock(&adapter->tx_queue_lock)) {
3972 tx_cleaned = e1000_clean_tx_irq(adapter,
3973 &adapter->tx_ring[0]);
3974 spin_unlock(&adapter->tx_queue_lock);
3975 }
3976
3977 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3978 &work_done, budget);
3979
3980 if (tx_cleaned)
3981 work_done = budget;
3982
3983 /* If budget not fully consumed, exit the polling mode */
3984 if (work_done < budget) {
3985 if (likely(adapter->itr_setting & 3))
3986 e1000_set_itr(adapter);
3987 netif_rx_complete(poll_dev, napi);
3988 e1000_irq_enable(adapter);
3989 }
3990
3991 return work_done;
3992 }
3993
3994 #endif
3995 /**
3996 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3997 * @adapter: board private structure
3998 **/
3999
4000 static bool
4001 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4002 struct e1000_tx_ring *tx_ring)
4003 {
4004 struct net_device *netdev = adapter->netdev;
4005 struct e1000_tx_desc *tx_desc, *eop_desc;
4006 struct e1000_buffer *buffer_info;
4007 unsigned int i, eop;
4008 #ifdef CONFIG_E1000_NAPI
4009 unsigned int count = 0;
4010 #endif
4011 bool cleaned = false;
4012 unsigned int total_tx_bytes=0, total_tx_packets=0;
4013
4014 i = tx_ring->next_to_clean;
4015 eop = tx_ring->buffer_info[i].next_to_watch;
4016 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4017
4018 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4019 for (cleaned = false; !cleaned; ) {
4020 tx_desc = E1000_TX_DESC(*tx_ring, i);
4021 buffer_info = &tx_ring->buffer_info[i];
4022 cleaned = (i == eop);
4023
4024 if (cleaned) {
4025 struct sk_buff *skb = buffer_info->skb;
4026 unsigned int segs, bytecount;
4027 segs = skb_shinfo(skb)->gso_segs ?: 1;
4028 /* multiply data chunks by size of headers */
4029 bytecount = ((segs - 1) * skb_headlen(skb)) +
4030 skb->len;
4031 total_tx_packets += segs;
4032 total_tx_bytes += bytecount;
4033 }
4034 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4035 tx_desc->upper.data = 0;
4036
4037 if (unlikely(++i == tx_ring->count)) i = 0;
4038 }
4039
4040 eop = tx_ring->buffer_info[i].next_to_watch;
4041 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4042 #ifdef CONFIG_E1000_NAPI
4043 #define E1000_TX_WEIGHT 64
4044 /* weight of a sort for tx, to avoid endless transmit cleanup */
4045 if (count++ == E1000_TX_WEIGHT) break;
4046 #endif
4047 }
4048
4049 tx_ring->next_to_clean = i;
4050
4051 #define TX_WAKE_THRESHOLD 32
4052 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4053 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4054 /* Make sure that anybody stopping the queue after this
4055 * sees the new next_to_clean.
4056 */
4057 smp_mb();
4058 if (netif_queue_stopped(netdev)) {
4059 netif_wake_queue(netdev);
4060 ++adapter->restart_queue;
4061 }
4062 }
4063
4064 if (adapter->detect_tx_hung) {
4065 /* Detect a transmit hang in hardware, this serializes the
4066 * check with the clearing of time_stamp and movement of i */
4067 adapter->detect_tx_hung = false;
4068 if (tx_ring->buffer_info[eop].dma &&
4069 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4070 (adapter->tx_timeout_factor * HZ))
4071 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4072 E1000_STATUS_TXOFF)) {
4073
4074 /* detected Tx unit hang */
4075 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4076 " Tx Queue <%lu>\n"
4077 " TDH <%x>\n"
4078 " TDT <%x>\n"
4079 " next_to_use <%x>\n"
4080 " next_to_clean <%x>\n"
4081 "buffer_info[next_to_clean]\n"
4082 " time_stamp <%lx>\n"
4083 " next_to_watch <%x>\n"
4084 " jiffies <%lx>\n"
4085 " next_to_watch.status <%x>\n",
4086 (unsigned long)((tx_ring - adapter->tx_ring) /
4087 sizeof(struct e1000_tx_ring)),
4088 readl(adapter->hw.hw_addr + tx_ring->tdh),
4089 readl(adapter->hw.hw_addr + tx_ring->tdt),
4090 tx_ring->next_to_use,
4091 tx_ring->next_to_clean,
4092 tx_ring->buffer_info[eop].time_stamp,
4093 eop,
4094 jiffies,
4095 eop_desc->upper.fields.status);
4096 netif_stop_queue(netdev);
4097 }
4098 }
4099 adapter->total_tx_bytes += total_tx_bytes;
4100 adapter->total_tx_packets += total_tx_packets;
4101 adapter->net_stats.tx_bytes += total_tx_bytes;
4102 adapter->net_stats.tx_packets += total_tx_packets;
4103 return cleaned;
4104 }
4105
4106 /**
4107 * e1000_rx_checksum - Receive Checksum Offload for 82543
4108 * @adapter: board private structure
4109 * @status_err: receive descriptor status and error fields
4110 * @csum: receive descriptor csum field
4111 * @sk_buff: socket buffer with received data
4112 **/
4113
4114 static void
4115 e1000_rx_checksum(struct e1000_adapter *adapter,
4116 u32 status_err, u32 csum,
4117 struct sk_buff *skb)
4118 {
4119 u16 status = (u16)status_err;
4120 u8 errors = (u8)(status_err >> 24);
4121 skb->ip_summed = CHECKSUM_NONE;
4122
4123 /* 82543 or newer only */
4124 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4125 /* Ignore Checksum bit is set */
4126 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4127 /* TCP/UDP checksum error bit is set */
4128 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4129 /* let the stack verify checksum errors */
4130 adapter->hw_csum_err++;
4131 return;
4132 }
4133 /* TCP/UDP Checksum has not been calculated */
4134 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4135 if (!(status & E1000_RXD_STAT_TCPCS))
4136 return;
4137 } else {
4138 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4139 return;
4140 }
4141 /* It must be a TCP or UDP packet with a valid checksum */
4142 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4143 /* TCP checksum is good */
4144 skb->ip_summed = CHECKSUM_UNNECESSARY;
4145 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4146 /* IP fragment with UDP payload */
4147 /* Hardware complements the payload checksum, so we undo it
4148 * and then put the value in host order for further stack use.
4149 */
4150 __sum16 sum = (__force __sum16)htons(csum);
4151 skb->csum = csum_unfold(~sum);
4152 skb->ip_summed = CHECKSUM_COMPLETE;
4153 }
4154 adapter->hw_csum_good++;
4155 }
4156
4157 /**
4158 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4159 * @adapter: board private structure
4160 **/
4161
4162 static bool
4163 #ifdef CONFIG_E1000_NAPI
4164 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4165 struct e1000_rx_ring *rx_ring,
4166 int *work_done, int work_to_do)
4167 #else
4168 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4169 struct e1000_rx_ring *rx_ring)
4170 #endif
4171 {
4172 struct net_device *netdev = adapter->netdev;
4173 struct pci_dev *pdev = adapter->pdev;
4174 struct e1000_rx_desc *rx_desc, *next_rxd;
4175 struct e1000_buffer *buffer_info, *next_buffer;
4176 unsigned long flags;
4177 u32 length;
4178 u8 last_byte;
4179 unsigned int i;
4180 int cleaned_count = 0;
4181 bool cleaned = false;
4182 unsigned int total_rx_bytes=0, total_rx_packets=0;
4183
4184 i = rx_ring->next_to_clean;
4185 rx_desc = E1000_RX_DESC(*rx_ring, i);
4186 buffer_info = &rx_ring->buffer_info[i];
4187
4188 while (rx_desc->status & E1000_RXD_STAT_DD) {
4189 struct sk_buff *skb;
4190 u8 status;
4191
4192 #ifdef CONFIG_E1000_NAPI
4193 if (*work_done >= work_to_do)
4194 break;
4195 (*work_done)++;
4196 #endif
4197 status = rx_desc->status;
4198 skb = buffer_info->skb;
4199 buffer_info->skb = NULL;
4200
4201 prefetch(skb->data - NET_IP_ALIGN);
4202
4203 if (++i == rx_ring->count) i = 0;
4204 next_rxd = E1000_RX_DESC(*rx_ring, i);
4205 prefetch(next_rxd);
4206
4207 next_buffer = &rx_ring->buffer_info[i];
4208
4209 cleaned = true;
4210 cleaned_count++;
4211 pci_unmap_single(pdev,
4212 buffer_info->dma,
4213 buffer_info->length,
4214 PCI_DMA_FROMDEVICE);
4215
4216 length = le16_to_cpu(rx_desc->length);
4217
4218 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4219 /* All receives must fit into a single buffer */
4220 E1000_DBG("%s: Receive packet consumed multiple"
4221 " buffers\n", netdev->name);
4222 /* recycle */
4223 buffer_info->skb = skb;
4224 goto next_desc;
4225 }
4226
4227 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4228 last_byte = *(skb->data + length - 1);
4229 if (TBI_ACCEPT(&adapter->hw, status,
4230 rx_desc->errors, length, last_byte)) {
4231 spin_lock_irqsave(&adapter->stats_lock, flags);
4232 e1000_tbi_adjust_stats(&adapter->hw,
4233 &adapter->stats,
4234 length, skb->data);
4235 spin_unlock_irqrestore(&adapter->stats_lock,
4236 flags);
4237 length--;
4238 } else {
4239 /* recycle */
4240 buffer_info->skb = skb;
4241 goto next_desc;
4242 }
4243 }
4244
4245 /* adjust length to remove Ethernet CRC, this must be
4246 * done after the TBI_ACCEPT workaround above */
4247 length -= 4;
4248
4249 /* probably a little skewed due to removing CRC */
4250 total_rx_bytes += length;
4251 total_rx_packets++;
4252
4253 /* code added for copybreak, this should improve
4254 * performance for small packets with large amounts
4255 * of reassembly being done in the stack */
4256 if (length < copybreak) {
4257 struct sk_buff *new_skb =
4258 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4259 if (new_skb) {
4260 skb_reserve(new_skb, NET_IP_ALIGN);
4261 skb_copy_to_linear_data_offset(new_skb,
4262 -NET_IP_ALIGN,
4263 (skb->data -
4264 NET_IP_ALIGN),
4265 (length +
4266 NET_IP_ALIGN));
4267 /* save the skb in buffer_info as good */
4268 buffer_info->skb = skb;
4269 skb = new_skb;
4270 }
4271 /* else just continue with the old one */
4272 }
4273 /* end copybreak code */
4274 skb_put(skb, length);
4275
4276 /* Receive Checksum Offload */
4277 e1000_rx_checksum(adapter,
4278 (u32)(status) |
4279 ((u32)(rx_desc->errors) << 24),
4280 le16_to_cpu(rx_desc->csum), skb);
4281
4282 skb->protocol = eth_type_trans(skb, netdev);
4283 #ifdef CONFIG_E1000_NAPI
4284 if (unlikely(adapter->vlgrp &&
4285 (status & E1000_RXD_STAT_VP))) {
4286 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4287 le16_to_cpu(rx_desc->special));
4288 } else {
4289 netif_receive_skb(skb);
4290 }
4291 #else /* CONFIG_E1000_NAPI */
4292 if (unlikely(adapter->vlgrp &&
4293 (status & E1000_RXD_STAT_VP))) {
4294 vlan_hwaccel_rx(skb, adapter->vlgrp,
4295 le16_to_cpu(rx_desc->special));
4296 } else {
4297 netif_rx(skb);
4298 }
4299 #endif /* CONFIG_E1000_NAPI */
4300 netdev->last_rx = jiffies;
4301
4302 next_desc:
4303 rx_desc->status = 0;
4304
4305 /* return some buffers to hardware, one at a time is too slow */
4306 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4307 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4308 cleaned_count = 0;
4309 }
4310
4311 /* use prefetched values */
4312 rx_desc = next_rxd;
4313 buffer_info = next_buffer;
4314 }
4315 rx_ring->next_to_clean = i;
4316
4317 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4318 if (cleaned_count)
4319 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4320
4321 adapter->total_rx_packets += total_rx_packets;
4322 adapter->total_rx_bytes += total_rx_bytes;
4323 adapter->net_stats.rx_bytes += total_rx_bytes;
4324 adapter->net_stats.rx_packets += total_rx_packets;
4325 return cleaned;
4326 }
4327
4328 /**
4329 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4330 * @adapter: board private structure
4331 **/
4332
4333 static bool
4334 #ifdef CONFIG_E1000_NAPI
4335 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4336 struct e1000_rx_ring *rx_ring,
4337 int *work_done, int work_to_do)
4338 #else
4339 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4340 struct e1000_rx_ring *rx_ring)
4341 #endif
4342 {
4343 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4344 struct net_device *netdev = adapter->netdev;
4345 struct pci_dev *pdev = adapter->pdev;
4346 struct e1000_buffer *buffer_info, *next_buffer;
4347 struct e1000_ps_page *ps_page;
4348 struct e1000_ps_page_dma *ps_page_dma;
4349 struct sk_buff *skb;
4350 unsigned int i, j;
4351 u32 length, staterr;
4352 int cleaned_count = 0;
4353 bool cleaned = false;
4354 unsigned int total_rx_bytes=0, total_rx_packets=0;
4355
4356 i = rx_ring->next_to_clean;
4357 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4358 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4359 buffer_info = &rx_ring->buffer_info[i];
4360
4361 while (staterr & E1000_RXD_STAT_DD) {
4362 ps_page = &rx_ring->ps_page[i];
4363 ps_page_dma = &rx_ring->ps_page_dma[i];
4364 #ifdef CONFIG_E1000_NAPI
4365 if (unlikely(*work_done >= work_to_do))
4366 break;
4367 (*work_done)++;
4368 #endif
4369 skb = buffer_info->skb;
4370
4371 /* in the packet split case this is header only */
4372 prefetch(skb->data - NET_IP_ALIGN);
4373
4374 if (++i == rx_ring->count) i = 0;
4375 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4376 prefetch(next_rxd);
4377
4378 next_buffer = &rx_ring->buffer_info[i];
4379
4380 cleaned = true;
4381 cleaned_count++;
4382 pci_unmap_single(pdev, buffer_info->dma,
4383 buffer_info->length,
4384 PCI_DMA_FROMDEVICE);
4385
4386 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4387 E1000_DBG("%s: Packet Split buffers didn't pick up"
4388 " the full packet\n", netdev->name);
4389 dev_kfree_skb_irq(skb);
4390 goto next_desc;
4391 }
4392
4393 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4394 dev_kfree_skb_irq(skb);
4395 goto next_desc;
4396 }
4397
4398 length = le16_to_cpu(rx_desc->wb.middle.length0);
4399
4400 if (unlikely(!length)) {
4401 E1000_DBG("%s: Last part of the packet spanning"
4402 " multiple descriptors\n", netdev->name);
4403 dev_kfree_skb_irq(skb);
4404 goto next_desc;
4405 }
4406
4407 /* Good Receive */
4408 skb_put(skb, length);
4409
4410 {
4411 /* this looks ugly, but it seems compiler issues make it
4412 more efficient than reusing j */
4413 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4414
4415 /* page alloc/put takes too long and effects small packet
4416 * throughput, so unsplit small packets and save the alloc/put*/
4417 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4418 u8 *vaddr;
4419 /* there is no documentation about how to call
4420 * kmap_atomic, so we can't hold the mapping
4421 * very long */
4422 pci_dma_sync_single_for_cpu(pdev,
4423 ps_page_dma->ps_page_dma[0],
4424 PAGE_SIZE,
4425 PCI_DMA_FROMDEVICE);
4426 vaddr = kmap_atomic(ps_page->ps_page[0],
4427 KM_SKB_DATA_SOFTIRQ);
4428 memcpy(skb_tail_pointer(skb), vaddr, l1);
4429 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4430 pci_dma_sync_single_for_device(pdev,
4431 ps_page_dma->ps_page_dma[0],
4432 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4433 /* remove the CRC */
4434 l1 -= 4;
4435 skb_put(skb, l1);
4436 goto copydone;
4437 } /* if */
4438 }
4439
4440 for (j = 0; j < adapter->rx_ps_pages; j++) {
4441 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4442 break;
4443 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4444 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4445 ps_page_dma->ps_page_dma[j] = 0;
4446 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4447 length);
4448 ps_page->ps_page[j] = NULL;
4449 skb->len += length;
4450 skb->data_len += length;
4451 skb->truesize += length;
4452 }
4453
4454 /* strip the ethernet crc, problem is we're using pages now so
4455 * this whole operation can get a little cpu intensive */
4456 pskb_trim(skb, skb->len - 4);
4457
4458 copydone:
4459 total_rx_bytes += skb->len;
4460 total_rx_packets++;
4461
4462 e1000_rx_checksum(adapter, staterr,
4463 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4464 skb->protocol = eth_type_trans(skb, netdev);
4465
4466 if (likely(rx_desc->wb.upper.header_status &
4467 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4468 adapter->rx_hdr_split++;
4469 #ifdef CONFIG_E1000_NAPI
4470 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4471 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4472 le16_to_cpu(rx_desc->wb.middle.vlan));
4473 } else {
4474 netif_receive_skb(skb);
4475 }
4476 #else /* CONFIG_E1000_NAPI */
4477 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4478 vlan_hwaccel_rx(skb, adapter->vlgrp,
4479 le16_to_cpu(rx_desc->wb.middle.vlan));
4480 } else {
4481 netif_rx(skb);
4482 }
4483 #endif /* CONFIG_E1000_NAPI */
4484 netdev->last_rx = jiffies;
4485
4486 next_desc:
4487 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4488 buffer_info->skb = NULL;
4489
4490 /* return some buffers to hardware, one at a time is too slow */
4491 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4492 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4493 cleaned_count = 0;
4494 }
4495
4496 /* use prefetched values */
4497 rx_desc = next_rxd;
4498 buffer_info = next_buffer;
4499
4500 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4501 }
4502 rx_ring->next_to_clean = i;
4503
4504 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4505 if (cleaned_count)
4506 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4507
4508 adapter->total_rx_packets += total_rx_packets;
4509 adapter->total_rx_bytes += total_rx_bytes;
4510 adapter->net_stats.rx_bytes += total_rx_bytes;
4511 adapter->net_stats.rx_packets += total_rx_packets;
4512 return cleaned;
4513 }
4514
4515 /**
4516 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4517 * @adapter: address of board private structure
4518 **/
4519
4520 static void
4521 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4522 struct e1000_rx_ring *rx_ring,
4523 int cleaned_count)
4524 {
4525 struct net_device *netdev = adapter->netdev;
4526 struct pci_dev *pdev = adapter->pdev;
4527 struct e1000_rx_desc *rx_desc;
4528 struct e1000_buffer *buffer_info;
4529 struct sk_buff *skb;
4530 unsigned int i;
4531 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4532
4533 i = rx_ring->next_to_use;
4534 buffer_info = &rx_ring->buffer_info[i];
4535
4536 while (cleaned_count--) {
4537 skb = buffer_info->skb;
4538 if (skb) {
4539 skb_trim(skb, 0);
4540 goto map_skb;
4541 }
4542
4543 skb = netdev_alloc_skb(netdev, bufsz);
4544 if (unlikely(!skb)) {
4545 /* Better luck next round */
4546 adapter->alloc_rx_buff_failed++;
4547 break;
4548 }
4549
4550 /* Fix for errata 23, can't cross 64kB boundary */
4551 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4552 struct sk_buff *oldskb = skb;
4553 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4554 "at %p\n", bufsz, skb->data);
4555 /* Try again, without freeing the previous */
4556 skb = netdev_alloc_skb(netdev, bufsz);
4557 /* Failed allocation, critical failure */
4558 if (!skb) {
4559 dev_kfree_skb(oldskb);
4560 break;
4561 }
4562
4563 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4564 /* give up */
4565 dev_kfree_skb(skb);
4566 dev_kfree_skb(oldskb);
4567 break; /* while !buffer_info->skb */
4568 }
4569
4570 /* Use new allocation */
4571 dev_kfree_skb(oldskb);
4572 }
4573 /* Make buffer alignment 2 beyond a 16 byte boundary
4574 * this will result in a 16 byte aligned IP header after
4575 * the 14 byte MAC header is removed
4576 */
4577 skb_reserve(skb, NET_IP_ALIGN);
4578
4579 buffer_info->skb = skb;
4580 buffer_info->length = adapter->rx_buffer_len;
4581 map_skb:
4582 buffer_info->dma = pci_map_single(pdev,
4583 skb->data,
4584 adapter->rx_buffer_len,
4585 PCI_DMA_FROMDEVICE);
4586
4587 /* Fix for errata 23, can't cross 64kB boundary */
4588 if (!e1000_check_64k_bound(adapter,
4589 (void *)(unsigned long)buffer_info->dma,
4590 adapter->rx_buffer_len)) {
4591 DPRINTK(RX_ERR, ERR,
4592 "dma align check failed: %u bytes at %p\n",
4593 adapter->rx_buffer_len,
4594 (void *)(unsigned long)buffer_info->dma);
4595 dev_kfree_skb(skb);
4596 buffer_info->skb = NULL;
4597
4598 pci_unmap_single(pdev, buffer_info->dma,
4599 adapter->rx_buffer_len,
4600 PCI_DMA_FROMDEVICE);
4601
4602 break; /* while !buffer_info->skb */
4603 }
4604 rx_desc = E1000_RX_DESC(*rx_ring, i);
4605 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4606
4607 if (unlikely(++i == rx_ring->count))
4608 i = 0;
4609 buffer_info = &rx_ring->buffer_info[i];
4610 }
4611
4612 if (likely(rx_ring->next_to_use != i)) {
4613 rx_ring->next_to_use = i;
4614 if (unlikely(i-- == 0))
4615 i = (rx_ring->count - 1);
4616
4617 /* Force memory writes to complete before letting h/w
4618 * know there are new descriptors to fetch. (Only
4619 * applicable for weak-ordered memory model archs,
4620 * such as IA-64). */
4621 wmb();
4622 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4623 }
4624 }
4625
4626 /**
4627 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4628 * @adapter: address of board private structure
4629 **/
4630
4631 static void
4632 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4633 struct e1000_rx_ring *rx_ring,
4634 int cleaned_count)
4635 {
4636 struct net_device *netdev = adapter->netdev;
4637 struct pci_dev *pdev = adapter->pdev;
4638 union e1000_rx_desc_packet_split *rx_desc;
4639 struct e1000_buffer *buffer_info;
4640 struct e1000_ps_page *ps_page;
4641 struct e1000_ps_page_dma *ps_page_dma;
4642 struct sk_buff *skb;
4643 unsigned int i, j;
4644
4645 i = rx_ring->next_to_use;
4646 buffer_info = &rx_ring->buffer_info[i];
4647 ps_page = &rx_ring->ps_page[i];
4648 ps_page_dma = &rx_ring->ps_page_dma[i];
4649
4650 while (cleaned_count--) {
4651 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4652
4653 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4654 if (j < adapter->rx_ps_pages) {
4655 if (likely(!ps_page->ps_page[j])) {
4656 ps_page->ps_page[j] =
4657 alloc_page(GFP_ATOMIC);
4658 if (unlikely(!ps_page->ps_page[j])) {
4659 adapter->alloc_rx_buff_failed++;
4660 goto no_buffers;
4661 }
4662 ps_page_dma->ps_page_dma[j] =
4663 pci_map_page(pdev,
4664 ps_page->ps_page[j],
4665 0, PAGE_SIZE,
4666 PCI_DMA_FROMDEVICE);
4667 }
4668 /* Refresh the desc even if buffer_addrs didn't
4669 * change because each write-back erases
4670 * this info.
4671 */
4672 rx_desc->read.buffer_addr[j+1] =
4673 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4674 } else
4675 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4676 }
4677
4678 skb = netdev_alloc_skb(netdev,
4679 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4680
4681 if (unlikely(!skb)) {
4682 adapter->alloc_rx_buff_failed++;
4683 break;
4684 }
4685
4686 /* Make buffer alignment 2 beyond a 16 byte boundary
4687 * this will result in a 16 byte aligned IP header after
4688 * the 14 byte MAC header is removed
4689 */
4690 skb_reserve(skb, NET_IP_ALIGN);
4691
4692 buffer_info->skb = skb;
4693 buffer_info->length = adapter->rx_ps_bsize0;
4694 buffer_info->dma = pci_map_single(pdev, skb->data,
4695 adapter->rx_ps_bsize0,
4696 PCI_DMA_FROMDEVICE);
4697
4698 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4699
4700 if (unlikely(++i == rx_ring->count)) i = 0;
4701 buffer_info = &rx_ring->buffer_info[i];
4702 ps_page = &rx_ring->ps_page[i];
4703 ps_page_dma = &rx_ring->ps_page_dma[i];
4704 }
4705
4706 no_buffers:
4707 if (likely(rx_ring->next_to_use != i)) {
4708 rx_ring->next_to_use = i;
4709 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4710
4711 /* Force memory writes to complete before letting h/w
4712 * know there are new descriptors to fetch. (Only
4713 * applicable for weak-ordered memory model archs,
4714 * such as IA-64). */
4715 wmb();
4716 /* Hardware increments by 16 bytes, but packet split
4717 * descriptors are 32 bytes...so we increment tail
4718 * twice as much.
4719 */
4720 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4721 }
4722 }
4723
4724 /**
4725 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4726 * @adapter:
4727 **/
4728
4729 static void
4730 e1000_smartspeed(struct e1000_adapter *adapter)
4731 {
4732 u16 phy_status;
4733 u16 phy_ctrl;
4734
4735 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4736 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4737 return;
4738
4739 if (adapter->smartspeed == 0) {
4740 /* If Master/Slave config fault is asserted twice,
4741 * we assume back-to-back */
4742 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4743 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4744 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4745 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4746 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4747 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4748 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4749 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4750 phy_ctrl);
4751 adapter->smartspeed++;
4752 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4753 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4754 &phy_ctrl)) {
4755 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4756 MII_CR_RESTART_AUTO_NEG);
4757 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4758 phy_ctrl);
4759 }
4760 }
4761 return;
4762 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4763 /* If still no link, perhaps using 2/3 pair cable */
4764 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4765 phy_ctrl |= CR_1000T_MS_ENABLE;
4766 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4767 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4768 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4769 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4770 MII_CR_RESTART_AUTO_NEG);
4771 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4772 }
4773 }
4774 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4775 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4776 adapter->smartspeed = 0;
4777 }
4778
4779 /**
4780 * e1000_ioctl -
4781 * @netdev:
4782 * @ifreq:
4783 * @cmd:
4784 **/
4785
4786 static int
4787 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4788 {
4789 switch (cmd) {
4790 case SIOCGMIIPHY:
4791 case SIOCGMIIREG:
4792 case SIOCSMIIREG:
4793 return e1000_mii_ioctl(netdev, ifr, cmd);
4794 default:
4795 return -EOPNOTSUPP;
4796 }
4797 }
4798
4799 /**
4800 * e1000_mii_ioctl -
4801 * @netdev:
4802 * @ifreq:
4803 * @cmd:
4804 **/
4805
4806 static int
4807 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4808 {
4809 struct e1000_adapter *adapter = netdev_priv(netdev);
4810 struct mii_ioctl_data *data = if_mii(ifr);
4811 int retval;
4812 u16 mii_reg;
4813 u16 spddplx;
4814 unsigned long flags;
4815
4816 if (adapter->hw.media_type != e1000_media_type_copper)
4817 return -EOPNOTSUPP;
4818
4819 switch (cmd) {
4820 case SIOCGMIIPHY:
4821 data->phy_id = adapter->hw.phy_addr;
4822 break;
4823 case SIOCGMIIREG:
4824 if (!capable(CAP_NET_ADMIN))
4825 return -EPERM;
4826 spin_lock_irqsave(&adapter->stats_lock, flags);
4827 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4828 &data->val_out)) {
4829 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4830 return -EIO;
4831 }
4832 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4833 break;
4834 case SIOCSMIIREG:
4835 if (!capable(CAP_NET_ADMIN))
4836 return -EPERM;
4837 if (data->reg_num & ~(0x1F))
4838 return -EFAULT;
4839 mii_reg = data->val_in;
4840 spin_lock_irqsave(&adapter->stats_lock, flags);
4841 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4842 mii_reg)) {
4843 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4844 return -EIO;
4845 }
4846 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4847 if (adapter->hw.media_type == e1000_media_type_copper) {
4848 switch (data->reg_num) {
4849 case PHY_CTRL:
4850 if (mii_reg & MII_CR_POWER_DOWN)
4851 break;
4852 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4853 adapter->hw.autoneg = 1;
4854 adapter->hw.autoneg_advertised = 0x2F;
4855 } else {
4856 if (mii_reg & 0x40)
4857 spddplx = SPEED_1000;
4858 else if (mii_reg & 0x2000)
4859 spddplx = SPEED_100;
4860 else
4861 spddplx = SPEED_10;
4862 spddplx += (mii_reg & 0x100)
4863 ? DUPLEX_FULL :
4864 DUPLEX_HALF;
4865 retval = e1000_set_spd_dplx(adapter,
4866 spddplx);
4867 if (retval)
4868 return retval;
4869 }
4870 if (netif_running(adapter->netdev))
4871 e1000_reinit_locked(adapter);
4872 else
4873 e1000_reset(adapter);
4874 break;
4875 case M88E1000_PHY_SPEC_CTRL:
4876 case M88E1000_EXT_PHY_SPEC_CTRL:
4877 if (e1000_phy_reset(&adapter->hw))
4878 return -EIO;
4879 break;
4880 }
4881 } else {
4882 switch (data->reg_num) {
4883 case PHY_CTRL:
4884 if (mii_reg & MII_CR_POWER_DOWN)
4885 break;
4886 if (netif_running(adapter->netdev))
4887 e1000_reinit_locked(adapter);
4888 else
4889 e1000_reset(adapter);
4890 break;
4891 }
4892 }
4893 break;
4894 default:
4895 return -EOPNOTSUPP;
4896 }
4897 return E1000_SUCCESS;
4898 }
4899
4900 void
4901 e1000_pci_set_mwi(struct e1000_hw *hw)
4902 {
4903 struct e1000_adapter *adapter = hw->back;
4904 int ret_val = pci_set_mwi(adapter->pdev);
4905
4906 if (ret_val)
4907 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4908 }
4909
4910 void
4911 e1000_pci_clear_mwi(struct e1000_hw *hw)
4912 {
4913 struct e1000_adapter *adapter = hw->back;
4914
4915 pci_clear_mwi(adapter->pdev);
4916 }
4917
4918 int
4919 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4920 {
4921 struct e1000_adapter *adapter = hw->back;
4922 return pcix_get_mmrbc(adapter->pdev);
4923 }
4924
4925 void
4926 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4927 {
4928 struct e1000_adapter *adapter = hw->back;
4929 pcix_set_mmrbc(adapter->pdev, mmrbc);
4930 }
4931
4932 s32
4933 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
4934 {
4935 struct e1000_adapter *adapter = hw->back;
4936 u16 cap_offset;
4937
4938 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4939 if (!cap_offset)
4940 return -E1000_ERR_CONFIG;
4941
4942 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4943
4944 return E1000_SUCCESS;
4945 }
4946
4947 void
4948 e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
4949 {
4950 outl(value, port);
4951 }
4952
4953 static void
4954 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4955 {
4956 struct e1000_adapter *adapter = netdev_priv(netdev);
4957 u32 ctrl, rctl;
4958
4959 if (!test_bit(__E1000_DOWN, &adapter->flags))
4960 e1000_irq_disable(adapter);
4961 adapter->vlgrp = grp;
4962
4963 if (grp) {
4964 /* enable VLAN tag insert/strip */
4965 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4966 ctrl |= E1000_CTRL_VME;
4967 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4968
4969 if (adapter->hw.mac_type != e1000_ich8lan) {
4970 /* enable VLAN receive filtering */
4971 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4972 rctl &= ~E1000_RCTL_CFIEN;
4973 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4974 e1000_update_mng_vlan(adapter);
4975 }
4976 } else {
4977 /* disable VLAN tag insert/strip */
4978 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4979 ctrl &= ~E1000_CTRL_VME;
4980 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4981
4982 if (adapter->hw.mac_type != e1000_ich8lan) {
4983 if (adapter->mng_vlan_id !=
4984 (u16)E1000_MNG_VLAN_NONE) {
4985 e1000_vlan_rx_kill_vid(netdev,
4986 adapter->mng_vlan_id);
4987 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4988 }
4989 }
4990 }
4991
4992 if (!test_bit(__E1000_DOWN, &adapter->flags))
4993 e1000_irq_enable(adapter);
4994 }
4995
4996 static void
4997 e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4998 {
4999 struct e1000_adapter *adapter = netdev_priv(netdev);
5000 u32 vfta, index;
5001
5002 if ((adapter->hw.mng_cookie.status &
5003 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5004 (vid == adapter->mng_vlan_id))
5005 return;
5006 /* add VID to filter table */
5007 index = (vid >> 5) & 0x7F;
5008 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5009 vfta |= (1 << (vid & 0x1F));
5010 e1000_write_vfta(&adapter->hw, index, vfta);
5011 }
5012
5013 static void
5014 e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
5015 {
5016 struct e1000_adapter *adapter = netdev_priv(netdev);
5017 u32 vfta, index;
5018
5019 if (!test_bit(__E1000_DOWN, &adapter->flags))
5020 e1000_irq_disable(adapter);
5021 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5022 if (!test_bit(__E1000_DOWN, &adapter->flags))
5023 e1000_irq_enable(adapter);
5024
5025 if ((adapter->hw.mng_cookie.status &
5026 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5027 (vid == adapter->mng_vlan_id)) {
5028 /* release control to f/w */
5029 e1000_release_hw_control(adapter);
5030 return;
5031 }
5032
5033 /* remove VID from filter table */
5034 index = (vid >> 5) & 0x7F;
5035 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5036 vfta &= ~(1 << (vid & 0x1F));
5037 e1000_write_vfta(&adapter->hw, index, vfta);
5038 }
5039
5040 static void
5041 e1000_restore_vlan(struct e1000_adapter *adapter)
5042 {
5043 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5044
5045 if (adapter->vlgrp) {
5046 u16 vid;
5047 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5048 if (!vlan_group_get_device(adapter->vlgrp, vid))
5049 continue;
5050 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5051 }
5052 }
5053 }
5054
5055 int
5056 e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
5057 {
5058 adapter->hw.autoneg = 0;
5059
5060 /* Fiber NICs only allow 1000 gbps Full duplex */
5061 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5062 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5063 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5064 return -EINVAL;
5065 }
5066
5067 switch (spddplx) {
5068 case SPEED_10 + DUPLEX_HALF:
5069 adapter->hw.forced_speed_duplex = e1000_10_half;
5070 break;
5071 case SPEED_10 + DUPLEX_FULL:
5072 adapter->hw.forced_speed_duplex = e1000_10_full;
5073 break;
5074 case SPEED_100 + DUPLEX_HALF:
5075 adapter->hw.forced_speed_duplex = e1000_100_half;
5076 break;
5077 case SPEED_100 + DUPLEX_FULL:
5078 adapter->hw.forced_speed_duplex = e1000_100_full;
5079 break;
5080 case SPEED_1000 + DUPLEX_FULL:
5081 adapter->hw.autoneg = 1;
5082 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5083 break;
5084 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5085 default:
5086 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5087 return -EINVAL;
5088 }
5089 return 0;
5090 }
5091
5092 static int
5093 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5094 {
5095 struct net_device *netdev = pci_get_drvdata(pdev);
5096 struct e1000_adapter *adapter = netdev_priv(netdev);
5097 u32 ctrl, ctrl_ext, rctl, status;
5098 u32 wufc = adapter->wol;
5099 #ifdef CONFIG_PM
5100 int retval = 0;
5101 #endif
5102
5103 netif_device_detach(netdev);
5104
5105 if (netif_running(netdev)) {
5106 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5107 e1000_down(adapter);
5108 }
5109
5110 #ifdef CONFIG_PM
5111 retval = pci_save_state(pdev);
5112 if (retval)
5113 return retval;
5114 #endif
5115
5116 status = E1000_READ_REG(&adapter->hw, STATUS);
5117 if (status & E1000_STATUS_LU)
5118 wufc &= ~E1000_WUFC_LNKC;
5119
5120 if (wufc) {
5121 e1000_setup_rctl(adapter);
5122 e1000_set_rx_mode(netdev);
5123
5124 /* turn on all-multi mode if wake on multicast is enabled */
5125 if (wufc & E1000_WUFC_MC) {
5126 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5127 rctl |= E1000_RCTL_MPE;
5128 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5129 }
5130
5131 if (adapter->hw.mac_type >= e1000_82540) {
5132 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5133 /* advertise wake from D3Cold */
5134 #define E1000_CTRL_ADVD3WUC 0x00100000
5135 /* phy power management enable */
5136 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5137 ctrl |= E1000_CTRL_ADVD3WUC |
5138 E1000_CTRL_EN_PHY_PWR_MGMT;
5139 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5140 }
5141
5142 if (adapter->hw.media_type == e1000_media_type_fiber ||
5143 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5144 /* keep the laser running in D3 */
5145 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5146 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5147 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5148 }
5149
5150 /* Allow time for pending master requests to run */
5151 e1000_disable_pciex_master(&adapter->hw);
5152
5153 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5154 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5155 pci_enable_wake(pdev, PCI_D3hot, 1);
5156 pci_enable_wake(pdev, PCI_D3cold, 1);
5157 } else {
5158 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5159 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5160 pci_enable_wake(pdev, PCI_D3hot, 0);
5161 pci_enable_wake(pdev, PCI_D3cold, 0);
5162 }
5163
5164 e1000_release_manageability(adapter);
5165
5166 /* make sure adapter isn't asleep if manageability is enabled */
5167 if (adapter->en_mng_pt) {
5168 pci_enable_wake(pdev, PCI_D3hot, 1);
5169 pci_enable_wake(pdev, PCI_D3cold, 1);
5170 }
5171
5172 if (adapter->hw.phy_type == e1000_phy_igp_3)
5173 e1000_phy_powerdown_workaround(&adapter->hw);
5174
5175 if (netif_running(netdev))
5176 e1000_free_irq(adapter);
5177
5178 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5179 * would have already happened in close and is redundant. */
5180 e1000_release_hw_control(adapter);
5181
5182 pci_disable_device(pdev);
5183
5184 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5185
5186 return 0;
5187 }
5188
5189 #ifdef CONFIG_PM
5190 static int
5191 e1000_resume(struct pci_dev *pdev)
5192 {
5193 struct net_device *netdev = pci_get_drvdata(pdev);
5194 struct e1000_adapter *adapter = netdev_priv(netdev);
5195 u32 err;
5196
5197 pci_set_power_state(pdev, PCI_D0);
5198 pci_restore_state(pdev);
5199 if ((err = pci_enable_device(pdev))) {
5200 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5201 return err;
5202 }
5203 pci_set_master(pdev);
5204
5205 pci_enable_wake(pdev, PCI_D3hot, 0);
5206 pci_enable_wake(pdev, PCI_D3cold, 0);
5207
5208 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5209 return err;
5210
5211 e1000_power_up_phy(adapter);
5212 e1000_reset(adapter);
5213 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5214
5215 e1000_init_manageability(adapter);
5216
5217 if (netif_running(netdev))
5218 e1000_up(adapter);
5219
5220 netif_device_attach(netdev);
5221
5222 /* If the controller is 82573 and f/w is AMT, do not set
5223 * DRV_LOAD until the interface is up. For all other cases,
5224 * let the f/w know that the h/w is now under the control
5225 * of the driver. */
5226 if (adapter->hw.mac_type != e1000_82573 ||
5227 !e1000_check_mng_mode(&adapter->hw))
5228 e1000_get_hw_control(adapter);
5229
5230 return 0;
5231 }
5232 #endif
5233
5234 static void e1000_shutdown(struct pci_dev *pdev)
5235 {
5236 e1000_suspend(pdev, PMSG_SUSPEND);
5237 }
5238
5239 #ifdef CONFIG_NET_POLL_CONTROLLER
5240 /*
5241 * Polling 'interrupt' - used by things like netconsole to send skbs
5242 * without having to re-enable interrupts. It's not called while
5243 * the interrupt routine is executing.
5244 */
5245 static void
5246 e1000_netpoll(struct net_device *netdev)
5247 {
5248 struct e1000_adapter *adapter = netdev_priv(netdev);
5249
5250 disable_irq(adapter->pdev->irq);
5251 e1000_intr(adapter->pdev->irq, netdev);
5252 #ifndef CONFIG_E1000_NAPI
5253 adapter->clean_rx(adapter, adapter->rx_ring);
5254 #endif
5255 enable_irq(adapter->pdev->irq);
5256 }
5257 #endif
5258
5259 /**
5260 * e1000_io_error_detected - called when PCI error is detected
5261 * @pdev: Pointer to PCI device
5262 * @state: The current pci conneection state
5263 *
5264 * This function is called after a PCI bus error affecting
5265 * this device has been detected.
5266 */
5267 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5268 {
5269 struct net_device *netdev = pci_get_drvdata(pdev);
5270 struct e1000_adapter *adapter = netdev->priv;
5271
5272 netif_device_detach(netdev);
5273
5274 if (netif_running(netdev))
5275 e1000_down(adapter);
5276 pci_disable_device(pdev);
5277
5278 /* Request a slot slot reset. */
5279 return PCI_ERS_RESULT_NEED_RESET;
5280 }
5281
5282 /**
5283 * e1000_io_slot_reset - called after the pci bus has been reset.
5284 * @pdev: Pointer to PCI device
5285 *
5286 * Restart the card from scratch, as if from a cold-boot. Implementation
5287 * resembles the first-half of the e1000_resume routine.
5288 */
5289 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5290 {
5291 struct net_device *netdev = pci_get_drvdata(pdev);
5292 struct e1000_adapter *adapter = netdev->priv;
5293
5294 if (pci_enable_device(pdev)) {
5295 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5296 return PCI_ERS_RESULT_DISCONNECT;
5297 }
5298 pci_set_master(pdev);
5299
5300 pci_enable_wake(pdev, PCI_D3hot, 0);
5301 pci_enable_wake(pdev, PCI_D3cold, 0);
5302
5303 e1000_reset(adapter);
5304 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5305
5306 return PCI_ERS_RESULT_RECOVERED;
5307 }
5308
5309 /**
5310 * e1000_io_resume - called when traffic can start flowing again.
5311 * @pdev: Pointer to PCI device
5312 *
5313 * This callback is called when the error recovery driver tells us that
5314 * its OK to resume normal operation. Implementation resembles the
5315 * second-half of the e1000_resume routine.
5316 */
5317 static void e1000_io_resume(struct pci_dev *pdev)
5318 {
5319 struct net_device *netdev = pci_get_drvdata(pdev);
5320 struct e1000_adapter *adapter = netdev->priv;
5321
5322 e1000_init_manageability(adapter);
5323
5324 if (netif_running(netdev)) {
5325 if (e1000_up(adapter)) {
5326 printk("e1000: can't bring device back up after reset\n");
5327 return;
5328 }
5329 }
5330
5331 netif_device_attach(netdev);
5332
5333 /* If the controller is 82573 and f/w is AMT, do not set
5334 * DRV_LOAD until the interface is up. For all other cases,
5335 * let the f/w know that the h/w is now under the control
5336 * of the driver. */
5337 if (adapter->hw.mac_type != e1000_82573 ||
5338 !e1000_check_mng_mode(&adapter->hw))
5339 e1000_get_hw_control(adapter);
5340
5341 }
5342
5343 /* e1000_main.c */
Verdex Pro support