[POWERPC] XilinxFB: Use pdata to pass around framebuffer parameters
[linux-2.6/verdex.git] / drivers / video / xilinxfb.c
blobb3b57f4a35a2cd16c3cdfc470a867bbf74604552
1 /*
2 * xilinxfb.c
4 * Xilinx TFT LCD frame buffer driver
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
9 * 2002-2007 (c) MontaVista Software, Inc.
10 * 2007 (c) Secret Lab Technologies, Ltd.
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
18 * This driver was based on au1100fb.c by MontaVista rewritten for 2.6
19 * by Embedded Alley Solutions <source@embeddedalley.com>, which in turn
20 * was based on skeletonfb.c, Skeleton for a frame buffer device by
21 * Geert Uytterhoeven.
24 #include <linux/device.h>
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/version.h>
28 #include <linux/errno.h>
29 #include <linux/string.h>
30 #include <linux/mm.h>
31 #include <linux/fb.h>
32 #include <linux/init.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/platform_device.h>
35 #if defined(CONFIG_OF)
36 #include <linux/of_device.h>
37 #include <linux/of_platform.h>
38 #endif
39 #include <asm/io.h>
40 #include <linux/xilinxfb.h>
42 #define DRIVER_NAME "xilinxfb"
43 #define DRIVER_DESCRIPTION "Xilinx TFT LCD frame buffer driver"
46 * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
47 * the VGA port on the Xilinx ML40x board. This is a hardware display controller
48 * for a 640x480 resolution TFT or VGA screen.
50 * The interface to the framebuffer is nice and simple. There are two
51 * control registers. The first tells the LCD interface where in memory
52 * the frame buffer is (only the 11 most significant bits are used, so
53 * don't start thinking about scrolling). The second allows the LCD to
54 * be turned on or off as well as rotated 180 degrees.
56 #define NUM_REGS 2
57 #define REG_FB_ADDR 0
58 #define REG_CTRL 1
59 #define REG_CTRL_ENABLE 0x0001
60 #define REG_CTRL_ROTATE 0x0002
63 * The hardware only handles a single mode: 640x480 24 bit true
64 * color. Each pixel gets a word (32 bits) of memory. Within each word,
65 * the 8 most significant bits are ignored, the next 8 bits are the red
66 * level, the next 8 bits are the green level and the 8 least
67 * significant bits are the blue level. Each row of the LCD uses 1024
68 * words, but only the first 640 pixels are displayed with the other 384
69 * words being ignored. There are 480 rows.
71 #define BYTES_PER_PIXEL 4
72 #define BITS_PER_PIXEL (BYTES_PER_PIXEL * 8)
73 #define XRES 640
74 #define YRES 480
75 #define XRES_VIRTUAL 1024
76 #define YRES_VIRTUAL YRES
77 #define LINE_LENGTH (XRES_VIRTUAL * BYTES_PER_PIXEL)
78 #define FB_SIZE (YRES_VIRTUAL * LINE_LENGTH)
80 #define RED_SHIFT 16
81 #define GREEN_SHIFT 8
82 #define BLUE_SHIFT 0
84 #define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */
87 * Default xilinxfb configuration
89 static struct xilinxfb_platform_data xilinx_fb_default_pdata = {
93 * Here are the default fb_fix_screeninfo and fb_var_screeninfo structures
95 static struct fb_fix_screeninfo xilinx_fb_fix = {
96 .id = "Xilinx",
97 .type = FB_TYPE_PACKED_PIXELS,
98 .visual = FB_VISUAL_TRUECOLOR,
99 .smem_len = FB_SIZE,
100 .line_length = LINE_LENGTH,
101 .accel = FB_ACCEL_NONE
104 static struct fb_var_screeninfo xilinx_fb_var = {
105 .xres = XRES,
106 .yres = YRES,
107 .xres_virtual = XRES_VIRTUAL,
108 .yres_virtual = YRES_VIRTUAL,
110 .bits_per_pixel = BITS_PER_PIXEL,
112 .red = { RED_SHIFT, 8, 0 },
113 .green = { GREEN_SHIFT, 8, 0 },
114 .blue = { BLUE_SHIFT, 8, 0 },
115 .transp = { 0, 0, 0 },
117 .activate = FB_ACTIVATE_NOW
120 struct xilinxfb_drvdata {
122 struct fb_info info; /* FB driver info record */
124 u32 regs_phys; /* phys. address of the control registers */
125 u32 __iomem *regs; /* virt. address of the control registers */
127 void *fb_virt; /* virt. address of the frame buffer */
128 dma_addr_t fb_phys; /* phys. address of the frame buffer */
130 u32 reg_ctrl_default;
132 u32 pseudo_palette[PALETTE_ENTRIES_NO];
133 /* Fake palette of 16 colors */
136 #define to_xilinxfb_drvdata(_info) \
137 container_of(_info, struct xilinxfb_drvdata, info)
140 * The LCD controller has DCR interface to its registers, but all
141 * the boards and configurations the driver has been tested with
142 * use opb2dcr bridge. So the registers are seen as memory mapped.
143 * This macro is to make it simple to add the direct DCR access
144 * when it's needed.
146 #define xilinx_fb_out_be32(driverdata, offset, val) \
147 out_be32(driverdata->regs + offset, val)
149 static int
150 xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
151 unsigned transp, struct fb_info *fbi)
153 u32 *palette = fbi->pseudo_palette;
155 if (regno >= PALETTE_ENTRIES_NO)
156 return -EINVAL;
158 if (fbi->var.grayscale) {
159 /* Convert color to grayscale.
160 * grayscale = 0.30*R + 0.59*G + 0.11*B */
161 red = green = blue =
162 (red * 77 + green * 151 + blue * 28 + 127) >> 8;
165 /* fbi->fix.visual is always FB_VISUAL_TRUECOLOR */
167 /* We only handle 8 bits of each color. */
168 red >>= 8;
169 green >>= 8;
170 blue >>= 8;
171 palette[regno] = (red << RED_SHIFT) | (green << GREEN_SHIFT) |
172 (blue << BLUE_SHIFT);
174 return 0;
177 static int
178 xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
180 struct xilinxfb_drvdata *drvdata = to_xilinxfb_drvdata(fbi);
182 switch (blank_mode) {
183 case FB_BLANK_UNBLANK:
184 /* turn on panel */
185 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
186 break;
188 case FB_BLANK_NORMAL:
189 case FB_BLANK_VSYNC_SUSPEND:
190 case FB_BLANK_HSYNC_SUSPEND:
191 case FB_BLANK_POWERDOWN:
192 /* turn off panel */
193 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
194 default:
195 break;
198 return 0; /* success */
201 static struct fb_ops xilinxfb_ops =
203 .owner = THIS_MODULE,
204 .fb_setcolreg = xilinx_fb_setcolreg,
205 .fb_blank = xilinx_fb_blank,
206 .fb_fillrect = cfb_fillrect,
207 .fb_copyarea = cfb_copyarea,
208 .fb_imageblit = cfb_imageblit,
211 /* ---------------------------------------------------------------------
212 * Bus independent setup/teardown
215 static int xilinxfb_assign(struct device *dev, unsigned long physaddr,
216 struct xilinxfb_platform_data *pdata)
218 struct xilinxfb_drvdata *drvdata;
219 int rc;
221 /* Allocate the driver data region */
222 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
223 if (!drvdata) {
224 dev_err(dev, "Couldn't allocate device private record\n");
225 return -ENOMEM;
227 dev_set_drvdata(dev, drvdata);
229 /* Map the control registers in */
230 if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
231 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
232 physaddr);
233 rc = -ENODEV;
234 goto err_region;
236 drvdata->regs_phys = physaddr;
237 drvdata->regs = ioremap(physaddr, 8);
238 if (!drvdata->regs) {
239 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
240 physaddr);
241 rc = -ENODEV;
242 goto err_map;
245 /* Allocate the framebuffer memory */
246 drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(FB_SIZE),
247 &drvdata->fb_phys, GFP_KERNEL);
248 if (!drvdata->fb_virt) {
249 dev_err(dev, "Could not allocate frame buffer memory\n");
250 rc = -ENOMEM;
251 goto err_fbmem;
254 /* Clear (turn to black) the framebuffer */
255 memset_io((void __iomem *)drvdata->fb_virt, 0, FB_SIZE);
257 /* Tell the hardware where the frame buffer is */
258 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
260 /* Turn on the display */
261 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
262 if (pdata->rotate_screen)
263 drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
264 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
266 /* Fill struct fb_info */
267 drvdata->info.device = dev;
268 drvdata->info.screen_base = (void __iomem *)drvdata->fb_virt;
269 drvdata->info.fbops = &xilinxfb_ops;
270 drvdata->info.fix = xilinx_fb_fix;
271 drvdata->info.fix.smem_start = drvdata->fb_phys;
272 drvdata->info.pseudo_palette = drvdata->pseudo_palette;
273 drvdata->info.flags = FBINFO_DEFAULT;
274 drvdata->info.var = xilinx_fb_var;
276 xilinx_fb_var.height = pdata->screen_height_mm;
277 xilinx_fb_var.width = pdata->screen_width_mm;
279 /* Allocate a colour map */
280 rc = fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0);
281 if (rc) {
282 dev_err(dev, "Fail to allocate colormap (%d entries)\n",
283 PALETTE_ENTRIES_NO);
284 goto err_cmap;
287 /* Register new frame buffer */
288 rc = register_framebuffer(&drvdata->info);
289 if (rc) {
290 dev_err(dev, "Could not register frame buffer\n");
291 goto err_regfb;
294 /* Put a banner in the log (for DEBUG) */
295 dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr, drvdata->regs);
296 dev_dbg(dev, "fb: phys=%p, virt=%p, size=%x\n",
297 (void*)drvdata->fb_phys, drvdata->fb_virt, FB_SIZE);
298 return 0; /* success */
300 err_regfb:
301 fb_dealloc_cmap(&drvdata->info.cmap);
303 err_cmap:
304 dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
305 drvdata->fb_phys);
306 /* Turn off the display */
307 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
309 err_fbmem:
310 iounmap(drvdata->regs);
312 err_map:
313 release_mem_region(physaddr, 8);
315 err_region:
316 kfree(drvdata);
317 dev_set_drvdata(dev, NULL);
319 return rc;
322 static int xilinxfb_release(struct device *dev)
324 struct xilinxfb_drvdata *drvdata = dev_get_drvdata(dev);
326 #if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
327 xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
328 #endif
330 unregister_framebuffer(&drvdata->info);
332 fb_dealloc_cmap(&drvdata->info.cmap);
334 dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
335 drvdata->fb_phys);
337 /* Turn off the display */
338 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
339 iounmap(drvdata->regs);
341 release_mem_region(drvdata->regs_phys, 8);
343 kfree(drvdata);
344 dev_set_drvdata(dev, NULL);
346 return 0;
349 /* ---------------------------------------------------------------------
350 * Platform bus binding
353 static int
354 xilinxfb_platform_probe(struct platform_device *pdev)
356 struct xilinxfb_platform_data *pdata;
357 struct resource *res;
359 /* Find the registers address */
360 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
361 if (!res) {
362 dev_err(&pdev->dev, "Couldn't get registers resource\n");
363 return -ENODEV;
366 /* If a pdata structure is provided, then extract the parameters */
367 if (pdev->dev.platform_data)
368 pdata = pdev->dev.platform_data;
369 else
370 pdata = &xilinx_fb_default_pdata;
372 return xilinxfb_assign(&pdev->dev, res->start, pdata);
375 static int
376 xilinxfb_platform_remove(struct platform_device *pdev)
378 return xilinxfb_release(&pdev->dev);
382 static struct platform_driver xilinxfb_platform_driver = {
383 .probe = xilinxfb_platform_probe,
384 .remove = xilinxfb_platform_remove,
385 .driver = {
386 .owner = THIS_MODULE,
387 .name = DRIVER_NAME,
391 /* ---------------------------------------------------------------------
392 * OF bus binding
395 #if defined(CONFIG_OF)
396 static int __devinit
397 xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
399 struct resource res;
400 const u32 *prop;
401 struct xilinxfb_platform_data pdata;
402 int size, rc;
404 /* Copy with the default pdata (not a ptr reference!) */
405 pdata = xilinx_fb_default_pdata;
407 dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match);
409 rc = of_address_to_resource(op->node, 0, &res);
410 if (rc) {
411 dev_err(&op->dev, "invalid address\n");
412 return rc;
415 prop = of_get_property(op->node, "display-number", &size);
416 if ((prop) && (size >= sizeof(u32)*2)) {
417 pdata.screen_width_mm = prop[0];
418 pdata.screen_height_mm = prop[1];
421 if (of_find_property(op->node, "rotate-display", NULL))
422 pdata.rotate_screen = 1;
424 return xilinxfb_assign(&op->dev, res.start, &pdata);
427 static int __devexit xilinxfb_of_remove(struct of_device *op)
429 return xilinxfb_release(&op->dev);
432 /* Match table for of_platform binding */
433 static struct of_device_id __devinit xilinxfb_of_match[] = {
434 { .compatible = "xilinx,ml300-fb", },
437 MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
439 static struct of_platform_driver xilinxfb_of_driver = {
440 .owner = THIS_MODULE,
441 .name = DRIVER_NAME,
442 .match_table = xilinxfb_of_match,
443 .probe = xilinxfb_of_probe,
444 .remove = __devexit_p(xilinxfb_of_remove),
445 .driver = {
446 .name = DRIVER_NAME,
450 /* Registration helpers to keep the number of #ifdefs to a minimum */
451 static inline int __init xilinxfb_of_register(void)
453 pr_debug("xilinxfb: calling of_register_platform_driver()\n");
454 return of_register_platform_driver(&xilinxfb_of_driver);
457 static inline void __exit xilinxfb_of_unregister(void)
459 of_unregister_platform_driver(&xilinxfb_of_driver);
461 #else /* CONFIG_OF */
462 /* CONFIG_OF not enabled; do nothing helpers */
463 static inline int __init xilinxfb_of_register(void) { return 0; }
464 static inline void __exit xilinxfb_of_unregister(void) { }
465 #endif /* CONFIG_OF */
467 /* ---------------------------------------------------------------------
468 * Module setup and teardown
471 static int __init
472 xilinxfb_init(void)
474 int rc;
475 rc = xilinxfb_of_register();
476 if (rc)
477 return rc;
479 rc = platform_driver_register(&xilinxfb_platform_driver);
480 if (rc)
481 xilinxfb_of_unregister();
483 return rc;
486 static void __exit
487 xilinxfb_cleanup(void)
489 platform_driver_unregister(&xilinxfb_platform_driver);
490 xilinxfb_of_unregister();
493 module_init(xilinxfb_init);
494 module_exit(xilinxfb_cleanup);
496 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
497 MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
498 MODULE_LICENSE("GPL");