2 * linux/asm/assembler.h
4 * This file contains arm architecture specific defines
5 * for the different processors.
7 * Do not include any C declarations in this file - it is included by
11 #error "Only include this from assembly code"
15 * Endian independent macros for shifting bytes within registers.
22 #define LOADREGS(cond, base, reglist...)\
23 ldm##cond base,reglist^
25 #define RETINSTR(instr, regs...)\
28 #define LOADREGS(cond, base, reglist...)\
29 ldm/**/cond base,reglist^
31 #define RETINSTR(instr, regs...)\
38 #define MODE(savereg,tmpreg,mode) \
40 bic tmpreg, savereg, $0x0c000003; \
41 orr tmpreg, tmpreg, $mode; \
44 #define RESTOREMODE(savereg) \
47 #define SAVEIRQS(tmpreg)
49 #define RESTOREIRQS(tmpreg)
51 #define DISABLEIRQS(tmpreg)\
54 #define ENABLEIRQS(tmpreg)\
57 #define USERMODE(tmpreg)\
58 teqp pc, $0x00000000;\
61 #define SVCMODE(tmpreg)\
62 teqp pc, $0x00000003;\
67 * Save the current IRQ state and disable IRQs
68 * Note that this macro assumes FIQs are enabled, and
69 * that the processor is in SVC mode.
71 .macro save_and_disable_irqs
, oldcpsr
, temp
73 orr
\temp
, \oldcpsr
, #0x08000000
78 * Restore interrupt state previously stored in
80 * ** Actually do nothing on Arc - hope that the caller uses a MOVS PC soon
83 .macro restore_irqs
, oldcpsr
84 @ This be restore_irqs
88 * These two are used to save LR/restore PC over a user-based access.
89 * The old 26-bit architecture requires that we save lr (R14)
101 .section __ex_table,"a"; \