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[PATCH] USB: unusual_devs entry for Nokia N80
[linux-2.6/suspend2-2.6.18.git] / arch / arm / mach-s3c2410 / devs.c
blobad3845e329ba26d8af79d6e50c6e878694dcca68
1 /* linux/arch/arm/mach-s3c2410/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C2410 platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
14 * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
15 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
16 * 29-Aug-2004 BJD Added timers 0 through 3
17 * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
18 * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
19 * 18-Aug-2004 BJD Created initial version
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/interrupt.h>
25 #include <linux/list.h>
26 #include <linux/timer.h>
27 #include <linux/init.h>
28 #include <linux/platform_device.h>
29
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/irq.h>
33 #include <asm/arch/fb.h>
34 #include <asm/hardware.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37
38 #include <asm/arch/regs-serial.h>
39
40 #include "devs.h"
41 #include "cpu.h"
42
43 /* Serial port registrations */
44
45 static struct resource s3c2410_uart0_resource[] = {
46 [0] = {
47 .start = S3C2410_PA_UART0,
48 .end = S3C2410_PA_UART0 + 0x3fff,
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .start = IRQ_S3CUART_RX0,
53 .end = IRQ_S3CUART_ERR0,
54 .flags = IORESOURCE_IRQ,
55 }
56 };
57
58 static struct resource s3c2410_uart1_resource[] = {
59 [0] = {
60 .start = S3C2410_PA_UART1,
61 .end = S3C2410_PA_UART1 + 0x3fff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_S3CUART_RX1,
66 .end = IRQ_S3CUART_ERR1,
67 .flags = IORESOURCE_IRQ,
68 }
69 };
70
71 static struct resource s3c2410_uart2_resource[] = {
72 [0] = {
73 .start = S3C2410_PA_UART2,
74 .end = S3C2410_PA_UART2 + 0x3fff,
75 .flags = IORESOURCE_MEM,
76 },
77 [1] = {
78 .start = IRQ_S3CUART_RX2,
79 .end = IRQ_S3CUART_ERR2,
80 .flags = IORESOURCE_IRQ,
81 }
82 };
83
84 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
85 [0] = {
86 .resources = s3c2410_uart0_resource,
87 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
88 },
89 [1] = {
90 .resources = s3c2410_uart1_resource,
91 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
92 },
93 [2] = {
94 .resources = s3c2410_uart2_resource,
95 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
96 },
97 };
98
99 /* yart devices */
100
101 static struct platform_device s3c24xx_uart_device0 = {
102 .id = 0,
103 };
104
105 static struct platform_device s3c24xx_uart_device1 = {
106 .id = 1,
107 };
108
109 static struct platform_device s3c24xx_uart_device2 = {
110 .id = 2,
111 };
112
113 struct platform_device *s3c24xx_uart_src[3] = {
114 &s3c24xx_uart_device0,
115 &s3c24xx_uart_device1,
116 &s3c24xx_uart_device2,
117 };
118
119 struct platform_device *s3c24xx_uart_devs[3] = {
120 };
121
122 /* USB Host Controller */
123
124 static struct resource s3c_usb_resource[] = {
125 [0] = {
126 .start = S3C24XX_PA_USBHOST,
127 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
128 .flags = IORESOURCE_MEM,
129 },
130 [1] = {
131 .start = IRQ_USBH,
132 .end = IRQ_USBH,
133 .flags = IORESOURCE_IRQ,
134 }
135 };
136
137 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
138
139 struct platform_device s3c_device_usb = {
140 .name = "s3c2410-ohci",
141 .id = -1,
142 .num_resources = ARRAY_SIZE(s3c_usb_resource),
143 .resource = s3c_usb_resource,
144 .dev = {
145 .dma_mask = &s3c_device_usb_dmamask,
146 .coherent_dma_mask = 0xffffffffUL
147 }
148 };
149
150 EXPORT_SYMBOL(s3c_device_usb);
151
152 /* LCD Controller */
153
154 static struct resource s3c_lcd_resource[] = {
155 [0] = {
156 .start = S3C24XX_PA_LCD,
157 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 [1] = {
161 .start = IRQ_LCD,
162 .end = IRQ_LCD,
163 .flags = IORESOURCE_IRQ,
164 }
165
166 };
167
168 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
169
170 struct platform_device s3c_device_lcd = {
171 .name = "s3c2410-lcd",
172 .id = -1,
173 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
174 .resource = s3c_lcd_resource,
175 .dev = {
176 .dma_mask = &s3c_device_lcd_dmamask,
177 .coherent_dma_mask = 0xffffffffUL
178 }
179 };
180
181 EXPORT_SYMBOL(s3c_device_lcd);
182
183 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
184 {
185 struct s3c2410fb_mach_info *npd;
186
187 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
188 if (npd) {
189 memcpy(npd, pd, sizeof(*npd));
190 s3c_device_lcd.dev.platform_data = npd;
191 } else {
192 printk(KERN_ERR "no memory for LCD platform data\n");
193 }
194 }
195
196 /* NAND Controller */
197
198 static struct resource s3c_nand_resource[] = {
199 [0] = {
200 .start = S3C2410_PA_NAND,
201 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
202 .flags = IORESOURCE_MEM,
203 }
204 };
205
206 struct platform_device s3c_device_nand = {
207 .name = "s3c2410-nand",
208 .id = -1,
209 .num_resources = ARRAY_SIZE(s3c_nand_resource),
210 .resource = s3c_nand_resource,
211 };
212
213 EXPORT_SYMBOL(s3c_device_nand);
214
215 /* USB Device (Gadget)*/
216
217 static struct resource s3c_usbgadget_resource[] = {
218 [0] = {
219 .start = S3C24XX_PA_USBDEV,
220 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = IRQ_USBD,
225 .end = IRQ_USBD,
226 .flags = IORESOURCE_IRQ,
227 }
228
229 };
230
231 struct platform_device s3c_device_usbgadget = {
232 .name = "s3c2410-usbgadget",
233 .id = -1,
234 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
235 .resource = s3c_usbgadget_resource,
236 };
237
238 EXPORT_SYMBOL(s3c_device_usbgadget);
239
240 /* Watchdog */
241
242 static struct resource s3c_wdt_resource[] = {
243 [0] = {
244 .start = S3C24XX_PA_WATCHDOG,
245 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
249 .start = IRQ_WDT,
250 .end = IRQ_WDT,
251 .flags = IORESOURCE_IRQ,
252 }
253
254 };
255
256 struct platform_device s3c_device_wdt = {
257 .name = "s3c2410-wdt",
258 .id = -1,
259 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
260 .resource = s3c_wdt_resource,
261 };
262
263 EXPORT_SYMBOL(s3c_device_wdt);
264
265 /* I2C */
266
267 static struct resource s3c_i2c_resource[] = {
268 [0] = {
269 .start = S3C24XX_PA_IIC,
270 .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
271 .flags = IORESOURCE_MEM,
272 },
273 [1] = {
274 .start = IRQ_IIC,
275 .end = IRQ_IIC,
276 .flags = IORESOURCE_IRQ,
277 }
278
279 };
280
281 struct platform_device s3c_device_i2c = {
282 .name = "s3c2410-i2c",
283 .id = -1,
284 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
285 .resource = s3c_i2c_resource,
286 };
287
288 EXPORT_SYMBOL(s3c_device_i2c);
289
290 /* IIS */
291
292 static struct resource s3c_iis_resource[] = {
293 [0] = {
294 .start = S3C24XX_PA_IIS,
295 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
296 .flags = IORESOURCE_MEM,
297 }
298 };
299
300 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
301
302 struct platform_device s3c_device_iis = {
303 .name = "s3c2410-iis",
304 .id = -1,
305 .num_resources = ARRAY_SIZE(s3c_iis_resource),
306 .resource = s3c_iis_resource,
307 .dev = {
308 .dma_mask = &s3c_device_iis_dmamask,
309 .coherent_dma_mask = 0xffffffffUL
310 }
311 };
312
313 EXPORT_SYMBOL(s3c_device_iis);
314
315 /* RTC */
316
317 static struct resource s3c_rtc_resource[] = {
318 [0] = {
319 .start = S3C24XX_PA_RTC,
320 .end = S3C24XX_PA_RTC + 0xff,
321 .flags = IORESOURCE_MEM,
322 },
323 [1] = {
324 .start = IRQ_RTC,
325 .end = IRQ_RTC,
326 .flags = IORESOURCE_IRQ,
327 },
328 [2] = {
329 .start = IRQ_TICK,
330 .end = IRQ_TICK,
331 .flags = IORESOURCE_IRQ
332 }
333 };
334
335 struct platform_device s3c_device_rtc = {
336 .name = "s3c2410-rtc",
337 .id = -1,
338 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
339 .resource = s3c_rtc_resource,
340 };
341
342 EXPORT_SYMBOL(s3c_device_rtc);
343
344 /* ADC */
345
346 static struct resource s3c_adc_resource[] = {
347 [0] = {
348 .start = S3C24XX_PA_ADC,
349 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
353 .start = IRQ_TC,
354 .end = IRQ_TC,
355 .flags = IORESOURCE_IRQ,
356 },
357 [2] = {
358 .start = IRQ_ADC,
359 .end = IRQ_ADC,
360 .flags = IORESOURCE_IRQ,
361 }
362
363 };
364
365 struct platform_device s3c_device_adc = {
366 .name = "s3c2410-adc",
367 .id = -1,
368 .num_resources = ARRAY_SIZE(s3c_adc_resource),
369 .resource = s3c_adc_resource,
370 };
371
372 /* SDI */
373
374 static struct resource s3c_sdi_resource[] = {
375 [0] = {
376 .start = S3C2410_PA_SDI,
377 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
378 .flags = IORESOURCE_MEM,
379 },
380 [1] = {
381 .start = IRQ_SDI,
382 .end = IRQ_SDI,
383 .flags = IORESOURCE_IRQ,
384 }
385
386 };
387
388 struct platform_device s3c_device_sdi = {
389 .name = "s3c2410-sdi",
390 .id = -1,
391 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
392 .resource = s3c_sdi_resource,
393 };
394
395 EXPORT_SYMBOL(s3c_device_sdi);
396
397 /* SPI (0) */
398
399 static struct resource s3c_spi0_resource[] = {
400 [0] = {
401 .start = S3C24XX_PA_SPI,
402 .end = S3C24XX_PA_SPI + 0x1f,
403 .flags = IORESOURCE_MEM,
404 },
405 [1] = {
406 .start = IRQ_SPI0,
407 .end = IRQ_SPI0,
408 .flags = IORESOURCE_IRQ,
409 }
410
411 };
412
413 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
414
415 struct platform_device s3c_device_spi0 = {
416 .name = "s3c2410-spi",
417 .id = 0,
418 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
419 .resource = s3c_spi0_resource,
420 .dev = {
421 .dma_mask = &s3c_device_spi0_dmamask,
422 .coherent_dma_mask = 0xffffffffUL
423 }
424 };
425
426 EXPORT_SYMBOL(s3c_device_spi0);
427
428 /* SPI (1) */
429
430 static struct resource s3c_spi1_resource[] = {
431 [0] = {
432 .start = S3C24XX_PA_SPI + 0x20,
433 .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
434 .flags = IORESOURCE_MEM,
435 },
436 [1] = {
437 .start = IRQ_SPI1,
438 .end = IRQ_SPI1,
439 .flags = IORESOURCE_IRQ,
440 }
441
442 };
443
444 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
445
446 struct platform_device s3c_device_spi1 = {
447 .name = "s3c2410-spi",
448 .id = 1,
449 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
450 .resource = s3c_spi1_resource,
451 .dev = {
452 .dma_mask = &s3c_device_spi1_dmamask,
453 .coherent_dma_mask = 0xffffffffUL
454 }
455 };
456
457 EXPORT_SYMBOL(s3c_device_spi1);
458
459 /* pwm timer blocks */
460
461 static struct resource s3c_timer0_resource[] = {
462 [0] = {
463 .start = S3C24XX_PA_TIMER + 0x0C,
464 .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
465 .flags = IORESOURCE_MEM,
466 },
467 [1] = {
468 .start = IRQ_TIMER0,
469 .end = IRQ_TIMER0,
470 .flags = IORESOURCE_IRQ,
471 }
472
473 };
474
475 struct platform_device s3c_device_timer0 = {
476 .name = "s3c2410-timer",
477 .id = 0,
478 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
479 .resource = s3c_timer0_resource,
480 };
481
482 EXPORT_SYMBOL(s3c_device_timer0);
483
484 /* timer 1 */
485
486 static struct resource s3c_timer1_resource[] = {
487 [0] = {
488 .start = S3C24XX_PA_TIMER + 0x18,
489 .end = S3C24XX_PA_TIMER + 0x23,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = IRQ_TIMER1,
494 .end = IRQ_TIMER1,
495 .flags = IORESOURCE_IRQ,
496 }
497
498 };
499
500 struct platform_device s3c_device_timer1 = {
501 .name = "s3c2410-timer",
502 .id = 1,
503 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
504 .resource = s3c_timer1_resource,
505 };
506
507 EXPORT_SYMBOL(s3c_device_timer1);
508
509 /* timer 2 */
510
511 static struct resource s3c_timer2_resource[] = {
512 [0] = {
513 .start = S3C24XX_PA_TIMER + 0x24,
514 .end = S3C24XX_PA_TIMER + 0x2F,
515 .flags = IORESOURCE_MEM,
516 },
517 [1] = {
518 .start = IRQ_TIMER2,
519 .end = IRQ_TIMER2,
520 .flags = IORESOURCE_IRQ,
521 }
522
523 };
524
525 struct platform_device s3c_device_timer2 = {
526 .name = "s3c2410-timer",
527 .id = 2,
528 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
529 .resource = s3c_timer2_resource,
530 };
531
532 EXPORT_SYMBOL(s3c_device_timer2);
533
534 /* timer 3 */
535
536 static struct resource s3c_timer3_resource[] = {
537 [0] = {
538 .start = S3C24XX_PA_TIMER + 0x30,
539 .end = S3C24XX_PA_TIMER + 0x3B,
540 .flags = IORESOURCE_MEM,
541 },
542 [1] = {
543 .start = IRQ_TIMER3,
544 .end = IRQ_TIMER3,
545 .flags = IORESOURCE_IRQ,
546 }
547
548 };
549
550 struct platform_device s3c_device_timer3 = {
551 .name = "s3c2410-timer",
552 .id = 3,
553 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
554 .resource = s3c_timer3_resource,
555 };
556
557 EXPORT_SYMBOL(s3c_device_timer3);
558
559 #ifdef CONFIG_CPU_S3C2440
560
561 /* Camif Controller */
562
563 static struct resource s3c_camif_resource[] = {
564 [0] = {
565 .start = S3C2440_PA_CAMIF,
566 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .start = IRQ_CAM,
571 .end = IRQ_CAM,
572 .flags = IORESOURCE_IRQ,
573 }
574
575 };
576
577 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
578
579 struct platform_device s3c_device_camif = {
580 .name = "s3c2440-camif",
581 .id = -1,
582 .num_resources = ARRAY_SIZE(s3c_camif_resource),
583 .resource = s3c_camif_resource,
584 .dev = {
585 .dma_mask = &s3c_device_camif_dmamask,
586 .coherent_dma_mask = 0xffffffffUL
587 }
588 };
589
590 EXPORT_SYMBOL(s3c_device_camif);
591
592 #endif // CONFIG_CPU_S32440
Software Suspend 2 for 2.6.18.y (mirror)