[PATCH] poison: add & use more constants
[linux-2.6/suspend2-2.6.18.git] / arch / ia64 / kernel / smpboot.c
blob44e9547878ac7310b6f11502d1a709fd5805bd66
1 /*
2 * SMP boot-related support
4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * Copyright (C) 2001, 2004-2005 Intel Corp
7 * Rohit Seth <rohit.seth@intel.com>
8 * Suresh Siddha <suresh.b.siddha@intel.com>
9 * Gordon Jin <gordon.jin@intel.com>
10 * Ashok Raj <ashok.raj@intel.com>
12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15 * smp_boot_cpus()/smp_commence() is replaced by
16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
18 * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19 * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20 * Add multi-threading and multi-core detection
21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22 * Setup cpu_sibling_map and cpu_core_map
24 #include <linux/config.h>
26 #include <linux/module.h>
27 #include <linux/acpi.h>
28 #include <linux/bootmem.h>
29 #include <linux/cpu.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/kernel.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/mm.h>
37 #include <linux/notifier.h>
38 #include <linux/smp.h>
39 #include <linux/smp_lock.h>
40 #include <linux/spinlock.h>
41 #include <linux/efi.h>
42 #include <linux/percpu.h>
43 #include <linux/bitops.h>
45 #include <asm/atomic.h>
46 #include <asm/cache.h>
47 #include <asm/current.h>
48 #include <asm/delay.h>
49 #include <asm/ia32.h>
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <asm/machvec.h>
53 #include <asm/mca.h>
54 #include <asm/page.h>
55 #include <asm/pgalloc.h>
56 #include <asm/pgtable.h>
57 #include <asm/processor.h>
58 #include <asm/ptrace.h>
59 #include <asm/sal.h>
60 #include <asm/system.h>
61 #include <asm/tlbflush.h>
62 #include <asm/unistd.h>
64 #define SMP_DEBUG 0
66 #if SMP_DEBUG
67 #define Dprintk(x...) printk(x)
68 #else
69 #define Dprintk(x...)
70 #endif
72 #ifdef CONFIG_HOTPLUG_CPU
73 #ifdef CONFIG_PERMIT_BSP_REMOVE
74 #define bsp_remove_ok 1
75 #else
76 #define bsp_remove_ok 0
77 #endif
80 * Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
82 * for idle threads.
84 struct task_struct *idle_thread_array[NR_CPUS];
87 * Global array allocated for NR_CPUS at boot time
89 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
92 * start_ap in head.S uses this to store current booting cpu
93 * info.
95 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
97 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
99 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
100 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
102 #else
104 #define get_idle_for_cpu(x) (NULL)
105 #define set_idle_for_cpu(x,p)
106 #define set_brendez_area(x)
107 #endif
111 * ITC synchronization related stuff:
113 #define MASTER (0)
114 #define SLAVE (SMP_CACHE_BYTES/8)
116 #define NUM_ROUNDS 64 /* magic value */
117 #define NUM_ITERS 5 /* likewise */
119 static DEFINE_SPINLOCK(itc_sync_lock);
120 static volatile unsigned long go[SLAVE + 1];
122 #define DEBUG_ITC_SYNC 0
124 extern void __devinit calibrate_delay (void);
125 extern void start_ap (void);
126 extern unsigned long ia64_iobase;
128 task_t *task_for_booting_cpu;
131 * State for each CPU
133 DEFINE_PER_CPU(int, cpu_state);
135 /* Bitmasks of currently online, and possible CPUs */
136 cpumask_t cpu_online_map;
137 EXPORT_SYMBOL(cpu_online_map);
138 cpumask_t cpu_possible_map = CPU_MASK_NONE;
139 EXPORT_SYMBOL(cpu_possible_map);
141 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
142 cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
143 int smp_num_siblings = 1;
144 int smp_num_cpucores = 1;
146 /* which logical CPU number maps to which CPU (physical APIC ID) */
147 volatile int ia64_cpu_to_sapicid[NR_CPUS];
148 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
150 static volatile cpumask_t cpu_callin_map;
152 struct smp_boot_data smp_boot_data __initdata;
154 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
156 char __initdata no_int_routing;
158 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
160 #ifdef CONFIG_FORCE_CPEI_RETARGET
161 #define CPEI_OVERRIDE_DEFAULT (1)
162 #else
163 #define CPEI_OVERRIDE_DEFAULT (0)
164 #endif
166 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
168 static int __init
169 cmdl_force_cpei(char *str)
171 int value=0;
173 get_option (&str, &value);
174 force_cpei_retarget = value;
176 return 1;
179 __setup("force_cpei=", cmdl_force_cpei);
181 static int __init
182 nointroute (char *str)
184 no_int_routing = 1;
185 printk ("no_int_routing on\n");
186 return 1;
189 __setup("nointroute", nointroute);
191 static void fix_b0_for_bsp(void)
193 #ifdef CONFIG_HOTPLUG_CPU
194 int cpuid;
195 static int fix_bsp_b0 = 1;
197 cpuid = smp_processor_id();
200 * Cache the b0 value on the first AP that comes up
202 if (!(fix_bsp_b0 && cpuid))
203 return;
205 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
206 printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
208 fix_bsp_b0 = 0;
209 #endif
212 void
213 sync_master (void *arg)
215 unsigned long flags, i;
217 go[MASTER] = 0;
219 local_irq_save(flags);
221 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
222 while (!go[MASTER])
223 cpu_relax();
224 go[MASTER] = 0;
225 go[SLAVE] = ia64_get_itc();
228 local_irq_restore(flags);
232 * Return the number of cycles by which our itc differs from the itc on the master
233 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
234 * negative that it is behind.
236 static inline long
237 get_delta (long *rt, long *master)
239 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
240 unsigned long tcenter, t0, t1, tm;
241 long i;
243 for (i = 0; i < NUM_ITERS; ++i) {
244 t0 = ia64_get_itc();
245 go[MASTER] = 1;
246 while (!(tm = go[SLAVE]))
247 cpu_relax();
248 go[SLAVE] = 0;
249 t1 = ia64_get_itc();
251 if (t1 - t0 < best_t1 - best_t0)
252 best_t0 = t0, best_t1 = t1, best_tm = tm;
255 *rt = best_t1 - best_t0;
256 *master = best_tm - best_t0;
258 /* average best_t0 and best_t1 without overflow: */
259 tcenter = (best_t0/2 + best_t1/2);
260 if (best_t0 % 2 + best_t1 % 2 == 2)
261 ++tcenter;
262 return tcenter - best_tm;
266 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
267 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
268 * unaccounted-for errors (such as getting a machine check in the middle of a calibration
269 * step). The basic idea is for the slave to ask the master what itc value it has and to
270 * read its own itc before and after the master responds. Each iteration gives us three
271 * timestamps:
273 * slave master
275 * t0 ---\
276 * ---\
277 * --->
278 * tm
279 * /---
280 * /---
281 * t1 <---
284 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
285 * and t1. If we achieve this, the clocks are synchronized provided the interconnect
286 * between the slave and the master is symmetric. Even if the interconnect were
287 * asymmetric, we would still know that the synchronization error is smaller than the
288 * roundtrip latency (t0 - t1).
290 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
291 * within one or two cycles. However, we can only *guarantee* that the synchronization is
292 * accurate to within a round-trip time, which is typically in the range of several
293 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
294 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
295 * than half a micro second or so.
297 void
298 ia64_sync_itc (unsigned int master)
300 long i, delta, adj, adjust_latency = 0, done = 0;
301 unsigned long flags, rt, master_time_stamp, bound;
302 #if DEBUG_ITC_SYNC
303 struct {
304 long rt; /* roundtrip time */
305 long master; /* master's timestamp */
306 long diff; /* difference between midpoint and master's timestamp */
307 long lat; /* estimate of itc adjustment latency */
308 } t[NUM_ROUNDS];
309 #endif
312 * Make sure local timer ticks are disabled while we sync. If
313 * they were enabled, we'd have to worry about nasty issues
314 * like setting the ITC ahead of (or a long time before) the
315 * next scheduled tick.
317 BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
319 go[MASTER] = 1;
321 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
322 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
323 return;
326 while (go[MASTER])
327 cpu_relax(); /* wait for master to be ready */
329 spin_lock_irqsave(&itc_sync_lock, flags);
331 for (i = 0; i < NUM_ROUNDS; ++i) {
332 delta = get_delta(&rt, &master_time_stamp);
333 if (delta == 0) {
334 done = 1; /* let's lock on to this... */
335 bound = rt;
338 if (!done) {
339 if (i > 0) {
340 adjust_latency += -delta;
341 adj = -delta + adjust_latency/4;
342 } else
343 adj = -delta;
345 ia64_set_itc(ia64_get_itc() + adj);
347 #if DEBUG_ITC_SYNC
348 t[i].rt = rt;
349 t[i].master = master_time_stamp;
350 t[i].diff = delta;
351 t[i].lat = adjust_latency/4;
352 #endif
355 spin_unlock_irqrestore(&itc_sync_lock, flags);
357 #if DEBUG_ITC_SYNC
358 for (i = 0; i < NUM_ROUNDS; ++i)
359 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
360 t[i].rt, t[i].master, t[i].diff, t[i].lat);
361 #endif
363 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
364 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
368 * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
370 static inline void __devinit
371 smp_setup_percpu_timer (void)
375 static void __devinit
376 smp_callin (void)
378 int cpuid, phys_id, itc_master;
379 extern void ia64_init_itm(void);
380 extern volatile int time_keeper_id;
382 #ifdef CONFIG_PERFMON
383 extern void pfm_init_percpu(void);
384 #endif
386 cpuid = smp_processor_id();
387 phys_id = hard_smp_processor_id();
388 itc_master = time_keeper_id;
390 if (cpu_online(cpuid)) {
391 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
392 phys_id, cpuid);
393 BUG();
396 fix_b0_for_bsp();
398 lock_ipi_calllock();
399 cpu_set(cpuid, cpu_online_map);
400 unlock_ipi_calllock();
401 per_cpu(cpu_state, cpuid) = CPU_ONLINE;
403 smp_setup_percpu_timer();
405 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
407 #ifdef CONFIG_PERFMON
408 pfm_init_percpu();
409 #endif
411 local_irq_enable();
413 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
415 * Synchronize the ITC with the BP. Need to do this after irqs are
416 * enabled because ia64_sync_itc() calls smp_call_function_single(), which
417 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
418 * local_bh_enable(), which bugs out if irqs are not enabled...
420 Dprintk("Going to syncup ITC with ITC Master.\n");
421 ia64_sync_itc(itc_master);
425 * Get our bogomips.
427 ia64_init_itm();
428 calibrate_delay();
429 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
431 #ifdef CONFIG_IA32_SUPPORT
432 ia32_gdt_init();
433 #endif
436 * Allow the master to continue.
438 cpu_set(cpuid, cpu_callin_map);
439 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
444 * Activate a secondary processor. head.S calls this.
446 int __devinit
447 start_secondary (void *unused)
449 /* Early console may use I/O ports */
450 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
451 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
452 efi_map_pal_code();
453 cpu_init();
454 preempt_disable();
455 smp_callin();
457 cpu_idle();
458 return 0;
461 struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
463 return NULL;
466 struct create_idle {
467 struct task_struct *idle;
468 struct completion done;
469 int cpu;
472 void
473 do_fork_idle(void *_c_idle)
475 struct create_idle *c_idle = _c_idle;
477 c_idle->idle = fork_idle(c_idle->cpu);
478 complete(&c_idle->done);
481 static int __devinit
482 do_boot_cpu (int sapicid, int cpu)
484 int timeout;
485 struct create_idle c_idle = {
486 .cpu = cpu,
487 .done = COMPLETION_INITIALIZER(c_idle.done),
489 DECLARE_WORK(work, do_fork_idle, &c_idle);
491 c_idle.idle = get_idle_for_cpu(cpu);
492 if (c_idle.idle) {
493 init_idle(c_idle.idle, cpu);
494 goto do_rest;
498 * We can't use kernel_thread since we must avoid to reschedule the child.
500 if (!keventd_up() || current_is_keventd())
501 work.func(work.data);
502 else {
503 schedule_work(&work);
504 wait_for_completion(&c_idle.done);
507 if (IS_ERR(c_idle.idle))
508 panic("failed fork for CPU %d", cpu);
510 set_idle_for_cpu(cpu, c_idle.idle);
512 do_rest:
513 task_for_booting_cpu = c_idle.idle;
515 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
517 set_brendez_area(cpu);
518 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
521 * Wait 10s total for the AP to start
523 Dprintk("Waiting on callin_map ...");
524 for (timeout = 0; timeout < 100000; timeout++) {
525 if (cpu_isset(cpu, cpu_callin_map))
526 break; /* It has booted */
527 udelay(100);
529 Dprintk("\n");
531 if (!cpu_isset(cpu, cpu_callin_map)) {
532 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
533 ia64_cpu_to_sapicid[cpu] = -1;
534 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */
535 return -EINVAL;
537 return 0;
540 static int __init
541 decay (char *str)
543 int ticks;
544 get_option (&str, &ticks);
545 return 1;
548 __setup("decay=", decay);
551 * Initialize the logical CPU number to SAPICID mapping
553 void __init
554 smp_build_cpu_map (void)
556 int sapicid, cpu, i;
557 int boot_cpu_id = hard_smp_processor_id();
559 for (cpu = 0; cpu < NR_CPUS; cpu++) {
560 ia64_cpu_to_sapicid[cpu] = -1;
563 ia64_cpu_to_sapicid[0] = boot_cpu_id;
564 cpus_clear(cpu_present_map);
565 cpu_set(0, cpu_present_map);
566 cpu_set(0, cpu_possible_map);
567 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
568 sapicid = smp_boot_data.cpu_phys_id[i];
569 if (sapicid == boot_cpu_id)
570 continue;
571 cpu_set(cpu, cpu_present_map);
572 cpu_set(cpu, cpu_possible_map);
573 ia64_cpu_to_sapicid[cpu] = sapicid;
574 cpu++;
579 * Cycle through the APs sending Wakeup IPIs to boot each.
581 void __init
582 smp_prepare_cpus (unsigned int max_cpus)
584 int boot_cpu_id = hard_smp_processor_id();
587 * Initialize the per-CPU profiling counter/multiplier
590 smp_setup_percpu_timer();
593 * We have the boot CPU online for sure.
595 cpu_set(0, cpu_online_map);
596 cpu_set(0, cpu_callin_map);
598 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
599 ia64_cpu_to_sapicid[0] = boot_cpu_id;
601 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
603 current_thread_info()->cpu = 0;
606 * If SMP should be disabled, then really disable it!
608 if (!max_cpus) {
609 printk(KERN_INFO "SMP mode deactivated.\n");
610 cpus_clear(cpu_online_map);
611 cpus_clear(cpu_present_map);
612 cpus_clear(cpu_possible_map);
613 cpu_set(0, cpu_online_map);
614 cpu_set(0, cpu_present_map);
615 cpu_set(0, cpu_possible_map);
616 return;
620 void __devinit smp_prepare_boot_cpu(void)
622 cpu_set(smp_processor_id(), cpu_online_map);
623 cpu_set(smp_processor_id(), cpu_callin_map);
624 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
627 #ifdef CONFIG_HOTPLUG_CPU
628 static inline void
629 clear_cpu_sibling_map(int cpu)
631 int i;
633 for_each_cpu_mask(i, cpu_sibling_map[cpu])
634 cpu_clear(cpu, cpu_sibling_map[i]);
635 for_each_cpu_mask(i, cpu_core_map[cpu])
636 cpu_clear(cpu, cpu_core_map[i]);
638 cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE;
641 static void
642 remove_siblinginfo(int cpu)
644 int last = 0;
646 if (cpu_data(cpu)->threads_per_core == 1 &&
647 cpu_data(cpu)->cores_per_socket == 1) {
648 cpu_clear(cpu, cpu_core_map[cpu]);
649 cpu_clear(cpu, cpu_sibling_map[cpu]);
650 return;
653 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
655 /* remove it from all sibling map's */
656 clear_cpu_sibling_map(cpu);
659 extern void fixup_irqs(void);
661 int migrate_platform_irqs(unsigned int cpu)
663 int new_cpei_cpu;
664 irq_desc_t *desc = NULL;
665 cpumask_t mask;
666 int retval = 0;
669 * dont permit CPEI target to removed.
671 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
672 printk ("CPU (%d) is CPEI Target\n", cpu);
673 if (can_cpei_retarget()) {
675 * Now re-target the CPEI to a different processor
677 new_cpei_cpu = any_online_cpu(cpu_online_map);
678 mask = cpumask_of_cpu(new_cpei_cpu);
679 set_cpei_target_cpu(new_cpei_cpu);
680 desc = irq_descp(ia64_cpe_irq);
682 * Switch for now, immediatly, we need to do fake intr
683 * as other interrupts, but need to study CPEI behaviour with
684 * polling before making changes.
686 if (desc) {
687 desc->handler->disable(ia64_cpe_irq);
688 desc->handler->set_affinity(ia64_cpe_irq, mask);
689 desc->handler->enable(ia64_cpe_irq);
690 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
693 if (!desc) {
694 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
695 retval = -EBUSY;
698 return retval;
701 /* must be called with cpucontrol mutex held */
702 int __cpu_disable(void)
704 int cpu = smp_processor_id();
707 * dont permit boot processor for now
709 if (cpu == 0 && !bsp_remove_ok) {
710 printk ("Your platform does not support removal of BSP\n");
711 return (-EBUSY);
714 cpu_clear(cpu, cpu_online_map);
716 if (migrate_platform_irqs(cpu)) {
717 cpu_set(cpu, cpu_online_map);
718 return (-EBUSY);
721 remove_siblinginfo(cpu);
722 cpu_clear(cpu, cpu_online_map);
723 fixup_irqs();
724 local_flush_tlb_all();
725 cpu_clear(cpu, cpu_callin_map);
726 return 0;
729 void __cpu_die(unsigned int cpu)
731 unsigned int i;
733 for (i = 0; i < 100; i++) {
734 /* They ack this in play_dead by setting CPU_DEAD */
735 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
737 printk ("CPU %d is now offline\n", cpu);
738 return;
740 msleep(100);
742 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
744 #else /* !CONFIG_HOTPLUG_CPU */
745 int __cpu_disable(void)
747 return -ENOSYS;
750 void __cpu_die(unsigned int cpu)
752 /* We said "no" in __cpu_disable */
753 BUG();
755 #endif /* CONFIG_HOTPLUG_CPU */
757 void
758 smp_cpus_done (unsigned int dummy)
760 int cpu;
761 unsigned long bogosum = 0;
764 * Allow the user to impress friends.
767 for_each_online_cpu(cpu) {
768 bogosum += cpu_data(cpu)->loops_per_jiffy;
771 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
772 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
775 static inline void __devinit
776 set_cpu_sibling_map(int cpu)
778 int i;
780 for_each_online_cpu(i) {
781 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
782 cpu_set(i, cpu_core_map[cpu]);
783 cpu_set(cpu, cpu_core_map[i]);
784 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
785 cpu_set(i, cpu_sibling_map[cpu]);
786 cpu_set(cpu, cpu_sibling_map[i]);
792 int __devinit
793 __cpu_up (unsigned int cpu)
795 int ret;
796 int sapicid;
798 sapicid = ia64_cpu_to_sapicid[cpu];
799 if (sapicid == -1)
800 return -EINVAL;
803 * Already booted cpu? not valid anymore since we dont
804 * do idle loop tightspin anymore.
806 if (cpu_isset(cpu, cpu_callin_map))
807 return -EINVAL;
809 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
810 /* Processor goes to start_secondary(), sets online flag */
811 ret = do_boot_cpu(sapicid, cpu);
812 if (ret < 0)
813 return ret;
815 if (cpu_data(cpu)->threads_per_core == 1 &&
816 cpu_data(cpu)->cores_per_socket == 1) {
817 cpu_set(cpu, cpu_sibling_map[cpu]);
818 cpu_set(cpu, cpu_core_map[cpu]);
819 return 0;
822 set_cpu_sibling_map(cpu);
824 return 0;
828 * Assume that CPU's have been discovered by some platform-dependent interface. For
829 * SoftSDV/Lion, that would be ACPI.
831 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
833 void __init
834 init_smp_config(void)
836 struct fptr {
837 unsigned long fp;
838 unsigned long gp;
839 } *ap_startup;
840 long sal_ret;
842 /* Tell SAL where to drop the AP's. */
843 ap_startup = (struct fptr *) start_ap;
844 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
845 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
846 if (sal_ret < 0)
847 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
848 ia64_sal_strerror(sal_ret));
852 * identify_siblings(cpu) gets called from identify_cpu. This populates the
853 * information related to logical execution units in per_cpu_data structure.
855 void __devinit
856 identify_siblings(struct cpuinfo_ia64 *c)
858 s64 status;
859 u16 pltid;
860 pal_logical_to_physical_t info;
862 if (smp_num_cpucores == 1 && smp_num_siblings == 1)
863 return;
865 if ((status = ia64_pal_logical_to_phys(-1, &info)) != PAL_STATUS_SUCCESS) {
866 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
867 status);
868 return;
870 if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) {
871 printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status);
872 return;
875 c->socket_id = (pltid << 8) | info.overview_ppid;
876 c->cores_per_socket = info.overview_cpp;
877 c->threads_per_core = info.overview_tpc;
878 c->num_log = info.overview_num_log;
880 c->core_id = info.log1_cid;
881 c->thread_id = info.log1_tid;