[PATCH] drivers/video/: possible cleanups
[linux-2.6/suspend2-2.6.18.git] / arch / arm / mach-ixp2000 / ixdp2800.c
blobf9073aa28615e41ad801d5b364ed92e7d00d7b66
1 /*
2 * arch/arm/mach-ixp2000/ixdp2800.c
4 * IXDP2800 platform support
6 * Original Author: Jeffrey Daly <jeffrey.daly@intel.com>
7 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 #include <linux/config.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/mm.h>
21 #include <linux/sched.h>
22 #include <linux/interrupt.h>
23 #include <linux/device.h>
24 #include <linux/bitops.h>
25 #include <linux/pci.h>
26 #include <linux/ioport.h>
27 #include <linux/slab.h>
28 #include <linux/delay.h>
30 #include <asm/io.h>
31 #include <asm/irq.h>
32 #include <asm/pgtable.h>
33 #include <asm/page.h>
34 #include <asm/system.h>
35 #include <asm/hardware.h>
36 #include <asm/mach-types.h>
38 #include <asm/mach/pci.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/flash.h>
43 #include <asm/mach/arch.h>
45 /*************************************************************************
46 * IXDP2800 timer tick
47 *************************************************************************/
49 static void __init ixdp2800_timer_init(void)
51 ixp2000_init_time(50000000);
54 static struct sys_timer ixdp2800_timer = {
55 .init = ixdp2800_timer_init,
56 .offset = ixp2000_gettimeoffset,
59 /*************************************************************************
60 * IXDP2800 PCI
61 *************************************************************************/
62 static void __init ixdp2800_slave_disable_pci_master(void)
64 *IXP2000_PCI_CMDSTAT &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
67 static void __init ixdp2800_master_wait_for_slave(void)
69 volatile u32 *addr;
71 printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure "
72 "its BAR sizes\n");
74 addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
75 PCI_BASE_ADDRESS_1);
76 do {
77 *addr = 0xffffffff;
78 cpu_relax();
79 } while (*addr != 0xfe000008);
81 addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
82 PCI_BASE_ADDRESS_2);
83 do {
84 *addr = 0xffffffff;
85 cpu_relax();
86 } while (*addr != 0xc0000008);
89 * Configure the slave's SDRAM BAR by hand.
91 *addr = 0x40000008;
94 static void __init ixdp2800_slave_wait_for_master_enable(void)
96 printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n");
98 while ((*IXP2000_PCI_CMDSTAT & PCI_COMMAND_MASTER) == 0)
99 cpu_relax();
102 void __init ixdp2800_pci_preinit(void)
104 printk("ixdp2x00_pci_preinit called\n");
106 *IXP2000_PCI_ADDR_EXT = 0x0001e000;
108 if (!ixdp2x00_master_npu())
109 ixdp2800_slave_disable_pci_master();
111 *IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) & ~0x3ffff;
112 *IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) & ~0xfffff;
114 ixp2000_pci_preinit();
116 if (ixdp2x00_master_npu()) {
118 * Wait until the slave set its SRAM/SDRAM BAR sizes
119 * correctly before we proceed to scan and enumerate
120 * the bus.
122 ixdp2800_master_wait_for_slave();
125 * We configure the SDRAM BARs by hand because they
126 * are 1G and fall outside of the regular allocated
127 * PCI address space.
129 *IXP2000_PCI_SDRAM_BAR = 0x00000008;
130 } else {
132 * Wait for the master to complete scanning the bus
133 * and assigning resources before we proceed to scan
134 * the bus ourselves. Set pci=firmware to honor the
135 * master's resource assignment.
137 ixdp2800_slave_wait_for_master_enable();
138 pcibios_setup("firmware");
143 * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside
144 * of the regular PCI window, because there's only 512M of outbound PCI
145 * memory window on each IXP, while we need 1G for each of the BARs.
147 static void __devinit ixp2800_pci_fixup(struct pci_dev *dev)
149 if (machine_is_ixdp2800()) {
150 dev->resource[2].start = 0;
151 dev->resource[2].end = 0;
152 dev->resource[2].flags = 0;
155 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup);
157 static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)
159 sys->mem_offset = 0x00000000;
161 ixp2000_pci_setup(nr, sys);
163 return 1;
166 static int __init ixdp2800_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
168 if (ixdp2x00_master_npu()) {
171 * Root bus devices. Slave NPU is only one with interrupt.
172 * Everything else, we just return -1 which is invalid.
174 if(!dev->bus->self) {
175 if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN )
176 return IRQ_IXDP2800_INGRESS_NPU;
178 return -1;
182 * Bridge behind the PMC slot.
184 if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN &&
185 dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN &&
186 !dev->bus->parent->self->bus->parent)
187 return IRQ_IXDP2800_PMC;
190 * Device behind the first bridge
192 if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) {
193 switch(dev->devfn) {
194 case IXDP2X00_PMC_DEVFN:
195 return IRQ_IXDP2800_PMC;
197 case IXDP2800_MASTER_ENET_DEVFN:
198 return IRQ_IXDP2800_EGRESS_ENET;
200 case IXDP2800_SWITCH_FABRIC_DEVFN:
201 return IRQ_IXDP2800_FABRIC;
205 return -1;
206 } else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */
209 static void __init ixdp2800_master_enable_slave(void)
211 volatile u32 *addr;
213 printk(KERN_INFO "IXDP2800: enabling slave NPU\n");
215 addr = (volatile u32 *)ixp2000_pci_config_addr(0,
216 IXDP2X00_SLAVE_NPU_DEVFN,
217 PCI_COMMAND);
219 *addr |= PCI_COMMAND_MASTER;
222 static void __init ixdp2800_master_wait_for_slave_bus_scan(void)
224 volatile u32 *addr;
226 printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n");
228 addr = (volatile u32 *)ixp2000_pci_config_addr(0,
229 IXDP2X00_SLAVE_NPU_DEVFN,
230 PCI_COMMAND);
231 while ((*addr & PCI_COMMAND_MEMORY) == 0)
232 cpu_relax();
235 static void __init ixdp2800_slave_signal_bus_scan_completion(void)
237 printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n");
238 *IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY;
241 static void __init ixdp2800_pci_postinit(void)
243 if (!ixdp2x00_master_npu()) {
244 ixdp2x00_slave_pci_postinit();
245 ixdp2800_slave_signal_bus_scan_completion();
249 struct __initdata hw_pci ixdp2800_pci __initdata = {
250 .nr_controllers = 1,
251 .setup = ixdp2800_pci_setup,
252 .preinit = ixdp2800_pci_preinit,
253 .postinit = ixdp2800_pci_postinit,
254 .scan = ixp2000_pci_scan_bus,
255 .map_irq = ixdp2800_pci_map_irq,
258 int __init ixdp2800_pci_init(void)
260 if (machine_is_ixdp2800()) {
261 struct pci_dev *dev;
263 pci_common_init(&ixdp2800_pci);
264 if (ixdp2x00_master_npu()) {
265 dev = pci_find_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
266 pci_remove_bus_device(dev);
268 ixdp2800_master_enable_slave();
269 ixdp2800_master_wait_for_slave_bus_scan();
270 } else {
271 dev = pci_find_slot(1, IXDP2800_MASTER_ENET_DEVFN);
272 pci_remove_bus_device(dev);
276 return 0;
279 subsys_initcall(ixdp2800_pci_init);
281 void ixdp2800_init_irq(void)
283 ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);
286 MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
287 /* Maintainer: MontaVista Software, Inc. */
288 .phys_ram = 0x00000000,
289 .phys_io = IXP2000_UART_PHYS_BASE,
290 .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
291 .boot_params = 0x00000100,
292 .map_io = ixdp2x00_map_io,
293 .init_irq = ixdp2800_init_irq,
294 .timer = &ixdp2800_timer,
295 .init_machine = ixdp2x00_init_machine,
296 MACHINE_END