6 * ELF register definitions..
9 #include <asm/ptrace.h>
12 typedef unsigned long elf_greg_t
;
13 typedef unsigned long elf_freg_t
[3];
16 #define EF_ARM_APCS26 0x08
17 #define EF_ARM_SOFT_FLOAT 0x200
18 #define EF_ARM_EABI_MASK 0xFF000000
24 #define R_ARM_JUMP24 29
26 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
27 typedef elf_greg_t elf_gregset_t
[ELF_NGREG
];
29 typedef struct user_fp elf_fpregset_t
;
32 * These are used to set parameters in the core dumps.
34 #define ELF_CLASS ELFCLASS32
36 #define ELF_DATA ELFDATA2MSB
38 #define ELF_DATA ELFDATA2LSB
40 #define ELF_ARCH EM_ARM
43 #include <asm/procinfo.h>
46 * This is used to ensure we don't load something for the wrong architecture.
48 #define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) )
50 #define USE_ELF_CORE_DUMP
51 #define ELF_EXEC_PAGESIZE 4096
53 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical
54 use of this is to invoke "./ld.so someprog" to test out a new version of
55 the loader. We need to make sure that it is out of the way of the program
56 that it will "exec", and that there is sufficient room for the brk. */
58 #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
60 /* When the program starts, a1 contains a pointer to a function to be
61 registered with atexit, as per the SVR4 ABI. A value of 0 means we
62 have no such handler. */
63 #define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
65 /* This yields a mask that user programs can use to figure out what
66 instruction set this cpu supports. */
68 #define ELF_HWCAP (elf_hwcap)
70 /* This yields a string that ld.so will use to load implementation
71 specific libraries for optimization. This is more specific in
72 intent than poking at uname or /proc/cpuinfo. */
74 /* For now we just provide a fairly general string that describes the
75 processor family. This could be made more specific later if someone
76 implemented optimisations that require it. 26-bit CPUs give you
77 "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't
78 supported). 32-bit CPUs give you "v3[lb]" for anything based on an
79 ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1
82 #define ELF_PLATFORM_SIZE 8
83 extern char elf_platform
[];
84 #define ELF_PLATFORM (elf_platform)
87 * 32-bit code is always OK. Some cpus can do 26-bit, some can't.
89 #define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x))
91 #define ELF_THUMB_OK(x) \
92 (( (elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 1) == 1) || \
93 ((x)->e_entry & 3) == 0)
95 #define ELF_26BIT_OK(x) \
96 (( (elf_hwcap & HWCAP_26BIT) && (x)->e_flags & EF_ARM_APCS26) || \
97 ((x)->e_flags & EF_ARM_APCS26) == 0)
101 /* Old NetWinder binaries were compiled in such a way that the iBCS
102 heuristic always trips on them. Until these binaries become uncommon
103 enough not to care, don't trust the `ibcs' flag here. In any case
104 there is no other ELF system currently supported by iBCS.
105 @@ Could print a warning message to encourage users to upgrade. */
106 #define SET_PERSONALITY(ex,ibcs2) \
107 set_personality(((ex).e_flags&EF_ARM_APCS26 ?PER_LINUX :PER_LINUX_32BIT))
112 * All iWMMXt capable CPUs don't support 26-bit mode. Yet they can run
113 * legacy binaries which used to contain FPA11 floating point instructions
114 * that have always been emulated by the kernel. PFA11 and iWMMXt overlap
115 * on coprocessor 1 space though. We therefore must decide if given task
116 * is allowed to use CP 0 and 1 for iWMMXt, or if they should be blocked
117 * at all times for the prefetch exception handler to catch FPA11 opcodes
118 * and emulate them. The best indication to discriminate those two cases
119 * is the SOFT_FLOAT flag in the ELF header.
122 #define SET_PERSONALITY(ex,ibcs2) \
124 set_personality(PER_LINUX_32BIT); \
125 if (((ex).e_flags & EF_ARM_EABI_MASK) || \
126 ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \
127 set_thread_flag(TIF_USING_IWMMXT); \
129 clear_thread_flag(TIF_USING_IWMMXT); \