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V4L/DVB (3411): FE6600 is a Thomson tuner
[linux-2.6/suspend2-2.6.18.git] / drivers / media / video / cx88 / cx88-dvb.c
bloba9fc2695b157449c18670f0a37d4bca257098596
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #ifdef HAVE_MT352
37 # include "mt352.h"
38 # include "mt352_priv.h"
39 # ifdef HAVE_VP3054_I2C
40 # include "cx88-vp3054-i2c.h"
41 # endif
42 #endif
43 #ifdef HAVE_ZL10353
44 # include "zl10353.h"
45 #endif
46 #ifdef HAVE_CX22702
47 # include "cx22702.h"
48 #endif
49 #ifdef HAVE_OR51132
50 # include "or51132.h"
51 #endif
52 #ifdef HAVE_LGDT330X
53 # include "lgdt330x.h"
54 #endif
55 #ifdef HAVE_NXT200X
56 # include "nxt200x.h"
57 #endif
58 #ifdef HAVE_CX24123
59 # include "cx24123.h"
60 #endif
61
62 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
63 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
64 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
65 MODULE_LICENSE("GPL");
66
67 static unsigned int debug = 0;
68 module_param(debug, int, 0644);
69 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
70
71 #define dprintk(level,fmt, arg...) if (debug >= level) \
72 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
73
74 /* ------------------------------------------------------------------ */
75
76 static int dvb_buf_setup(struct videobuf_queue *q,
77 unsigned int *count, unsigned int *size)
78 {
79 struct cx8802_dev *dev = q->priv_data;
80
81 dev->ts_packet_size = 188 * 4;
82 dev->ts_packet_count = 32;
83
84 *size = dev->ts_packet_size * dev->ts_packet_count;
85 *count = 32;
86 return 0;
87 }
88
89 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
90 enum v4l2_field field)
91 {
92 struct cx8802_dev *dev = q->priv_data;
93 return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb,field);
94 }
95
96 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
97 {
98 struct cx8802_dev *dev = q->priv_data;
99 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
100 }
101
102 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
103 {
104 struct cx8802_dev *dev = q->priv_data;
105 cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
106 }
107
108 static struct videobuf_queue_ops dvb_qops = {
109 .buf_setup = dvb_buf_setup,
110 .buf_prepare = dvb_buf_prepare,
111 .buf_queue = dvb_buf_queue,
112 .buf_release = dvb_buf_release,
113 };
114
115 /* ------------------------------------------------------------------ */
116
117 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
118 static int zarlink_pll_set(struct dvb_frontend *fe,
119 struct dvb_frontend_parameters *params,
120 u8 *pllbuf)
121 {
122 struct cx8802_dev *dev = fe->dvb->priv;
123
124 pllbuf[0] = dev->core->pll_addr << 1;
125 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
126 params->frequency,
127 params->u.ofdm.bandwidth);
128 return 0;
129 }
130 #endif
131
132 #ifdef HAVE_MT352
133 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
134 {
135 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
136 static u8 reset [] = { RESET, 0x80 };
137 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
138 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
139 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
140 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
141
142 mt352_write(fe, clock_config, sizeof(clock_config));
143 udelay(200);
144 mt352_write(fe, reset, sizeof(reset));
145 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
146
147 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
148 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
149 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
150 return 0;
151 }
152
153 static int dvico_dual_demod_init(struct dvb_frontend *fe)
154 {
155 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
156 static u8 reset [] = { RESET, 0x80 };
157 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
158 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
159 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
160 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
161
162 mt352_write(fe, clock_config, sizeof(clock_config));
163 udelay(200);
164 mt352_write(fe, reset, sizeof(reset));
165 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
166
167 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
168 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
169 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
170
171 return 0;
172 }
173
174 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
175 {
176 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
177 static u8 reset [] = { 0x50, 0x80 };
178 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
179 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
180 0x00, 0xFF, 0x00, 0x40, 0x40 };
181 static u8 dntv_extra[] = { 0xB5, 0x7A };
182 static u8 capt_range_cfg[] = { 0x75, 0x32 };
183
184 mt352_write(fe, clock_config, sizeof(clock_config));
185 udelay(2000);
186 mt352_write(fe, reset, sizeof(reset));
187 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
188
189 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
190 udelay(2000);
191 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
192 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
193
194 return 0;
195 }
196
197 static struct mt352_config dvico_fusionhdtv = {
198 .demod_address = 0x0F,
199 .demod_init = dvico_fusionhdtv_demod_init,
200 .pll_set = zarlink_pll_set,
201 };
202
203 static struct mt352_config dntv_live_dvbt_config = {
204 .demod_address = 0x0f,
205 .demod_init = dntv_live_dvbt_demod_init,
206 .pll_set = zarlink_pll_set,
207 };
208
209 static struct mt352_config dvico_fusionhdtv_dual = {
210 .demod_address = 0x0F,
211 .demod_init = dvico_dual_demod_init,
212 .pll_set = zarlink_pll_set,
213 };
214
215 #ifdef HAVE_VP3054_I2C
216 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
217 {
218 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
219 static u8 reset [] = { 0x50, 0x80 };
220 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
221 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
222 0x00, 0xFF, 0x00, 0x40, 0x40 };
223 static u8 dntv_extra[] = { 0xB5, 0x7A };
224 static u8 capt_range_cfg[] = { 0x75, 0x32 };
225
226 mt352_write(fe, clock_config, sizeof(clock_config));
227 udelay(2000);
228 mt352_write(fe, reset, sizeof(reset));
229 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
230
231 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
232 udelay(2000);
233 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
234 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
235
236 return 0;
237 }
238
239 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
240 {
241 struct cx8802_dev *dev= fe->dvb->priv;
242
243 /* this message is to set up ATC and ALC */
244 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
245 struct i2c_msg msg =
246 { .addr = dev->core->pll_addr, .flags = 0,
247 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
248 int err;
249
250 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
251 if (err < 0)
252 return err;
253 else
254 return -EREMOTEIO;
255 }
256
257 return 0;
258 }
259
260 static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
261 struct dvb_frontend_parameters* params,
262 u8* pllbuf)
263 {
264 struct cx8802_dev *dev= fe->dvb->priv;
265 struct i2c_msg msg =
266 { .addr = dev->core->pll_addr, .flags = 0,
267 .buf = pllbuf+1, .len = 4 };
268 int err;
269
270 /* Switch PLL to DVB mode */
271 err = philips_fmd1216_pll_init(fe);
272 if (err)
273 return err;
274
275 /* Tune PLL */
276 pllbuf[0] = dev->core->pll_addr << 1;
277 dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
278 params->frequency,
279 params->u.ofdm.bandwidth);
280 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
281 printk(KERN_WARNING "cx88-dvb: %s error "
282 "(addr %02x <- %02x, err = %i)\n",
283 __FUNCTION__, pllbuf[0], pllbuf[1], err);
284 if (err < 0)
285 return err;
286 else
287 return -EREMOTEIO;
288 }
289
290 return 0;
291 }
292
293 static struct mt352_config dntv_live_dvbt_pro_config = {
294 .demod_address = 0x0f,
295 .no_tuner = 1,
296 .demod_init = dntv_live_dvbt_pro_demod_init,
297 .pll_set = dntv_live_dvbt_pro_pll_set,
298 };
299 #endif
300 #endif
301
302 #ifdef HAVE_ZL10353
303 static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
304 struct dvb_frontend_parameters *params,
305 u8 *pllbuf)
306 {
307 struct cx8802_dev *dev= fe->dvb->priv;
308 struct i2c_msg msg =
309 { .addr = dev->core->pll_addr, .flags = 0,
310 .buf = pllbuf + 1, .len = 4 };
311 int err;
312
313 pllbuf[0] = dev->core->pll_addr << 1;
314 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
315 params->frequency,
316 params->u.ofdm.bandwidth);
317
318 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
319 printk(KERN_WARNING "cx88-dvb: %s error "
320 "(addr %02x <- %02x, err = %i)\n",
321 __FUNCTION__, pllbuf[0], pllbuf[1], err);
322 if (err < 0)
323 return err;
324 else
325 return -EREMOTEIO;
326 }
327
328 return 0;
329 }
330
331 static struct zl10353_config dvico_fusionhdtv_hybrid = {
332 .demod_address = 0x0F,
333 .pll_set = dvico_hybrid_tune_pll,
334 };
335
336 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
337 .demod_address = 0x0F,
338 .pll_set = zarlink_pll_set,
339 };
340 #endif
341
342 #ifdef HAVE_CX22702
343 static struct cx22702_config connexant_refboard_config = {
344 .demod_address = 0x43,
345 .output_mode = CX22702_SERIAL_OUTPUT,
346 .pll_address = 0x60,
347 .pll_desc = &dvb_pll_thomson_dtt7579,
348 };
349
350 static struct cx22702_config hauppauge_novat_config = {
351 .demod_address = 0x43,
352 .output_mode = CX22702_SERIAL_OUTPUT,
353 .pll_address = 0x61,
354 .pll_desc = &dvb_pll_thomson_dtt759x,
355 };
356 static struct cx22702_config hauppauge_hvr1100_config = {
357 .demod_address = 0x63,
358 .output_mode = CX22702_SERIAL_OUTPUT,
359 .pll_address = 0x61,
360 .pll_desc = &dvb_pll_fmd1216me,
361 };
362 #endif
363
364 #ifdef HAVE_OR51132
365 static int or51132_set_ts_param(struct dvb_frontend* fe,
366 int is_punctured)
367 {
368 struct cx8802_dev *dev= fe->dvb->priv;
369 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
370 return 0;
371 }
372
373 static struct or51132_config pchdtv_hd3000 = {
374 .demod_address = 0x15,
375 .pll_address = 0x61,
376 .pll_desc = &dvb_pll_thomson_dtt7610,
377 .set_ts_params = or51132_set_ts_param,
378 };
379 #endif
380
381 #ifdef HAVE_LGDT330X
382 static int lgdt330x_pll_set(struct dvb_frontend* fe,
383 struct dvb_frontend_parameters* params)
384 {
385 /* FIXME make this routine use the tuner-simple code.
386 * It could probably be shared with a number of ATSC
387 * frontends. Many share the same tuner with analog TV. */
388
389 struct cx8802_dev *dev= fe->dvb->priv;
390 struct cx88_core *core = dev->core;
391 u8 buf[4];
392 struct i2c_msg msg =
393 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
394 int err;
395
396 /* Put the analog decoder in standby to keep it quiet */
397 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
398
399 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
400 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
401 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
402 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
403 printk(KERN_WARNING "cx88-dvb: %s error "
404 "(addr %02x <- %02x, err = %i)\n",
405 __FUNCTION__, buf[0], buf[1], err);
406 if (err < 0)
407 return err;
408 else
409 return -EREMOTEIO;
410 }
411 if (core->tuner_type == TUNER_LG_TDVS_H062F) {
412 /* Set the Auxiliary Byte. */
413 buf[2] &= ~0x20;
414 buf[2] |= 0x18;
415 buf[3] = 0x50;
416 i2c_transfer(&core->i2c_adap, &msg, 1);
417 }
418 return 0;
419 }
420
421 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
422 {
423 struct cx8802_dev *dev= fe->dvb->priv;
424 struct cx88_core *core = dev->core;
425
426 dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
427 if (index == 0)
428 cx_clear(MO_GP0_IO, 8);
429 else
430 cx_set(MO_GP0_IO, 8);
431 return 0;
432 }
433
434 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
435 {
436 struct cx8802_dev *dev= fe->dvb->priv;
437 if (is_punctured)
438 dev->ts_gen_cntrl |= 0x04;
439 else
440 dev->ts_gen_cntrl &= ~0x04;
441 return 0;
442 }
443
444 static struct lgdt330x_config fusionhdtv_3_gold = {
445 .demod_address = 0x0e,
446 .demod_chip = LGDT3302,
447 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
448 .pll_set = lgdt330x_pll_set,
449 .set_ts_params = lgdt330x_set_ts_param,
450 };
451
452 static struct lgdt330x_config fusionhdtv_5_gold = {
453 .demod_address = 0x0e,
454 .demod_chip = LGDT3303,
455 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
456 .pll_set = lgdt330x_pll_set,
457 .set_ts_params = lgdt330x_set_ts_param,
458 };
459 #endif
460
461 #ifdef HAVE_NXT200X
462 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
463 int is_punctured)
464 {
465 struct cx8802_dev *dev= fe->dvb->priv;
466 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
467 return 0;
468 }
469
470 static int nxt200x_set_pll_input(u8* buf, int input)
471 {
472 if (input)
473 buf[3] |= 0x08;
474 else
475 buf[3] &= ~0x08;
476 return 0;
477 }
478
479 static struct nxt200x_config ati_hdtvwonder = {
480 .demod_address = 0x0a,
481 .pll_address = 0x61,
482 .pll_desc = &dvb_pll_tuv1236d,
483 .set_pll_input = nxt200x_set_pll_input,
484 .set_ts_params = nxt200x_set_ts_param,
485 };
486 #endif
487
488 #ifdef HAVE_CX24123
489 static int cx24123_set_ts_param(struct dvb_frontend* fe,
490 int is_punctured)
491 {
492 struct cx8802_dev *dev= fe->dvb->priv;
493 dev->ts_gen_cntrl = 0x2;
494 return 0;
495 }
496
497 static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
498 {
499 struct cx8802_dev *dev= fe->dvb->priv;
500 struct cx88_core *core = dev->core;
501
502 if (on)
503 cx_write(MO_GP0_IO, 0x000006f9);
504 else
505 cx_write(MO_GP0_IO, 0x000006fB);
506 }
507
508 static struct cx24123_config hauppauge_novas_config = {
509 .demod_address = 0x55,
510 .use_isl6421 = 1,
511 .set_ts_params = cx24123_set_ts_param,
512 };
513
514 static struct cx24123_config kworld_dvbs_100_config = {
515 .demod_address = 0x15,
516 .use_isl6421 = 0,
517 .set_ts_params = cx24123_set_ts_param,
518 .enable_lnb_voltage = cx24123_enable_lnb_voltage,
519 };
520 #endif
521
522 static int dvb_register(struct cx8802_dev *dev)
523 {
524 /* init struct videobuf_dvb */
525 dev->dvb.name = dev->core->name;
526 dev->ts_gen_cntrl = 0x0c;
527
528 /* init frontend */
529 switch (dev->core->board) {
530 #ifdef HAVE_CX22702
531 case CX88_BOARD_HAUPPAUGE_DVB_T1:
532 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
533 &dev->core->i2c_adap);
534 break;
535 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
536 case CX88_BOARD_CONEXANT_DVB_T1:
537 case CX88_BOARD_KWORLD_DVB_T_CX22702:
538 case CX88_BOARD_WINFAST_DTV1000:
539 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
540 &dev->core->i2c_adap);
541 break;
542 case CX88_BOARD_HAUPPAUGE_HVR1100:
543 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
544 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
545 &dev->core->i2c_adap);
546 break;
547 #endif
548 #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
549 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
550 dev->core->pll_addr = 0x60;
551 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
552 #ifdef HAVE_MT352
553 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
554 &dev->core->i2c_adap);
555 if (dev->dvb.frontend != NULL)
556 break;
557 #endif
558 #ifdef HAVE_ZL10353
559 /* ZL10353 replaces MT352 on later cards */
560 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
561 &dev->core->i2c_adap);
562 #endif
563 break;
564 #endif /* HAVE_MT352 || HAVE_ZL10353 */
565 #ifdef HAVE_MT352
566 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
567 dev->core->pll_addr = 0x61;
568 dev->core->pll_desc = &dvb_pll_lg_z201;
569 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
570 &dev->core->i2c_adap);
571 break;
572 case CX88_BOARD_KWORLD_DVB_T:
573 case CX88_BOARD_DNTV_LIVE_DVB_T:
574 case CX88_BOARD_ADSTECH_DVB_T_PCI:
575 dev->core->pll_addr = 0x61;
576 dev->core->pll_desc = &dvb_pll_unknown_1;
577 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
578 &dev->core->i2c_adap);
579 break;
580 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
581 #ifdef HAVE_VP3054_I2C
582 dev->core->pll_addr = 0x61;
583 dev->core->pll_desc = &dvb_pll_fmd1216me;
584 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
585 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
586 #else
587 printk("%s: built without vp3054 support\n", dev->core->name);
588 #endif
589 break;
590 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
591 /* The tin box says DEE1601, but it seems to be DTT7579
592 * compatible, with a slightly different MT352 AGC gain. */
593 dev->core->pll_addr = 0x61;
594 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
595 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
596 &dev->core->i2c_adap);
597 break;
598 #endif
599 #ifdef HAVE_ZL10353
600 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
601 dev->core->pll_addr = 0x61;
602 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
603 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
604 &dev->core->i2c_adap);
605 break;
606 #endif
607 #ifdef HAVE_OR51132
608 case CX88_BOARD_PCHDTV_HD3000:
609 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
610 &dev->core->i2c_adap);
611 break;
612 #endif
613 #ifdef HAVE_LGDT330X
614 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
615 dev->ts_gen_cntrl = 0x08;
616 {
617 /* Do a hardware reset of chip before using it. */
618 struct cx88_core *core = dev->core;
619
620 cx_clear(MO_GP0_IO, 1);
621 mdelay(100);
622 cx_set(MO_GP0_IO, 1);
623 mdelay(200);
624
625 /* Select RF connector callback */
626 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
627 dev->core->pll_addr = 0x61;
628 dev->core->pll_desc = &dvb_pll_microtune_4042;
629 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
630 &dev->core->i2c_adap);
631 }
632 break;
633 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
634 dev->ts_gen_cntrl = 0x08;
635 {
636 /* Do a hardware reset of chip before using it. */
637 struct cx88_core *core = dev->core;
638
639 cx_clear(MO_GP0_IO, 1);
640 mdelay(100);
641 cx_set(MO_GP0_IO, 9);
642 mdelay(200);
643 dev->core->pll_addr = 0x61;
644 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
645 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
646 &dev->core->i2c_adap);
647 }
648 break;
649 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
650 dev->ts_gen_cntrl = 0x08;
651 {
652 /* Do a hardware reset of chip before using it. */
653 struct cx88_core *core = dev->core;
654
655 cx_clear(MO_GP0_IO, 1);
656 mdelay(100);
657 cx_set(MO_GP0_IO, 1);
658 mdelay(200);
659 dev->core->pll_addr = 0x61;
660 dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
661 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
662 &dev->core->i2c_adap);
663 }
664 break;
665 #endif
666 #ifdef HAVE_NXT200X
667 case CX88_BOARD_ATI_HDTVWONDER:
668 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
669 &dev->core->i2c_adap);
670 break;
671 #endif
672 #ifdef HAVE_CX24123
673 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
674 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
675 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
676 &dev->core->i2c_adap);
677 break;
678 case CX88_BOARD_KWORLD_DVBS_100:
679 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
680 &dev->core->i2c_adap);
681 break;
682 #endif
683 default:
684 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
685 dev->core->name);
686 break;
687 }
688 if (NULL == dev->dvb.frontend) {
689 printk("%s: frontend initialization failed\n",dev->core->name);
690 return -1;
691 }
692
693 if (dev->core->pll_desc) {
694 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
695 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
696 }
697
698 /* Put the analog decoder in standby to keep it quiet */
699 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
700
701 /* register everything */
702 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
703 }
704
705 /* ----------------------------------------------------------- */
706
707 static int __devinit dvb_probe(struct pci_dev *pci_dev,
708 const struct pci_device_id *pci_id)
709 {
710 struct cx8802_dev *dev;
711 struct cx88_core *core;
712 int err;
713
714 /* general setup */
715 core = cx88_core_get(pci_dev);
716 if (NULL == core)
717 return -EINVAL;
718
719 err = -ENODEV;
720 if (!cx88_boards[core->board].dvb)
721 goto fail_core;
722
723 err = -ENOMEM;
724 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
725 if (NULL == dev)
726 goto fail_core;
727 dev->pci = pci_dev;
728 dev->core = core;
729
730 err = cx8802_init_common(dev);
731 if (0 != err)
732 goto fail_free;
733
734 #ifdef HAVE_VP3054_I2C
735 err = vp3054_i2c_probe(dev);
736 if (0 != err)
737 goto fail_free;
738 #endif
739
740 /* dvb stuff */
741 printk("%s/2: cx2388x based dvb card\n", core->name);
742 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
743 dev->pci, &dev->slock,
744 V4L2_BUF_TYPE_VIDEO_CAPTURE,
745 V4L2_FIELD_TOP,
746 sizeof(struct cx88_buffer),
747 dev);
748 err = dvb_register(dev);
749 if (0 != err)
750 goto fail_fini;
751
752 /* Maintain a reference to cx88-video can query the 8802 device. */
753 core->dvbdev = dev;
754 return 0;
755
756 fail_fini:
757 cx8802_fini_common(dev);
758 fail_free:
759 kfree(dev);
760 fail_core:
761 cx88_core_put(core,pci_dev);
762 return err;
763 }
764
765 static void __devexit dvb_remove(struct pci_dev *pci_dev)
766 {
767 struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
768
769 /* Destroy any 8802 reference. */
770 dev->core->dvbdev = NULL;
771
772 /* dvb */
773 videobuf_dvb_unregister(&dev->dvb);
774
775 #ifdef HAVE_VP3054_I2C
776 vp3054_i2c_remove(dev);
777 #endif
778
779 /* common */
780 cx8802_fini_common(dev);
781 cx88_core_put(dev->core,dev->pci);
782 kfree(dev);
783 }
784
785 static struct pci_device_id cx8802_pci_tbl[] = {
786 {
787 .vendor = 0x14f1,
788 .device = 0x8802,
789 .subvendor = PCI_ANY_ID,
790 .subdevice = PCI_ANY_ID,
791 },{
792 /* --- end of list --- */
793 }
794 };
795 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
796
797 static struct pci_driver dvb_pci_driver = {
798 .name = "cx88-dvb",
799 .id_table = cx8802_pci_tbl,
800 .probe = dvb_probe,
801 .remove = __devexit_p(dvb_remove),
802 .suspend = cx8802_suspend_common,
803 .resume = cx8802_resume_common,
804 };
805
806 static int dvb_init(void)
807 {
808 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
809 (CX88_VERSION_CODE >> 16) & 0xff,
810 (CX88_VERSION_CODE >> 8) & 0xff,
811 CX88_VERSION_CODE & 0xff);
812 #ifdef SNAPSHOT
813 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
814 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
815 #endif
816 return pci_register_driver(&dvb_pci_driver);
817 }
818
819 static void dvb_fini(void)
820 {
821 pci_unregister_driver(&dvb_pci_driver);
822 }
823
824 module_init(dvb_init);
825 module_exit(dvb_fini);
826
827 /*
828 * Local variables:
829 * c-basic-offset: 8
830 * compile-command: "make DVB=1"
831 * End:
832 */
Software Suspend 2 for 2.6.18.y (mirror)