Updated firmware version stamp to 2.4 from 2.3 so it will use the latest firmware.
[linux-2.6/suspend2-2.6.18.git] / drivers / scsi / sata_uli.c
bloba5e245c098e1a142b521975eb5d2a09364334dd7
1 /*
2 * sata_uli.c - ULi Electronics SATA
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 * libata documentation is available via 'make {ps|pdf}docs',
21 * as Documentation/DocBook/libata.*
23 * Hardware documentation available under NDA.
27 #include <linux/config.h>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/blkdev.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/device.h>
36 #include "scsi.h"
37 #include <scsi/scsi_host.h>
38 #include <linux/libata.h>
40 #define DRV_NAME "sata_uli"
41 #define DRV_VERSION "0.5"
43 enum {
44 uli_5289 = 0,
45 uli_5287 = 1,
46 uli_5281 = 2,
48 /* PCI configuration registers */
49 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
50 ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
51 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
52 ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
55 static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
56 static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg);
57 static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
59 static struct pci_device_id uli_pci_tbl[] = {
60 { PCI_VENDOR_ID_AL, 0x5289, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5289 },
61 { PCI_VENDOR_ID_AL, 0x5287, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5287 },
62 { PCI_VENDOR_ID_AL, 0x5281, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5281 },
63 { } /* terminate list */
67 static struct pci_driver uli_pci_driver = {
68 .name = DRV_NAME,
69 .id_table = uli_pci_tbl,
70 .probe = uli_init_one,
71 .remove = ata_pci_remove_one,
74 static Scsi_Host_Template uli_sht = {
75 .module = THIS_MODULE,
76 .name = DRV_NAME,
77 .ioctl = ata_scsi_ioctl,
78 .queuecommand = ata_scsi_queuecmd,
79 .eh_strategy_handler = ata_scsi_error,
80 .can_queue = ATA_DEF_QUEUE,
81 .this_id = ATA_SHT_THIS_ID,
82 .sg_tablesize = LIBATA_MAX_PRD,
83 .max_sectors = ATA_MAX_SECTORS,
84 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
85 .emulated = ATA_SHT_EMULATED,
86 .use_clustering = ATA_SHT_USE_CLUSTERING,
87 .proc_name = DRV_NAME,
88 .dma_boundary = ATA_DMA_BOUNDARY,
89 .slave_configure = ata_scsi_slave_config,
90 .bios_param = ata_std_bios_param,
91 .ordered_flush = 1,
94 static const struct ata_port_operations uli_ops = {
95 .port_disable = ata_port_disable,
97 .tf_load = ata_tf_load,
98 .tf_read = ata_tf_read,
99 .check_status = ata_check_status,
100 .exec_command = ata_exec_command,
101 .dev_select = ata_std_dev_select,
103 .phy_reset = sata_phy_reset,
105 .bmdma_setup = ata_bmdma_setup,
106 .bmdma_start = ata_bmdma_start,
107 .bmdma_stop = ata_bmdma_stop,
108 .bmdma_status = ata_bmdma_status,
109 .qc_prep = ata_qc_prep,
110 .qc_issue = ata_qc_issue_prot,
112 .eng_timeout = ata_eng_timeout,
114 .irq_handler = ata_interrupt,
115 .irq_clear = ata_bmdma_irq_clear,
117 .scr_read = uli_scr_read,
118 .scr_write = uli_scr_write,
120 .port_start = ata_port_start,
121 .port_stop = ata_port_stop,
122 .host_stop = ata_host_stop,
125 static struct ata_port_info uli_port_info = {
126 .sht = &uli_sht,
127 .host_flags = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
128 ATA_FLAG_NO_LEGACY,
129 .pio_mask = 0x1f, /* pio0-4 */
130 .udma_mask = 0x7f, /* udma0-6 */
131 .port_ops = &uli_ops,
135 MODULE_AUTHOR("Peer Chen");
136 MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
137 MODULE_LICENSE("GPL");
138 MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
139 MODULE_VERSION(DRV_VERSION);
141 static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
143 return ap->ioaddr.scr_addr + (4 * sc_reg);
146 static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
148 struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
149 unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
150 u32 val;
152 pci_read_config_dword(pdev, cfg_addr, &val);
153 return val;
156 static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
158 struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
159 unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
161 pci_write_config_dword(pdev, cfg_addr, val);
164 static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg)
166 if (sc_reg > SCR_CONTROL)
167 return 0xffffffffU;
169 return uli_scr_cfg_read(ap, sc_reg);
172 static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
174 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
175 return;
177 uli_scr_cfg_write(ap, sc_reg, val);
180 static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
182 static int printed_version;
183 struct ata_probe_ent *probe_ent;
184 struct ata_port_info *ppi;
185 int rc;
186 unsigned int board_idx = (unsigned int) ent->driver_data;
187 int pci_dev_busy = 0;
189 if (!printed_version++)
190 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
192 rc = pci_enable_device(pdev);
193 if (rc)
194 return rc;
196 rc = pci_request_regions(pdev, DRV_NAME);
197 if (rc) {
198 pci_dev_busy = 1;
199 goto err_out;
202 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
203 if (rc)
204 goto err_out_regions;
205 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
206 if (rc)
207 goto err_out_regions;
209 ppi = &uli_port_info;
210 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
211 if (!probe_ent) {
212 rc = -ENOMEM;
213 goto err_out_regions;
216 switch (board_idx) {
217 case uli_5287:
218 probe_ent->port[0].scr_addr = ULI5287_BASE;
219 probe_ent->port[1].scr_addr = ULI5287_BASE + ULI5287_OFFS;
220 probe_ent->n_ports = 4;
222 probe_ent->port[2].cmd_addr = pci_resource_start(pdev, 0) + 8;
223 probe_ent->port[2].altstatus_addr =
224 probe_ent->port[2].ctl_addr =
225 (pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4;
226 probe_ent->port[2].bmdma_addr = pci_resource_start(pdev, 4) + 16;
227 probe_ent->port[2].scr_addr = ULI5287_BASE + ULI5287_OFFS*4;
229 probe_ent->port[3].cmd_addr = pci_resource_start(pdev, 2) + 8;
230 probe_ent->port[3].altstatus_addr =
231 probe_ent->port[3].ctl_addr =
232 (pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4;
233 probe_ent->port[3].bmdma_addr = pci_resource_start(pdev, 4) + 24;
234 probe_ent->port[3].scr_addr = ULI5287_BASE + ULI5287_OFFS*5;
236 ata_std_ports(&probe_ent->port[2]);
237 ata_std_ports(&probe_ent->port[3]);
238 break;
240 case uli_5289:
241 probe_ent->port[0].scr_addr = ULI5287_BASE;
242 probe_ent->port[1].scr_addr = ULI5287_BASE + ULI5287_OFFS;
243 break;
245 case uli_5281:
246 probe_ent->port[0].scr_addr = ULI5281_BASE;
247 probe_ent->port[1].scr_addr = ULI5281_BASE + ULI5281_OFFS;
248 break;
250 default:
251 BUG();
252 break;
255 pci_set_master(pdev);
256 pci_intx(pdev, 1);
258 /* FIXME: check ata_device_add return value */
259 ata_device_add(probe_ent);
260 kfree(probe_ent);
262 return 0;
264 err_out_regions:
265 pci_release_regions(pdev);
267 err_out:
268 if (!pci_dev_busy)
269 pci_disable_device(pdev);
270 return rc;
274 static int __init uli_init(void)
276 return pci_module_init(&uli_pci_driver);
279 static void __exit uli_exit(void)
281 pci_unregister_driver(&uli_pci_driver);
285 module_init(uli_init);
286 module_exit(uli_exit);