[PATCH] MCA/INIT: use per cpu stacks
[linux-2.6/suspend2-2.6.18.git] / include / asm-ia64 / mca.h
blob97a28b8b2dddd98028b3ccfca697c1f42338313f
1 /*
2 * File: mca.h
3 * Purpose: Machine check handling specific defines
5 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
6 * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
7 * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
8 * Copyright (C) Russ Anderson (rja@sgi.com)
9 */
11 #ifndef _ASM_IA64_MCA_H
12 #define _ASM_IA64_MCA_H
14 #if !defined(__ASSEMBLY__)
16 #include <linux/interrupt.h>
17 #include <linux/types.h>
19 #include <asm/param.h>
20 #include <asm/sal.h>
21 #include <asm/processor.h>
22 #include <asm/mca_asm.h>
24 #define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
26 typedef struct ia64_fptr {
27 unsigned long fp;
28 unsigned long gp;
29 } ia64_fptr_t;
31 typedef union cmcv_reg_u {
32 u64 cmcv_regval;
33 struct {
34 u64 cmcr_vector : 8;
35 u64 cmcr_reserved1 : 4;
36 u64 cmcr_ignored1 : 1;
37 u64 cmcr_reserved2 : 3;
38 u64 cmcr_mask : 1;
39 u64 cmcr_ignored2 : 47;
40 } cmcv_reg_s;
42 } cmcv_reg_t;
44 #define cmcv_mask cmcv_reg_s.cmcr_mask
45 #define cmcv_vector cmcv_reg_s.cmcr_vector
47 enum {
48 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
49 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
50 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
53 /* Information maintained by the MC infrastructure */
54 typedef struct ia64_mc_info_s {
55 u64 imi_mca_handler;
56 size_t imi_mca_handler_size;
57 u64 imi_monarch_init_handler;
58 size_t imi_monarch_init_handler_size;
59 u64 imi_slave_init_handler;
60 size_t imi_slave_init_handler_size;
61 u8 imi_rendez_checkin[NR_CPUS];
63 } ia64_mc_info_t;
65 /* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
66 * Besides the handover state, it also contains some saved registers from the
67 * time of the event.
68 * Note: mca_asm.S depends on the precise layout of this structure.
71 struct ia64_sal_os_state {
72 /* SAL to OS, must be at offset 0 */
73 u64 os_gp; /* GP of the os registered with the SAL, physical */
74 u64 pal_proc; /* PAL_PROC entry point, physical */
75 u64 sal_proc; /* SAL_PROC entry point, physical */
76 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
77 u64 proc_state_param; /* from R18 */
78 u64 monarch; /* 1 for a monarch event, 0 for a slave */
79 /* common, must follow SAL to OS */
80 u64 sal_ra; /* Return address in SAL, physical */
81 u64 sal_gp; /* GP of the SAL - physical */
82 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
83 u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
84 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
85 /* Some interrupt registers are not saved in minstate, pt_regs or
86 * switch_stack. Because MCA/INIT can occur when interrupts are
87 * disabled, we need to save the additional interrupt registers over
88 * MCA/INIT and resume.
90 u64 isr;
91 u64 ifa;
92 u64 itir;
93 u64 iipa;
94 u64 iim;
95 u64 iha;
96 /* OS to SAL, must follow common */
97 u64 os_status; /* OS status to SAL, enum below */
98 u64 context; /* 0 if return to same context
99 1 if return to new context */
102 enum {
103 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
104 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
105 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
106 IA64_MCA_HALT = -3 /* System to be halted by SAL */
109 enum {
110 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
111 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
114 enum {
115 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
116 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
119 /* Per-CPU MCA state that is too big for normal per-CPU variables. */
121 struct ia64_mca_cpu {
122 u64 mca_stack[KERNEL_STACK_SIZE/8];
123 u64 init_stack[KERNEL_STACK_SIZE/8];
126 /* Array of physical addresses of each CPU's MCA area. */
127 extern unsigned long __per_cpu_mca[NR_CPUS];
129 extern void ia64_mca_init(void);
130 extern void ia64_mca_cpu_init(void *);
131 extern void ia64_os_mca_dispatch(void);
132 extern void ia64_os_mca_dispatch_end(void);
133 extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
134 extern void ia64_init_handler(struct pt_regs *,
135 struct switch_stack *,
136 struct ia64_sal_os_state *);
137 extern void ia64_monarch_init_handler(void);
138 extern void ia64_slave_init_handler(void);
139 extern void ia64_mca_cmc_vector_setup(void);
140 extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
141 extern void ia64_unreg_MCA_extension(void);
142 extern u64 ia64_get_rnat(u64 *);
144 #else /* __ASSEMBLY__ */
146 #define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
147 #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
148 #define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
149 #define IA64_MCA_HALT -3 /* System to be halted by SAL */
151 #define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
152 #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
154 #define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
155 #define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
157 #endif /* !__ASSEMBLY__ */
158 #endif /* _ASM_IA64_MCA_H */