[ARM] 3557/1: S3C24XX: centralise and cleanup uart registration
[linux-2.6/suspend2-2.6.18.git] / arch / arm / mach-s3c2410 / s3c2440.c
blob54681740f9f1ce5aacba039a3892c48edae7a08e
1 /* linux/arch/arm/mach-s3c2410/s3c2440.c
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Samsung S3C2440 Mobile CPU support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Modifications:
13 * 24-Aug-2004 BJD Start of s3c2440 support
14 * 12-Oct-2004 BJD Moved clock info out to clock.c
15 * 01-Nov-2004 BJD Fixed clock build code
16 * 09-Nov-2004 BJD Added sysdev for power management
17 * 04-Nov-2004 BJD New serial registration
18 * 15-Nov-2004 BJD Rename the i2c device for the s3c2440
19 * 14-Jan-2005 BJD Moved clock init code into seperate function
20 * 14-Jan-2005 BJD Removed un-used clock bits
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29 #include <linux/platform_device.h>
30 #include <linux/sysdev.h>
31 #include <linux/clk.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/map.h>
35 #include <asm/mach/irq.h>
37 #include <asm/hardware.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
41 #include <asm/arch/regs-clock.h>
42 #include <asm/arch/regs-serial.h>
43 #include <asm/arch/regs-gpio.h>
44 #include <asm/arch/regs-gpioj.h>
45 #include <asm/arch/regs-dsc.h>
47 #include "s3c2440.h"
48 #include "clock.h"
49 #include "devs.h"
50 #include "cpu.h"
51 #include "pm.h"
54 static struct map_desc s3c2440_iodesc[] __initdata = {
55 IODESC_ENT(USBHOST),
56 IODESC_ENT(CLKPWR),
57 IODESC_ENT(LCD),
58 IODESC_ENT(TIMER),
59 IODESC_ENT(ADC),
60 IODESC_ENT(WATCHDOG),
63 /* uart initialisation */
65 void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
67 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
70 #ifdef CONFIG_PM
72 static struct sleep_save s3c2440_sleep[] = {
73 SAVE_ITEM(S3C2440_DSC0),
74 SAVE_ITEM(S3C2440_DSC1),
75 SAVE_ITEM(S3C2440_GPJDAT),
76 SAVE_ITEM(S3C2440_GPJCON),
77 SAVE_ITEM(S3C2440_GPJUP)
80 static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
82 s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
83 return 0;
86 static int s3c2440_resume(struct sys_device *dev)
88 s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
89 return 0;
92 #else
93 #define s3c2440_suspend NULL
94 #define s3c2440_resume NULL
95 #endif
97 struct sysdev_class s3c2440_sysclass = {
98 set_kset_name("s3c2440-core"),
99 .suspend = s3c2440_suspend,
100 .resume = s3c2440_resume
103 static struct sys_device s3c2440_sysdev = {
104 .cls = &s3c2440_sysclass,
107 void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
109 /* register our io-tables */
111 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
112 iotable_init(mach_desc, size);
114 /* rename any peripherals used differing from the s3c2410 */
116 s3c_device_i2c.name = "s3c2440-i2c";
117 s3c_device_nand.name = "s3c2440-nand";
119 /* change irq for watchdog */
121 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
122 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
125 void __init s3c2440_init_clocks(int xtal)
127 unsigned long clkdiv;
128 unsigned long camdiv;
129 unsigned long hclk, fclk, pclk;
130 int hdiv = 1;
132 /* now we've got our machine bits initialised, work out what
133 * clocks we've got */
135 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
137 clkdiv = __raw_readl(S3C2410_CLKDIVN);
138 camdiv = __raw_readl(S3C2440_CAMDIVN);
140 /* work out clock scalings */
142 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
143 case S3C2440_CLKDIVN_HDIVN_1:
144 hdiv = 1;
145 break;
147 case S3C2440_CLKDIVN_HDIVN_2:
148 hdiv = 2;
149 break;
151 case S3C2440_CLKDIVN_HDIVN_4_8:
152 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
153 break;
155 case S3C2440_CLKDIVN_HDIVN_3_6:
156 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
157 break;
160 hclk = fclk / hdiv;
161 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
163 /* print brief summary of clocks, etc */
165 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
166 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
168 /* initialise the clocks here, to allow other things like the
169 * console to use them, and to add new ones after the initialisation
172 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
175 /* need to register class before we actually register the device, and
176 * we also need to ensure that it has been initialised before any of the
177 * drivers even try to use it (even if not on an s3c2440 based system)
178 * as a driver which may support both 2410 and 2440 may try and use it.
181 static int __init s3c2440_core_init(void)
183 return sysdev_class_register(&s3c2440_sysclass);
186 core_initcall(s3c2440_core_init);
188 int __init s3c2440_init(void)
190 printk("S3C2440: Initialising architecture\n");
192 return sysdev_register(&s3c2440_sysdev);