[PATCH] DVB: lgdt330x: fix signal / lock status detection bug
[linux-2.6/suspend2-2.6.18.git] / drivers / media / dvb / frontends / lgdt330x.c
blob467f1994fe6aca8ebc25928bb6db638966a69010
1 /*
2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
30 * DViCO FusionHDTV 5 USB Gold
31 * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
32 * pcHDTV HD5500
34 * TODO:
35 * signal strength always returns 0.
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/string.h>
45 #include <linux/slab.h>
46 #include <asm/byteorder.h>
48 #include "dvb_frontend.h"
49 #include "lgdt330x_priv.h"
50 #include "lgdt330x.h"
52 static int debug = 0;
53 module_param(debug, int, 0644);
54 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
55 #define dprintk(args...) \
56 do { \
57 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
58 } while (0)
60 struct lgdt330x_state
62 struct i2c_adapter* i2c;
64 /* Configuration settings */
65 const struct lgdt330x_config* config;
67 struct dvb_frontend frontend;
69 /* Demodulator private data */
70 fe_modulation_t current_modulation;
72 /* Tuner private data */
73 u32 current_frequency;
76 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
77 u8 *buf, /* data bytes to send */
78 int len /* number of bytes to send */ )
80 struct i2c_msg msg =
81 { .addr = state->config->demod_address,
82 .flags = 0,
83 .buf = buf,
84 .len = 2 };
85 int i;
86 int err;
88 for (i=0; i<len-1; i+=2){
89 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
90 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
91 if (err < 0)
92 return err;
93 else
94 return -EREMOTEIO;
96 msg.buf += 2;
98 return 0;
102 * This routine writes the register (reg) to the demod bus
103 * then reads the data returned for (len) bytes.
106 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
107 enum I2C_REG reg, u8* buf, int len)
109 u8 wr [] = { reg };
110 struct i2c_msg msg [] = {
111 { .addr = state->config->demod_address,
112 .flags = 0, .buf = wr, .len = 1 },
113 { .addr = state->config->demod_address,
114 .flags = I2C_M_RD, .buf = buf, .len = len },
116 int ret;
117 ret = i2c_transfer(state->i2c, msg, 2);
118 if (ret != 2) {
119 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
120 } else {
121 ret = 0;
123 return ret;
126 /* Software reset */
127 static int lgdt3302_SwReset(struct lgdt330x_state* state)
129 u8 ret;
130 u8 reset[] = {
131 IRQ_MASK,
132 0x00 /* bit 6 is active low software reset
133 * bits 5-0 are 1 to mask interrupts */
136 ret = i2c_write_demod_bytes(state,
137 reset, sizeof(reset));
138 if (ret == 0) {
140 /* force reset high (inactive) and unmask interrupts */
141 reset[1] = 0x7f;
142 ret = i2c_write_demod_bytes(state,
143 reset, sizeof(reset));
145 return ret;
148 static int lgdt3303_SwReset(struct lgdt330x_state* state)
150 u8 ret;
151 u8 reset[] = {
152 0x02,
153 0x00 /* bit 0 is active low software reset */
156 ret = i2c_write_demod_bytes(state,
157 reset, sizeof(reset));
158 if (ret == 0) {
160 /* force reset high (inactive) */
161 reset[1] = 0x01;
162 ret = i2c_write_demod_bytes(state,
163 reset, sizeof(reset));
165 return ret;
168 static int lgdt330x_SwReset(struct lgdt330x_state* state)
170 switch (state->config->demod_chip) {
171 case LGDT3302:
172 return lgdt3302_SwReset(state);
173 case LGDT3303:
174 return lgdt3303_SwReset(state);
175 default:
176 return -ENODEV;
180 static int lgdt330x_init(struct dvb_frontend* fe)
182 /* Hardware reset is done using gpio[0] of cx23880x chip.
183 * I'd like to do it here, but don't know how to find chip address.
184 * cx88-cards.c arranges for the reset bit to be inactive (high).
185 * Maybe there needs to be a callable function in cx88-core or
186 * the caller of this function needs to do it. */
189 * Array of byte pairs <address, value>
190 * to initialize each different chip
192 static u8 lgdt3302_init_data[] = {
193 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
194 /* Change the value of NCOCTFV[25:0] of carrier
195 recovery center frequency register */
196 VSB_CARRIER_FREQ0, 0x00,
197 VSB_CARRIER_FREQ1, 0x87,
198 VSB_CARRIER_FREQ2, 0x8e,
199 VSB_CARRIER_FREQ3, 0x01,
200 /* Change the TPCLK pin polarity
201 data is valid on falling clock */
202 DEMUX_CONTROL, 0xfb,
203 /* Change the value of IFBW[11:0] of
204 AGC IF/RF loop filter bandwidth register */
205 AGC_RF_BANDWIDTH0, 0x40,
206 AGC_RF_BANDWIDTH1, 0x93,
207 AGC_RF_BANDWIDTH2, 0x00,
208 /* Change the value of bit 6, 'nINAGCBY' and
209 'NSSEL[1:0] of ACG function control register 2 */
210 AGC_FUNC_CTRL2, 0xc6,
211 /* Change the value of bit 6 'RFFIX'
212 of AGC function control register 3 */
213 AGC_FUNC_CTRL3, 0x40,
214 /* Set the value of 'INLVTHD' register 0x2a/0x2c
215 to 0x7fe */
216 AGC_DELAY0, 0x07,
217 AGC_DELAY2, 0xfe,
218 /* Change the value of IAGCBW[15:8]
219 of inner AGC loop filter bandwidth */
220 AGC_LOOP_BANDWIDTH0, 0x08,
221 AGC_LOOP_BANDWIDTH1, 0x9a
224 static u8 lgdt3303_init_data[] = {
225 0x4c, 0x14
228 static u8 flip_lgdt3303_init_data[] = {
229 0x4c, 0x14,
230 0x87, 0xf3
233 struct lgdt330x_state* state = fe->demodulator_priv;
234 char *chip_name;
235 int err;
237 switch (state->config->demod_chip) {
238 case LGDT3302:
239 chip_name = "LGDT3302";
240 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
241 sizeof(lgdt3302_init_data));
242 break;
243 case LGDT3303:
244 chip_name = "LGDT3303";
245 if (state->config->clock_polarity_flip) {
246 err = i2c_write_demod_bytes(state, flip_lgdt3303_init_data,
247 sizeof(flip_lgdt3303_init_data));
248 } else {
249 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
250 sizeof(lgdt3303_init_data));
252 break;
253 default:
254 chip_name = "undefined";
255 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
256 err = -ENODEV;
258 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
259 if (err < 0)
260 return err;
261 return lgdt330x_SwReset(state);
264 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
266 *ber = 0; /* Not supplied by the demod chips */
267 return 0;
270 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
272 struct lgdt330x_state* state = fe->demodulator_priv;
273 int err;
274 u8 buf[2];
276 switch (state->config->demod_chip) {
277 case LGDT3302:
278 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
279 buf, sizeof(buf));
280 break;
281 case LGDT3303:
282 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
283 buf, sizeof(buf));
284 break;
285 default:
286 printk(KERN_WARNING
287 "Only LGDT3302 and LGDT3303 are supported chips.\n");
288 err = -ENODEV;
291 *ucblocks = (buf[0] << 8) | buf[1];
292 return 0;
295 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
296 struct dvb_frontend_parameters *param)
299 * Array of byte pairs <address, value>
300 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
302 static u8 lgdt3303_8vsb_44_data[] = {
303 0x04, 0x00,
304 0x0d, 0x40,
305 0x0e, 0x87,
306 0x0f, 0x8e,
307 0x10, 0x01,
308 0x47, 0x8b };
311 * Array of byte pairs <address, value>
312 * to initialize QAM for lgdt3303 chip
314 static u8 lgdt3303_qam_data[] = {
315 0x04, 0x00,
316 0x0d, 0x00,
317 0x0e, 0x00,
318 0x0f, 0x00,
319 0x10, 0x00,
320 0x51, 0x63,
321 0x47, 0x66,
322 0x48, 0x66,
323 0x4d, 0x1a,
324 0x49, 0x08,
325 0x4a, 0x9b };
327 struct lgdt330x_state* state = fe->demodulator_priv;
329 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
331 int err;
332 /* Change only if we are actually changing the modulation */
333 if (state->current_modulation != param->u.vsb.modulation) {
334 switch(param->u.vsb.modulation) {
335 case VSB_8:
336 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
338 /* Select VSB mode */
339 top_ctrl_cfg[1] = 0x03;
341 /* Select ANT connector if supported by card */
342 if (state->config->pll_rf_set)
343 state->config->pll_rf_set(fe, 1);
345 if (state->config->demod_chip == LGDT3303) {
346 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
347 sizeof(lgdt3303_8vsb_44_data));
349 break;
351 case QAM_64:
352 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
354 /* Select QAM_64 mode */
355 top_ctrl_cfg[1] = 0x00;
357 /* Select CABLE connector if supported by card */
358 if (state->config->pll_rf_set)
359 state->config->pll_rf_set(fe, 0);
361 if (state->config->demod_chip == LGDT3303) {
362 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
363 sizeof(lgdt3303_qam_data));
365 break;
367 case QAM_256:
368 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
370 /* Select QAM_256 mode */
371 top_ctrl_cfg[1] = 0x01;
373 /* Select CABLE connector if supported by card */
374 if (state->config->pll_rf_set)
375 state->config->pll_rf_set(fe, 0);
377 if (state->config->demod_chip == LGDT3303) {
378 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
379 sizeof(lgdt3303_qam_data));
381 break;
382 default:
383 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
384 return -1;
387 * select serial or parallel MPEG harware interface
388 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
389 * Parallel: 0x00
391 top_ctrl_cfg[1] |= state->config->serial_mpeg;
393 /* Select the requested mode */
394 i2c_write_demod_bytes(state, top_ctrl_cfg,
395 sizeof(top_ctrl_cfg));
396 if (state->config->set_ts_params)
397 state->config->set_ts_params(fe, 0);
398 state->current_modulation = param->u.vsb.modulation;
401 /* Tune to the specified frequency */
402 if (fe->ops.tuner_ops.set_params) {
403 fe->ops.tuner_ops.set_params(fe, param);
404 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
407 /* Keep track of the new frequency */
408 /* FIXME this is the wrong way to do this... */
409 /* The tuner is shared with the video4linux analog API */
410 state->current_frequency = param->frequency;
412 lgdt330x_SwReset(state);
413 return 0;
416 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
417 struct dvb_frontend_parameters* param)
419 struct lgdt330x_state *state = fe->demodulator_priv;
420 param->frequency = state->current_frequency;
421 return 0;
424 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
426 struct lgdt330x_state* state = fe->demodulator_priv;
427 u8 buf[3];
429 *status = 0; /* Reset status result */
431 /* AGC status register */
432 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
433 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
434 if ((buf[0] & 0x0c) == 0x8){
435 /* Test signal does not exist flag */
436 /* as well as the AGC lock flag. */
437 *status |= FE_HAS_SIGNAL;
441 * You must set the Mask bits to 1 in the IRQ_MASK in order
442 * to see that status bit in the IRQ_STATUS register.
443 * This is done in SwReset();
445 /* signal status */
446 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
447 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
450 /* sync status */
451 if ((buf[2] & 0x03) == 0x01) {
452 *status |= FE_HAS_SYNC;
455 /* FEC error status */
456 if ((buf[2] & 0x0c) == 0x08) {
457 *status |= FE_HAS_LOCK;
458 *status |= FE_HAS_VITERBI;
461 /* Carrier Recovery Lock Status Register */
462 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
463 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
464 switch (state->current_modulation) {
465 case QAM_256:
466 case QAM_64:
467 /* Need to undestand why there are 3 lock levels here */
468 if ((buf[0] & 0x07) == 0x07)
469 *status |= FE_HAS_CARRIER;
470 break;
471 case VSB_8:
472 if ((buf[0] & 0x80) == 0x80)
473 *status |= FE_HAS_CARRIER;
474 break;
475 default:
476 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
479 return 0;
482 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
484 struct lgdt330x_state* state = fe->demodulator_priv;
485 int err;
486 u8 buf[3];
488 *status = 0; /* Reset status result */
490 /* lgdt3303 AGC status register */
491 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
492 if (err < 0)
493 return err;
495 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
496 if ((buf[0] & 0x21) == 0x01){
497 /* Test input signal does not exist flag */
498 /* as well as the AGC lock flag. */
499 *status |= FE_HAS_SIGNAL;
502 /* Carrier Recovery Lock Status Register */
503 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
504 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
505 switch (state->current_modulation) {
506 case QAM_256:
507 case QAM_64:
508 /* Need to undestand why there are 3 lock levels here */
509 if ((buf[0] & 0x07) == 0x07)
510 *status |= FE_HAS_CARRIER;
511 else
512 break;
513 i2c_read_demod_bytes(state, 0x8a, buf, 1);
514 if ((buf[0] & 0x04) == 0x04)
515 *status |= FE_HAS_SYNC;
516 if ((buf[0] & 0x01) == 0x01)
517 *status |= FE_HAS_LOCK;
518 if ((buf[0] & 0x08) == 0x08)
519 *status |= FE_HAS_VITERBI;
520 break;
521 case VSB_8:
522 if ((buf[0] & 0x80) == 0x80)
523 *status |= FE_HAS_CARRIER;
524 else
525 break;
526 i2c_read_demod_bytes(state, 0x38, buf, 1);
527 if ((buf[0] & 0x02) == 0x00)
528 *status |= FE_HAS_SYNC;
529 if ((buf[0] & 0x01) == 0x01) {
530 *status |= FE_HAS_LOCK;
531 *status |= FE_HAS_VITERBI;
533 break;
534 default:
535 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
537 return 0;
540 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
542 /* not directly available. */
543 *strength = 0;
544 return 0;
547 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
549 #ifdef SNR_IN_DB
551 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
552 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
553 * respectively. The following tables are built on these formulas.
554 * The usual definition is SNR = 20 log10(signal/noise)
555 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
557 * This table is a an ordered list of noise values computed by the
558 * formula from the spec sheet such that the index into the table
559 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
560 * value entries at the beginning because the SNR varies more than
561 * 1 db for a change of 1 digit in noise at very small values of noise.
563 * Examples from SNR_EQ table:
564 * noise SNR
565 * 0 43
566 * 1 42
567 * 2 39
568 * 3 37
569 * 4 36
570 * 5 35
571 * 6 34
572 * 7 33
573 * 8 33
574 * 9 32
575 * 10 32
576 * 11 31
577 * 12 31
578 * 13 30
581 static const u32 SNR_EQ[] =
582 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
583 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
584 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
585 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
586 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
587 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
590 static const u32 SNR_PH[] =
591 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
592 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
593 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
594 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
595 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
596 90833, 114351, 143960, 181235, 228161, 0x080000
599 static u8 buf[5];/* read data buffer */
600 static u32 noise; /* noise value */
601 static u32 snr_db; /* index into SNR_EQ[] */
602 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
604 /* read both equalizer and phase tracker noise data */
605 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
607 if (state->current_modulation == VSB_8) {
608 /* Equalizer Mean-Square Error Register for VSB */
609 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
612 * Look up noise value in table.
613 * A better search algorithm could be used...
614 * watch out there are duplicate entries.
616 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
617 if (noise < SNR_EQ[snr_db]) {
618 *snr = 43 - snr_db;
619 break;
622 } else {
623 /* Phase Tracker Mean-Square Error Register for QAM */
624 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
626 /* Look up noise value in table. */
627 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
628 if (noise < SNR_PH[snr_db]) {
629 *snr = 45 - snr_db;
630 break;
634 #else
635 /* Return the raw noise value */
636 static u8 buf[5];/* read data buffer */
637 static u32 noise; /* noise value */
638 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
640 /* read both equalizer and pase tracker noise data */
641 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
643 if (state->current_modulation == VSB_8) {
644 /* Phase Tracker Mean-Square Error Register for VSB */
645 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
646 } else {
648 /* Carrier Recovery Mean-Square Error for QAM */
649 i2c_read_demod_bytes(state, 0x1a, buf, 2);
650 noise = ((buf[0] & 3) << 8) | buf[1];
653 /* Small values for noise mean signal is better so invert noise */
654 *snr = ~noise;
655 #endif
657 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
659 return 0;
662 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
664 /* Return the raw noise value */
665 static u8 buf[5];/* read data buffer */
666 static u32 noise; /* noise value */
667 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
669 if (state->current_modulation == VSB_8) {
671 i2c_read_demod_bytes(state, 0x6e, buf, 5);
672 /* Phase Tracker Mean-Square Error Register for VSB */
673 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
674 } else {
676 /* Carrier Recovery Mean-Square Error for QAM */
677 i2c_read_demod_bytes(state, 0x1a, buf, 2);
678 noise = (buf[0] << 8) | buf[1];
681 /* Small values for noise mean signal is better so invert noise */
682 *snr = ~noise;
684 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
686 return 0;
689 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
691 /* I have no idea about this - it may not be needed */
692 fe_tune_settings->min_delay_ms = 500;
693 fe_tune_settings->step_size = 0;
694 fe_tune_settings->max_drift = 0;
695 return 0;
698 static void lgdt330x_release(struct dvb_frontend* fe)
700 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
701 kfree(state);
704 static struct dvb_frontend_ops lgdt3302_ops;
705 static struct dvb_frontend_ops lgdt3303_ops;
707 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
708 struct i2c_adapter* i2c)
710 struct lgdt330x_state* state = NULL;
711 u8 buf[1];
713 /* Allocate memory for the internal state */
714 state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
715 if (state == NULL)
716 goto error;
718 /* Setup the state */
719 state->config = config;
720 state->i2c = i2c;
722 /* Create dvb_frontend */
723 switch (config->demod_chip) {
724 case LGDT3302:
725 memcpy(&state->frontend.ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
726 break;
727 case LGDT3303:
728 memcpy(&state->frontend.ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
729 break;
730 default:
731 goto error;
733 state->frontend.demodulator_priv = state;
735 /* Verify communication with demod chip */
736 if (i2c_read_demod_bytes(state, 2, buf, 1))
737 goto error;
739 state->current_frequency = -1;
740 state->current_modulation = -1;
742 return &state->frontend;
744 error:
745 kfree(state);
746 dprintk("%s: ERROR\n",__FUNCTION__);
747 return NULL;
750 static struct dvb_frontend_ops lgdt3302_ops = {
751 .info = {
752 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
753 .type = FE_ATSC,
754 .frequency_min= 54000000,
755 .frequency_max= 858000000,
756 .frequency_stepsize= 62500,
757 .symbol_rate_min = 5056941, /* QAM 64 */
758 .symbol_rate_max = 10762000, /* VSB 8 */
759 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
761 .init = lgdt330x_init,
762 .set_frontend = lgdt330x_set_parameters,
763 .get_frontend = lgdt330x_get_frontend,
764 .get_tune_settings = lgdt330x_get_tune_settings,
765 .read_status = lgdt3302_read_status,
766 .read_ber = lgdt330x_read_ber,
767 .read_signal_strength = lgdt330x_read_signal_strength,
768 .read_snr = lgdt3302_read_snr,
769 .read_ucblocks = lgdt330x_read_ucblocks,
770 .release = lgdt330x_release,
773 static struct dvb_frontend_ops lgdt3303_ops = {
774 .info = {
775 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
776 .type = FE_ATSC,
777 .frequency_min= 54000000,
778 .frequency_max= 858000000,
779 .frequency_stepsize= 62500,
780 .symbol_rate_min = 5056941, /* QAM 64 */
781 .symbol_rate_max = 10762000, /* VSB 8 */
782 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
784 .init = lgdt330x_init,
785 .set_frontend = lgdt330x_set_parameters,
786 .get_frontend = lgdt330x_get_frontend,
787 .get_tune_settings = lgdt330x_get_tune_settings,
788 .read_status = lgdt3303_read_status,
789 .read_ber = lgdt330x_read_ber,
790 .read_signal_strength = lgdt330x_read_signal_strength,
791 .read_snr = lgdt3303_read_snr,
792 .read_ucblocks = lgdt330x_read_ucblocks,
793 .release = lgdt330x_release,
796 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
797 MODULE_AUTHOR("Wilson Michaels");
798 MODULE_LICENSE("GPL");
800 EXPORT_SYMBOL(lgdt330x_attach);
803 * Local variables:
804 * c-basic-offset: 8
805 * End: