arch/x86_64/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
   7  */
   8 #include <linux/config.h>
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <linux/sched.h>
  12 #include <linux/string.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/bitops.h>
  15 #include <linux/module.h>
  16 #include <asm/bootsetup.h>
  17 #include <asm/pda.h>
  18 #include <asm/pgtable.h>
  19 #include <asm/processor.h>
  20 #include <asm/desc.h>
  21 #include <asm/atomic.h>
  22 #include <asm/mmu_context.h>
  23 #include <asm/smp.h>
  24 #include <asm/i387.h>
  25 #include <asm/percpu.h>
  26 #include <asm/proto.h>
  27 #include <asm/sections.h>
  28
  29 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
  30
  31 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  32
  33 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
  34
  35 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
  36
  37 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  38
  39 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  40 static int do_not_nx __initdata = 0;
  41
  42 /* noexec=on|off
  43 Control non executable mappings for 64bit processes.
  44
  45 on      Enable(default)
  46 off     Disable
  47 */
  48 int __init nonx_setup(char *str)
  49 {
  50         if (!strncmp(str, "on", 2)) {
  51                 __supported_pte_mask |= _PAGE_NX;
  52                 do_not_nx = 0;
  53         } else if (!strncmp(str, "off", 3)) {
  54                 do_not_nx = 1;
  55                 __supported_pte_mask &= ~_PAGE_NX;
  56         }
  57         return 0;
  58 }
  59 __setup("noexec=", nonx_setup); /* parsed early actually */
  60
  61 int force_personality32 = READ_IMPLIES_EXEC;
  62
  63 /* noexec32=on|off
  64 Control non executable heap for 32bit processes.
  65 To control the stack too use noexec=off
  66
  67 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  68 off     PROT_READ implies PROT_EXEC (default)
  69 */
  70 static int __init nonx32_setup(char *str)
  71 {
  72         if (!strcmp(str, "on"))
  73                 force_personality32 &= ~READ_IMPLIES_EXEC;
  74         else if (!strcmp(str, "off"))
  75                 force_personality32 |= READ_IMPLIES_EXEC;
  76         return 0;
  77 }
  78 __setup("noexec32=", nonx32_setup);
  79
  80 /*
  81  * Great future plan:
  82  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
  83  * Always point %gs to its beginning
  84  */
  85 void __init setup_per_cpu_areas(void)
  86 {
  87         int i;
  88         unsigned long size;
  89
  90 #ifdef CONFIG_HOTPLUG_CPU
  91         prefill_possible_map();
  92 #endif
  93
  94         /* Copy section for each CPU (we discard the original) */
  95         size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
  96 #ifdef CONFIG_MODULES
  97         if (size < PERCPU_ENOUGH_ROOM)
  98                 size = PERCPU_ENOUGH_ROOM;
  99 #endif
 100
 101         for_each_cpu_mask (i, cpu_possible_map) {
 102                 char *ptr;
 103
 104                 if (!NODE_DATA(cpu_to_node(i))) {
 105                         printk("cpu with no node %d, num_online_nodes %d\n",
 106                                i, num_online_nodes());
 107                         ptr = alloc_bootmem(size);
 108                 } else {
 109                         ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
 110                 }
 111                 if (!ptr)
 112                         panic("Cannot allocate cpu data for CPU %d\n", i);
 113                 cpu_pda[i].data_offset = ptr - __per_cpu_start;
 114                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 115         }
 116 }
 117
 118 void pda_init(int cpu)
 119 {
 120         struct x8664_pda *pda = &cpu_pda[cpu];
 121
 122         /* Setup up data that may be needed in __get_free_pages early */
 123         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 124         wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
 125
 126         pda->cpunumber = cpu;
 127         pda->irqcount = -1;
 128         pda->kernelstack =
 129                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 130         pda->active_mm = &init_mm;
 131         pda->mmu_state = 0;
 132
 133         if (cpu == 0) {
 134                 /* others are initialized in smpboot.c */
 135                 pda->pcurrent = &init_task;
 136                 pda->irqstackptr = boot_cpu_stack;
 137         } else {
 138                 pda->irqstackptr = (char *)
 139                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 140                 if (!pda->irqstackptr)
 141                         panic("cannot allocate irqstack for cpu %d", cpu);
 142         }
 143
 144         asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
 145
 146         pda->irqstackptr += IRQSTACKSIZE-64;
 147 }
 148
 149 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
 150 __attribute__((section(".bss.page_aligned")));
 151
 152 /* May not be marked __init: used by software suspend */
 153 void syscall_init(void)
 154 {
 155         /*
 156          * LSTAR and STAR live in a bit strange symbiosis.
 157          * They both write to the same internal register. STAR allows to set CS/DS
 158          * but only a 32bit target. LSTAR sets the 64bit rip.
 159          */
 160         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 161         wrmsrl(MSR_LSTAR, system_call);
 162
 163 #ifdef CONFIG_IA32_EMULATION
 164         syscall32_cpu_init ();
 165 #endif
 166
 167         /* Flags to clear on syscall */
 168         wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
 169 }
 170
 171 void __cpuinit check_efer(void)
 172 {
 173         unsigned long efer;
 174
 175         rdmsrl(MSR_EFER, efer);
 176         if (!(efer & EFER_NX) || do_not_nx) {
 177                 __supported_pte_mask &= ~_PAGE_NX;
 178         }
 179 }
 180
 181 /*
 182  * cpu_init() initializes state that is per-CPU. Some data is already
 183  * initialized (naturally) in the bootstrap process, such as the GDT
 184  * and IDT. We reload them nevertheless, this function acts as a
 185  * 'CPU state barrier', nothing should get across.
 186  * A lot of state is already set up in PDA init.
 187  */
 188 void __cpuinit cpu_init (void)
 189 {
 190         int cpu = stack_smp_processor_id();
 191         struct tss_struct *t = &per_cpu(init_tss, cpu);
 192         unsigned long v;
 193         char *estacks = NULL;
 194         struct task_struct *me;
 195         int i;
 196
 197         /* CPU 0 is initialised in head64.c */
 198         if (cpu != 0) {
 199                 pda_init(cpu);
 200         } else
 201                 estacks = boot_exception_stacks;
 202
 203         me = current;
 204
 205         if (cpu_test_and_set(cpu, cpu_initialized))
 206                 panic("CPU#%d already initialized!\n", cpu);
 207
 208         printk("Initializing CPU#%d\n", cpu);
 209
 210         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 211
 212         /*
 213          * Initialize the per-CPU GDT with the boot GDT,
 214          * and set up the GDT descriptor:
 215          */
 216         if (cpu) {
 217                 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
 218         }
 219
 220         cpu_gdt_descr[cpu].size = GDT_SIZE;
 221         cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
 222         asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
 223         asm volatile("lidt %0" :: "m" (idt_descr));
 224
 225         memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
 226
 227         /*
 228          * Delete NT
 229          */
 230
 231         asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
 232
 233         syscall_init();
 234
 235         wrmsrl(MSR_FS_BASE, 0);
 236         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 237         barrier();
 238
 239         check_efer();
 240
 241         /*
 242          * set up and load the per-CPU TSS
 243          */
 244         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 245                 if (cpu) {
 246                         estacks = (char *)__get_free_pages(GFP_ATOMIC,
 247                                                    EXCEPTION_STACK_ORDER);
 248                         if (!estacks)
 249                                 panic("Cannot allocate exception stack %ld %d\n",
 250                                       v, cpu);
 251                 }
 252                 estacks += EXCEPTION_STKSZ;
 253                 t->ist[v] = (unsigned long)estacks;
 254         }
 255
 256         t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 257         /*
 258          * <= is required because the CPU will access up to
 259          * 8 bits beyond the end of the IO permission bitmap.
 260          */
 261         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 262                 t->io_bitmap[i] = ~0UL;
 263
 264         atomic_inc(&init_mm.mm_count);
 265         me->active_mm = &init_mm;
 266         if (me->mm)
 267                 BUG();
 268         enter_lazy_tlb(&init_mm, me);
 269
 270         set_tss_desc(cpu, t);
 271         load_TR_desc();
 272         load_LDT(&init_mm.context);
 273
 274         /*
 275          * Clear all 6 debug registers:
 276          */
 277
 278         set_debug(0UL, 0);
 279         set_debug(0UL, 1);
 280         set_debug(0UL, 2);
 281         set_debug(0UL, 3);
 282         set_debug(0UL, 6);
 283         set_debug(0UL, 7);
 284
 285         fpu_init();
 286 }