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[PATCH] drivers/net/e1000/: possible cleanups
[linux-2.6/suspend2-2.6.18.git] / drivers / net / e1000 / e1000_main.c
blob8b207f0e139e04fb9894ec771195f0866ea8210b
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
37 */
38
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
42 #define DRIVERNAPI
43 #else
44 #define DRIVERNAPI "-NAPI"
45 #endif
46 #define DRV_VERSION "6.1.16-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
49
50 /* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57 static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 /* required last entry */
102 {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107 int e1000_up(struct e1000_adapter *adapter);
108 void e1000_down(struct e1000_adapter *adapter);
109 void e1000_reset(struct e1000_adapter *adapter);
110 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
111 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
115 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116 struct e1000_tx_ring *txdr);
117 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118 struct e1000_rx_ring *rxdr);
119 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
120 struct e1000_tx_ring *tx_ring);
121 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
122 struct e1000_rx_ring *rx_ring);
123 void e1000_update_stats(struct e1000_adapter *adapter);
124
125 /* Local Function Prototypes */
126
127 static int e1000_init_module(void);
128 static void e1000_exit_module(void);
129 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130 static void __devexit e1000_remove(struct pci_dev *pdev);
131 static int e1000_alloc_queues(struct e1000_adapter *adapter);
132 #ifdef CONFIG_E1000_MQ
133 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134 #endif
135 static int e1000_sw_init(struct e1000_adapter *adapter);
136 static int e1000_open(struct net_device *netdev);
137 static int e1000_close(struct net_device *netdev);
138 static void e1000_configure_tx(struct e1000_adapter *adapter);
139 static void e1000_configure_rx(struct e1000_adapter *adapter);
140 static void e1000_setup_rctl(struct e1000_adapter *adapter);
141 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
145 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146 struct e1000_rx_ring *rx_ring);
147 static void e1000_set_multi(struct net_device *netdev);
148 static void e1000_update_phy_info(unsigned long data);
149 static void e1000_watchdog(unsigned long data);
150 static void e1000_watchdog_task(struct e1000_adapter *adapter);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring);
175 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
178 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
179 int cmd);
180 void e1000_set_ethtool_ops(struct net_device *netdev);
181 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
182 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
183 static void e1000_tx_timeout(struct net_device *dev);
184 static void e1000_tx_timeout_task(struct net_device *dev);
185 static void e1000_smartspeed(struct e1000_adapter *adapter);
186 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
187 struct sk_buff *skb);
188
189 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
190 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192 static void e1000_restore_vlan(struct e1000_adapter *adapter);
193
194 #ifdef CONFIG_PM
195 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
196 static int e1000_resume(struct pci_dev *pdev);
197 #endif
198
199 #ifdef CONFIG_NET_POLL_CONTROLLER
200 /* for netdump / net console */
201 static void e1000_netpoll (struct net_device *netdev);
202 #endif
203
204 #ifdef CONFIG_E1000_MQ
205 /* for multiple Rx queues */
206 void e1000_rx_schedule(void *data);
207 #endif
208
209 /* Exported from other modules */
210
211 extern void e1000_check_options(struct e1000_adapter *adapter);
212
213 static struct pci_driver e1000_driver = {
214 .name = e1000_driver_name,
215 .id_table = e1000_pci_tbl,
216 .probe = e1000_probe,
217 .remove = __devexit_p(e1000_remove),
218 /* Power Managment Hooks */
219 #ifdef CONFIG_PM
220 .suspend = e1000_suspend,
221 .resume = e1000_resume
222 #endif
223 };
224
225 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
226 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
227 MODULE_LICENSE("GPL");
228 MODULE_VERSION(DRV_VERSION);
229
230 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
231 module_param(debug, int, 0);
232 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
233
234 /**
235 * e1000_init_module - Driver Registration Routine
236 *
237 * e1000_init_module is the first routine called when the driver is
238 * loaded. All it does is register with the PCI subsystem.
239 **/
240
241 static int __init
242 e1000_init_module(void)
243 {
244 int ret;
245 printk(KERN_INFO "%s - version %s\n",
246 e1000_driver_string, e1000_driver_version);
247
248 printk(KERN_INFO "%s\n", e1000_copyright);
249
250 ret = pci_module_init(&e1000_driver);
251
252 return ret;
253 }
254
255 module_init(e1000_init_module);
256
257 /**
258 * e1000_exit_module - Driver Exit Cleanup Routine
259 *
260 * e1000_exit_module is called just before the driver is removed
261 * from memory.
262 **/
263
264 static void __exit
265 e1000_exit_module(void)
266 {
267 pci_unregister_driver(&e1000_driver);
268 }
269
270 module_exit(e1000_exit_module);
271
272 /**
273 * e1000_irq_disable - Mask off interrupt generation on the NIC
274 * @adapter: board private structure
275 **/
276
277 static inline void
278 e1000_irq_disable(struct e1000_adapter *adapter)
279 {
280 atomic_inc(&adapter->irq_sem);
281 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
282 E1000_WRITE_FLUSH(&adapter->hw);
283 synchronize_irq(adapter->pdev->irq);
284 }
285
286 /**
287 * e1000_irq_enable - Enable default interrupt generation settings
288 * @adapter: board private structure
289 **/
290
291 static inline void
292 e1000_irq_enable(struct e1000_adapter *adapter)
293 {
294 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
295 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
296 E1000_WRITE_FLUSH(&adapter->hw);
297 }
298 }
299
300 static void
301 e1000_update_mng_vlan(struct e1000_adapter *adapter)
302 {
303 struct net_device *netdev = adapter->netdev;
304 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
305 uint16_t old_vid = adapter->mng_vlan_id;
306 if(adapter->vlgrp) {
307 if(!adapter->vlgrp->vlan_devices[vid]) {
308 if(adapter->hw.mng_cookie.status &
309 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
310 e1000_vlan_rx_add_vid(netdev, vid);
311 adapter->mng_vlan_id = vid;
312 } else
313 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
314
315 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
316 (vid != old_vid) &&
317 !adapter->vlgrp->vlan_devices[old_vid])
318 e1000_vlan_rx_kill_vid(netdev, old_vid);
319 }
320 }
321 }
322
323 int
324 e1000_up(struct e1000_adapter *adapter)
325 {
326 struct net_device *netdev = adapter->netdev;
327 int i, err;
328
329 /* hardware has been reset, we need to reload some things */
330
331 /* Reset the PHY if it was previously powered down */
332 if(adapter->hw.media_type == e1000_media_type_copper) {
333 uint16_t mii_reg;
334 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
335 if(mii_reg & MII_CR_POWER_DOWN)
336 e1000_phy_reset(&adapter->hw);
337 }
338
339 e1000_set_multi(netdev);
340
341 e1000_restore_vlan(adapter);
342
343 e1000_configure_tx(adapter);
344 e1000_setup_rctl(adapter);
345 e1000_configure_rx(adapter);
346 for (i = 0; i < adapter->num_queues; i++)
347 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
348
349 #ifdef CONFIG_PCI_MSI
350 if(adapter->hw.mac_type > e1000_82547_rev_2) {
351 adapter->have_msi = TRUE;
352 if((err = pci_enable_msi(adapter->pdev))) {
353 DPRINTK(PROBE, ERR,
354 "Unable to allocate MSI interrupt Error: %d\n", err);
355 adapter->have_msi = FALSE;
356 }
357 }
358 #endif
359 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
360 SA_SHIRQ | SA_SAMPLE_RANDOM,
361 netdev->name, netdev))) {
362 DPRINTK(PROBE, ERR,
363 "Unable to allocate interrupt Error: %d\n", err);
364 return err;
365 }
366
367 mod_timer(&adapter->watchdog_timer, jiffies);
368
369 #ifdef CONFIG_E1000_NAPI
370 netif_poll_enable(netdev);
371 #endif
372 e1000_irq_enable(adapter);
373
374 return 0;
375 }
376
377 void
378 e1000_down(struct e1000_adapter *adapter)
379 {
380 struct net_device *netdev = adapter->netdev;
381
382 e1000_irq_disable(adapter);
383 #ifdef CONFIG_E1000_MQ
384 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
385 #endif
386 free_irq(adapter->pdev->irq, netdev);
387 #ifdef CONFIG_PCI_MSI
388 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
389 adapter->have_msi == TRUE)
390 pci_disable_msi(adapter->pdev);
391 #endif
392 del_timer_sync(&adapter->tx_fifo_stall_timer);
393 del_timer_sync(&adapter->watchdog_timer);
394 del_timer_sync(&adapter->phy_info_timer);
395
396 #ifdef CONFIG_E1000_NAPI
397 netif_poll_disable(netdev);
398 #endif
399 adapter->link_speed = 0;
400 adapter->link_duplex = 0;
401 netif_carrier_off(netdev);
402 netif_stop_queue(netdev);
403
404 e1000_reset(adapter);
405 e1000_clean_all_tx_rings(adapter);
406 e1000_clean_all_rx_rings(adapter);
407
408 /* If WoL is not enabled and management mode is not IAMT
409 * Power down the PHY so no link is implied when interface is down */
410 if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
411 adapter->hw.media_type == e1000_media_type_copper &&
412 !e1000_check_mng_mode(&adapter->hw) &&
413 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
414 uint16_t mii_reg;
415 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
416 mii_reg |= MII_CR_POWER_DOWN;
417 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
418 mdelay(1);
419 }
420 }
421
422 void
423 e1000_reset(struct e1000_adapter *adapter)
424 {
425 struct net_device *netdev = adapter->netdev;
426 uint32_t pba, manc;
427 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
428 uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
429
430 /* Repartition Pba for greater than 9k mtu
431 * To take effect CTRL.RST is required.
432 */
433
434 switch (adapter->hw.mac_type) {
435 case e1000_82547:
436 case e1000_82547_rev_2:
437 pba = E1000_PBA_30K;
438 break;
439 case e1000_82571:
440 case e1000_82572:
441 pba = E1000_PBA_38K;
442 break;
443 case e1000_82573:
444 pba = E1000_PBA_12K;
445 break;
446 default:
447 pba = E1000_PBA_48K;
448 break;
449 }
450
451 if((adapter->hw.mac_type != e1000_82573) &&
452 (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
453 pba -= 8; /* allocate more FIFO for Tx */
454 /* send an XOFF when there is enough space in the
455 * Rx FIFO to hold one extra full size Rx packet
456 */
457 fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
458 ETHERNET_FCS_SIZE + 1;
459 fc_low_water_mark = fc_high_water_mark + 8;
460 }
461
462
463 if(adapter->hw.mac_type == e1000_82547) {
464 adapter->tx_fifo_head = 0;
465 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
466 adapter->tx_fifo_size =
467 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
468 atomic_set(&adapter->tx_fifo_stall, 0);
469 }
470
471 E1000_WRITE_REG(&adapter->hw, PBA, pba);
472
473 /* flow control settings */
474 adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
475 fc_high_water_mark;
476 adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
477 fc_low_water_mark;
478 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
479 adapter->hw.fc_send_xon = 1;
480 adapter->hw.fc = adapter->hw.original_fc;
481
482 /* Allow time for pending master requests to run */
483 e1000_reset_hw(&adapter->hw);
484 if(adapter->hw.mac_type >= e1000_82544)
485 E1000_WRITE_REG(&adapter->hw, WUC, 0);
486 if(e1000_init_hw(&adapter->hw))
487 DPRINTK(PROBE, ERR, "Hardware Error\n");
488 e1000_update_mng_vlan(adapter);
489 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
490 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
491
492 e1000_reset_adaptive(&adapter->hw);
493 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
494 if (adapter->en_mng_pt) {
495 manc = E1000_READ_REG(&adapter->hw, MANC);
496 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
497 E1000_WRITE_REG(&adapter->hw, MANC, manc);
498 }
499 }
500
501 /**
502 * e1000_probe - Device Initialization Routine
503 * @pdev: PCI device information struct
504 * @ent: entry in e1000_pci_tbl
505 *
506 * Returns 0 on success, negative on failure
507 *
508 * e1000_probe initializes an adapter identified by a pci_dev structure.
509 * The OS initialization, configuring of the adapter private structure,
510 * and a hardware reset occur.
511 **/
512
513 static int __devinit
514 e1000_probe(struct pci_dev *pdev,
515 const struct pci_device_id *ent)
516 {
517 struct net_device *netdev;
518 struct e1000_adapter *adapter;
519 unsigned long mmio_start, mmio_len;
520 uint32_t ctrl_ext;
521 uint32_t swsm;
522
523 static int cards_found = 0;
524 int i, err, pci_using_dac;
525 uint16_t eeprom_data;
526 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
527 if((err = pci_enable_device(pdev)))
528 return err;
529
530 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
531 pci_using_dac = 1;
532 } else {
533 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
534 E1000_ERR("No usable DMA configuration, aborting\n");
535 return err;
536 }
537 pci_using_dac = 0;
538 }
539
540 if((err = pci_request_regions(pdev, e1000_driver_name)))
541 return err;
542
543 pci_set_master(pdev);
544
545 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
546 if(!netdev) {
547 err = -ENOMEM;
548 goto err_alloc_etherdev;
549 }
550
551 SET_MODULE_OWNER(netdev);
552 SET_NETDEV_DEV(netdev, &pdev->dev);
553
554 pci_set_drvdata(pdev, netdev);
555 adapter = netdev_priv(netdev);
556 adapter->netdev = netdev;
557 adapter->pdev = pdev;
558 adapter->hw.back = adapter;
559 adapter->msg_enable = (1 << debug) - 1;
560
561 mmio_start = pci_resource_start(pdev, BAR_0);
562 mmio_len = pci_resource_len(pdev, BAR_0);
563
564 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
565 if(!adapter->hw.hw_addr) {
566 err = -EIO;
567 goto err_ioremap;
568 }
569
570 for(i = BAR_1; i <= BAR_5; i++) {
571 if(pci_resource_len(pdev, i) == 0)
572 continue;
573 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
574 adapter->hw.io_base = pci_resource_start(pdev, i);
575 break;
576 }
577 }
578
579 netdev->open = &e1000_open;
580 netdev->stop = &e1000_close;
581 netdev->hard_start_xmit = &e1000_xmit_frame;
582 netdev->get_stats = &e1000_get_stats;
583 netdev->set_multicast_list = &e1000_set_multi;
584 netdev->set_mac_address = &e1000_set_mac;
585 netdev->change_mtu = &e1000_change_mtu;
586 netdev->do_ioctl = &e1000_ioctl;
587 e1000_set_ethtool_ops(netdev);
588 netdev->tx_timeout = &e1000_tx_timeout;
589 netdev->watchdog_timeo = 5 * HZ;
590 #ifdef CONFIG_E1000_NAPI
591 netdev->poll = &e1000_clean;
592 netdev->weight = 64;
593 #endif
594 netdev->vlan_rx_register = e1000_vlan_rx_register;
595 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
596 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
597 #ifdef CONFIG_NET_POLL_CONTROLLER
598 netdev->poll_controller = e1000_netpoll;
599 #endif
600 strcpy(netdev->name, pci_name(pdev));
601
602 netdev->mem_start = mmio_start;
603 netdev->mem_end = mmio_start + mmio_len;
604 netdev->base_addr = adapter->hw.io_base;
605
606 adapter->bd_number = cards_found;
607
608 /* setup the private structure */
609
610 if((err = e1000_sw_init(adapter)))
611 goto err_sw_init;
612
613 if((err = e1000_check_phy_reset_block(&adapter->hw)))
614 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
615
616 if(adapter->hw.mac_type >= e1000_82543) {
617 netdev->features = NETIF_F_SG |
618 NETIF_F_HW_CSUM |
619 NETIF_F_HW_VLAN_TX |
620 NETIF_F_HW_VLAN_RX |
621 NETIF_F_HW_VLAN_FILTER;
622 }
623
624 #ifdef NETIF_F_TSO
625 if((adapter->hw.mac_type >= e1000_82544) &&
626 (adapter->hw.mac_type != e1000_82547))
627 netdev->features |= NETIF_F_TSO;
628
629 #ifdef NETIF_F_TSO_IPV6
630 if(adapter->hw.mac_type > e1000_82547_rev_2)
631 netdev->features |= NETIF_F_TSO_IPV6;
632 #endif
633 #endif
634 if(pci_using_dac)
635 netdev->features |= NETIF_F_HIGHDMA;
636
637 /* hard_start_xmit is safe against parallel locking */
638 netdev->features |= NETIF_F_LLTX;
639
640 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
641
642 /* before reading the EEPROM, reset the controller to
643 * put the device in a known good starting state */
644
645 e1000_reset_hw(&adapter->hw);
646
647 /* make sure the EEPROM is good */
648
649 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
650 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
651 err = -EIO;
652 goto err_eeprom;
653 }
654
655 /* copy the MAC address out of the EEPROM */
656
657 if(e1000_read_mac_addr(&adapter->hw))
658 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
659 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
660 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
661
662 if(!is_valid_ether_addr(netdev->perm_addr)) {
663 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
664 err = -EIO;
665 goto err_eeprom;
666 }
667
668 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
669
670 e1000_get_bus_info(&adapter->hw);
671
672 init_timer(&adapter->tx_fifo_stall_timer);
673 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
674 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
675
676 init_timer(&adapter->watchdog_timer);
677 adapter->watchdog_timer.function = &e1000_watchdog;
678 adapter->watchdog_timer.data = (unsigned long) adapter;
679
680 INIT_WORK(&adapter->watchdog_task,
681 (void (*)(void *))e1000_watchdog_task, adapter);
682
683 init_timer(&adapter->phy_info_timer);
684 adapter->phy_info_timer.function = &e1000_update_phy_info;
685 adapter->phy_info_timer.data = (unsigned long) adapter;
686
687 INIT_WORK(&adapter->tx_timeout_task,
688 (void (*)(void *))e1000_tx_timeout_task, netdev);
689
690 /* we're going to reset, so assume we have no link for now */
691
692 netif_carrier_off(netdev);
693 netif_stop_queue(netdev);
694
695 e1000_check_options(adapter);
696
697 /* Initial Wake on LAN setting
698 * If APM wake is enabled in the EEPROM,
699 * enable the ACPI Magic Packet filter
700 */
701
702 switch(adapter->hw.mac_type) {
703 case e1000_82542_rev2_0:
704 case e1000_82542_rev2_1:
705 case e1000_82543:
706 break;
707 case e1000_82544:
708 e1000_read_eeprom(&adapter->hw,
709 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
710 eeprom_apme_mask = E1000_EEPROM_82544_APM;
711 break;
712 case e1000_82546:
713 case e1000_82546_rev_3:
714 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
715 && (adapter->hw.media_type == e1000_media_type_copper)) {
716 e1000_read_eeprom(&adapter->hw,
717 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
718 break;
719 }
720 /* Fall Through */
721 default:
722 e1000_read_eeprom(&adapter->hw,
723 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
724 break;
725 }
726 if(eeprom_data & eeprom_apme_mask)
727 adapter->wol |= E1000_WUFC_MAG;
728
729 /* reset the hardware with the new settings */
730 e1000_reset(adapter);
731
732 /* Let firmware know the driver has taken over */
733 switch(adapter->hw.mac_type) {
734 case e1000_82571:
735 case e1000_82572:
736 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
737 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
738 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
739 break;
740 case e1000_82573:
741 swsm = E1000_READ_REG(&adapter->hw, SWSM);
742 E1000_WRITE_REG(&adapter->hw, SWSM,
743 swsm | E1000_SWSM_DRV_LOAD);
744 break;
745 default:
746 break;
747 }
748
749 strcpy(netdev->name, "eth%d");
750 if((err = register_netdev(netdev)))
751 goto err_register;
752
753 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
754
755 cards_found++;
756 return 0;
757
758 err_register:
759 err_sw_init:
760 err_eeprom:
761 iounmap(adapter->hw.hw_addr);
762 err_ioremap:
763 free_netdev(netdev);
764 err_alloc_etherdev:
765 pci_release_regions(pdev);
766 return err;
767 }
768
769 /**
770 * e1000_remove - Device Removal Routine
771 * @pdev: PCI device information struct
772 *
773 * e1000_remove is called by the PCI subsystem to alert the driver
774 * that it should release a PCI device. The could be caused by a
775 * Hot-Plug event, or because the driver is going to be removed from
776 * memory.
777 **/
778
779 static void __devexit
780 e1000_remove(struct pci_dev *pdev)
781 {
782 struct net_device *netdev = pci_get_drvdata(pdev);
783 struct e1000_adapter *adapter = netdev_priv(netdev);
784 uint32_t ctrl_ext;
785 uint32_t manc, swsm;
786 #ifdef CONFIG_E1000_NAPI
787 int i;
788 #endif
789
790 flush_scheduled_work();
791
792 if(adapter->hw.mac_type >= e1000_82540 &&
793 adapter->hw.media_type == e1000_media_type_copper) {
794 manc = E1000_READ_REG(&adapter->hw, MANC);
795 if(manc & E1000_MANC_SMBUS_EN) {
796 manc |= E1000_MANC_ARP_EN;
797 E1000_WRITE_REG(&adapter->hw, MANC, manc);
798 }
799 }
800
801 switch(adapter->hw.mac_type) {
802 case e1000_82571:
803 case e1000_82572:
804 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
805 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
806 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
807 break;
808 case e1000_82573:
809 swsm = E1000_READ_REG(&adapter->hw, SWSM);
810 E1000_WRITE_REG(&adapter->hw, SWSM,
811 swsm & ~E1000_SWSM_DRV_LOAD);
812 break;
813
814 default:
815 break;
816 }
817
818 unregister_netdev(netdev);
819 #ifdef CONFIG_E1000_NAPI
820 for (i = 0; i < adapter->num_queues; i++)
821 __dev_put(&adapter->polling_netdev[i]);
822 #endif
823
824 if(!e1000_check_phy_reset_block(&adapter->hw))
825 e1000_phy_hw_reset(&adapter->hw);
826
827 kfree(adapter->tx_ring);
828 kfree(adapter->rx_ring);
829 #ifdef CONFIG_E1000_NAPI
830 kfree(adapter->polling_netdev);
831 #endif
832
833 iounmap(adapter->hw.hw_addr);
834 pci_release_regions(pdev);
835
836 #ifdef CONFIG_E1000_MQ
837 free_percpu(adapter->cpu_netdev);
838 free_percpu(adapter->cpu_tx_ring);
839 #endif
840 free_netdev(netdev);
841
842 pci_disable_device(pdev);
843 }
844
845 /**
846 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
847 * @adapter: board private structure to initialize
848 *
849 * e1000_sw_init initializes the Adapter private data structure.
850 * Fields are initialized based on PCI device information and
851 * OS network device settings (MTU size).
852 **/
853
854 static int __devinit
855 e1000_sw_init(struct e1000_adapter *adapter)
856 {
857 struct e1000_hw *hw = &adapter->hw;
858 struct net_device *netdev = adapter->netdev;
859 struct pci_dev *pdev = adapter->pdev;
860 #ifdef CONFIG_E1000_NAPI
861 int i;
862 #endif
863
864 /* PCI config space info */
865
866 hw->vendor_id = pdev->vendor;
867 hw->device_id = pdev->device;
868 hw->subsystem_vendor_id = pdev->subsystem_vendor;
869 hw->subsystem_id = pdev->subsystem_device;
870
871 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
872
873 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
874
875 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
876 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
877 hw->max_frame_size = netdev->mtu +
878 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
879 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
880
881 /* identify the MAC */
882
883 if(e1000_set_mac_type(hw)) {
884 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
885 return -EIO;
886 }
887
888 /* initialize eeprom parameters */
889
890 if(e1000_init_eeprom_params(hw)) {
891 E1000_ERR("EEPROM initialization failed\n");
892 return -EIO;
893 }
894
895 switch(hw->mac_type) {
896 default:
897 break;
898 case e1000_82541:
899 case e1000_82547:
900 case e1000_82541_rev_2:
901 case e1000_82547_rev_2:
902 hw->phy_init_script = 1;
903 break;
904 }
905
906 e1000_set_media_type(hw);
907
908 hw->wait_autoneg_complete = FALSE;
909 hw->tbi_compatibility_en = TRUE;
910 hw->adaptive_ifs = TRUE;
911
912 /* Copper options */
913
914 if(hw->media_type == e1000_media_type_copper) {
915 hw->mdix = AUTO_ALL_MODES;
916 hw->disable_polarity_correction = FALSE;
917 hw->master_slave = E1000_MASTER_SLAVE;
918 }
919
920 #ifdef CONFIG_E1000_MQ
921 /* Number of supported queues */
922 switch (hw->mac_type) {
923 case e1000_82571:
924 case e1000_82572:
925 adapter->num_queues = 2;
926 break;
927 default:
928 adapter->num_queues = 1;
929 break;
930 }
931 adapter->num_queues = min(adapter->num_queues, num_online_cpus());
932 #else
933 adapter->num_queues = 1;
934 #endif
935
936 if (e1000_alloc_queues(adapter)) {
937 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
938 return -ENOMEM;
939 }
940
941 #ifdef CONFIG_E1000_NAPI
942 for (i = 0; i < adapter->num_queues; i++) {
943 adapter->polling_netdev[i].priv = adapter;
944 adapter->polling_netdev[i].poll = &e1000_clean;
945 adapter->polling_netdev[i].weight = 64;
946 dev_hold(&adapter->polling_netdev[i]);
947 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
948 }
949 #endif
950
951 #ifdef CONFIG_E1000_MQ
952 e1000_setup_queue_mapping(adapter);
953 #endif
954
955 atomic_set(&adapter->irq_sem, 1);
956 spin_lock_init(&adapter->stats_lock);
957
958 return 0;
959 }
960
961 /**
962 * e1000_alloc_queues - Allocate memory for all rings
963 * @adapter: board private structure to initialize
964 *
965 * We allocate one ring per queue at run-time since we don't know the
966 * number of queues at compile-time. The polling_netdev array is
967 * intended for Multiqueue, but should work fine with a single queue.
968 **/
969
970 static int __devinit
971 e1000_alloc_queues(struct e1000_adapter *adapter)
972 {
973 int size;
974
975 size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
976 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
977 if (!adapter->tx_ring)
978 return -ENOMEM;
979 memset(adapter->tx_ring, 0, size);
980
981 size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
982 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
983 if (!adapter->rx_ring) {
984 kfree(adapter->tx_ring);
985 return -ENOMEM;
986 }
987 memset(adapter->rx_ring, 0, size);
988
989 #ifdef CONFIG_E1000_NAPI
990 size = sizeof(struct net_device) * adapter->num_queues;
991 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
992 if (!adapter->polling_netdev) {
993 kfree(adapter->tx_ring);
994 kfree(adapter->rx_ring);
995 return -ENOMEM;
996 }
997 memset(adapter->polling_netdev, 0, size);
998 #endif
999
1000 return E1000_SUCCESS;
1001 }
1002
1003 #ifdef CONFIG_E1000_MQ
1004 static void __devinit
1005 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1006 {
1007 int i, cpu;
1008
1009 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1010 adapter->rx_sched_call_data.info = adapter->netdev;
1011 cpus_clear(adapter->rx_sched_call_data.cpumask);
1012
1013 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1014 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1015
1016 lock_cpu_hotplug();
1017 i = 0;
1018 for_each_online_cpu(cpu) {
1019 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
1020 /* This is incomplete because we'd like to assign separate
1021 * physical cpus to these netdev polling structures and
1022 * avoid saturating a subset of cpus.
1023 */
1024 if (i < adapter->num_queues) {
1025 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1026 adapter->cpu_for_queue[i] = cpu;
1027 } else
1028 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1029
1030 i++;
1031 }
1032 unlock_cpu_hotplug();
1033 }
1034 #endif
1035
1036 /**
1037 * e1000_open - Called when a network interface is made active
1038 * @netdev: network interface device structure
1039 *
1040 * Returns 0 on success, negative value on failure
1041 *
1042 * The open entry point is called when a network interface is made
1043 * active by the system (IFF_UP). At this point all resources needed
1044 * for transmit and receive operations are allocated, the interrupt
1045 * handler is registered with the OS, the watchdog timer is started,
1046 * and the stack is notified that the interface is ready.
1047 **/
1048
1049 static int
1050 e1000_open(struct net_device *netdev)
1051 {
1052 struct e1000_adapter *adapter = netdev_priv(netdev);
1053 int err;
1054
1055 /* allocate transmit descriptors */
1056
1057 if ((err = e1000_setup_all_tx_resources(adapter)))
1058 goto err_setup_tx;
1059
1060 /* allocate receive descriptors */
1061
1062 if ((err = e1000_setup_all_rx_resources(adapter)))
1063 goto err_setup_rx;
1064
1065 if((err = e1000_up(adapter)))
1066 goto err_up;
1067 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1068 if((adapter->hw.mng_cookie.status &
1069 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1070 e1000_update_mng_vlan(adapter);
1071 }
1072
1073 return E1000_SUCCESS;
1074
1075 err_up:
1076 e1000_free_all_rx_resources(adapter);
1077 err_setup_rx:
1078 e1000_free_all_tx_resources(adapter);
1079 err_setup_tx:
1080 e1000_reset(adapter);
1081
1082 return err;
1083 }
1084
1085 /**
1086 * e1000_close - Disables a network interface
1087 * @netdev: network interface device structure
1088 *
1089 * Returns 0, this is not allowed to fail
1090 *
1091 * The close entry point is called when an interface is de-activated
1092 * by the OS. The hardware is still under the drivers control, but
1093 * needs to be disabled. A global MAC reset is issued to stop the
1094 * hardware, and all transmit and receive resources are freed.
1095 **/
1096
1097 static int
1098 e1000_close(struct net_device *netdev)
1099 {
1100 struct e1000_adapter *adapter = netdev_priv(netdev);
1101
1102 e1000_down(adapter);
1103
1104 e1000_free_all_tx_resources(adapter);
1105 e1000_free_all_rx_resources(adapter);
1106
1107 if((adapter->hw.mng_cookie.status &
1108 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1109 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1110 }
1111 return 0;
1112 }
1113
1114 /**
1115 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1116 * @adapter: address of board private structure
1117 * @start: address of beginning of memory
1118 * @len: length of memory
1119 **/
1120 static inline boolean_t
1121 e1000_check_64k_bound(struct e1000_adapter *adapter,
1122 void *start, unsigned long len)
1123 {
1124 unsigned long begin = (unsigned long) start;
1125 unsigned long end = begin + len;
1126
1127 /* First rev 82545 and 82546 need to not allow any memory
1128 * write location to cross 64k boundary due to errata 23 */
1129 if (adapter->hw.mac_type == e1000_82545 ||
1130 adapter->hw.mac_type == e1000_82546) {
1131 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1132 }
1133
1134 return TRUE;
1135 }
1136
1137 /**
1138 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1139 * @adapter: board private structure
1140 * @txdr: tx descriptor ring (for a specific queue) to setup
1141 *
1142 * Return 0 on success, negative on failure
1143 **/
1144
1145 static int
1146 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1147 struct e1000_tx_ring *txdr)
1148 {
1149 struct pci_dev *pdev = adapter->pdev;
1150 int size;
1151
1152 size = sizeof(struct e1000_buffer) * txdr->count;
1153
1154 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1155 if(!txdr->buffer_info) {
1156 DPRINTK(PROBE, ERR,
1157 "Unable to allocate memory for the transmit descriptor ring\n");
1158 return -ENOMEM;
1159 }
1160 memset(txdr->buffer_info, 0, size);
1161 memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer));
1162
1163 /* round up to nearest 4K */
1164
1165 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1166 E1000_ROUNDUP(txdr->size, 4096);
1167
1168 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1169 if(!txdr->desc) {
1170 setup_tx_desc_die:
1171 vfree(txdr->buffer_info);
1172 DPRINTK(PROBE, ERR,
1173 "Unable to allocate memory for the transmit descriptor ring\n");
1174 return -ENOMEM;
1175 }
1176
1177 /* Fix for errata 23, can't cross 64kB boundary */
1178 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1179 void *olddesc = txdr->desc;
1180 dma_addr_t olddma = txdr->dma;
1181 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1182 "at %p\n", txdr->size, txdr->desc);
1183 /* Try again, without freeing the previous */
1184 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1185 if(!txdr->desc) {
1186 /* Failed allocation, critical failure */
1187 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1188 goto setup_tx_desc_die;
1189 }
1190
1191 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1192 /* give up */
1193 pci_free_consistent(pdev, txdr->size, txdr->desc,
1194 txdr->dma);
1195 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1196 DPRINTK(PROBE, ERR,
1197 "Unable to allocate aligned memory "
1198 "for the transmit descriptor ring\n");
1199 vfree(txdr->buffer_info);
1200 return -ENOMEM;
1201 } else {
1202 /* Free old allocation, new allocation was successful */
1203 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1204 }
1205 }
1206 memset(txdr->desc, 0, txdr->size);
1207
1208 txdr->next_to_use = 0;
1209 txdr->next_to_clean = 0;
1210 spin_lock_init(&txdr->tx_lock);
1211
1212 return 0;
1213 }
1214
1215 /**
1216 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1217 * (Descriptors) for all queues
1218 * @adapter: board private structure
1219 *
1220 * If this function returns with an error, then it's possible one or
1221 * more of the rings is populated (while the rest are not). It is the
1222 * callers duty to clean those orphaned rings.
1223 *
1224 * Return 0 on success, negative on failure
1225 **/
1226
1227 int
1228 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1229 {
1230 int i, err = 0;
1231
1232 for (i = 0; i < adapter->num_queues; i++) {
1233 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1234 if (err) {
1235 DPRINTK(PROBE, ERR,
1236 "Allocation for Tx Queue %u failed\n", i);
1237 break;
1238 }
1239 }
1240
1241 return err;
1242 }
1243
1244 /**
1245 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1246 * @adapter: board private structure
1247 *
1248 * Configure the Tx unit of the MAC after a reset.
1249 **/
1250
1251 static void
1252 e1000_configure_tx(struct e1000_adapter *adapter)
1253 {
1254 uint64_t tdba;
1255 struct e1000_hw *hw = &adapter->hw;
1256 uint32_t tdlen, tctl, tipg, tarc;
1257
1258 /* Setup the HW Tx Head and Tail descriptor pointers */
1259
1260 switch (adapter->num_queues) {
1261 case 2:
1262 tdba = adapter->tx_ring[1].dma;
1263 tdlen = adapter->tx_ring[1].count *
1264 sizeof(struct e1000_tx_desc);
1265 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1266 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1267 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1268 E1000_WRITE_REG(hw, TDH1, 0);
1269 E1000_WRITE_REG(hw, TDT1, 0);
1270 adapter->tx_ring[1].tdh = E1000_TDH1;
1271 adapter->tx_ring[1].tdt = E1000_TDT1;
1272 /* Fall Through */
1273 case 1:
1274 default:
1275 tdba = adapter->tx_ring[0].dma;
1276 tdlen = adapter->tx_ring[0].count *
1277 sizeof(struct e1000_tx_desc);
1278 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1279 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1280 E1000_WRITE_REG(hw, TDLEN, tdlen);
1281 E1000_WRITE_REG(hw, TDH, 0);
1282 E1000_WRITE_REG(hw, TDT, 0);
1283 adapter->tx_ring[0].tdh = E1000_TDH;
1284 adapter->tx_ring[0].tdt = E1000_TDT;
1285 break;
1286 }
1287
1288 /* Set the default values for the Tx Inter Packet Gap timer */
1289
1290 switch (hw->mac_type) {
1291 case e1000_82542_rev2_0:
1292 case e1000_82542_rev2_1:
1293 tipg = DEFAULT_82542_TIPG_IPGT;
1294 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1295 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1296 break;
1297 default:
1298 if (hw->media_type == e1000_media_type_fiber ||
1299 hw->media_type == e1000_media_type_internal_serdes)
1300 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1301 else
1302 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1303 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1304 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1305 }
1306 E1000_WRITE_REG(hw, TIPG, tipg);
1307
1308 /* Set the Tx Interrupt Delay register */
1309
1310 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1311 if (hw->mac_type >= e1000_82540)
1312 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1313
1314 /* Program the Transmit Control Register */
1315
1316 tctl = E1000_READ_REG(hw, TCTL);
1317
1318 tctl &= ~E1000_TCTL_CT;
1319 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1320 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1321
1322 E1000_WRITE_REG(hw, TCTL, tctl);
1323
1324 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1325 tarc = E1000_READ_REG(hw, TARC0);
1326 tarc |= ((1 << 25) | (1 << 21));
1327 E1000_WRITE_REG(hw, TARC0, tarc);
1328 tarc = E1000_READ_REG(hw, TARC1);
1329 tarc |= (1 << 25);
1330 if (tctl & E1000_TCTL_MULR)
1331 tarc &= ~(1 << 28);
1332 else
1333 tarc |= (1 << 28);
1334 E1000_WRITE_REG(hw, TARC1, tarc);
1335 }
1336
1337 e1000_config_collision_dist(hw);
1338
1339 /* Setup Transmit Descriptor Settings for eop descriptor */
1340 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1341 E1000_TXD_CMD_IFCS;
1342
1343 if (hw->mac_type < e1000_82543)
1344 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1345 else
1346 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1347
1348 /* Cache if we're 82544 running in PCI-X because we'll
1349 * need this to apply a workaround later in the send path. */
1350 if (hw->mac_type == e1000_82544 &&
1351 hw->bus_type == e1000_bus_type_pcix)
1352 adapter->pcix_82544 = 1;
1353 }
1354
1355 /**
1356 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1357 * @adapter: board private structure
1358 * @rxdr: rx descriptor ring (for a specific queue) to setup
1359 *
1360 * Returns 0 on success, negative on failure
1361 **/
1362
1363 static int
1364 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1365 struct e1000_rx_ring *rxdr)
1366 {
1367 struct pci_dev *pdev = adapter->pdev;
1368 int size, desc_len;
1369
1370 size = sizeof(struct e1000_buffer) * rxdr->count;
1371 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1372 if (!rxdr->buffer_info) {
1373 DPRINTK(PROBE, ERR,
1374 "Unable to allocate memory for the receive descriptor ring\n");
1375 return -ENOMEM;
1376 }
1377 memset(rxdr->buffer_info, 0, size);
1378
1379 size = sizeof(struct e1000_ps_page) * rxdr->count;
1380 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1381 if(!rxdr->ps_page) {
1382 vfree(rxdr->buffer_info);
1383 DPRINTK(PROBE, ERR,
1384 "Unable to allocate memory for the receive descriptor ring\n");
1385 return -ENOMEM;
1386 }
1387 memset(rxdr->ps_page, 0, size);
1388
1389 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1390 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1391 if(!rxdr->ps_page_dma) {
1392 vfree(rxdr->buffer_info);
1393 kfree(rxdr->ps_page);
1394 DPRINTK(PROBE, ERR,
1395 "Unable to allocate memory for the receive descriptor ring\n");
1396 return -ENOMEM;
1397 }
1398 memset(rxdr->ps_page_dma, 0, size);
1399
1400 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1401 desc_len = sizeof(struct e1000_rx_desc);
1402 else
1403 desc_len = sizeof(union e1000_rx_desc_packet_split);
1404
1405 /* Round up to nearest 4K */
1406
1407 rxdr->size = rxdr->count * desc_len;
1408 E1000_ROUNDUP(rxdr->size, 4096);
1409
1410 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1411
1412 if (!rxdr->desc) {
1413 DPRINTK(PROBE, ERR,
1414 "Unable to allocate memory for the receive descriptor ring\n");
1415 setup_rx_desc_die:
1416 vfree(rxdr->buffer_info);
1417 kfree(rxdr->ps_page);
1418 kfree(rxdr->ps_page_dma);
1419 return -ENOMEM;
1420 }
1421
1422 /* Fix for errata 23, can't cross 64kB boundary */
1423 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1424 void *olddesc = rxdr->desc;
1425 dma_addr_t olddma = rxdr->dma;
1426 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1427 "at %p\n", rxdr->size, rxdr->desc);
1428 /* Try again, without freeing the previous */
1429 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1430 /* Failed allocation, critical failure */
1431 if (!rxdr->desc) {
1432 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1433 DPRINTK(PROBE, ERR,
1434 "Unable to allocate memory "
1435 "for the receive descriptor ring\n");
1436 goto setup_rx_desc_die;
1437 }
1438
1439 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1440 /* give up */
1441 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1442 rxdr->dma);
1443 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1444 DPRINTK(PROBE, ERR,
1445 "Unable to allocate aligned memory "
1446 "for the receive descriptor ring\n");
1447 goto setup_rx_desc_die;
1448 } else {
1449 /* Free old allocation, new allocation was successful */
1450 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1451 }
1452 }
1453 memset(rxdr->desc, 0, rxdr->size);
1454
1455 rxdr->next_to_clean = 0;
1456 rxdr->next_to_use = 0;
1457
1458 return 0;
1459 }
1460
1461 /**
1462 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1463 * (Descriptors) for all queues
1464 * @adapter: board private structure
1465 *
1466 * If this function returns with an error, then it's possible one or
1467 * more of the rings is populated (while the rest are not). It is the
1468 * callers duty to clean those orphaned rings.
1469 *
1470 * Return 0 on success, negative on failure
1471 **/
1472
1473 int
1474 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1475 {
1476 int i, err = 0;
1477
1478 for (i = 0; i < adapter->num_queues; i++) {
1479 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1480 if (err) {
1481 DPRINTK(PROBE, ERR,
1482 "Allocation for Rx Queue %u failed\n", i);
1483 break;
1484 }
1485 }
1486
1487 return err;
1488 }
1489
1490 /**
1491 * e1000_setup_rctl - configure the receive control registers
1492 * @adapter: Board private structure
1493 **/
1494 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1495 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1496 static void
1497 e1000_setup_rctl(struct e1000_adapter *adapter)
1498 {
1499 uint32_t rctl, rfctl;
1500 uint32_t psrctl = 0;
1501 #ifdef CONFIG_E1000_PACKET_SPLIT
1502 uint32_t pages = 0;
1503 #endif
1504
1505 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1506
1507 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1508
1509 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1510 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1511 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1512
1513 if(adapter->hw.tbi_compatibility_on == 1)
1514 rctl |= E1000_RCTL_SBP;
1515 else
1516 rctl &= ~E1000_RCTL_SBP;
1517
1518 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1519 rctl &= ~E1000_RCTL_LPE;
1520 else
1521 rctl |= E1000_RCTL_LPE;
1522
1523 /* Setup buffer sizes */
1524 if(adapter->hw.mac_type >= e1000_82571) {
1525 /* We can now specify buffers in 1K increments.
1526 * BSIZE and BSEX are ignored in this case. */
1527 rctl |= adapter->rx_buffer_len << 0x11;
1528 } else {
1529 rctl &= ~E1000_RCTL_SZ_4096;
1530 rctl |= E1000_RCTL_BSEX;
1531 switch (adapter->rx_buffer_len) {
1532 case E1000_RXBUFFER_2048:
1533 default:
1534 rctl |= E1000_RCTL_SZ_2048;
1535 rctl &= ~E1000_RCTL_BSEX;
1536 break;
1537 case E1000_RXBUFFER_4096:
1538 rctl |= E1000_RCTL_SZ_4096;
1539 break;
1540 case E1000_RXBUFFER_8192:
1541 rctl |= E1000_RCTL_SZ_8192;
1542 break;
1543 case E1000_RXBUFFER_16384:
1544 rctl |= E1000_RCTL_SZ_16384;
1545 break;
1546 }
1547 }
1548
1549 #ifdef CONFIG_E1000_PACKET_SPLIT
1550 /* 82571 and greater support packet-split where the protocol
1551 * header is placed in skb->data and the packet data is
1552 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1553 * In the case of a non-split, skb->data is linearly filled,
1554 * followed by the page buffers. Therefore, skb->data is
1555 * sized to hold the largest protocol header.
1556 */
1557 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1558 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1559 PAGE_SIZE <= 16384)
1560 adapter->rx_ps_pages = pages;
1561 else
1562 adapter->rx_ps_pages = 0;
1563 #endif
1564 if (adapter->rx_ps_pages) {
1565 /* Configure extra packet-split registers */
1566 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1567 rfctl |= E1000_RFCTL_EXTEN;
1568 /* disable IPv6 packet split support */
1569 rfctl |= E1000_RFCTL_IPV6_DIS;
1570 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1571
1572 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1573
1574 psrctl |= adapter->rx_ps_bsize0 >>
1575 E1000_PSRCTL_BSIZE0_SHIFT;
1576
1577 switch (adapter->rx_ps_pages) {
1578 case 3:
1579 psrctl |= PAGE_SIZE <<
1580 E1000_PSRCTL_BSIZE3_SHIFT;
1581 case 2:
1582 psrctl |= PAGE_SIZE <<
1583 E1000_PSRCTL_BSIZE2_SHIFT;
1584 case 1:
1585 psrctl |= PAGE_SIZE >>
1586 E1000_PSRCTL_BSIZE1_SHIFT;
1587 break;
1588 }
1589
1590 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1591 }
1592
1593 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1594 }
1595
1596 /**
1597 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1598 * @adapter: board private structure
1599 *
1600 * Configure the Rx unit of the MAC after a reset.
1601 **/
1602
1603 static void
1604 e1000_configure_rx(struct e1000_adapter *adapter)
1605 {
1606 uint64_t rdba;
1607 struct e1000_hw *hw = &adapter->hw;
1608 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1609 #ifdef CONFIG_E1000_MQ
1610 uint32_t reta, mrqc;
1611 int i;
1612 #endif
1613
1614 if (adapter->rx_ps_pages) {
1615 rdlen = adapter->rx_ring[0].count *
1616 sizeof(union e1000_rx_desc_packet_split);
1617 adapter->clean_rx = e1000_clean_rx_irq_ps;
1618 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1619 } else {
1620 rdlen = adapter->rx_ring[0].count *
1621 sizeof(struct e1000_rx_desc);
1622 adapter->clean_rx = e1000_clean_rx_irq;
1623 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1624 }
1625
1626 /* disable receives while setting up the descriptors */
1627 rctl = E1000_READ_REG(hw, RCTL);
1628 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1629
1630 /* set the Receive Delay Timer Register */
1631 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1632
1633 if (hw->mac_type >= e1000_82540) {
1634 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1635 if(adapter->itr > 1)
1636 E1000_WRITE_REG(hw, ITR,
1637 1000000000 / (adapter->itr * 256));
1638 }
1639
1640 if (hw->mac_type >= e1000_82571) {
1641 /* Reset delay timers after every interrupt */
1642 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1643 ctrl_ext |= E1000_CTRL_EXT_CANC;
1644 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1645 E1000_WRITE_FLUSH(hw);
1646 }
1647
1648 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1649 * the Base and Length of the Rx Descriptor Ring */
1650 switch (adapter->num_queues) {
1651 #ifdef CONFIG_E1000_MQ
1652 case 2:
1653 rdba = adapter->rx_ring[1].dma;
1654 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1655 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1656 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1657 E1000_WRITE_REG(hw, RDH1, 0);
1658 E1000_WRITE_REG(hw, RDT1, 0);
1659 adapter->rx_ring[1].rdh = E1000_RDH1;
1660 adapter->rx_ring[1].rdt = E1000_RDT1;
1661 /* Fall Through */
1662 #endif
1663 case 1:
1664 default:
1665 rdba = adapter->rx_ring[0].dma;
1666 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1667 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1668 E1000_WRITE_REG(hw, RDLEN, rdlen);
1669 E1000_WRITE_REG(hw, RDH, 0);
1670 E1000_WRITE_REG(hw, RDT, 0);
1671 adapter->rx_ring[0].rdh = E1000_RDH;
1672 adapter->rx_ring[0].rdt = E1000_RDT;
1673 break;
1674 }
1675
1676 #ifdef CONFIG_E1000_MQ
1677 if (adapter->num_queues > 1) {
1678 uint32_t random[10];
1679
1680 get_random_bytes(&random[0], 40);
1681
1682 if (hw->mac_type <= e1000_82572) {
1683 E1000_WRITE_REG(hw, RSSIR, 0);
1684 E1000_WRITE_REG(hw, RSSIM, 0);
1685 }
1686
1687 switch (adapter->num_queues) {
1688 case 2:
1689 default:
1690 reta = 0x00800080;
1691 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1692 break;
1693 }
1694
1695 /* Fill out redirection table */
1696 for (i = 0; i < 32; i++)
1697 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1698 /* Fill out hash function seeds */
1699 for (i = 0; i < 10; i++)
1700 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1701
1702 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1703 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1704 E1000_WRITE_REG(hw, MRQC, mrqc);
1705 }
1706
1707 /* Multiqueue and packet checksumming are mutually exclusive. */
1708 if (hw->mac_type >= e1000_82571) {
1709 rxcsum = E1000_READ_REG(hw, RXCSUM);
1710 rxcsum |= E1000_RXCSUM_PCSD;
1711 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1712 }
1713
1714 #else
1715
1716 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1717 if (hw->mac_type >= e1000_82543) {
1718 rxcsum = E1000_READ_REG(hw, RXCSUM);
1719 if(adapter->rx_csum == TRUE) {
1720 rxcsum |= E1000_RXCSUM_TUOFL;
1721
1722 /* Enable 82571 IPv4 payload checksum for UDP fragments
1723 * Must be used in conjunction with packet-split. */
1724 if ((hw->mac_type >= e1000_82571) &&
1725 (adapter->rx_ps_pages)) {
1726 rxcsum |= E1000_RXCSUM_IPPCSE;
1727 }
1728 } else {
1729 rxcsum &= ~E1000_RXCSUM_TUOFL;
1730 /* don't need to clear IPPCSE as it defaults to 0 */
1731 }
1732 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1733 }
1734 #endif /* CONFIG_E1000_MQ */
1735
1736 if (hw->mac_type == e1000_82573)
1737 E1000_WRITE_REG(hw, ERT, 0x0100);
1738
1739 /* Enable Receives */
1740 E1000_WRITE_REG(hw, RCTL, rctl);
1741 }
1742
1743 /**
1744 * e1000_free_tx_resources - Free Tx Resources per Queue
1745 * @adapter: board private structure
1746 * @tx_ring: Tx descriptor ring for a specific queue
1747 *
1748 * Free all transmit software resources
1749 **/
1750
1751 static void
1752 e1000_free_tx_resources(struct e1000_adapter *adapter,
1753 struct e1000_tx_ring *tx_ring)
1754 {
1755 struct pci_dev *pdev = adapter->pdev;
1756
1757 e1000_clean_tx_ring(adapter, tx_ring);
1758
1759 vfree(tx_ring->buffer_info);
1760 tx_ring->buffer_info = NULL;
1761
1762 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1763
1764 tx_ring->desc = NULL;
1765 }
1766
1767 /**
1768 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1769 * @adapter: board private structure
1770 *
1771 * Free all transmit software resources
1772 **/
1773
1774 void
1775 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1776 {
1777 int i;
1778
1779 for (i = 0; i < adapter->num_queues; i++)
1780 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1781 }
1782
1783 static inline void
1784 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1785 struct e1000_buffer *buffer_info)
1786 {
1787 if(buffer_info->dma) {
1788 pci_unmap_page(adapter->pdev,
1789 buffer_info->dma,
1790 buffer_info->length,
1791 PCI_DMA_TODEVICE);
1792 buffer_info->dma = 0;
1793 }
1794 if(buffer_info->skb) {
1795 dev_kfree_skb_any(buffer_info->skb);
1796 buffer_info->skb = NULL;
1797 }
1798 }
1799
1800 /**
1801 * e1000_clean_tx_ring - Free Tx Buffers
1802 * @adapter: board private structure
1803 * @tx_ring: ring to be cleaned
1804 **/
1805
1806 static void
1807 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1808 struct e1000_tx_ring *tx_ring)
1809 {
1810 struct e1000_buffer *buffer_info;
1811 unsigned long size;
1812 unsigned int i;
1813
1814 /* Free all the Tx ring sk_buffs */
1815
1816 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
1817 e1000_unmap_and_free_tx_resource(adapter,
1818 &tx_ring->previous_buffer_info);
1819 }
1820
1821 for(i = 0; i < tx_ring->count; i++) {
1822 buffer_info = &tx_ring->buffer_info[i];
1823 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1824 }
1825
1826 size = sizeof(struct e1000_buffer) * tx_ring->count;
1827 memset(tx_ring->buffer_info, 0, size);
1828
1829 /* Zero out the descriptor ring */
1830
1831 memset(tx_ring->desc, 0, tx_ring->size);
1832
1833 tx_ring->next_to_use = 0;
1834 tx_ring->next_to_clean = 0;
1835
1836 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1837 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1838 }
1839
1840 /**
1841 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1842 * @adapter: board private structure
1843 **/
1844
1845 static void
1846 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1847 {
1848 int i;
1849
1850 for (i = 0; i < adapter->num_queues; i++)
1851 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1852 }
1853
1854 /**
1855 * e1000_free_rx_resources - Free Rx Resources
1856 * @adapter: board private structure
1857 * @rx_ring: ring to clean the resources from
1858 *
1859 * Free all receive software resources
1860 **/
1861
1862 static void
1863 e1000_free_rx_resources(struct e1000_adapter *adapter,
1864 struct e1000_rx_ring *rx_ring)
1865 {
1866 struct pci_dev *pdev = adapter->pdev;
1867
1868 e1000_clean_rx_ring(adapter, rx_ring);
1869
1870 vfree(rx_ring->buffer_info);
1871 rx_ring->buffer_info = NULL;
1872 kfree(rx_ring->ps_page);
1873 rx_ring->ps_page = NULL;
1874 kfree(rx_ring->ps_page_dma);
1875 rx_ring->ps_page_dma = NULL;
1876
1877 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1878
1879 rx_ring->desc = NULL;
1880 }
1881
1882 /**
1883 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1884 * @adapter: board private structure
1885 *
1886 * Free all receive software resources
1887 **/
1888
1889 void
1890 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1891 {
1892 int i;
1893
1894 for (i = 0; i < adapter->num_queues; i++)
1895 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1896 }
1897
1898 /**
1899 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1900 * @adapter: board private structure
1901 * @rx_ring: ring to free buffers from
1902 **/
1903
1904 static void
1905 e1000_clean_rx_ring(struct e1000_adapter *adapter,
1906 struct e1000_rx_ring *rx_ring)
1907 {
1908 struct e1000_buffer *buffer_info;
1909 struct e1000_ps_page *ps_page;
1910 struct e1000_ps_page_dma *ps_page_dma;
1911 struct pci_dev *pdev = adapter->pdev;
1912 unsigned long size;
1913 unsigned int i, j;
1914
1915 /* Free all the Rx ring sk_buffs */
1916
1917 for(i = 0; i < rx_ring->count; i++) {
1918 buffer_info = &rx_ring->buffer_info[i];
1919 if(buffer_info->skb) {
1920 ps_page = &rx_ring->ps_page[i];
1921 ps_page_dma = &rx_ring->ps_page_dma[i];
1922 pci_unmap_single(pdev,
1923 buffer_info->dma,
1924 buffer_info->length,
1925 PCI_DMA_FROMDEVICE);
1926
1927 dev_kfree_skb(buffer_info->skb);
1928 buffer_info->skb = NULL;
1929
1930 for(j = 0; j < adapter->rx_ps_pages; j++) {
1931 if(!ps_page->ps_page[j]) break;
1932 pci_unmap_single(pdev,
1933 ps_page_dma->ps_page_dma[j],
1934 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1935 ps_page_dma->ps_page_dma[j] = 0;
1936 put_page(ps_page->ps_page[j]);
1937 ps_page->ps_page[j] = NULL;
1938 }
1939 }
1940 }
1941
1942 size = sizeof(struct e1000_buffer) * rx_ring->count;
1943 memset(rx_ring->buffer_info, 0, size);
1944 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1945 memset(rx_ring->ps_page, 0, size);
1946 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1947 memset(rx_ring->ps_page_dma, 0, size);
1948
1949 /* Zero out the descriptor ring */
1950
1951 memset(rx_ring->desc, 0, rx_ring->size);
1952
1953 rx_ring->next_to_clean = 0;
1954 rx_ring->next_to_use = 0;
1955
1956 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1957 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1958 }
1959
1960 /**
1961 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1962 * @adapter: board private structure
1963 **/
1964
1965 static void
1966 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1967 {
1968 int i;
1969
1970 for (i = 0; i < adapter->num_queues; i++)
1971 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1972 }
1973
1974 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
1975 * and memory write and invalidate disabled for certain operations
1976 */
1977 static void
1978 e1000_enter_82542_rst(struct e1000_adapter *adapter)
1979 {
1980 struct net_device *netdev = adapter->netdev;
1981 uint32_t rctl;
1982
1983 e1000_pci_clear_mwi(&adapter->hw);
1984
1985 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1986 rctl |= E1000_RCTL_RST;
1987 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1988 E1000_WRITE_FLUSH(&adapter->hw);
1989 mdelay(5);
1990
1991 if(netif_running(netdev))
1992 e1000_clean_all_rx_rings(adapter);
1993 }
1994
1995 static void
1996 e1000_leave_82542_rst(struct e1000_adapter *adapter)
1997 {
1998 struct net_device *netdev = adapter->netdev;
1999 uint32_t rctl;
2000
2001 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2002 rctl &= ~E1000_RCTL_RST;
2003 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2004 E1000_WRITE_FLUSH(&adapter->hw);
2005 mdelay(5);
2006
2007 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2008 e1000_pci_set_mwi(&adapter->hw);
2009
2010 if(netif_running(netdev)) {
2011 e1000_configure_rx(adapter);
2012 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
2013 }
2014 }
2015
2016 /**
2017 * e1000_set_mac - Change the Ethernet Address of the NIC
2018 * @netdev: network interface device structure
2019 * @p: pointer to an address structure
2020 *
2021 * Returns 0 on success, negative on failure
2022 **/
2023
2024 static int
2025 e1000_set_mac(struct net_device *netdev, void *p)
2026 {
2027 struct e1000_adapter *adapter = netdev_priv(netdev);
2028 struct sockaddr *addr = p;
2029
2030 if(!is_valid_ether_addr(addr->sa_data))
2031 return -EADDRNOTAVAIL;
2032
2033 /* 82542 2.0 needs to be in reset to write receive address registers */
2034
2035 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2036 e1000_enter_82542_rst(adapter);
2037
2038 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2039 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2040
2041 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2042
2043 /* With 82571 controllers, LAA may be overwritten (with the default)
2044 * due to controller reset from the other port. */
2045 if (adapter->hw.mac_type == e1000_82571) {
2046 /* activate the work around */
2047 adapter->hw.laa_is_present = 1;
2048
2049 /* Hold a copy of the LAA in RAR[14] This is done so that
2050 * between the time RAR[0] gets clobbered and the time it
2051 * gets fixed (in e1000_watchdog), the actual LAA is in one
2052 * of the RARs and no incoming packets directed to this port
2053 * are dropped. Eventaully the LAA will be in RAR[0] and
2054 * RAR[14] */
2055 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2056 E1000_RAR_ENTRIES - 1);
2057 }
2058
2059 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2060 e1000_leave_82542_rst(adapter);
2061
2062 return 0;
2063 }
2064
2065 /**
2066 * e1000_set_multi - Multicast and Promiscuous mode set
2067 * @netdev: network interface device structure
2068 *
2069 * The set_multi entry point is called whenever the multicast address
2070 * list or the network interface flags are updated. This routine is
2071 * responsible for configuring the hardware for proper multicast,
2072 * promiscuous mode, and all-multi behavior.
2073 **/
2074
2075 static void
2076 e1000_set_multi(struct net_device *netdev)
2077 {
2078 struct e1000_adapter *adapter = netdev_priv(netdev);
2079 struct e1000_hw *hw = &adapter->hw;
2080 struct dev_mc_list *mc_ptr;
2081 uint32_t rctl;
2082 uint32_t hash_value;
2083 int i, rar_entries = E1000_RAR_ENTRIES;
2084
2085 /* reserve RAR[14] for LAA over-write work-around */
2086 if (adapter->hw.mac_type == e1000_82571)
2087 rar_entries--;
2088
2089 /* Check for Promiscuous and All Multicast modes */
2090
2091 rctl = E1000_READ_REG(hw, RCTL);
2092
2093 if(netdev->flags & IFF_PROMISC) {
2094 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2095 } else if(netdev->flags & IFF_ALLMULTI) {
2096 rctl |= E1000_RCTL_MPE;
2097 rctl &= ~E1000_RCTL_UPE;
2098 } else {
2099 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2100 }
2101
2102 E1000_WRITE_REG(hw, RCTL, rctl);
2103
2104 /* 82542 2.0 needs to be in reset to write receive address registers */
2105
2106 if(hw->mac_type == e1000_82542_rev2_0)
2107 e1000_enter_82542_rst(adapter);
2108
2109 /* load the first 14 multicast address into the exact filters 1-14
2110 * RAR 0 is used for the station MAC adddress
2111 * if there are not 14 addresses, go ahead and clear the filters
2112 * -- with 82571 controllers only 0-13 entries are filled here
2113 */
2114 mc_ptr = netdev->mc_list;
2115
2116 for(i = 1; i < rar_entries; i++) {
2117 if (mc_ptr) {
2118 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2119 mc_ptr = mc_ptr->next;
2120 } else {
2121 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2122 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2123 }
2124 }
2125
2126 /* clear the old settings from the multicast hash table */
2127
2128 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2129 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2130
2131 /* load any remaining addresses into the hash table */
2132
2133 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2134 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2135 e1000_mta_set(hw, hash_value);
2136 }
2137
2138 if(hw->mac_type == e1000_82542_rev2_0)
2139 e1000_leave_82542_rst(adapter);
2140 }
2141
2142 /* Need to wait a few seconds after link up to get diagnostic information from
2143 * the phy */
2144
2145 static void
2146 e1000_update_phy_info(unsigned long data)
2147 {
2148 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2149 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2150 }
2151
2152 /**
2153 * e1000_82547_tx_fifo_stall - Timer Call-back
2154 * @data: pointer to adapter cast into an unsigned long
2155 **/
2156
2157 static void
2158 e1000_82547_tx_fifo_stall(unsigned long data)
2159 {
2160 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2161 struct net_device *netdev = adapter->netdev;
2162 uint32_t tctl;
2163
2164 if(atomic_read(&adapter->tx_fifo_stall)) {
2165 if((E1000_READ_REG(&adapter->hw, TDT) ==
2166 E1000_READ_REG(&adapter->hw, TDH)) &&
2167 (E1000_READ_REG(&adapter->hw, TDFT) ==
2168 E1000_READ_REG(&adapter->hw, TDFH)) &&
2169 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2170 E1000_READ_REG(&adapter->hw, TDFHS))) {
2171 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2172 E1000_WRITE_REG(&adapter->hw, TCTL,
2173 tctl & ~E1000_TCTL_EN);
2174 E1000_WRITE_REG(&adapter->hw, TDFT,
2175 adapter->tx_head_addr);
2176 E1000_WRITE_REG(&adapter->hw, TDFH,
2177 adapter->tx_head_addr);
2178 E1000_WRITE_REG(&adapter->hw, TDFTS,
2179 adapter->tx_head_addr);
2180 E1000_WRITE_REG(&adapter->hw, TDFHS,
2181 adapter->tx_head_addr);
2182 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2183 E1000_WRITE_FLUSH(&adapter->hw);
2184
2185 adapter->tx_fifo_head = 0;
2186 atomic_set(&adapter->tx_fifo_stall, 0);
2187 netif_wake_queue(netdev);
2188 } else {
2189 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2190 }
2191 }
2192 }
2193
2194 /**
2195 * e1000_watchdog - Timer Call-back
2196 * @data: pointer to adapter cast into an unsigned long
2197 **/
2198 static void
2199 e1000_watchdog(unsigned long data)
2200 {
2201 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2202
2203 /* Do the rest outside of interrupt context */
2204 schedule_work(&adapter->watchdog_task);
2205 }
2206
2207 static void
2208 e1000_watchdog_task(struct e1000_adapter *adapter)
2209 {
2210 struct net_device *netdev = adapter->netdev;
2211 struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
2212 uint32_t link;
2213
2214 e1000_check_for_link(&adapter->hw);
2215 if (adapter->hw.mac_type == e1000_82573) {
2216 e1000_enable_tx_pkt_filtering(&adapter->hw);
2217 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2218 e1000_update_mng_vlan(adapter);
2219 }
2220
2221 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2222 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2223 link = !adapter->hw.serdes_link_down;
2224 else
2225 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2226
2227 if(link) {
2228 if(!netif_carrier_ok(netdev)) {
2229 e1000_get_speed_and_duplex(&adapter->hw,
2230 &adapter->link_speed,
2231 &adapter->link_duplex);
2232
2233 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2234 adapter->link_speed,
2235 adapter->link_duplex == FULL_DUPLEX ?
2236 "Full Duplex" : "Half Duplex");
2237
2238 netif_carrier_on(netdev);
2239 netif_wake_queue(netdev);
2240 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2241 adapter->smartspeed = 0;
2242 }
2243 } else {
2244 if(netif_carrier_ok(netdev)) {
2245 adapter->link_speed = 0;
2246 adapter->link_duplex = 0;
2247 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2248 netif_carrier_off(netdev);
2249 netif_stop_queue(netdev);
2250 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2251 }
2252
2253 e1000_smartspeed(adapter);
2254 }
2255
2256 e1000_update_stats(adapter);
2257
2258 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2259 adapter->tpt_old = adapter->stats.tpt;
2260 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2261 adapter->colc_old = adapter->stats.colc;
2262
2263 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2264 adapter->gorcl_old = adapter->stats.gorcl;
2265 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2266 adapter->gotcl_old = adapter->stats.gotcl;
2267
2268 e1000_update_adaptive(&adapter->hw);
2269
2270 if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
2271 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2272 /* We've lost link, so the controller stops DMA,
2273 * but we've got queued Tx work that's never going
2274 * to get done, so reset controller to flush Tx.
2275 * (Do the reset outside of interrupt context). */
2276 schedule_work(&adapter->tx_timeout_task);
2277 }
2278 }
2279
2280 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2281 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2282 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2283 * asymmetrical Tx or Rx gets ITR=8000; everyone
2284 * else is between 2000-8000. */
2285 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2286 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2287 adapter->gotcl - adapter->gorcl :
2288 adapter->gorcl - adapter->gotcl) / 10000;
2289 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2290 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2291 }
2292
2293 /* Cause software interrupt to ensure rx ring is cleaned */
2294 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2295
2296 /* Force detection of hung controller every watchdog period */
2297 adapter->detect_tx_hung = TRUE;
2298
2299 /* With 82571 controllers, LAA may be overwritten due to controller
2300 * reset from the other port. Set the appropriate LAA in RAR[0] */
2301 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2302 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2303
2304 /* Reset the timer */
2305 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2306 }
2307
2308 #define E1000_TX_FLAGS_CSUM 0x00000001
2309 #define E1000_TX_FLAGS_VLAN 0x00000002
2310 #define E1000_TX_FLAGS_TSO 0x00000004
2311 #define E1000_TX_FLAGS_IPV4 0x00000008
2312 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2313 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2314
2315 static inline int
2316 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2317 struct sk_buff *skb)
2318 {
2319 #ifdef NETIF_F_TSO
2320 struct e1000_context_desc *context_desc;
2321 unsigned int i;
2322 uint32_t cmd_length = 0;
2323 uint16_t ipcse = 0, tucse, mss;
2324 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2325 int err;
2326
2327 if(skb_shinfo(skb)->tso_size) {
2328 if (skb_header_cloned(skb)) {
2329 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2330 if (err)
2331 return err;
2332 }
2333
2334 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2335 mss = skb_shinfo(skb)->tso_size;
2336 if(skb->protocol == ntohs(ETH_P_IP)) {
2337 skb->nh.iph->tot_len = 0;
2338 skb->nh.iph->check = 0;
2339 skb->h.th->check =
2340 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2341 skb->nh.iph->daddr,
2342 0,
2343 IPPROTO_TCP,
2344 0);
2345 cmd_length = E1000_TXD_CMD_IP;
2346 ipcse = skb->h.raw - skb->data - 1;
2347 #ifdef NETIF_F_TSO_IPV6
2348 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2349 skb->nh.ipv6h->payload_len = 0;
2350 skb->h.th->check =
2351 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2352 &skb->nh.ipv6h->daddr,
2353 0,
2354 IPPROTO_TCP,
2355 0);
2356 ipcse = 0;
2357 #endif
2358 }
2359 ipcss = skb->nh.raw - skb->data;
2360 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2361 tucss = skb->h.raw - skb->data;
2362 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2363 tucse = 0;
2364
2365 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2366 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2367
2368 i = tx_ring->next_to_use;
2369 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2370
2371 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2372 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2373 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2374 context_desc->upper_setup.tcp_fields.tucss = tucss;
2375 context_desc->upper_setup.tcp_fields.tucso = tucso;
2376 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2377 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2378 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2379 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2380
2381 if (++i == tx_ring->count) i = 0;
2382 tx_ring->next_to_use = i;
2383
2384 return 1;
2385 }
2386 #endif
2387
2388 return 0;
2389 }
2390
2391 static inline boolean_t
2392 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2393 struct sk_buff *skb)
2394 {
2395 struct e1000_context_desc *context_desc;
2396 unsigned int i;
2397 uint8_t css;
2398
2399 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2400 css = skb->h.raw - skb->data;
2401
2402 i = tx_ring->next_to_use;
2403 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2404
2405 context_desc->upper_setup.tcp_fields.tucss = css;
2406 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2407 context_desc->upper_setup.tcp_fields.tucse = 0;
2408 context_desc->tcp_seg_setup.data = 0;
2409 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2410
2411 if (unlikely(++i == tx_ring->count)) i = 0;
2412 tx_ring->next_to_use = i;
2413
2414 return TRUE;
2415 }
2416
2417 return FALSE;
2418 }
2419
2420 #define E1000_MAX_TXD_PWR 12
2421 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2422
2423 static inline int
2424 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2425 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2426 unsigned int nr_frags, unsigned int mss)
2427 {
2428 struct e1000_buffer *buffer_info;
2429 unsigned int len = skb->len;
2430 unsigned int offset = 0, size, count = 0, i;
2431 unsigned int f;
2432 len -= skb->data_len;
2433
2434 i = tx_ring->next_to_use;
2435
2436 while(len) {
2437 buffer_info = &tx_ring->buffer_info[i];
2438 size = min(len, max_per_txd);
2439 #ifdef NETIF_F_TSO
2440 /* Workaround for premature desc write-backs
2441 * in TSO mode. Append 4-byte sentinel desc */
2442 if(unlikely(mss && !nr_frags && size == len && size > 8))
2443 size -= 4;
2444 #endif
2445 /* work-around for errata 10 and it applies
2446 * to all controllers in PCI-X mode
2447 * The fix is to make sure that the first descriptor of a
2448 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2449 */
2450 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2451 (size > 2015) && count == 0))
2452 size = 2015;
2453
2454 /* Workaround for potential 82544 hang in PCI-X. Avoid
2455 * terminating buffers within evenly-aligned dwords. */
2456 if(unlikely(adapter->pcix_82544 &&
2457 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2458 size > 4))
2459 size -= 4;
2460
2461 buffer_info->length = size;
2462 buffer_info->dma =
2463 pci_map_single(adapter->pdev,
2464 skb->data + offset,
2465 size,
2466 PCI_DMA_TODEVICE);
2467 buffer_info->time_stamp = jiffies;
2468
2469 len -= size;
2470 offset += size;
2471 count++;
2472 if(unlikely(++i == tx_ring->count)) i = 0;
2473 }
2474
2475 for(f = 0; f < nr_frags; f++) {
2476 struct skb_frag_struct *frag;
2477
2478 frag = &skb_shinfo(skb)->frags[f];
2479 len = frag->size;
2480 offset = frag->page_offset;
2481
2482 while(len) {
2483 buffer_info = &tx_ring->buffer_info[i];
2484 size = min(len, max_per_txd);
2485 #ifdef NETIF_F_TSO
2486 /* Workaround for premature desc write-backs
2487 * in TSO mode. Append 4-byte sentinel desc */
2488 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2489 size -= 4;
2490 #endif
2491 /* Workaround for potential 82544 hang in PCI-X.
2492 * Avoid terminating buffers within evenly-aligned
2493 * dwords. */
2494 if(unlikely(adapter->pcix_82544 &&
2495 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2496 size > 4))
2497 size -= 4;
2498
2499 buffer_info->length = size;
2500 buffer_info->dma =
2501 pci_map_page(adapter->pdev,
2502 frag->page,
2503 offset,
2504 size,
2505 PCI_DMA_TODEVICE);
2506 buffer_info->time_stamp = jiffies;
2507
2508 len -= size;
2509 offset += size;
2510 count++;
2511 if(unlikely(++i == tx_ring->count)) i = 0;
2512 }
2513 }
2514
2515 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2516 tx_ring->buffer_info[i].skb = skb;
2517 tx_ring->buffer_info[first].next_to_watch = i;
2518
2519 return count;
2520 }
2521
2522 static inline void
2523 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2524 int tx_flags, int count)
2525 {
2526 struct e1000_tx_desc *tx_desc = NULL;
2527 struct e1000_buffer *buffer_info;
2528 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2529 unsigned int i;
2530
2531 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2532 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2533 E1000_TXD_CMD_TSE;
2534 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2535
2536 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2537 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2538 }
2539
2540 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2541 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2542 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2543 }
2544
2545 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2546 txd_lower |= E1000_TXD_CMD_VLE;
2547 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2548 }
2549
2550 i = tx_ring->next_to_use;
2551
2552 while(count--) {
2553 buffer_info = &tx_ring->buffer_info[i];
2554 tx_desc = E1000_TX_DESC(*tx_ring, i);
2555 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2556 tx_desc->lower.data =
2557 cpu_to_le32(txd_lower | buffer_info->length);
2558 tx_desc->upper.data = cpu_to_le32(txd_upper);
2559 if(unlikely(++i == tx_ring->count)) i = 0;
2560 }
2561
2562 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2563
2564 /* Force memory writes to complete before letting h/w
2565 * know there are new descriptors to fetch. (Only
2566 * applicable for weak-ordered memory model archs,
2567 * such as IA-64). */
2568 wmb();
2569
2570 tx_ring->next_to_use = i;
2571 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2572 }
2573
2574 /**
2575 * 82547 workaround to avoid controller hang in half-duplex environment.
2576 * The workaround is to avoid queuing a large packet that would span
2577 * the internal Tx FIFO ring boundary by notifying the stack to resend
2578 * the packet at a later time. This gives the Tx FIFO an opportunity to
2579 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2580 * to the beginning of the Tx FIFO.
2581 **/
2582
2583 #define E1000_FIFO_HDR 0x10
2584 #define E1000_82547_PAD_LEN 0x3E0
2585
2586 static inline int
2587 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2588 {
2589 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2590 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2591
2592 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2593
2594 if(adapter->link_duplex != HALF_DUPLEX)
2595 goto no_fifo_stall_required;
2596
2597 if(atomic_read(&adapter->tx_fifo_stall))
2598 return 1;
2599
2600 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2601 atomic_set(&adapter->tx_fifo_stall, 1);
2602 return 1;
2603 }
2604
2605 no_fifo_stall_required:
2606 adapter->tx_fifo_head += skb_fifo_len;
2607 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2608 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2609 return 0;
2610 }
2611
2612 #define MINIMUM_DHCP_PACKET_SIZE 282
2613 static inline int
2614 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2615 {
2616 struct e1000_hw *hw = &adapter->hw;
2617 uint16_t length, offset;
2618 if(vlan_tx_tag_present(skb)) {
2619 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2620 ( adapter->hw.mng_cookie.status &
2621 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2622 return 0;
2623 }
2624 if(htons(ETH_P_IP) == skb->protocol) {
2625 const struct iphdr *ip = skb->nh.iph;
2626 if(IPPROTO_UDP == ip->protocol) {
2627 struct udphdr *udp = (struct udphdr *)(skb->h.uh);
2628 if(ntohs(udp->dest) == 67) {
2629 offset = (uint8_t *)udp + 8 - skb->data;
2630 length = skb->len - offset;
2631
2632 return e1000_mng_write_dhcp_info(hw,
2633 (uint8_t *)udp + 8, length);
2634 }
2635 }
2636 } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2637 struct ethhdr *eth = (struct ethhdr *) skb->data;
2638 if((htons(ETH_P_IP) == eth->h_proto)) {
2639 const struct iphdr *ip =
2640 (struct iphdr *)((uint8_t *)skb->data+14);
2641 if(IPPROTO_UDP == ip->protocol) {
2642 struct udphdr *udp =
2643 (struct udphdr *)((uint8_t *)ip +
2644 (ip->ihl << 2));
2645 if(ntohs(udp->dest) == 67) {
2646 offset = (uint8_t *)udp + 8 - skb->data;
2647 length = skb->len - offset;
2648
2649 return e1000_mng_write_dhcp_info(hw,
2650 (uint8_t *)udp + 8,
2651 length);
2652 }
2653 }
2654 }
2655 }
2656 return 0;
2657 }
2658
2659 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2660 static int
2661 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2662 {
2663 struct e1000_adapter *adapter = netdev_priv(netdev);
2664 struct e1000_tx_ring *tx_ring;
2665 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2666 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2667 unsigned int tx_flags = 0;
2668 unsigned int len = skb->len;
2669 unsigned long flags;
2670 unsigned int nr_frags = 0;
2671 unsigned int mss = 0;
2672 int count = 0;
2673 int tso;
2674 unsigned int f;
2675 len -= skb->data_len;
2676
2677 #ifdef CONFIG_E1000_MQ
2678 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2679 #else
2680 tx_ring = adapter->tx_ring;
2681 #endif
2682
2683 if (unlikely(skb->len <= 0)) {
2684 dev_kfree_skb_any(skb);
2685 return NETDEV_TX_OK;
2686 }
2687
2688 #ifdef NETIF_F_TSO
2689 mss = skb_shinfo(skb)->tso_size;
2690 /* The controller does a simple calculation to
2691 * make sure there is enough room in the FIFO before
2692 * initiating the DMA for each buffer. The calc is:
2693 * 4 = ceil(buffer len/mss). To make sure we don't
2694 * overrun the FIFO, adjust the max buffer len if mss
2695 * drops. */
2696 if(mss) {
2697 max_per_txd = min(mss << 2, max_per_txd);
2698 max_txd_pwr = fls(max_per_txd) - 1;
2699 }
2700
2701 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2702 count++;
2703 count++;
2704 #else
2705 if(skb->ip_summed == CHECKSUM_HW)
2706 count++;
2707 #endif
2708 count += TXD_USE_COUNT(len, max_txd_pwr);
2709
2710 if(adapter->pcix_82544)
2711 count++;
2712
2713 /* work-around for errata 10 and it applies to all controllers
2714 * in PCI-X mode, so add one more descriptor to the count
2715 */
2716 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2717 (len > 2015)))
2718 count++;
2719
2720 nr_frags = skb_shinfo(skb)->nr_frags;
2721 for(f = 0; f < nr_frags; f++)
2722 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2723 max_txd_pwr);
2724 if(adapter->pcix_82544)
2725 count += nr_frags;
2726
2727 #ifdef NETIF_F_TSO
2728 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2729 * points to just header, pull a few bytes of payload from
2730 * frags into skb->data */
2731 if (skb_shinfo(skb)->tso_size) {
2732 uint8_t hdr_len;
2733 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2734 if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
2735 (adapter->hw.mac_type == e1000_82571 ||
2736 adapter->hw.mac_type == e1000_82572)) {
2737 unsigned int pull_size;
2738 pull_size = min((unsigned int)4, skb->data_len);
2739 if (!__pskb_pull_tail(skb, pull_size)) {
2740 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2741 dev_kfree_skb_any(skb);
2742 return -EFAULT;
2743 }
2744 }
2745 }
2746 #endif
2747
2748 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2749 e1000_transfer_dhcp_info(adapter, skb);
2750
2751 local_irq_save(flags);
2752 if (!spin_trylock(&tx_ring->tx_lock)) {
2753 /* Collision - tell upper layer to requeue */
2754 local_irq_restore(flags);
2755 return NETDEV_TX_LOCKED;
2756 }
2757
2758 /* need: count + 2 desc gap to keep tail from touching
2759 * head, otherwise try next time */
2760 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2761 netif_stop_queue(netdev);
2762 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2763 return NETDEV_TX_BUSY;
2764 }
2765
2766 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2767 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2768 netif_stop_queue(netdev);
2769 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2770 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2771 return NETDEV_TX_BUSY;
2772 }
2773 }
2774
2775 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2776 tx_flags |= E1000_TX_FLAGS_VLAN;
2777 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2778 }
2779
2780 first = tx_ring->next_to_use;
2781
2782 tso = e1000_tso(adapter, tx_ring, skb);
2783 if (tso < 0) {
2784 dev_kfree_skb_any(skb);
2785 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2786 return NETDEV_TX_OK;
2787 }
2788
2789 if (likely(tso))
2790 tx_flags |= E1000_TX_FLAGS_TSO;
2791 else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2792 tx_flags |= E1000_TX_FLAGS_CSUM;
2793
2794 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2795 * 82571 hardware supports TSO capabilities for IPv6 as well...
2796 * no longer assume, we must. */
2797 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2798 tx_flags |= E1000_TX_FLAGS_IPV4;
2799
2800 e1000_tx_queue(adapter, tx_ring, tx_flags,
2801 e1000_tx_map(adapter, tx_ring, skb, first,
2802 max_per_txd, nr_frags, mss));
2803
2804 netdev->trans_start = jiffies;
2805
2806 /* Make sure there is space in the ring for the next send. */
2807 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2808 netif_stop_queue(netdev);
2809
2810 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2811 return NETDEV_TX_OK;
2812 }
2813
2814 /**
2815 * e1000_tx_timeout - Respond to a Tx Hang
2816 * @netdev: network interface device structure
2817 **/
2818
2819 static void
2820 e1000_tx_timeout(struct net_device *netdev)
2821 {
2822 struct e1000_adapter *adapter = netdev_priv(netdev);
2823
2824 /* Do the reset outside of interrupt context */
2825 schedule_work(&adapter->tx_timeout_task);
2826 }
2827
2828 static void
2829 e1000_tx_timeout_task(struct net_device *netdev)
2830 {
2831 struct e1000_adapter *adapter = netdev_priv(netdev);
2832
2833 e1000_down(adapter);
2834 e1000_up(adapter);
2835 }
2836
2837 /**
2838 * e1000_get_stats - Get System Network Statistics
2839 * @netdev: network interface device structure
2840 *
2841 * Returns the address of the device statistics structure.
2842 * The statistics are actually updated from the timer callback.
2843 **/
2844
2845 static struct net_device_stats *
2846 e1000_get_stats(struct net_device *netdev)
2847 {
2848 struct e1000_adapter *adapter = netdev_priv(netdev);
2849
2850 e1000_update_stats(adapter);
2851 return &adapter->net_stats;
2852 }
2853
2854 /**
2855 * e1000_change_mtu - Change the Maximum Transfer Unit
2856 * @netdev: network interface device structure
2857 * @new_mtu: new value for maximum frame size
2858 *
2859 * Returns 0 on success, negative on failure
2860 **/
2861
2862 static int
2863 e1000_change_mtu(struct net_device *netdev, int new_mtu)
2864 {
2865 struct e1000_adapter *adapter = netdev_priv(netdev);
2866 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2867
2868 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2869 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2870 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
2871 return -EINVAL;
2872 }
2873
2874 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2875 /* might want this to be bigger enum check... */
2876 /* 82571 controllers limit jumbo frame size to 10500 bytes */
2877 if ((adapter->hw.mac_type == e1000_82571 ||
2878 adapter->hw.mac_type == e1000_82572) &&
2879 max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2880 DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
2881 "on 82571 and 82572 controllers.\n");
2882 return -EINVAL;
2883 }
2884
2885 if(adapter->hw.mac_type == e1000_82573 &&
2886 max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2887 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2888 "on 82573\n");
2889 return -EINVAL;
2890 }
2891
2892 if(adapter->hw.mac_type > e1000_82547_rev_2) {
2893 adapter->rx_buffer_len = max_frame;
2894 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
2895 } else {
2896 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
2897 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
2898 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2899 "on 82542\n");
2900 return -EINVAL;
2901
2902 } else {
2903 if(max_frame <= E1000_RXBUFFER_2048) {
2904 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2905 } else if(max_frame <= E1000_RXBUFFER_4096) {
2906 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
2907 } else if(max_frame <= E1000_RXBUFFER_8192) {
2908 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
2909 } else if(max_frame <= E1000_RXBUFFER_16384) {
2910 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
2911 }
2912 }
2913 }
2914
2915 netdev->mtu = new_mtu;
2916
2917 if(netif_running(netdev)) {
2918 e1000_down(adapter);
2919 e1000_up(adapter);
2920 }
2921
2922 adapter->hw.max_frame_size = max_frame;
2923
2924 return 0;
2925 }
2926
2927 /**
2928 * e1000_update_stats - Update the board statistics counters
2929 * @adapter: board private structure
2930 **/
2931
2932 void
2933 e1000_update_stats(struct e1000_adapter *adapter)
2934 {
2935 struct e1000_hw *hw = &adapter->hw;
2936 unsigned long flags;
2937 uint16_t phy_tmp;
2938
2939 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2940
2941 spin_lock_irqsave(&adapter->stats_lock, flags);
2942
2943 /* these counters are modified from e1000_adjust_tbi_stats,
2944 * called from the interrupt context, so they must only
2945 * be written while holding adapter->stats_lock
2946 */
2947
2948 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
2949 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
2950 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
2951 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
2952 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
2953 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
2954 adapter->stats.roc += E1000_READ_REG(hw, ROC);
2955 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
2956 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
2957 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
2958 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
2959 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
2960 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
2961
2962 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
2963 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
2964 adapter->stats.scc += E1000_READ_REG(hw, SCC);
2965 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
2966 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
2967 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
2968 adapter->stats.dc += E1000_READ_REG(hw, DC);
2969 adapter->stats.sec += E1000_READ_REG(hw, SEC);
2970 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
2971 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
2972 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
2973 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
2974 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
2975 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
2976 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
2977 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
2978 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
2979 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
2980 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
2981 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
2982 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
2983 adapter->stats.torl += E1000_READ_REG(hw, TORL);
2984 adapter->stats.torh += E1000_READ_REG(hw, TORH);
2985 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
2986 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
2987 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
2988 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
2989 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
2990 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
2991 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
2992 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
2993 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
2994 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
2995 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
2996
2997 /* used for adaptive IFS */
2998
2999 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3000 adapter->stats.tpt += hw->tx_packet_delta;
3001 hw->collision_delta = E1000_READ_REG(hw, COLC);
3002 adapter->stats.colc += hw->collision_delta;
3003
3004 if(hw->mac_type >= e1000_82543) {
3005 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3006 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3007 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3008 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3009 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3010 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3011 }
3012 if(hw->mac_type > e1000_82547_rev_2) {
3013 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3014 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3015 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3016 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3017 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3018 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3019 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3020 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3021 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3022 }
3023
3024 /* Fill out the OS statistics structure */
3025
3026 adapter->net_stats.rx_packets = adapter->stats.gprc;
3027 adapter->net_stats.tx_packets = adapter->stats.gptc;
3028 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3029 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3030 adapter->net_stats.multicast = adapter->stats.mprc;
3031 adapter->net_stats.collisions = adapter->stats.colc;
3032
3033 /* Rx Errors */
3034
3035 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3036 adapter->stats.crcerrs + adapter->stats.algnerrc +
3037 adapter->stats.rlec + adapter->stats.mpc +
3038 adapter->stats.cexterr;
3039 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3040 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3041 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3042 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
3043 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3044
3045 /* Tx Errors */
3046
3047 adapter->net_stats.tx_errors = adapter->stats.ecol +
3048 adapter->stats.latecol;
3049 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3050 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3051 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3052
3053 /* Tx Dropped needs to be maintained elsewhere */
3054
3055 /* Phy Stats */
3056
3057 if(hw->media_type == e1000_media_type_copper) {
3058 if((adapter->link_speed == SPEED_1000) &&
3059 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3060 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3061 adapter->phy_stats.idle_errors += phy_tmp;
3062 }
3063
3064 if((hw->mac_type <= e1000_82546) &&
3065 (hw->phy_type == e1000_phy_m88) &&
3066 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3067 adapter->phy_stats.receive_errors += phy_tmp;
3068 }
3069
3070 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3071 }
3072
3073 #ifdef CONFIG_E1000_MQ
3074 void
3075 e1000_rx_schedule(void *data)
3076 {
3077 struct net_device *poll_dev, *netdev = data;
3078 struct e1000_adapter *adapter = netdev->priv;
3079 int this_cpu = get_cpu();
3080
3081 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3082 if (poll_dev == NULL) {
3083 put_cpu();
3084 return;
3085 }
3086
3087 if (likely(netif_rx_schedule_prep(poll_dev)))
3088 __netif_rx_schedule(poll_dev);
3089 else
3090 e1000_irq_enable(adapter);
3091
3092 put_cpu();
3093 }
3094 #endif
3095
3096 /**
3097 * e1000_intr - Interrupt Handler
3098 * @irq: interrupt number
3099 * @data: pointer to a network interface device structure
3100 * @pt_regs: CPU registers structure
3101 **/
3102
3103 static irqreturn_t
3104 e1000_intr(int irq, void *data, struct pt_regs *regs)
3105 {
3106 struct net_device *netdev = data;
3107 struct e1000_adapter *adapter = netdev_priv(netdev);
3108 struct e1000_hw *hw = &adapter->hw;
3109 uint32_t icr = E1000_READ_REG(hw, ICR);
3110 #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
3111 int i;
3112 #endif
3113
3114 if(unlikely(!icr))
3115 return IRQ_NONE; /* Not our interrupt */
3116
3117 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3118 hw->get_link_status = 1;
3119 mod_timer(&adapter->watchdog_timer, jiffies);
3120 }
3121
3122 #ifdef CONFIG_E1000_NAPI
3123 atomic_inc(&adapter->irq_sem);
3124 E1000_WRITE_REG(hw, IMC, ~0);
3125 E1000_WRITE_FLUSH(hw);
3126 #ifdef CONFIG_E1000_MQ
3127 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3128 cpu_set(adapter->cpu_for_queue[0],
3129 adapter->rx_sched_call_data.cpumask);
3130 for (i = 1; i < adapter->num_queues; i++) {
3131 cpu_set(adapter->cpu_for_queue[i],
3132 adapter->rx_sched_call_data.cpumask);
3133 atomic_inc(&adapter->irq_sem);
3134 }
3135 atomic_set(&adapter->rx_sched_call_data.count, i);
3136 smp_call_async_mask(&adapter->rx_sched_call_data);
3137 } else {
3138 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3139 }
3140 #else /* if !CONFIG_E1000_MQ */
3141 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3142 __netif_rx_schedule(&adapter->polling_netdev[0]);
3143 else
3144 e1000_irq_enable(adapter);
3145 #endif /* CONFIG_E1000_MQ */
3146
3147 #else /* if !CONFIG_E1000_NAPI */
3148 /* Writing IMC and IMS is needed for 82547.
3149 Due to Hub Link bus being occupied, an interrupt
3150 de-assertion message is not able to be sent.
3151 When an interrupt assertion message is generated later,
3152 two messages are re-ordered and sent out.
3153 That causes APIC to think 82547 is in de-assertion
3154 state, while 82547 is in assertion state, resulting
3155 in dead lock. Writing IMC forces 82547 into
3156 de-assertion state.
3157 */
3158 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3159 atomic_inc(&adapter->irq_sem);
3160 E1000_WRITE_REG(hw, IMC, ~0);
3161 }
3162
3163 for(i = 0; i < E1000_MAX_INTR; i++)
3164 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3165 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3166 break;
3167
3168 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3169 e1000_irq_enable(adapter);
3170
3171 #endif /* CONFIG_E1000_NAPI */
3172
3173 return IRQ_HANDLED;
3174 }
3175
3176 #ifdef CONFIG_E1000_NAPI
3177 /**
3178 * e1000_clean - NAPI Rx polling callback
3179 * @adapter: board private structure
3180 **/
3181
3182 static int
3183 e1000_clean(struct net_device *poll_dev, int *budget)
3184 {
3185 struct e1000_adapter *adapter;
3186 int work_to_do = min(*budget, poll_dev->quota);
3187 int tx_cleaned, i = 0, work_done = 0;
3188
3189 /* Must NOT use netdev_priv macro here. */
3190 adapter = poll_dev->priv;
3191
3192 /* Keep link state information with original netdev */
3193 if (!netif_carrier_ok(adapter->netdev))
3194 goto quit_polling;
3195
3196 while (poll_dev != &adapter->polling_netdev[i]) {
3197 i++;
3198 if (unlikely(i == adapter->num_queues))
3199 BUG();
3200 }
3201
3202 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3203 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3204 &work_done, work_to_do);
3205
3206 *budget -= work_done;
3207 poll_dev->quota -= work_done;
3208
3209 /* If no Tx and not enough Rx work done, exit the polling mode */
3210 if((!tx_cleaned && (work_done == 0)) ||
3211 !netif_running(adapter->netdev)) {
3212 quit_polling:
3213 netif_rx_complete(poll_dev);
3214 e1000_irq_enable(adapter);
3215 return 0;
3216 }
3217
3218 return 1;
3219 }
3220
3221 #endif
3222 /**
3223 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3224 * @adapter: board private structure
3225 **/
3226
3227 static boolean_t
3228 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3229 struct e1000_tx_ring *tx_ring)
3230 {
3231 struct net_device *netdev = adapter->netdev;
3232 struct e1000_tx_desc *tx_desc, *eop_desc;
3233 struct e1000_buffer *buffer_info;
3234 unsigned int i, eop;
3235 boolean_t cleaned = FALSE;
3236
3237 i = tx_ring->next_to_clean;
3238 eop = tx_ring->buffer_info[i].next_to_watch;
3239 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3240
3241 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3242 /* Premature writeback of Tx descriptors clear (free buffers
3243 * and unmap pci_mapping) previous_buffer_info */
3244 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
3245 e1000_unmap_and_free_tx_resource(adapter,
3246 &tx_ring->previous_buffer_info);
3247 }
3248
3249 for(cleaned = FALSE; !cleaned; ) {
3250 tx_desc = E1000_TX_DESC(*tx_ring, i);
3251 buffer_info = &tx_ring->buffer_info[i];
3252 cleaned = (i == eop);
3253
3254 #ifdef NETIF_F_TSO
3255 if (!(netdev->features & NETIF_F_TSO)) {
3256 #endif
3257 e1000_unmap_and_free_tx_resource(adapter,
3258 buffer_info);
3259 #ifdef NETIF_F_TSO
3260 } else {
3261 if (cleaned) {
3262 memcpy(&tx_ring->previous_buffer_info,
3263 buffer_info,
3264 sizeof(struct e1000_buffer));
3265 memset(buffer_info, 0,
3266 sizeof(struct e1000_buffer));
3267 } else {
3268 e1000_unmap_and_free_tx_resource(
3269 adapter, buffer_info);
3270 }
3271 }
3272 #endif
3273
3274 tx_desc->buffer_addr = 0;
3275 tx_desc->lower.data = 0;
3276 tx_desc->upper.data = 0;
3277
3278 if(unlikely(++i == tx_ring->count)) i = 0;
3279 }
3280
3281 tx_ring->pkt++;
3282
3283 eop = tx_ring->buffer_info[i].next_to_watch;
3284 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3285 }
3286
3287 tx_ring->next_to_clean = i;
3288
3289 spin_lock(&tx_ring->tx_lock);
3290
3291 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3292 netif_carrier_ok(netdev)))
3293 netif_wake_queue(netdev);
3294
3295 spin_unlock(&tx_ring->tx_lock);
3296
3297 if (adapter->detect_tx_hung) {
3298 /* Detect a transmit hang in hardware, this serializes the
3299 * check with the clearing of time_stamp and movement of i */
3300 adapter->detect_tx_hung = FALSE;
3301 if (tx_ring->buffer_info[i].dma &&
3302 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
3303 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3304 E1000_STATUS_TXOFF)) {
3305
3306 /* detected Tx unit hang */
3307 i = tx_ring->next_to_clean;
3308 eop = tx_ring->buffer_info[i].next_to_watch;
3309 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3310 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3311 " TDH <%x>\n"
3312 " TDT <%x>\n"
3313 " next_to_use <%x>\n"
3314 " next_to_clean <%x>\n"
3315 "buffer_info[next_to_clean]\n"
3316 " dma <%llx>\n"
3317 " time_stamp <%lx>\n"
3318 " next_to_watch <%x>\n"
3319 " jiffies <%lx>\n"
3320 " next_to_watch.status <%x>\n",
3321 readl(adapter->hw.hw_addr + tx_ring->tdh),
3322 readl(adapter->hw.hw_addr + tx_ring->tdt),
3323 tx_ring->next_to_use,
3324 i,
3325 (unsigned long long)tx_ring->buffer_info[i].dma,
3326 tx_ring->buffer_info[i].time_stamp,
3327 eop,
3328 jiffies,
3329 eop_desc->upper.fields.status);
3330 netif_stop_queue(netdev);
3331 }
3332 }
3333 #ifdef NETIF_F_TSO
3334 if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3335 time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ)))
3336 e1000_unmap_and_free_tx_resource(
3337 adapter, &tx_ring->previous_buffer_info);
3338 #endif
3339 return cleaned;
3340 }
3341
3342 /**
3343 * e1000_rx_checksum - Receive Checksum Offload for 82543
3344 * @adapter: board private structure
3345 * @status_err: receive descriptor status and error fields
3346 * @csum: receive descriptor csum field
3347 * @sk_buff: socket buffer with received data
3348 **/
3349
3350 static inline void
3351 e1000_rx_checksum(struct e1000_adapter *adapter,
3352 uint32_t status_err, uint32_t csum,
3353 struct sk_buff *skb)
3354 {
3355 uint16_t status = (uint16_t)status_err;
3356 uint8_t errors = (uint8_t)(status_err >> 24);
3357 skb->ip_summed = CHECKSUM_NONE;
3358
3359 /* 82543 or newer only */
3360 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3361 /* Ignore Checksum bit is set */
3362 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3363 /* TCP/UDP checksum error bit is set */
3364 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3365 /* let the stack verify checksum errors */
3366 adapter->hw_csum_err++;
3367 return;
3368 }
3369 /* TCP/UDP Checksum has not been calculated */
3370 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3371 if(!(status & E1000_RXD_STAT_TCPCS))
3372 return;
3373 } else {
3374 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3375 return;
3376 }
3377 /* It must be a TCP or UDP packet with a valid checksum */
3378 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3379 /* TCP checksum is good */
3380 skb->ip_summed = CHECKSUM_UNNECESSARY;
3381 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3382 /* IP fragment with UDP payload */
3383 /* Hardware complements the payload checksum, so we undo it
3384 * and then put the value in host order for further stack use.
3385 */
3386 csum = ntohl(csum ^ 0xFFFF);
3387 skb->csum = csum;
3388 skb->ip_summed = CHECKSUM_HW;
3389 }
3390 adapter->hw_csum_good++;
3391 }
3392
3393 /**
3394 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3395 * @adapter: board private structure
3396 **/
3397
3398 static boolean_t
3399 #ifdef CONFIG_E1000_NAPI
3400 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3401 struct e1000_rx_ring *rx_ring,
3402 int *work_done, int work_to_do)
3403 #else
3404 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3405 struct e1000_rx_ring *rx_ring)
3406 #endif
3407 {
3408 struct net_device *netdev = adapter->netdev;
3409 struct pci_dev *pdev = adapter->pdev;
3410 struct e1000_rx_desc *rx_desc;
3411 struct e1000_buffer *buffer_info;
3412 struct sk_buff *skb;
3413 unsigned long flags;
3414 uint32_t length;
3415 uint8_t last_byte;
3416 unsigned int i;
3417 boolean_t cleaned = FALSE;
3418
3419 i = rx_ring->next_to_clean;
3420 rx_desc = E1000_RX_DESC(*rx_ring, i);
3421
3422 while(rx_desc->status & E1000_RXD_STAT_DD) {
3423 buffer_info = &rx_ring->buffer_info[i];
3424 #ifdef CONFIG_E1000_NAPI
3425 if(*work_done >= work_to_do)
3426 break;
3427 (*work_done)++;
3428 #endif
3429 cleaned = TRUE;
3430
3431 pci_unmap_single(pdev,
3432 buffer_info->dma,
3433 buffer_info->length,
3434 PCI_DMA_FROMDEVICE);
3435
3436 skb = buffer_info->skb;
3437 length = le16_to_cpu(rx_desc->length);
3438
3439 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3440 /* All receives must fit into a single buffer */
3441 E1000_DBG("%s: Receive packet consumed multiple"
3442 " buffers\n", netdev->name);
3443 dev_kfree_skb_irq(skb);
3444 goto next_desc;
3445 }
3446
3447 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3448 last_byte = *(skb->data + length - 1);
3449 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3450 rx_desc->errors, length, last_byte)) {
3451 spin_lock_irqsave(&adapter->stats_lock, flags);
3452 e1000_tbi_adjust_stats(&adapter->hw,
3453 &adapter->stats,
3454 length, skb->data);
3455 spin_unlock_irqrestore(&adapter->stats_lock,
3456 flags);
3457 length--;
3458 } else {
3459 dev_kfree_skb_irq(skb);
3460 goto next_desc;
3461 }
3462 }
3463
3464 /* Good Receive */
3465 skb_put(skb, length - ETHERNET_FCS_SIZE);
3466
3467 /* Receive Checksum Offload */
3468 e1000_rx_checksum(adapter,
3469 (uint32_t)(rx_desc->status) |
3470 ((uint32_t)(rx_desc->errors) << 24),
3471 rx_desc->csum, skb);
3472 skb->protocol = eth_type_trans(skb, netdev);
3473 #ifdef CONFIG_E1000_NAPI
3474 if(unlikely(adapter->vlgrp &&
3475 (rx_desc->status & E1000_RXD_STAT_VP))) {
3476 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3477 le16_to_cpu(rx_desc->special) &
3478 E1000_RXD_SPC_VLAN_MASK);
3479 } else {
3480 netif_receive_skb(skb);
3481 }
3482 #else /* CONFIG_E1000_NAPI */
3483 if(unlikely(adapter->vlgrp &&
3484 (rx_desc->status & E1000_RXD_STAT_VP))) {
3485 vlan_hwaccel_rx(skb, adapter->vlgrp,
3486 le16_to_cpu(rx_desc->special) &
3487 E1000_RXD_SPC_VLAN_MASK);
3488 } else {
3489 netif_rx(skb);
3490 }
3491 #endif /* CONFIG_E1000_NAPI */
3492 netdev->last_rx = jiffies;
3493 rx_ring->pkt++;
3494
3495 next_desc:
3496 rx_desc->status = 0;
3497 buffer_info->skb = NULL;
3498 if(unlikely(++i == rx_ring->count)) i = 0;
3499
3500 rx_desc = E1000_RX_DESC(*rx_ring, i);
3501 }
3502 rx_ring->next_to_clean = i;
3503 adapter->alloc_rx_buf(adapter, rx_ring);
3504
3505 return cleaned;
3506 }
3507
3508 /**
3509 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3510 * @adapter: board private structure
3511 **/
3512
3513 static boolean_t
3514 #ifdef CONFIG_E1000_NAPI
3515 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3516 struct e1000_rx_ring *rx_ring,
3517 int *work_done, int work_to_do)
3518 #else
3519 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3520 struct e1000_rx_ring *rx_ring)
3521 #endif
3522 {
3523 union e1000_rx_desc_packet_split *rx_desc;
3524 struct net_device *netdev = adapter->netdev;
3525 struct pci_dev *pdev = adapter->pdev;
3526 struct e1000_buffer *buffer_info;
3527 struct e1000_ps_page *ps_page;
3528 struct e1000_ps_page_dma *ps_page_dma;
3529 struct sk_buff *skb;
3530 unsigned int i, j;
3531 uint32_t length, staterr;
3532 boolean_t cleaned = FALSE;
3533
3534 i = rx_ring->next_to_clean;
3535 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3536 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3537
3538 while(staterr & E1000_RXD_STAT_DD) {
3539 buffer_info = &rx_ring->buffer_info[i];
3540 ps_page = &rx_ring->ps_page[i];
3541 ps_page_dma = &rx_ring->ps_page_dma[i];
3542 #ifdef CONFIG_E1000_NAPI
3543 if(unlikely(*work_done >= work_to_do))
3544 break;
3545 (*work_done)++;
3546 #endif
3547 cleaned = TRUE;
3548 pci_unmap_single(pdev, buffer_info->dma,
3549 buffer_info->length,
3550 PCI_DMA_FROMDEVICE);
3551
3552 skb = buffer_info->skb;
3553
3554 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3555 E1000_DBG("%s: Packet Split buffers didn't pick up"
3556 " the full packet\n", netdev->name);
3557 dev_kfree_skb_irq(skb);
3558 goto next_desc;
3559 }
3560
3561 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3562 dev_kfree_skb_irq(skb);
3563 goto next_desc;
3564 }
3565
3566 length = le16_to_cpu(rx_desc->wb.middle.length0);
3567
3568 if(unlikely(!length)) {
3569 E1000_DBG("%s: Last part of the packet spanning"
3570 " multiple descriptors\n", netdev->name);
3571 dev_kfree_skb_irq(skb);
3572 goto next_desc;
3573 }
3574
3575 /* Good Receive */
3576 skb_put(skb, length);
3577
3578 for(j = 0; j < adapter->rx_ps_pages; j++) {
3579 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3580 break;
3581
3582 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3583 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3584 ps_page_dma->ps_page_dma[j] = 0;
3585 skb_shinfo(skb)->frags[j].page =
3586 ps_page->ps_page[j];
3587 ps_page->ps_page[j] = NULL;
3588 skb_shinfo(skb)->frags[j].page_offset = 0;
3589 skb_shinfo(skb)->frags[j].size = length;
3590 skb_shinfo(skb)->nr_frags++;
3591 skb->len += length;
3592 skb->data_len += length;
3593 }
3594
3595 e1000_rx_checksum(adapter, staterr,
3596 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3597 skb->protocol = eth_type_trans(skb, netdev);
3598
3599 if(likely(rx_desc->wb.upper.header_status &
3600 E1000_RXDPS_HDRSTAT_HDRSP)) {
3601 adapter->rx_hdr_split++;
3602 #ifdef HAVE_RX_ZERO_COPY
3603 skb_shinfo(skb)->zero_copy = TRUE;
3604 #endif
3605 }
3606 #ifdef CONFIG_E1000_NAPI
3607 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3608 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3609 le16_to_cpu(rx_desc->wb.middle.vlan) &
3610 E1000_RXD_SPC_VLAN_MASK);
3611 } else {
3612 netif_receive_skb(skb);
3613 }
3614 #else /* CONFIG_E1000_NAPI */
3615 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3616 vlan_hwaccel_rx(skb, adapter->vlgrp,
3617 le16_to_cpu(rx_desc->wb.middle.vlan) &
3618 E1000_RXD_SPC_VLAN_MASK);
3619 } else {
3620 netif_rx(skb);
3621 }
3622 #endif /* CONFIG_E1000_NAPI */
3623 netdev->last_rx = jiffies;
3624 rx_ring->pkt++;
3625
3626 next_desc:
3627 rx_desc->wb.middle.status_error &= ~0xFF;
3628 buffer_info->skb = NULL;
3629 if(unlikely(++i == rx_ring->count)) i = 0;
3630
3631 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3632 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3633 }
3634 rx_ring->next_to_clean = i;
3635 adapter->alloc_rx_buf(adapter, rx_ring);
3636
3637 return cleaned;
3638 }
3639
3640 /**
3641 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3642 * @adapter: address of board private structure
3643 **/
3644
3645 static void
3646 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3647 struct e1000_rx_ring *rx_ring)
3648 {
3649 struct net_device *netdev = adapter->netdev;
3650 struct pci_dev *pdev = adapter->pdev;
3651 struct e1000_rx_desc *rx_desc;
3652 struct e1000_buffer *buffer_info;
3653 struct sk_buff *skb;
3654 unsigned int i;
3655 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3656
3657 i = rx_ring->next_to_use;
3658 buffer_info = &rx_ring->buffer_info[i];
3659
3660 while(!buffer_info->skb) {
3661 skb = dev_alloc_skb(bufsz);
3662
3663 if(unlikely(!skb)) {
3664 /* Better luck next round */
3665 break;
3666 }
3667
3668 /* Fix for errata 23, can't cross 64kB boundary */
3669 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3670 struct sk_buff *oldskb = skb;
3671 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3672 "at %p\n", bufsz, skb->data);
3673 /* Try again, without freeing the previous */
3674 skb = dev_alloc_skb(bufsz);
3675 /* Failed allocation, critical failure */
3676 if (!skb) {
3677 dev_kfree_skb(oldskb);
3678 break;
3679 }
3680
3681 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3682 /* give up */
3683 dev_kfree_skb(skb);
3684 dev_kfree_skb(oldskb);
3685 break; /* while !buffer_info->skb */
3686 } else {
3687 /* Use new allocation */
3688 dev_kfree_skb(oldskb);
3689 }
3690 }
3691 /* Make buffer alignment 2 beyond a 16 byte boundary
3692 * this will result in a 16 byte aligned IP header after
3693 * the 14 byte MAC header is removed
3694 */
3695 skb_reserve(skb, NET_IP_ALIGN);
3696
3697 skb->dev = netdev;
3698
3699 buffer_info->skb = skb;
3700 buffer_info->length = adapter->rx_buffer_len;
3701 buffer_info->dma = pci_map_single(pdev,
3702 skb->data,
3703 adapter->rx_buffer_len,
3704 PCI_DMA_FROMDEVICE);
3705
3706 /* Fix for errata 23, can't cross 64kB boundary */
3707 if (!e1000_check_64k_bound(adapter,
3708 (void *)(unsigned long)buffer_info->dma,
3709 adapter->rx_buffer_len)) {
3710 DPRINTK(RX_ERR, ERR,
3711 "dma align check failed: %u bytes at %p\n",
3712 adapter->rx_buffer_len,
3713 (void *)(unsigned long)buffer_info->dma);
3714 dev_kfree_skb(skb);
3715 buffer_info->skb = NULL;
3716
3717 pci_unmap_single(pdev, buffer_info->dma,
3718 adapter->rx_buffer_len,
3719 PCI_DMA_FROMDEVICE);
3720
3721 break; /* while !buffer_info->skb */
3722 }
3723 rx_desc = E1000_RX_DESC(*rx_ring, i);
3724 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3725
3726 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3727 /* Force memory writes to complete before letting h/w
3728 * know there are new descriptors to fetch. (Only
3729 * applicable for weak-ordered memory model archs,
3730 * such as IA-64). */
3731 wmb();
3732 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3733 }
3734
3735 if(unlikely(++i == rx_ring->count)) i = 0;
3736 buffer_info = &rx_ring->buffer_info[i];
3737 }
3738
3739 rx_ring->next_to_use = i;
3740 }
3741
3742 /**
3743 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3744 * @adapter: address of board private structure
3745 **/
3746
3747 static void
3748 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3749 struct e1000_rx_ring *rx_ring)
3750 {
3751 struct net_device *netdev = adapter->netdev;
3752 struct pci_dev *pdev = adapter->pdev;
3753 union e1000_rx_desc_packet_split *rx_desc;
3754 struct e1000_buffer *buffer_info;
3755 struct e1000_ps_page *ps_page;
3756 struct e1000_ps_page_dma *ps_page_dma;
3757 struct sk_buff *skb;
3758 unsigned int i, j;
3759
3760 i = rx_ring->next_to_use;
3761 buffer_info = &rx_ring->buffer_info[i];
3762 ps_page = &rx_ring->ps_page[i];
3763 ps_page_dma = &rx_ring->ps_page_dma[i];
3764
3765 while(!buffer_info->skb) {
3766 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3767
3768 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3769 if (j < adapter->rx_ps_pages) {
3770 if (likely(!ps_page->ps_page[j])) {
3771 ps_page->ps_page[j] =
3772 alloc_page(GFP_ATOMIC);
3773 if (unlikely(!ps_page->ps_page[j]))
3774 goto no_buffers;
3775 ps_page_dma->ps_page_dma[j] =
3776 pci_map_page(pdev,
3777 ps_page->ps_page[j],
3778 0, PAGE_SIZE,
3779 PCI_DMA_FROMDEVICE);
3780 }
3781 /* Refresh the desc even if buffer_addrs didn't
3782 * change because each write-back erases
3783 * this info.
3784 */
3785 rx_desc->read.buffer_addr[j+1] =
3786 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3787 } else
3788 rx_desc->read.buffer_addr[j+1] = ~0;
3789 }
3790
3791 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3792
3793 if(unlikely(!skb))
3794 break;
3795
3796 /* Make buffer alignment 2 beyond a 16 byte boundary
3797 * this will result in a 16 byte aligned IP header after
3798 * the 14 byte MAC header is removed
3799 */
3800 skb_reserve(skb, NET_IP_ALIGN);
3801
3802 skb->dev = netdev;
3803
3804 buffer_info->skb = skb;
3805 buffer_info->length = adapter->rx_ps_bsize0;
3806 buffer_info->dma = pci_map_single(pdev, skb->data,
3807 adapter->rx_ps_bsize0,
3808 PCI_DMA_FROMDEVICE);
3809
3810 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3811
3812 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3813 /* Force memory writes to complete before letting h/w
3814 * know there are new descriptors to fetch. (Only
3815 * applicable for weak-ordered memory model archs,
3816 * such as IA-64). */
3817 wmb();
3818 /* Hardware increments by 16 bytes, but packet split
3819 * descriptors are 32 bytes...so we increment tail
3820 * twice as much.
3821 */
3822 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3823 }
3824
3825 if(unlikely(++i == rx_ring->count)) i = 0;
3826 buffer_info = &rx_ring->buffer_info[i];
3827 ps_page = &rx_ring->ps_page[i];
3828 ps_page_dma = &rx_ring->ps_page_dma[i];
3829 }
3830
3831 no_buffers:
3832 rx_ring->next_to_use = i;
3833 }
3834
3835 /**
3836 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3837 * @adapter:
3838 **/
3839
3840 static void
3841 e1000_smartspeed(struct e1000_adapter *adapter)
3842 {
3843 uint16_t phy_status;
3844 uint16_t phy_ctrl;
3845
3846 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3847 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3848 return;
3849
3850 if(adapter->smartspeed == 0) {
3851 /* If Master/Slave config fault is asserted twice,
3852 * we assume back-to-back */
3853 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3854 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3855 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3856 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3857 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3858 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3859 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3860 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3861 phy_ctrl);
3862 adapter->smartspeed++;
3863 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3864 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3865 &phy_ctrl)) {
3866 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3867 MII_CR_RESTART_AUTO_NEG);
3868 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3869 phy_ctrl);
3870 }
3871 }
3872 return;
3873 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3874 /* If still no link, perhaps using 2/3 pair cable */
3875 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3876 phy_ctrl |= CR_1000T_MS_ENABLE;
3877 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3878 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3879 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3880 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3881 MII_CR_RESTART_AUTO_NEG);
3882 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3883 }
3884 }
3885 /* Restart process after E1000_SMARTSPEED_MAX iterations */
3886 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3887 adapter->smartspeed = 0;
3888 }
3889
3890 /**
3891 * e1000_ioctl -
3892 * @netdev:
3893 * @ifreq:
3894 * @cmd:
3895 **/
3896
3897 static int
3898 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3899 {
3900 switch (cmd) {
3901 case SIOCGMIIPHY:
3902 case SIOCGMIIREG:
3903 case SIOCSMIIREG:
3904 return e1000_mii_ioctl(netdev, ifr, cmd);
3905 default:
3906 return -EOPNOTSUPP;
3907 }
3908 }
3909
3910 /**
3911 * e1000_mii_ioctl -
3912 * @netdev:
3913 * @ifreq:
3914 * @cmd:
3915 **/
3916
3917 static int
3918 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3919 {
3920 struct e1000_adapter *adapter = netdev_priv(netdev);
3921 struct mii_ioctl_data *data = if_mii(ifr);
3922 int retval;
3923 uint16_t mii_reg;
3924 uint16_t spddplx;
3925 unsigned long flags;
3926
3927 if(adapter->hw.media_type != e1000_media_type_copper)
3928 return -EOPNOTSUPP;
3929
3930 switch (cmd) {
3931 case SIOCGMIIPHY:
3932 data->phy_id = adapter->hw.phy_addr;
3933 break;
3934 case SIOCGMIIREG:
3935 if(!capable(CAP_NET_ADMIN))
3936 return -EPERM;
3937 spin_lock_irqsave(&adapter->stats_lock, flags);
3938 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
3939 &data->val_out)) {
3940 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3941 return -EIO;
3942 }
3943 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3944 break;
3945 case SIOCSMIIREG:
3946 if(!capable(CAP_NET_ADMIN))
3947 return -EPERM;
3948 if(data->reg_num & ~(0x1F))
3949 return -EFAULT;
3950 mii_reg = data->val_in;
3951 spin_lock_irqsave(&adapter->stats_lock, flags);
3952 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
3953 mii_reg)) {
3954 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3955 return -EIO;
3956 }
3957 if(adapter->hw.phy_type == e1000_phy_m88) {
3958 switch (data->reg_num) {
3959 case PHY_CTRL:
3960 if(mii_reg & MII_CR_POWER_DOWN)
3961 break;
3962 if(mii_reg & MII_CR_AUTO_NEG_EN) {
3963 adapter->hw.autoneg = 1;
3964 adapter->hw.autoneg_advertised = 0x2F;
3965 } else {
3966 if (mii_reg & 0x40)
3967 spddplx = SPEED_1000;
3968 else if (mii_reg & 0x2000)
3969 spddplx = SPEED_100;
3970 else
3971 spddplx = SPEED_10;
3972 spddplx += (mii_reg & 0x100)
3973 ? FULL_DUPLEX :
3974 HALF_DUPLEX;
3975 retval = e1000_set_spd_dplx(adapter,
3976 spddplx);
3977 if(retval) {
3978 spin_unlock_irqrestore(
3979 &adapter->stats_lock,
3980 flags);
3981 return retval;
3982 }
3983 }
3984 if(netif_running(adapter->netdev)) {
3985 e1000_down(adapter);
3986 e1000_up(adapter);
3987 } else
3988 e1000_reset(adapter);
3989 break;
3990 case M88E1000_PHY_SPEC_CTRL:
3991 case M88E1000_EXT_PHY_SPEC_CTRL:
3992 if(e1000_phy_reset(&adapter->hw)) {
3993 spin_unlock_irqrestore(
3994 &adapter->stats_lock, flags);
3995 return -EIO;
3996 }
3997 break;
3998 }
3999 } else {
4000 switch (data->reg_num) {
4001 case PHY_CTRL:
4002 if(mii_reg & MII_CR_POWER_DOWN)
4003 break;
4004 if(netif_running(adapter->netdev)) {
4005 e1000_down(adapter);
4006 e1000_up(adapter);
4007 } else
4008 e1000_reset(adapter);
4009 break;
4010 }
4011 }
4012 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4013 break;
4014 default:
4015 return -EOPNOTSUPP;
4016 }
4017 return E1000_SUCCESS;
4018 }
4019
4020 void
4021 e1000_pci_set_mwi(struct e1000_hw *hw)
4022 {
4023 struct e1000_adapter *adapter = hw->back;
4024 int ret_val = pci_set_mwi(adapter->pdev);
4025
4026 if(ret_val)
4027 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4028 }
4029
4030 void
4031 e1000_pci_clear_mwi(struct e1000_hw *hw)
4032 {
4033 struct e1000_adapter *adapter = hw->back;
4034
4035 pci_clear_mwi(adapter->pdev);
4036 }
4037
4038 void
4039 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4040 {
4041 struct e1000_adapter *adapter = hw->back;
4042
4043 pci_read_config_word(adapter->pdev, reg, value);
4044 }
4045
4046 void
4047 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4048 {
4049 struct e1000_adapter *adapter = hw->back;
4050
4051 pci_write_config_word(adapter->pdev, reg, *value);
4052 }
4053
4054 uint32_t
4055 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4056 {
4057 return inl(port);
4058 }
4059
4060 void
4061 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4062 {
4063 outl(value, port);
4064 }
4065
4066 static void
4067 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4068 {
4069 struct e1000_adapter *adapter = netdev_priv(netdev);
4070 uint32_t ctrl, rctl;
4071
4072 e1000_irq_disable(adapter);
4073 adapter->vlgrp = grp;
4074
4075 if(grp) {
4076 /* enable VLAN tag insert/strip */
4077 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4078 ctrl |= E1000_CTRL_VME;
4079 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4080
4081 /* enable VLAN receive filtering */
4082 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4083 rctl |= E1000_RCTL_VFE;
4084 rctl &= ~E1000_RCTL_CFIEN;
4085 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4086 e1000_update_mng_vlan(adapter);
4087 } else {
4088 /* disable VLAN tag insert/strip */
4089 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4090 ctrl &= ~E1000_CTRL_VME;
4091 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4092
4093 /* disable VLAN filtering */
4094 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4095 rctl &= ~E1000_RCTL_VFE;
4096 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4097 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4098 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4099 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4100 }
4101 }
4102
4103 e1000_irq_enable(adapter);
4104 }
4105
4106 static void
4107 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4108 {
4109 struct e1000_adapter *adapter = netdev_priv(netdev);
4110 uint32_t vfta, index;
4111 if((adapter->hw.mng_cookie.status &
4112 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4113 (vid == adapter->mng_vlan_id))
4114 return;
4115 /* add VID to filter table */
4116 index = (vid >> 5) & 0x7F;
4117 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4118 vfta |= (1 << (vid & 0x1F));
4119 e1000_write_vfta(&adapter->hw, index, vfta);
4120 }
4121
4122 static void
4123 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4124 {
4125 struct e1000_adapter *adapter = netdev_priv(netdev);
4126 uint32_t vfta, index;
4127
4128 e1000_irq_disable(adapter);
4129
4130 if(adapter->vlgrp)
4131 adapter->vlgrp->vlan_devices[vid] = NULL;
4132
4133 e1000_irq_enable(adapter);
4134
4135 if((adapter->hw.mng_cookie.status &
4136 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4137 (vid == adapter->mng_vlan_id))
4138 return;
4139 /* remove VID from filter table */
4140 index = (vid >> 5) & 0x7F;
4141 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4142 vfta &= ~(1 << (vid & 0x1F));
4143 e1000_write_vfta(&adapter->hw, index, vfta);
4144 }
4145
4146 static void
4147 e1000_restore_vlan(struct e1000_adapter *adapter)
4148 {
4149 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4150
4151 if(adapter->vlgrp) {
4152 uint16_t vid;
4153 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4154 if(!adapter->vlgrp->vlan_devices[vid])
4155 continue;
4156 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4157 }
4158 }
4159 }
4160
4161 int
4162 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4163 {
4164 adapter->hw.autoneg = 0;
4165
4166 /* Fiber NICs only allow 1000 gbps Full duplex */
4167 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4168 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4169 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4170 return -EINVAL;
4171 }
4172
4173 switch(spddplx) {
4174 case SPEED_10 + DUPLEX_HALF:
4175 adapter->hw.forced_speed_duplex = e1000_10_half;
4176 break;
4177 case SPEED_10 + DUPLEX_FULL:
4178 adapter->hw.forced_speed_duplex = e1000_10_full;
4179 break;
4180 case SPEED_100 + DUPLEX_HALF:
4181 adapter->hw.forced_speed_duplex = e1000_100_half;
4182 break;
4183 case SPEED_100 + DUPLEX_FULL:
4184 adapter->hw.forced_speed_duplex = e1000_100_full;
4185 break;
4186 case SPEED_1000 + DUPLEX_FULL:
4187 adapter->hw.autoneg = 1;
4188 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4189 break;
4190 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4191 default:
4192 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4193 return -EINVAL;
4194 }
4195 return 0;
4196 }
4197
4198 #ifdef CONFIG_PM
4199 static int
4200 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4201 {
4202 struct net_device *netdev = pci_get_drvdata(pdev);
4203 struct e1000_adapter *adapter = netdev_priv(netdev);
4204 uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
4205 uint32_t wufc = adapter->wol;
4206
4207 netif_device_detach(netdev);
4208
4209 if(netif_running(netdev))
4210 e1000_down(adapter);
4211
4212 status = E1000_READ_REG(&adapter->hw, STATUS);
4213 if(status & E1000_STATUS_LU)
4214 wufc &= ~E1000_WUFC_LNKC;
4215
4216 if(wufc) {
4217 e1000_setup_rctl(adapter);
4218 e1000_set_multi(netdev);
4219
4220 /* turn on all-multi mode if wake on multicast is enabled */
4221 if(adapter->wol & E1000_WUFC_MC) {
4222 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4223 rctl |= E1000_RCTL_MPE;
4224 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4225 }
4226
4227 if(adapter->hw.mac_type >= e1000_82540) {
4228 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4229 /* advertise wake from D3Cold */
4230 #define E1000_CTRL_ADVD3WUC 0x00100000
4231 /* phy power management enable */
4232 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4233 ctrl |= E1000_CTRL_ADVD3WUC |
4234 E1000_CTRL_EN_PHY_PWR_MGMT;
4235 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4236 }
4237
4238 if(adapter->hw.media_type == e1000_media_type_fiber ||
4239 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4240 /* keep the laser running in D3 */
4241 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4242 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4243 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4244 }
4245
4246 /* Allow time for pending master requests to run */
4247 e1000_disable_pciex_master(&adapter->hw);
4248
4249 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4250 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4251 pci_enable_wake(pdev, 3, 1);
4252 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4253 } else {
4254 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4255 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4256 pci_enable_wake(pdev, 3, 0);
4257 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4258 }
4259
4260 pci_save_state(pdev);
4261
4262 if(adapter->hw.mac_type >= e1000_82540 &&
4263 adapter->hw.media_type == e1000_media_type_copper) {
4264 manc = E1000_READ_REG(&adapter->hw, MANC);
4265 if(manc & E1000_MANC_SMBUS_EN) {
4266 manc |= E1000_MANC_ARP_EN;
4267 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4268 pci_enable_wake(pdev, 3, 1);
4269 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4270 }
4271 }
4272
4273 switch(adapter->hw.mac_type) {
4274 case e1000_82571:
4275 case e1000_82572:
4276 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4277 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4278 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4279 break;
4280 case e1000_82573:
4281 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4282 E1000_WRITE_REG(&adapter->hw, SWSM,
4283 swsm & ~E1000_SWSM_DRV_LOAD);
4284 break;
4285 default:
4286 break;
4287 }
4288
4289 pci_disable_device(pdev);
4290 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4291
4292 return 0;
4293 }
4294
4295 static int
4296 e1000_resume(struct pci_dev *pdev)
4297 {
4298 struct net_device *netdev = pci_get_drvdata(pdev);
4299 struct e1000_adapter *adapter = netdev_priv(netdev);
4300 uint32_t manc, ret_val, swsm;
4301 uint32_t ctrl_ext;
4302
4303 pci_set_power_state(pdev, PCI_D0);
4304 pci_restore_state(pdev);
4305 ret_val = pci_enable_device(pdev);
4306 pci_set_master(pdev);
4307
4308 pci_enable_wake(pdev, PCI_D3hot, 0);
4309 pci_enable_wake(pdev, PCI_D3cold, 0);
4310
4311 e1000_reset(adapter);
4312 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4313
4314 if(netif_running(netdev))
4315 e1000_up(adapter);
4316
4317 netif_device_attach(netdev);
4318
4319 if(adapter->hw.mac_type >= e1000_82540 &&
4320 adapter->hw.media_type == e1000_media_type_copper) {
4321 manc = E1000_READ_REG(&adapter->hw, MANC);
4322 manc &= ~(E1000_MANC_ARP_EN);
4323 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4324 }
4325
4326 switch(adapter->hw.mac_type) {
4327 case e1000_82571:
4328 case e1000_82572:
4329 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4330 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4331 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4332 break;
4333 case e1000_82573:
4334 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4335 E1000_WRITE_REG(&adapter->hw, SWSM,
4336 swsm | E1000_SWSM_DRV_LOAD);
4337 break;
4338 default:
4339 break;
4340 }
4341
4342 return 0;
4343 }
4344 #endif
4345 #ifdef CONFIG_NET_POLL_CONTROLLER
4346 /*
4347 * Polling 'interrupt' - used by things like netconsole to send skbs
4348 * without having to re-enable interrupts. It's not called while
4349 * the interrupt routine is executing.
4350 */
4351 static void
4352 e1000_netpoll(struct net_device *netdev)
4353 {
4354 struct e1000_adapter *adapter = netdev_priv(netdev);
4355 disable_irq(adapter->pdev->irq);
4356 e1000_intr(adapter->pdev->irq, netdev, NULL);
4357 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4358 enable_irq(adapter->pdev->irq);
4359 }
4360 #endif
4361
4362 /* e1000_main.c */
Software Suspend 2 for 2.6.18.y (mirror)