2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/utsname.h>
29 #include <linux/kprobes.h>
32 #include <linux/ioport.h>
33 #include <linux/eisa.h>
37 #include <linux/mca.h>
40 #include <asm/processor.h>
41 #include <asm/system.h>
42 #include <asm/uaccess.h>
44 #include <asm/atomic.h>
45 #include <asm/debugreg.h>
51 #include <asm/arch_hooks.h>
52 #include <asm/kdebug.h>
54 #include <linux/irq.h>
55 #include <linux/module.h>
57 #include "mach_traps.h"
59 asmlinkage
int system_call(void);
61 struct desc_struct default_ldt
[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
64 /* Do we ignore FPU interrupts ? */
65 char ignore_fpu_irq
= 0;
68 * The IDT has to be page-aligned to simplify the Pentium
69 * F0 0F bug workaround.. We have a special link segment
72 struct desc_struct idt_table
[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
74 asmlinkage
void divide_error(void);
75 asmlinkage
void debug(void);
76 asmlinkage
void nmi(void);
77 asmlinkage
void int3(void);
78 asmlinkage
void overflow(void);
79 asmlinkage
void bounds(void);
80 asmlinkage
void invalid_op(void);
81 asmlinkage
void device_not_available(void);
82 asmlinkage
void coprocessor_segment_overrun(void);
83 asmlinkage
void invalid_TSS(void);
84 asmlinkage
void segment_not_present(void);
85 asmlinkage
void stack_segment(void);
86 asmlinkage
void general_protection(void);
87 asmlinkage
void page_fault(void);
88 asmlinkage
void coprocessor_error(void);
89 asmlinkage
void simd_coprocessor_error(void);
90 asmlinkage
void alignment_check(void);
91 asmlinkage
void spurious_interrupt_bug(void);
92 asmlinkage
void machine_check(void);
94 static int kstack_depth_to_print
= 24;
95 struct notifier_block
*i386die_chain
;
96 static DEFINE_SPINLOCK(die_notifier_lock
);
98 int register_die_notifier(struct notifier_block
*nb
)
102 spin_lock_irqsave(&die_notifier_lock
, flags
);
103 err
= notifier_chain_register(&i386die_chain
, nb
);
104 spin_unlock_irqrestore(&die_notifier_lock
, flags
);
107 EXPORT_SYMBOL(register_die_notifier
);
109 static inline int valid_stack_ptr(struct thread_info
*tinfo
, void *p
)
111 return p
> (void *)tinfo
&&
112 p
< (void *)tinfo
+ THREAD_SIZE
- 3;
115 static inline unsigned long print_context_stack(struct thread_info
*tinfo
,
116 unsigned long *stack
, unsigned long ebp
)
120 #ifdef CONFIG_FRAME_POINTER
121 while (valid_stack_ptr(tinfo
, (void *)ebp
)) {
122 addr
= *(unsigned long *)(ebp
+ 4);
123 printk(" [<%08lx>] ", addr
);
124 print_symbol("%s", addr
);
126 ebp
= *(unsigned long *)ebp
;
129 while (valid_stack_ptr(tinfo
, stack
)) {
131 if (__kernel_text_address(addr
)) {
132 printk(" [<%08lx>]", addr
);
133 print_symbol(" %s", addr
);
141 void show_trace(struct task_struct
*task
, unsigned long * stack
)
148 if (task
== current
) {
149 /* Grab ebp right from our regs */
150 asm ("movl %%ebp, %0" : "=r" (ebp
) : );
152 /* ebp is the last reg pushed by switch_to */
153 ebp
= *(unsigned long *) task
->thread
.esp
;
157 struct thread_info
*context
;
158 context
= (struct thread_info
*)
159 ((unsigned long)stack
& (~(THREAD_SIZE
- 1)));
160 ebp
= print_context_stack(context
, stack
, ebp
);
161 stack
= (unsigned long*)context
->previous_esp
;
164 printk(" =======================\n");
168 void show_stack(struct task_struct
*task
, unsigned long *esp
)
170 unsigned long *stack
;
175 esp
= (unsigned long*)task
->thread
.esp
;
177 esp
= (unsigned long *)&esp
;
181 for(i
= 0; i
< kstack_depth_to_print
; i
++) {
182 if (kstack_end(stack
))
184 if (i
&& ((i
% 8) == 0))
186 printk("%08lx ", *stack
++);
188 printk("\nCall Trace:\n");
189 show_trace(task
, esp
);
193 * The architecture-independent dump_stack generator
195 void dump_stack(void)
199 show_trace(current
, &stack
);
202 EXPORT_SYMBOL(dump_stack
);
204 void show_registers(struct pt_regs
*regs
)
211 esp
= (unsigned long) (®s
->esp
);
216 ss
= regs
->xss
& 0xffff;
219 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
221 smp_processor_id(), 0xffff & regs
->xcs
, regs
->eip
,
222 print_tainted(), regs
->eflags
, system_utsname
.release
);
223 print_symbol("EIP is at %s\n", regs
->eip
);
224 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
225 regs
->eax
, regs
->ebx
, regs
->ecx
, regs
->edx
);
226 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
227 regs
->esi
, regs
->edi
, regs
->ebp
, esp
);
228 printk("ds: %04x es: %04x ss: %04x\n",
229 regs
->xds
& 0xffff, regs
->xes
& 0xffff, ss
);
230 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
231 current
->comm
, current
->pid
, current_thread_info(), current
);
233 * When in-kernel, we also print out the stack and code at the
234 * time of the fault..
240 show_stack(NULL
, (unsigned long*)esp
);
244 eip
= (u8
*)regs
->eip
- 43;
245 for (i
= 0; i
< 64; i
++, eip
++) {
248 if (eip
< (u8
*)PAGE_OFFSET
|| __get_user(c
, eip
)) {
249 printk(" Bad EIP value.");
252 if (eip
== (u8
*)regs
->eip
)
253 printk("<%02x> ", c
);
261 static void handle_BUG(struct pt_regs
*regs
)
270 goto no_bug
; /* Not in kernel */
274 if (eip
< PAGE_OFFSET
)
276 if (__get_user(ud2
, (unsigned short *)eip
))
280 if (__get_user(line
, (unsigned short *)(eip
+ 2)))
282 if (__get_user(file
, (char **)(eip
+ 4)) ||
283 (unsigned long)file
< PAGE_OFFSET
|| __get_user(c
, file
))
284 file
= "<bad filename>";
286 printk("------------[ cut here ]------------\n");
287 printk(KERN_ALERT
"kernel BUG at %s:%d!\n", file
, line
);
292 /* Here we know it was a BUG but file-n-line is unavailable */
294 printk("Kernel BUG\n");
297 void die(const char * str
, struct pt_regs
* regs
, long err
)
302 int lock_owner_depth
;
304 .lock
= SPIN_LOCK_UNLOCKED
,
306 .lock_owner_depth
= 0
308 static int die_counter
;
310 if (die
.lock_owner
!= raw_smp_processor_id()) {
312 spin_lock_irq(&die
.lock
);
313 die
.lock_owner
= smp_processor_id();
314 die
.lock_owner_depth
= 0;
318 if (++die
.lock_owner_depth
< 3) {
321 printk(KERN_ALERT
"%s: %04lx [#%d]\n", str
, err
& 0xffff, ++die_counter
);
322 #ifdef CONFIG_PREEMPT
330 #ifdef CONFIG_DEBUG_PAGEALLOC
331 printk("DEBUG_PAGEALLOC");
336 notify_die(DIE_OOPS
, (char *)str
, regs
, err
, 255, SIGSEGV
);
337 show_registers(regs
);
339 printk(KERN_ERR
"Recursive die() failure, output suppressed\n");
343 spin_unlock_irq(&die
.lock
);
345 panic("Fatal exception in interrupt");
348 printk(KERN_EMERG
"Fatal exception: panic in 5 seconds\n");
350 panic("Fatal exception");
355 static inline void die_if_kernel(const char * str
, struct pt_regs
* regs
, long err
)
357 if (!(regs
->eflags
& VM_MASK
) && !(3 & regs
->xcs
))
361 static void do_trap(int trapnr
, int signr
, char *str
, int vm86
,
362 struct pt_regs
* regs
, long error_code
, siginfo_t
*info
)
364 if (regs
->eflags
& VM_MASK
) {
370 if (!(regs
->xcs
& 3))
374 struct task_struct
*tsk
= current
;
375 tsk
->thread
.error_code
= error_code
;
376 tsk
->thread
.trap_no
= trapnr
;
378 force_sig_info(signr
, info
, tsk
);
380 force_sig(signr
, tsk
);
385 if (!fixup_exception(regs
))
386 die(str
, regs
, error_code
);
391 int ret
= handle_vm86_trap((struct kernel_vm86_regs
*) regs
, error_code
, trapnr
);
392 if (ret
) goto trap_signal
;
397 #define DO_ERROR(trapnr, signr, str, name) \
398 fastcall void do_##name(struct pt_regs * regs, long error_code) \
400 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
403 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
406 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
407 fastcall void do_##name(struct pt_regs * regs, long error_code) \
410 info.si_signo = signr; \
412 info.si_code = sicode; \
413 info.si_addr = (void __user *)siaddr; \
414 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
417 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
420 #define DO_VM86_ERROR(trapnr, signr, str, name) \
421 fastcall void do_##name(struct pt_regs * regs, long error_code) \
423 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
426 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
429 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
430 fastcall void do_##name(struct pt_regs * regs, long error_code) \
433 info.si_signo = signr; \
435 info.si_code = sicode; \
436 info.si_addr = (void __user *)siaddr; \
437 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
440 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
443 DO_VM86_ERROR_INFO( 0, SIGFPE
, "divide error", divide_error
, FPE_INTDIV
, regs
->eip
)
444 #ifndef CONFIG_KPROBES
445 DO_VM86_ERROR( 3, SIGTRAP
, "int3", int3
)
447 DO_VM86_ERROR( 4, SIGSEGV
, "overflow", overflow
)
448 DO_VM86_ERROR( 5, SIGSEGV
, "bounds", bounds
)
449 DO_ERROR_INFO( 6, SIGILL
, "invalid operand", invalid_op
, ILL_ILLOPN
, regs
->eip
)
450 DO_ERROR( 9, SIGFPE
, "coprocessor segment overrun", coprocessor_segment_overrun
)
451 DO_ERROR(10, SIGSEGV
, "invalid TSS", invalid_TSS
)
452 DO_ERROR(11, SIGBUS
, "segment not present", segment_not_present
)
453 DO_ERROR(12, SIGBUS
, "stack segment", stack_segment
)
454 DO_ERROR_INFO(17, SIGBUS
, "alignment check", alignment_check
, BUS_ADRALN
, 0)
455 DO_ERROR_INFO(32, SIGSEGV
, "iret exception", iret_error
, ILL_BADSTK
, 0)
457 fastcall
void do_general_protection(struct pt_regs
* regs
, long error_code
)
460 struct tss_struct
*tss
= &per_cpu(init_tss
, cpu
);
461 struct thread_struct
*thread
= ¤t
->thread
;
464 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
465 * invalid offset set (the LAZY one) and the faulting thread has
466 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
467 * and we set the offset field correctly. Then we let the CPU to
468 * restart the faulting instruction.
470 if (tss
->io_bitmap_base
== INVALID_IO_BITMAP_OFFSET_LAZY
&&
471 thread
->io_bitmap_ptr
) {
472 memcpy(tss
->io_bitmap
, thread
->io_bitmap_ptr
,
473 thread
->io_bitmap_max
);
475 * If the previously set map was extending to higher ports
476 * than the current one, pad extra space with 0xff (no access).
478 if (thread
->io_bitmap_max
< tss
->io_bitmap_max
)
479 memset((char *) tss
->io_bitmap
+
480 thread
->io_bitmap_max
, 0xff,
481 tss
->io_bitmap_max
- thread
->io_bitmap_max
);
482 tss
->io_bitmap_max
= thread
->io_bitmap_max
;
483 tss
->io_bitmap_base
= IO_BITMAP_OFFSET
;
489 if (regs
->eflags
& VM_MASK
)
492 if (!(regs
->xcs
& 3))
495 current
->thread
.error_code
= error_code
;
496 current
->thread
.trap_no
= 13;
497 force_sig(SIGSEGV
, current
);
502 handle_vm86_fault((struct kernel_vm86_regs
*) regs
, error_code
);
506 if (!fixup_exception(regs
)) {
507 if (notify_die(DIE_GPF
, "general protection fault", regs
,
508 error_code
, 13, SIGSEGV
) == NOTIFY_STOP
)
510 die("general protection fault", regs
, error_code
);
514 static void mem_parity_error(unsigned char reason
, struct pt_regs
* regs
)
516 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
517 printk("You probably have a hardware problem with your RAM chips\n");
519 /* Clear and disable the memory parity error line. */
520 clear_mem_error(reason
);
523 static void io_check_error(unsigned char reason
, struct pt_regs
* regs
)
527 printk("NMI: IOCK error (debug interrupt?)\n");
528 show_registers(regs
);
530 /* Re-enable the IOCK line, wait for a few seconds */
531 reason
= (reason
& 0xf) | 8;
534 while (--i
) udelay(1000);
539 static void unknown_nmi_error(unsigned char reason
, struct pt_regs
* regs
)
542 /* Might actually be able to figure out what the guilty party
549 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
550 reason
, smp_processor_id());
551 printk("Dazed and confused, but trying to continue\n");
552 printk("Do you have a strange power saving mode enabled?\n");
555 static DEFINE_SPINLOCK(nmi_print_lock
);
557 void die_nmi (struct pt_regs
*regs
, const char *msg
)
559 spin_lock(&nmi_print_lock
);
561 * We are in trouble anyway, lets at least try
562 * to get a message out.
566 printk(" on CPU%d, eip %08lx, registers:\n",
567 smp_processor_id(), regs
->eip
);
568 show_registers(regs
);
569 printk("console shuts up ...\n");
571 spin_unlock(&nmi_print_lock
);
576 static void default_do_nmi(struct pt_regs
* regs
)
578 unsigned char reason
= 0;
580 /* Only the BSP gets external NMIs from the system. */
581 if (!smp_processor_id())
582 reason
= get_nmi_reason();
584 if (!(reason
& 0xc0)) {
585 if (notify_die(DIE_NMI_IPI
, "nmi_ipi", regs
, reason
, 0, SIGINT
)
588 #ifdef CONFIG_X86_LOCAL_APIC
590 * Ok, so this is none of the documented NMI sources,
591 * so it must be the NMI watchdog.
594 nmi_watchdog_tick(regs
);
598 unknown_nmi_error(reason
, regs
);
601 if (notify_die(DIE_NMI
, "nmi", regs
, reason
, 0, SIGINT
) == NOTIFY_STOP
)
604 mem_parity_error(reason
, regs
);
606 io_check_error(reason
, regs
);
608 * Reassert NMI in case it became active meanwhile
609 * as it's edge-triggered.
614 static int dummy_nmi_callback(struct pt_regs
* regs
, int cpu
)
619 static nmi_callback_t nmi_callback
= dummy_nmi_callback
;
621 fastcall
void do_nmi(struct pt_regs
* regs
, long error_code
)
627 cpu
= smp_processor_id();
630 if (!nmi_callback(regs
, cpu
))
631 default_do_nmi(regs
);
636 void set_nmi_callback(nmi_callback_t callback
)
638 nmi_callback
= callback
;
640 EXPORT_SYMBOL_GPL(set_nmi_callback
);
642 void unset_nmi_callback(void)
644 nmi_callback
= dummy_nmi_callback
;
646 EXPORT_SYMBOL_GPL(unset_nmi_callback
);
648 #ifdef CONFIG_KPROBES
649 fastcall
void do_int3(struct pt_regs
*regs
, long error_code
)
651 if (notify_die(DIE_INT3
, "int3", regs
, error_code
, 3, SIGTRAP
)
654 /* This is an interrupt gate, because kprobes wants interrupts
655 disabled. Normal trap handlers don't. */
656 restore_interrupts(regs
);
657 do_trap(3, SIGTRAP
, "int3", 1, regs
, error_code
, NULL
);
662 * Our handling of the processor debug registers is non-trivial.
663 * We do not clear them on entry and exit from the kernel. Therefore
664 * it is possible to get a watchpoint trap here from inside the kernel.
665 * However, the code in ./ptrace.c has ensured that the user can
666 * only set watchpoints on userspace addresses. Therefore the in-kernel
667 * watchpoint trap can only occur in code which is reading/writing
668 * from user space. Such code must not hold kernel locks (since it
669 * can equally take a page fault), therefore it is safe to call
670 * force_sig_info even though that claims and releases locks.
672 * Code in ./signal.c ensures that the debug control register
673 * is restored before we deliver any signal, and therefore that
674 * user code runs with the correct debug control register even though
677 * Being careful here means that we don't have to be as careful in a
678 * lot of more complicated places (task switching can be a bit lazy
679 * about restoring all the debug state, and ptrace doesn't have to
680 * find every occurrence of the TF bit that could be saved away even
683 fastcall
void do_debug(struct pt_regs
* regs
, long error_code
)
685 unsigned int condition
;
686 struct task_struct
*tsk
= current
;
688 __asm__
__volatile__("movl %%db6,%0" : "=r" (condition
));
690 if (notify_die(DIE_DEBUG
, "debug", regs
, condition
, error_code
,
691 SIGTRAP
) == NOTIFY_STOP
)
693 /* It's safe to allow irq's after DR6 has been saved */
694 if (regs
->eflags
& X86_EFLAGS_IF
)
697 /* Mask out spurious debug traps due to lazy DR7 setting */
698 if (condition
& (DR_TRAP0
|DR_TRAP1
|DR_TRAP2
|DR_TRAP3
)) {
699 if (!tsk
->thread
.debugreg
[7])
703 if (regs
->eflags
& VM_MASK
)
706 /* Save debug status register where ptrace can see it */
707 tsk
->thread
.debugreg
[6] = condition
;
710 * Single-stepping through TF: make sure we ignore any events in
711 * kernel space (but re-enable TF when returning to user mode).
713 if (condition
& DR_STEP
) {
715 * We already checked v86 mode above, so we can
716 * check for kernel mode by just checking the CPL
719 if ((regs
->xcs
& 3) == 0)
720 goto clear_TF_reenable
;
723 /* Ok, finally something we can handle */
724 send_sigtrap(tsk
, regs
, error_code
);
726 /* Disable additional traps. They'll be re-enabled when
727 * the signal is delivered.
730 __asm__("movl %0,%%db7"
736 handle_vm86_trap((struct kernel_vm86_regs
*) regs
, error_code
, 1);
740 set_tsk_thread_flag(tsk
, TIF_SINGLESTEP
);
741 regs
->eflags
&= ~TF_MASK
;
746 * Note that we play around with the 'TS' bit in an attempt to get
747 * the correct behaviour even in the presence of the asynchronous
750 void math_error(void __user
*eip
)
752 struct task_struct
* task
;
754 unsigned short cwd
, swd
;
757 * Save the info for the exception handler and clear the error.
761 task
->thread
.trap_no
= 16;
762 task
->thread
.error_code
= 0;
763 info
.si_signo
= SIGFPE
;
765 info
.si_code
= __SI_FAULT
;
768 * (~cwd & swd) will mask out exceptions that are not set to unmasked
769 * status. 0x3f is the exception bits in these regs, 0x200 is the
770 * C1 reg you need in case of a stack fault, 0x040 is the stack
771 * fault bit. We should only be taking one exception at a time,
772 * so if this combination doesn't produce any single exception,
773 * then we have a bad program that isn't syncronizing its FPU usage
774 * and it will suffer the consequences since we won't be able to
775 * fully reproduce the context of the exception
777 cwd
= get_fpu_cwd(task
);
778 swd
= get_fpu_swd(task
);
779 switch (((~cwd
) & swd
& 0x3f) | (swd
& 0x240)) {
783 case 0x001: /* Invalid Op */
784 case 0x041: /* Stack Fault */
785 case 0x241: /* Stack Fault | Direction */
786 info
.si_code
= FPE_FLTINV
;
787 /* Should we clear the SF or let user space do it ???? */
789 case 0x002: /* Denormalize */
790 case 0x010: /* Underflow */
791 info
.si_code
= FPE_FLTUND
;
793 case 0x004: /* Zero Divide */
794 info
.si_code
= FPE_FLTDIV
;
796 case 0x008: /* Overflow */
797 info
.si_code
= FPE_FLTOVF
;
799 case 0x020: /* Precision */
800 info
.si_code
= FPE_FLTRES
;
803 force_sig_info(SIGFPE
, &info
, task
);
806 fastcall
void do_coprocessor_error(struct pt_regs
* regs
, long error_code
)
809 math_error((void __user
*)regs
->eip
);
812 static void simd_math_error(void __user
*eip
)
814 struct task_struct
* task
;
816 unsigned short mxcsr
;
819 * Save the info for the exception handler and clear the error.
823 task
->thread
.trap_no
= 19;
824 task
->thread
.error_code
= 0;
825 info
.si_signo
= SIGFPE
;
827 info
.si_code
= __SI_FAULT
;
830 * The SIMD FPU exceptions are handled a little differently, as there
831 * is only a single status/control register. Thus, to determine which
832 * unmasked exception was caught we must mask the exception mask bits
833 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
835 mxcsr
= get_fpu_mxcsr(task
);
836 switch (~((mxcsr
& 0x1f80) >> 7) & (mxcsr
& 0x3f)) {
840 case 0x001: /* Invalid Op */
841 info
.si_code
= FPE_FLTINV
;
843 case 0x002: /* Denormalize */
844 case 0x010: /* Underflow */
845 info
.si_code
= FPE_FLTUND
;
847 case 0x004: /* Zero Divide */
848 info
.si_code
= FPE_FLTDIV
;
850 case 0x008: /* Overflow */
851 info
.si_code
= FPE_FLTOVF
;
853 case 0x020: /* Precision */
854 info
.si_code
= FPE_FLTRES
;
857 force_sig_info(SIGFPE
, &info
, task
);
860 fastcall
void do_simd_coprocessor_error(struct pt_regs
* regs
,
864 /* Handle SIMD FPU exceptions on PIII+ processors. */
866 simd_math_error((void __user
*)regs
->eip
);
869 * Handle strange cache flush from user space exception
870 * in all other cases. This is undocumented behaviour.
872 if (regs
->eflags
& VM_MASK
) {
873 handle_vm86_fault((struct kernel_vm86_regs
*)regs
,
877 die_if_kernel("cache flush denied", regs
, error_code
);
878 current
->thread
.trap_no
= 19;
879 current
->thread
.error_code
= error_code
;
880 force_sig(SIGSEGV
, current
);
884 fastcall
void do_spurious_interrupt_bug(struct pt_regs
* regs
,
888 /* No need to warn about this any longer. */
889 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
893 fastcall
void setup_x86_bogus_stack(unsigned char * stk
)
895 unsigned long *switch16_ptr
, *switch32_ptr
;
896 struct pt_regs
*regs
;
897 unsigned long stack_top
, stack_bot
;
898 unsigned short iret_frame16_off
;
899 int cpu
= smp_processor_id();
900 /* reserve the space on 32bit stack for the magic switch16 pointer */
901 memmove(stk
, stk
+ 8, sizeof(struct pt_regs
));
902 switch16_ptr
= (unsigned long *)(stk
+ sizeof(struct pt_regs
));
903 regs
= (struct pt_regs
*)stk
;
904 /* now the switch32 on 16bit stack */
905 stack_bot
= (unsigned long)&per_cpu(cpu_16bit_stack
, cpu
);
906 stack_top
= stack_bot
+ CPU_16BIT_STACK_SIZE
;
907 switch32_ptr
= (unsigned long *)(stack_top
- 8);
908 iret_frame16_off
= CPU_16BIT_STACK_SIZE
- 8 - 20;
909 /* copy iret frame on 16bit stack */
910 memcpy((void *)(stack_bot
+ iret_frame16_off
), ®s
->eip
, 20);
911 /* fill in the switch pointers */
912 switch16_ptr
[0] = (regs
->esp
& 0xffff0000) | iret_frame16_off
;
913 switch16_ptr
[1] = __ESPFIX_SS
;
914 switch32_ptr
[0] = (unsigned long)stk
+ sizeof(struct pt_regs
) +
915 8 - CPU_16BIT_STACK_SIZE
;
916 switch32_ptr
[1] = __KERNEL_DS
;
919 fastcall
unsigned char * fixup_x86_bogus_stack(unsigned short sp
)
921 unsigned long *switch32_ptr
;
922 unsigned char *stack16
, *stack32
;
923 unsigned long stack_top
, stack_bot
;
925 int cpu
= smp_processor_id();
926 stack_bot
= (unsigned long)&per_cpu(cpu_16bit_stack
, cpu
);
927 stack_top
= stack_bot
+ CPU_16BIT_STACK_SIZE
;
928 switch32_ptr
= (unsigned long *)(stack_top
- 8);
929 /* copy the data from 16bit stack to 32bit stack */
930 len
= CPU_16BIT_STACK_SIZE
- 8 - sp
;
931 stack16
= (unsigned char *)(stack_bot
+ sp
);
932 stack32
= (unsigned char *)
933 (switch32_ptr
[0] + CPU_16BIT_STACK_SIZE
- 8 - len
);
934 memcpy(stack32
, stack16
, len
);
939 * 'math_state_restore()' saves the current math information in the
940 * old math state array, and gets the new ones from the current task
942 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
943 * Don't touch unless you *really* know how it works.
945 * Must be called with kernel preemption disabled (in this case,
946 * local interrupts are disabled at the call-site in entry.S).
948 asmlinkage
void math_state_restore(struct pt_regs regs
)
950 struct thread_info
*thread
= current_thread_info();
951 struct task_struct
*tsk
= thread
->task
;
953 clts(); /* Allow maths ops (or we recurse) */
954 if (!tsk_used_math(tsk
))
957 thread
->status
|= TS_USEDFPU
; /* So we fnsave on switch_to() */
960 #ifndef CONFIG_MATH_EMULATION
962 asmlinkage
void math_emulate(long arg
)
964 printk("math-emulation not enabled and no coprocessor found.\n");
965 printk("killing %s.\n",current
->comm
);
966 force_sig(SIGFPE
,current
);
970 #endif /* CONFIG_MATH_EMULATION */
972 #ifdef CONFIG_X86_F00F_BUG
973 void __init
trap_init_f00f_bug(void)
975 __set_fixmap(FIX_F00F_IDT
, __pa(&idt_table
), PAGE_KERNEL_RO
);
978 * Update the IDT descriptor and reload the IDT so that
979 * it uses the read-only mapped virtual address.
981 idt_descr
.address
= fix_to_virt(FIX_F00F_IDT
);
982 __asm__
__volatile__("lidt %0" : : "m" (idt_descr
));
986 #define _set_gate(gate_addr,type,dpl,addr,seg) \
989 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
991 "movl %%eax,%0\n\t" \
993 :"=m" (*((long *) (gate_addr))), \
994 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
995 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
996 "3" ((char *) (addr)),"2" ((seg) << 16)); \
1001 * This needs to use 'idt_table' rather than 'idt', and
1002 * thus use the _nonmapped_ version of the IDT, as the
1003 * Pentium F0 0F bugfix can have resulted in the mapped
1004 * IDT being write-protected.
1006 void set_intr_gate(unsigned int n
, void *addr
)
1008 _set_gate(idt_table
+n
,14,0,addr
,__KERNEL_CS
);
1012 * This routine sets up an interrupt gate at directory privilege level 3.
1014 static inline void set_system_intr_gate(unsigned int n
, void *addr
)
1016 _set_gate(idt_table
+n
, 14, 3, addr
, __KERNEL_CS
);
1019 static void __init
set_trap_gate(unsigned int n
, void *addr
)
1021 _set_gate(idt_table
+n
,15,0,addr
,__KERNEL_CS
);
1024 static void __init
set_system_gate(unsigned int n
, void *addr
)
1026 _set_gate(idt_table
+n
,15,3,addr
,__KERNEL_CS
);
1029 static void __init
set_task_gate(unsigned int n
, unsigned int gdt_entry
)
1031 _set_gate(idt_table
+n
,5,0,0,(gdt_entry
<<3));
1035 void __init
trap_init(void)
1038 void __iomem
*p
= ioremap(0x0FFFD9, 4);
1039 if (readl(p
) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1045 #ifdef CONFIG_X86_LOCAL_APIC
1046 init_apic_mappings();
1049 set_trap_gate(0,÷_error
);
1050 set_intr_gate(1,&debug
);
1051 set_intr_gate(2,&nmi
);
1052 set_system_intr_gate(3, &int3
); /* int3-5 can be called from all */
1053 set_system_gate(4,&overflow
);
1054 set_system_gate(5,&bounds
);
1055 set_trap_gate(6,&invalid_op
);
1056 set_trap_gate(7,&device_not_available
);
1057 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS
);
1058 set_trap_gate(9,&coprocessor_segment_overrun
);
1059 set_trap_gate(10,&invalid_TSS
);
1060 set_trap_gate(11,&segment_not_present
);
1061 set_trap_gate(12,&stack_segment
);
1062 set_trap_gate(13,&general_protection
);
1063 set_intr_gate(14,&page_fault
);
1064 set_trap_gate(15,&spurious_interrupt_bug
);
1065 set_trap_gate(16,&coprocessor_error
);
1066 set_trap_gate(17,&alignment_check
);
1067 #ifdef CONFIG_X86_MCE
1068 set_trap_gate(18,&machine_check
);
1070 set_trap_gate(19,&simd_coprocessor_error
);
1072 set_system_gate(SYSCALL_VECTOR
,&system_call
);
1075 * Should be a barrier for any external CPU state.
1082 static int __init
kstack_setup(char *s
)
1084 kstack_depth_to_print
= simple_strtoul(s
, NULL
, 0);
1087 __setup("kstack=", kstack_setup
);