3 cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
5 (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6 (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7 (c) 2003 Gerd Knorr <kraxel@bytesex.org>
9 -----------------------------------------------------------------------
11 Lot of voodoo here. Even the data sheet doesn't help to
12 understand what is going on here, the documentation for the audio
13 part of the cx2388x chip is *very* bad.
15 Some of this comes from party done linux driver sources I got from
18 Some comes from the dscaler sources, one of the dscaler driver guy works
21 -----------------------------------------------------------------------
23 This program is free software; you can redistribute it and/or modify
24 it under the terms of the GNU General Public License as published by
25 the Free Software Foundation; either version 2 of the License, or
26 (at your option) any later version.
28 This program is distributed in the hope that it will be useful,
29 but WITHOUT ANY WARRANTY; without even the implied warranty of
30 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 GNU General Public License for more details.
33 You should have received a copy of the GNU General Public License
34 along with this program; if not, write to the Free Software
35 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/config.h>
56 #include <linux/kthread.h>
60 static unsigned int audio_debug
= 0;
61 module_param(audio_debug
, int, 0644);
62 MODULE_PARM_DESC(audio_debug
, "enable debug messages [audio]");
64 static unsigned int always_analog
= 0;
65 module_param(always_analog
,int,0644);
66 MODULE_PARM_DESC(always_analog
,"force analog audio out");
69 #define dprintk(fmt, arg...) if (audio_debug) \
70 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
72 /* ----------------------------------------------------------- */
74 static char *aud_ctl_names
[64] = {
75 [EN_BTSC_FORCE_MONO
] = "BTSC_FORCE_MONO",
76 [EN_BTSC_FORCE_STEREO
] = "BTSC_FORCE_STEREO",
77 [EN_BTSC_FORCE_SAP
] = "BTSC_FORCE_SAP",
78 [EN_BTSC_AUTO_STEREO
] = "BTSC_AUTO_STEREO",
79 [EN_BTSC_AUTO_SAP
] = "BTSC_AUTO_SAP",
80 [EN_A2_FORCE_MONO1
] = "A2_FORCE_MONO1",
81 [EN_A2_FORCE_MONO2
] = "A2_FORCE_MONO2",
82 [EN_A2_FORCE_STEREO
] = "A2_FORCE_STEREO",
83 [EN_A2_AUTO_MONO2
] = "A2_AUTO_MONO2",
84 [EN_A2_AUTO_STEREO
] = "A2_AUTO_STEREO",
85 [EN_EIAJ_FORCE_MONO1
] = "EIAJ_FORCE_MONO1",
86 [EN_EIAJ_FORCE_MONO2
] = "EIAJ_FORCE_MONO2",
87 [EN_EIAJ_FORCE_STEREO
] = "EIAJ_FORCE_STEREO",
88 [EN_EIAJ_AUTO_MONO2
] = "EIAJ_AUTO_MONO2",
89 [EN_EIAJ_AUTO_STEREO
] = "EIAJ_AUTO_STEREO",
90 [EN_NICAM_FORCE_MONO1
] = "NICAM_FORCE_MONO1",
91 [EN_NICAM_FORCE_MONO2
] = "NICAM_FORCE_MONO2",
92 [EN_NICAM_FORCE_STEREO
] = "NICAM_FORCE_STEREO",
93 [EN_NICAM_AUTO_MONO2
] = "NICAM_AUTO_MONO2",
94 [EN_NICAM_AUTO_STEREO
] = "NICAM_AUTO_STEREO",
95 [EN_FMRADIO_FORCE_MONO
] = "FMRADIO_FORCE_MONO",
96 [EN_FMRADIO_FORCE_STEREO
] = "FMRADIO_FORCE_STEREO",
97 [EN_FMRADIO_AUTO_STEREO
] = "FMRADIO_AUTO_STEREO",
105 static void set_audio_registers(struct cx88_core
*core
, const struct rlist
*l
)
109 for (i
= 0; l
[i
].reg
; i
++) {
111 case AUD_PDF_DDS_CNST_BYTE2
:
112 case AUD_PDF_DDS_CNST_BYTE1
:
113 case AUD_PDF_DDS_CNST_BYTE0
:
115 case AUD_PHACC_FREQ_8MSB
:
116 case AUD_PHACC_FREQ_8LSB
:
117 cx_writeb(l
[i
].reg
, l
[i
].val
);
120 cx_write(l
[i
].reg
, l
[i
].val
);
126 static void set_audio_start(struct cx88_core
*core
, u32 mode
)
129 cx_write(AUD_VOL_CTL
, (1 << 6));
131 /* start programming */
132 cx_write(AUD_INIT
, mode
);
133 cx_write(AUD_INIT_LD
, 0x0001);
134 cx_write(AUD_SOFT_RESET
, 0x0001);
137 static void set_audio_finish(struct cx88_core
*core
, u32 ctl
)
141 #ifndef CONFIG_VIDEO_CX88_ALSA
142 /* restart dma; This avoids buzz in NICAM and is good in others */
143 cx88_stop_audio_dma(core
);
145 cx_write(AUD_RATE_THRES_DMD
, 0x000000C0);
146 #ifndef CONFIG_VIDEO_CX88_ALSA
147 cx88_start_audio_dma(core
);
150 if (cx88_boards
[core
->board
].blackbird
) {
151 /* sets sound input from external adc */
152 switch (core
->board
) {
153 case CX88_BOARD_HAUPPAUGE_ROSLYN
:
154 case CX88_BOARD_KWORLD_MCE200_DELUXE
:
155 case CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT
:
156 case CX88_BOARD_PIXELVIEW_PLAYTV_P7000
:
157 cx_clear(AUD_CTL
, EN_I2SIN_ENABLE
);
160 cx_set(AUD_CTL
, EN_I2SIN_ENABLE
);
163 cx_write(AUD_I2SINPUTCNTL
, 4);
164 cx_write(AUD_BAUDRATE
, 1);
165 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
166 cx_set(AUD_CTL
, EN_I2SOUT_ENABLE
);
167 cx_write(AUD_I2SOUTPUTCNTL
, 1);
168 cx_write(AUD_I2SCNTL
, 0);
169 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
171 if ((always_analog
) || (!cx88_boards
[core
->board
].blackbird
)) {
172 ctl
|= EN_DAC_ENABLE
;
173 cx_write(AUD_CTL
, ctl
);
176 /* finish programming */
177 cx_write(AUD_SOFT_RESET
, 0x0000);
180 volume
= cx_sread(SHADOW_AUD_VOL_CTL
);
181 cx_swrite(SHADOW_AUD_VOL_CTL
, AUD_VOL_CTL
, volume
);
184 /* ----------------------------------------------------------- */
186 static void set_audio_standard_BTSC(struct cx88_core
*core
, unsigned int sap
,
189 static const struct rlist btsc
[] = {
190 {AUD_AFE_12DB_EN
, 0x00000001},
191 {AUD_OUT1_SEL
, 0x00000013},
192 {AUD_OUT1_SHIFT
, 0x00000000},
193 {AUD_POLY0_DDS_CONSTANT
, 0x0012010c},
194 {AUD_DMD_RA_DDS
, 0x00c3e7aa},
195 {AUD_DBX_IN_GAIN
, 0x00004734},
196 {AUD_DBX_WBE_GAIN
, 0x00004640},
197 {AUD_DBX_SE_GAIN
, 0x00008d31},
198 {AUD_DCOC_0_SRC
, 0x0000001a},
199 {AUD_IIR1_4_SEL
, 0x00000021},
200 {AUD_DCOC_PASS_IN
, 0x00000003},
201 {AUD_DCOC_0_SHIFT_IN0
, 0x0000000a},
202 {AUD_DCOC_0_SHIFT_IN1
, 0x00000008},
203 {AUD_DCOC_1_SHIFT_IN0
, 0x0000000a},
204 {AUD_DCOC_1_SHIFT_IN1
, 0x00000008},
205 {AUD_DN0_FREQ
, 0x0000283b},
206 {AUD_DN2_SRC_SEL
, 0x00000008},
207 {AUD_DN2_FREQ
, 0x00003000},
208 {AUD_DN2_AFC
, 0x00000002},
209 {AUD_DN2_SHFT
, 0x00000000},
210 {AUD_IIR2_2_SEL
, 0x00000020},
211 {AUD_IIR2_2_SHIFT
, 0x00000000},
212 {AUD_IIR2_3_SEL
, 0x0000001f},
213 {AUD_IIR2_3_SHIFT
, 0x00000000},
214 {AUD_CRDC1_SRC_SEL
, 0x000003ce},
215 {AUD_CRDC1_SHIFT
, 0x00000000},
216 {AUD_CORDIC_SHIFT_1
, 0x00000007},
217 {AUD_DCOC_1_SRC
, 0x0000001b},
218 {AUD_DCOC1_SHIFT
, 0x00000000},
219 {AUD_RDSI_SEL
, 0x00000008},
220 {AUD_RDSQ_SEL
, 0x00000008},
221 {AUD_RDSI_SHIFT
, 0x00000000},
222 {AUD_RDSQ_SHIFT
, 0x00000000},
223 {AUD_POLYPH80SCALEFAC
, 0x00000003},
224 { /* end of list */ },
226 static const struct rlist btsc_sap
[] = {
227 {AUD_AFE_12DB_EN
, 0x00000001},
228 {AUD_DBX_IN_GAIN
, 0x00007200},
229 {AUD_DBX_WBE_GAIN
, 0x00006200},
230 {AUD_DBX_SE_GAIN
, 0x00006200},
231 {AUD_IIR1_1_SEL
, 0x00000000},
232 {AUD_IIR1_3_SEL
, 0x00000001},
233 {AUD_DN1_SRC_SEL
, 0x00000007},
234 {AUD_IIR1_4_SHIFT
, 0x00000006},
235 {AUD_IIR2_1_SHIFT
, 0x00000000},
236 {AUD_IIR2_2_SHIFT
, 0x00000000},
237 {AUD_IIR3_0_SHIFT
, 0x00000000},
238 {AUD_IIR3_1_SHIFT
, 0x00000000},
239 {AUD_IIR3_0_SEL
, 0x0000000d},
240 {AUD_IIR3_1_SEL
, 0x0000000e},
241 {AUD_DEEMPH1_SRC_SEL
, 0x00000014},
242 {AUD_DEEMPH1_SHIFT
, 0x00000000},
243 {AUD_DEEMPH1_G0
, 0x00004000},
244 {AUD_DEEMPH1_A0
, 0x00000000},
245 {AUD_DEEMPH1_B0
, 0x00000000},
246 {AUD_DEEMPH1_A1
, 0x00000000},
247 {AUD_DEEMPH1_B1
, 0x00000000},
248 {AUD_OUT0_SEL
, 0x0000003f},
249 {AUD_OUT1_SEL
, 0x0000003f},
250 {AUD_DN1_AFC
, 0x00000002},
251 {AUD_DCOC_0_SHIFT_IN0
, 0x0000000a},
252 {AUD_DCOC_0_SHIFT_IN1
, 0x00000008},
253 {AUD_DCOC_1_SHIFT_IN0
, 0x0000000a},
254 {AUD_DCOC_1_SHIFT_IN1
, 0x00000008},
255 {AUD_IIR1_0_SEL
, 0x0000001d},
256 {AUD_IIR1_2_SEL
, 0x0000001e},
257 {AUD_IIR2_1_SEL
, 0x00000002},
258 {AUD_IIR2_2_SEL
, 0x00000004},
259 {AUD_IIR3_2_SEL
, 0x0000000f},
260 {AUD_DCOC2_SHIFT
, 0x00000001},
261 {AUD_IIR3_2_SHIFT
, 0x00000001},
262 {AUD_DEEMPH0_SRC_SEL
, 0x00000014},
263 {AUD_CORDIC_SHIFT_1
, 0x00000006},
264 {AUD_POLY0_DDS_CONSTANT
, 0x000e4db2},
265 {AUD_DMD_RA_DDS
, 0x00f696e6},
266 {AUD_IIR2_3_SEL
, 0x00000025},
267 {AUD_IIR1_4_SEL
, 0x00000021},
268 {AUD_DN1_FREQ
, 0x0000c965},
269 {AUD_DCOC_PASS_IN
, 0x00000003},
270 {AUD_DCOC_0_SRC
, 0x0000001a},
271 {AUD_DCOC_1_SRC
, 0x0000001b},
272 {AUD_DCOC1_SHIFT
, 0x00000000},
273 {AUD_RDSI_SEL
, 0x00000009},
274 {AUD_RDSQ_SEL
, 0x00000009},
275 {AUD_RDSI_SHIFT
, 0x00000000},
276 {AUD_RDSQ_SHIFT
, 0x00000000},
277 {AUD_POLYPH80SCALEFAC
, 0x00000003},
278 { /* end of list */ },
281 mode
|= EN_FMRADIO_EN_RDS
;
284 dprintk("%s SAP (status: unknown)\n", __FUNCTION__
);
285 set_audio_start(core
, SEL_SAP
);
286 set_audio_registers(core
, btsc_sap
);
287 set_audio_finish(core
, mode
);
289 dprintk("%s (status: known-good)\n", __FUNCTION__
);
290 set_audio_start(core
, SEL_BTSC
);
291 set_audio_registers(core
, btsc
);
292 set_audio_finish(core
, mode
);
296 static void set_audio_standard_NICAM(struct cx88_core
*core
, u32 mode
)
298 static const struct rlist nicam_l
[] = {
299 {AUD_AFE_12DB_EN
, 0x00000001},
300 {AUD_RATE_ADJ1
, 0x00000060},
301 {AUD_RATE_ADJ2
, 0x000000F9},
302 {AUD_RATE_ADJ3
, 0x000001CC},
303 {AUD_RATE_ADJ4
, 0x000002B3},
304 {AUD_RATE_ADJ5
, 0x00000726},
305 {AUD_DEEMPHDENOM1_R
, 0x0000F3D0},
306 {AUD_DEEMPHDENOM2_R
, 0x00000000},
307 {AUD_ERRLOGPERIOD_R
, 0x00000064},
308 {AUD_ERRINTRPTTHSHLD1_R
, 0x00000FFF},
309 {AUD_ERRINTRPTTHSHLD2_R
, 0x0000001F},
310 {AUD_ERRINTRPTTHSHLD3_R
, 0x0000000F},
311 {AUD_POLYPH80SCALEFAC
, 0x00000003},
312 {AUD_DMD_RA_DDS
, 0x00C00000},
313 {AUD_PLL_INT
, 0x0000001E},
314 {AUD_PLL_DDS
, 0x00000000},
315 {AUD_PLL_FRAC
, 0x0000E542},
316 {AUD_START_TIMER
, 0x00000000},
317 {AUD_DEEMPHNUMER1_R
, 0x000353DE},
318 {AUD_DEEMPHNUMER2_R
, 0x000001B1},
319 {AUD_PDF_DDS_CNST_BYTE2
, 0x06},
320 {AUD_PDF_DDS_CNST_BYTE1
, 0x82},
321 {AUD_PDF_DDS_CNST_BYTE0
, 0x12},
322 {AUD_QAM_MODE
, 0x05},
323 {AUD_PHACC_FREQ_8MSB
, 0x34},
324 {AUD_PHACC_FREQ_8LSB
, 0x4C},
325 {AUD_DEEMPHGAIN_R
, 0x00006680},
326 {AUD_RATE_THRES_DMD
, 0x000000C0},
327 { /* end of list */ },
330 static const struct rlist nicam_bgdki_common
[] = {
331 {AUD_AFE_12DB_EN
, 0x00000001},
332 {AUD_RATE_ADJ1
, 0x00000010},
333 {AUD_RATE_ADJ2
, 0x00000040},
334 {AUD_RATE_ADJ3
, 0x00000100},
335 {AUD_RATE_ADJ4
, 0x00000400},
336 {AUD_RATE_ADJ5
, 0x00001000},
337 {AUD_ERRLOGPERIOD_R
, 0x00000fff},
338 {AUD_ERRINTRPTTHSHLD1_R
, 0x000003ff},
339 {AUD_ERRINTRPTTHSHLD2_R
, 0x000000ff},
340 {AUD_ERRINTRPTTHSHLD3_R
, 0x0000003f},
341 {AUD_POLYPH80SCALEFAC
, 0x00000003},
342 {AUD_DEEMPHGAIN_R
, 0x000023c2},
343 {AUD_DEEMPHNUMER1_R
, 0x0002a7bc},
344 {AUD_DEEMPHNUMER2_R
, 0x0003023e},
345 {AUD_DEEMPHDENOM1_R
, 0x0000f3d0},
346 {AUD_DEEMPHDENOM2_R
, 0x00000000},
347 {AUD_PDF_DDS_CNST_BYTE2
, 0x06},
348 {AUD_PDF_DDS_CNST_BYTE1
, 0x82},
349 {AUD_QAM_MODE
, 0x05},
350 { /* end of list */ },
353 static const struct rlist nicam_i
[] = {
354 {AUD_PDF_DDS_CNST_BYTE0
, 0x12},
355 {AUD_PHACC_FREQ_8MSB
, 0x3a},
356 {AUD_PHACC_FREQ_8LSB
, 0x93},
357 { /* end of list */ },
360 static const struct rlist nicam_default
[] = {
361 {AUD_PDF_DDS_CNST_BYTE0
, 0x16},
362 {AUD_PHACC_FREQ_8MSB
, 0x34},
363 {AUD_PHACC_FREQ_8LSB
, 0x4c},
364 { /* end of list */ },
367 set_audio_start(core
,SEL_NICAM
);
368 switch (core
->tvaudio
) {
370 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__
);
371 set_audio_registers(core
, nicam_l
);
374 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__
);
375 set_audio_registers(core
, nicam_bgdki_common
);
376 set_audio_registers(core
, nicam_i
);
379 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__
);
380 set_audio_registers(core
, nicam_bgdki_common
);
381 set_audio_registers(core
, nicam_default
);
385 mode
|= EN_DMTRX_LR
| EN_DMTRX_BYPASS
;
386 set_audio_finish(core
, mode
);
389 static void set_audio_standard_A2(struct cx88_core
*core
, u32 mode
)
391 static const struct rlist a2_bgdk_common
[] = {
392 {AUD_ERRLOGPERIOD_R
, 0x00000064},
393 {AUD_ERRINTRPTTHSHLD1_R
, 0x00000fff},
394 {AUD_ERRINTRPTTHSHLD2_R
, 0x0000001f},
395 {AUD_ERRINTRPTTHSHLD3_R
, 0x0000000f},
396 {AUD_PDF_DDS_CNST_BYTE2
, 0x06},
397 {AUD_PDF_DDS_CNST_BYTE1
, 0x82},
398 {AUD_PDF_DDS_CNST_BYTE0
, 0x12},
399 {AUD_QAM_MODE
, 0x05},
400 {AUD_PHACC_FREQ_8MSB
, 0x34},
401 {AUD_PHACC_FREQ_8LSB
, 0x4c},
402 {AUD_RATE_ADJ1
, 0x00000100},
403 {AUD_RATE_ADJ2
, 0x00000200},
404 {AUD_RATE_ADJ3
, 0x00000300},
405 {AUD_RATE_ADJ4
, 0x00000400},
406 {AUD_RATE_ADJ5
, 0x00000500},
407 {AUD_THR_FR
, 0x00000000},
408 {AAGC_HYST
, 0x0000001a},
409 {AUD_PILOT_BQD_1_K0
, 0x0000755b},
410 {AUD_PILOT_BQD_1_K1
, 0x00551340},
411 {AUD_PILOT_BQD_1_K2
, 0x006d30be},
412 {AUD_PILOT_BQD_1_K3
, 0xffd394af},
413 {AUD_PILOT_BQD_1_K4
, 0x00400000},
414 {AUD_PILOT_BQD_2_K0
, 0x00040000},
415 {AUD_PILOT_BQD_2_K1
, 0x002a4841},
416 {AUD_PILOT_BQD_2_K2
, 0x00400000},
417 {AUD_PILOT_BQD_2_K3
, 0x00000000},
418 {AUD_PILOT_BQD_2_K4
, 0x00000000},
419 {AUD_MODE_CHG_TIMER
, 0x00000040},
420 {AUD_AFE_12DB_EN
, 0x00000001},
421 {AUD_CORDIC_SHIFT_0
, 0x00000007},
422 {AUD_CORDIC_SHIFT_1
, 0x00000007},
423 {AUD_DEEMPH0_G0
, 0x00000380},
424 {AUD_DEEMPH1_G0
, 0x00000380},
425 {AUD_DCOC_0_SRC
, 0x0000001a},
426 {AUD_DCOC0_SHIFT
, 0x00000000},
427 {AUD_DCOC_0_SHIFT_IN0
, 0x0000000a},
428 {AUD_DCOC_0_SHIFT_IN1
, 0x00000008},
429 {AUD_DCOC_PASS_IN
, 0x00000003},
430 {AUD_IIR3_0_SEL
, 0x00000021},
431 {AUD_DN2_AFC
, 0x00000002},
432 {AUD_DCOC_1_SRC
, 0x0000001b},
433 {AUD_DCOC1_SHIFT
, 0x00000000},
434 {AUD_DCOC_1_SHIFT_IN0
, 0x0000000a},
435 {AUD_DCOC_1_SHIFT_IN1
, 0x00000008},
436 {AUD_IIR3_1_SEL
, 0x00000023},
437 {AUD_RDSI_SEL
, 0x00000017},
438 {AUD_RDSI_SHIFT
, 0x00000000},
439 {AUD_RDSQ_SEL
, 0x00000017},
440 {AUD_RDSQ_SHIFT
, 0x00000000},
441 {AUD_PLL_INT
, 0x0000001e},
442 {AUD_PLL_DDS
, 0x00000000},
443 {AUD_PLL_FRAC
, 0x0000e542},
444 {AUD_POLYPH80SCALEFAC
, 0x00000001},
445 {AUD_START_TIMER
, 0x00000000},
446 { /* end of list */ },
449 static const struct rlist a2_bg
[] = {
450 {AUD_DMD_RA_DDS
, 0x002a4f2f},
451 {AUD_C1_UP_THR
, 0x00007000},
452 {AUD_C1_LO_THR
, 0x00005400},
453 {AUD_C2_UP_THR
, 0x00005400},
454 {AUD_C2_LO_THR
, 0x00003000},
455 { /* end of list */ },
458 static const struct rlist a2_dk
[] = {
459 {AUD_DMD_RA_DDS
, 0x002a4f2f},
460 {AUD_C1_UP_THR
, 0x00007000},
461 {AUD_C1_LO_THR
, 0x00005400},
462 {AUD_C2_UP_THR
, 0x00005400},
463 {AUD_C2_LO_THR
, 0x00003000},
464 {AUD_DN0_FREQ
, 0x00003a1c},
465 {AUD_DN2_FREQ
, 0x0000d2e0},
466 { /* end of list */ },
469 static const struct rlist a1_i
[] = {
470 {AUD_ERRLOGPERIOD_R
, 0x00000064},
471 {AUD_ERRINTRPTTHSHLD1_R
, 0x00000fff},
472 {AUD_ERRINTRPTTHSHLD2_R
, 0x0000001f},
473 {AUD_ERRINTRPTTHSHLD3_R
, 0x0000000f},
474 {AUD_PDF_DDS_CNST_BYTE2
, 0x06},
475 {AUD_PDF_DDS_CNST_BYTE1
, 0x82},
476 {AUD_PDF_DDS_CNST_BYTE0
, 0x12},
477 {AUD_QAM_MODE
, 0x05},
478 {AUD_PHACC_FREQ_8MSB
, 0x3a},
479 {AUD_PHACC_FREQ_8LSB
, 0x93},
480 {AUD_DMD_RA_DDS
, 0x002a4f2f},
481 {AUD_PLL_INT
, 0x0000001e},
482 {AUD_PLL_DDS
, 0x00000004},
483 {AUD_PLL_FRAC
, 0x0000e542},
484 {AUD_RATE_ADJ1
, 0x00000100},
485 {AUD_RATE_ADJ2
, 0x00000200},
486 {AUD_RATE_ADJ3
, 0x00000300},
487 {AUD_RATE_ADJ4
, 0x00000400},
488 {AUD_RATE_ADJ5
, 0x00000500},
489 {AUD_THR_FR
, 0x00000000},
490 {AUD_PILOT_BQD_1_K0
, 0x0000755b},
491 {AUD_PILOT_BQD_1_K1
, 0x00551340},
492 {AUD_PILOT_BQD_1_K2
, 0x006d30be},
493 {AUD_PILOT_BQD_1_K3
, 0xffd394af},
494 {AUD_PILOT_BQD_1_K4
, 0x00400000},
495 {AUD_PILOT_BQD_2_K0
, 0x00040000},
496 {AUD_PILOT_BQD_2_K1
, 0x002a4841},
497 {AUD_PILOT_BQD_2_K2
, 0x00400000},
498 {AUD_PILOT_BQD_2_K3
, 0x00000000},
499 {AUD_PILOT_BQD_2_K4
, 0x00000000},
500 {AUD_MODE_CHG_TIMER
, 0x00000060},
501 {AUD_AFE_12DB_EN
, 0x00000001},
502 {AAGC_HYST
, 0x0000000a},
503 {AUD_CORDIC_SHIFT_0
, 0x00000007},
504 {AUD_CORDIC_SHIFT_1
, 0x00000007},
505 {AUD_C1_UP_THR
, 0x00007000},
506 {AUD_C1_LO_THR
, 0x00005400},
507 {AUD_C2_UP_THR
, 0x00005400},
508 {AUD_C2_LO_THR
, 0x00003000},
509 {AUD_DCOC_0_SRC
, 0x0000001a},
510 {AUD_DCOC0_SHIFT
, 0x00000000},
511 {AUD_DCOC_0_SHIFT_IN0
, 0x0000000a},
512 {AUD_DCOC_0_SHIFT_IN1
, 0x00000008},
513 {AUD_DCOC_PASS_IN
, 0x00000003},
514 {AUD_IIR3_0_SEL
, 0x00000021},
515 {AUD_DN2_AFC
, 0x00000002},
516 {AUD_DCOC_1_SRC
, 0x0000001b},
517 {AUD_DCOC1_SHIFT
, 0x00000000},
518 {AUD_DCOC_1_SHIFT_IN0
, 0x0000000a},
519 {AUD_DCOC_1_SHIFT_IN1
, 0x00000008},
520 {AUD_IIR3_1_SEL
, 0x00000023},
521 {AUD_DN0_FREQ
, 0x000035a3},
522 {AUD_DN2_FREQ
, 0x000029c7},
523 {AUD_CRDC0_SRC_SEL
, 0x00000511},
524 {AUD_IIR1_0_SEL
, 0x00000001},
525 {AUD_IIR1_1_SEL
, 0x00000000},
526 {AUD_IIR3_2_SEL
, 0x00000003},
527 {AUD_IIR3_2_SHIFT
, 0x00000000},
528 {AUD_IIR3_0_SEL
, 0x00000002},
529 {AUD_IIR2_0_SEL
, 0x00000021},
530 {AUD_IIR2_0_SHIFT
, 0x00000002},
531 {AUD_DEEMPH0_SRC_SEL
, 0x0000000b},
532 {AUD_DEEMPH1_SRC_SEL
, 0x0000000b},
533 {AUD_POLYPH80SCALEFAC
, 0x00000001},
534 {AUD_START_TIMER
, 0x00000000},
535 { /* end of list */ },
538 static const struct rlist am_l
[] = {
539 {AUD_ERRLOGPERIOD_R
, 0x00000064},
540 {AUD_ERRINTRPTTHSHLD1_R
, 0x00000FFF},
541 {AUD_ERRINTRPTTHSHLD2_R
, 0x0000001F},
542 {AUD_ERRINTRPTTHSHLD3_R
, 0x0000000F},
543 {AUD_PDF_DDS_CNST_BYTE2
, 0x48},
544 {AUD_PDF_DDS_CNST_BYTE1
, 0x3D},
545 {AUD_QAM_MODE
, 0x00},
546 {AUD_PDF_DDS_CNST_BYTE0
, 0xf5},
547 {AUD_PHACC_FREQ_8MSB
, 0x3a},
548 {AUD_PHACC_FREQ_8LSB
, 0x4a},
549 {AUD_DEEMPHGAIN_R
, 0x00006680},
550 {AUD_DEEMPHNUMER1_R
, 0x000353DE},
551 {AUD_DEEMPHNUMER2_R
, 0x000001B1},
552 {AUD_DEEMPHDENOM1_R
, 0x0000F3D0},
553 {AUD_DEEMPHDENOM2_R
, 0x00000000},
554 {AUD_FM_MODE_ENABLE
, 0x00000007},
555 {AUD_POLYPH80SCALEFAC
, 0x00000003},
556 {AUD_AFE_12DB_EN
, 0x00000001},
557 {AAGC_GAIN
, 0x00000000},
558 {AAGC_HYST
, 0x00000018},
559 {AAGC_DEF
, 0x00000020},
560 {AUD_DN0_FREQ
, 0x00000000},
561 {AUD_POLY0_DDS_CONSTANT
, 0x000E4DB2},
562 {AUD_DCOC_0_SRC
, 0x00000021},
563 {AUD_IIR1_0_SEL
, 0x00000000},
564 {AUD_IIR1_0_SHIFT
, 0x00000007},
565 {AUD_IIR1_1_SEL
, 0x00000002},
566 {AUD_IIR1_1_SHIFT
, 0x00000000},
567 {AUD_DCOC_1_SRC
, 0x00000003},
568 {AUD_DCOC1_SHIFT
, 0x00000000},
569 {AUD_DCOC_PASS_IN
, 0x00000000},
570 {AUD_IIR1_2_SEL
, 0x00000023},
571 {AUD_IIR1_2_SHIFT
, 0x00000000},
572 {AUD_IIR1_3_SEL
, 0x00000004},
573 {AUD_IIR1_3_SHIFT
, 0x00000007},
574 {AUD_IIR1_4_SEL
, 0x00000005},
575 {AUD_IIR1_4_SHIFT
, 0x00000007},
576 {AUD_IIR3_0_SEL
, 0x00000007},
577 {AUD_IIR3_0_SHIFT
, 0x00000000},
578 {AUD_DEEMPH0_SRC_SEL
, 0x00000011},
579 {AUD_DEEMPH0_SHIFT
, 0x00000000},
580 {AUD_DEEMPH0_G0
, 0x00007000},
581 {AUD_DEEMPH0_A0
, 0x00000000},
582 {AUD_DEEMPH0_B0
, 0x00000000},
583 {AUD_DEEMPH0_A1
, 0x00000000},
584 {AUD_DEEMPH0_B1
, 0x00000000},
585 {AUD_DEEMPH1_SRC_SEL
, 0x00000011},
586 {AUD_DEEMPH1_SHIFT
, 0x00000000},
587 {AUD_DEEMPH1_G0
, 0x00007000},
588 {AUD_DEEMPH1_A0
, 0x00000000},
589 {AUD_DEEMPH1_B0
, 0x00000000},
590 {AUD_DEEMPH1_A1
, 0x00000000},
591 {AUD_DEEMPH1_B1
, 0x00000000},
592 {AUD_OUT0_SEL
, 0x0000003F},
593 {AUD_OUT1_SEL
, 0x0000003F},
594 {AUD_DMD_RA_DDS
, 0x00F5C285},
595 {AUD_PLL_INT
, 0x0000001E},
596 {AUD_PLL_DDS
, 0x00000000},
597 {AUD_PLL_FRAC
, 0x0000E542},
598 {AUD_RATE_ADJ1
, 0x00000100},
599 {AUD_RATE_ADJ2
, 0x00000200},
600 {AUD_RATE_ADJ3
, 0x00000300},
601 {AUD_RATE_ADJ4
, 0x00000400},
602 {AUD_RATE_ADJ5
, 0x00000500},
603 {AUD_RATE_THRES_DMD
, 0x000000C0},
604 { /* end of list */ },
607 static const struct rlist a2_deemph50
[] = {
608 {AUD_DEEMPH0_G0
, 0x00000380},
609 {AUD_DEEMPH1_G0
, 0x00000380},
610 {AUD_DEEMPHGAIN_R
, 0x000011e1},
611 {AUD_DEEMPHNUMER1_R
, 0x0002a7bc},
612 {AUD_DEEMPHNUMER2_R
, 0x0003023c},
613 { /* end of list */ },
616 set_audio_start(core
, SEL_A2
);
617 switch (core
->tvaudio
) {
619 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__
);
620 set_audio_registers(core
, a2_bgdk_common
);
621 set_audio_registers(core
, a2_bg
);
622 set_audio_registers(core
, a2_deemph50
);
625 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__
);
626 set_audio_registers(core
, a2_bgdk_common
);
627 set_audio_registers(core
, a2_dk
);
628 set_audio_registers(core
, a2_deemph50
);
631 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__
);
632 set_audio_registers(core
, a1_i
);
633 set_audio_registers(core
, a2_deemph50
);
636 dprintk("%s AM-L (status: devel)\n", __FUNCTION__
);
637 set_audio_registers(core
, am_l
);
640 dprintk("%s Warning: wrong value\n", __FUNCTION__
);
645 mode
|= EN_FMRADIO_EN_RDS
| EN_DMTRX_SUMDIFF
;
646 set_audio_finish(core
, mode
);
649 static void set_audio_standard_EIAJ(struct cx88_core
*core
)
651 static const struct rlist eiaj
[] = {
652 /* TODO: eiaj register settings are not there yet ... */
654 { /* end of list */ },
656 dprintk("%s (status: unknown)\n", __FUNCTION__
);
658 set_audio_start(core
, SEL_EIAJ
);
659 set_audio_registers(core
, eiaj
);
660 set_audio_finish(core
, EN_EIAJ_AUTO_STEREO
);
663 static void set_audio_standard_FM(struct cx88_core
*core
,
664 enum cx88_deemph_type deemph
)
666 static const struct rlist fm_deemph_50
[] = {
667 {AUD_DEEMPH0_G0
, 0x0C45},
668 {AUD_DEEMPH0_A0
, 0x6262},
669 {AUD_DEEMPH0_B0
, 0x1C29},
670 {AUD_DEEMPH0_A1
, 0x3FC66},
671 {AUD_DEEMPH0_B1
, 0x399A},
673 {AUD_DEEMPH1_G0
, 0x0D80},
674 {AUD_DEEMPH1_A0
, 0x6262},
675 {AUD_DEEMPH1_B0
, 0x1C29},
676 {AUD_DEEMPH1_A1
, 0x3FC66},
677 {AUD_DEEMPH1_B1
, 0x399A},
679 {AUD_POLYPH80SCALEFAC
, 0x0003},
680 { /* end of list */ },
682 static const struct rlist fm_deemph_75
[] = {
683 {AUD_DEEMPH0_G0
, 0x091B},
684 {AUD_DEEMPH0_A0
, 0x6B68},
685 {AUD_DEEMPH0_B0
, 0x11EC},
686 {AUD_DEEMPH0_A1
, 0x3FC66},
687 {AUD_DEEMPH0_B1
, 0x399A},
689 {AUD_DEEMPH1_G0
, 0x0AA0},
690 {AUD_DEEMPH1_A0
, 0x6B68},
691 {AUD_DEEMPH1_B0
, 0x11EC},
692 {AUD_DEEMPH1_A1
, 0x3FC66},
693 {AUD_DEEMPH1_B1
, 0x399A},
695 {AUD_POLYPH80SCALEFAC
, 0x0003},
696 { /* end of list */ },
699 /* It is enough to leave default values? */
700 static const struct rlist fm_no_deemph
[] = {
702 {AUD_POLYPH80SCALEFAC
, 0x0003},
703 { /* end of list */ },
706 dprintk("%s (status: unknown)\n", __FUNCTION__
);
707 set_audio_start(core
, SEL_FMRADIO
);
711 set_audio_registers(core
, fm_no_deemph
);
715 set_audio_registers(core
, fm_deemph_50
);
719 set_audio_registers(core
, fm_deemph_75
);
723 set_audio_finish(core
, EN_FMRADIO_AUTO_STEREO
);
726 /* ----------------------------------------------------------- */
728 int cx88_detect_nicam(struct cx88_core
*core
)
732 dprintk("start nicam autodetect.\n");
734 for (i
= 0; i
< 6; i
++) {
735 /* if bit1=1 then nicam is detected */
736 j
+= ((cx_read(AUD_NICAM_STATUS2
) & 0x02) >> 1);
739 dprintk("nicam is detected.\n");
743 /* wait a little bit for next reading status */
747 dprintk("nicam is not detected.\n");
751 void cx88_set_tvaudio(struct cx88_core
*core
)
753 switch (core
->tvaudio
) {
755 set_audio_standard_BTSC(core
, 0, EN_BTSC_AUTO_STEREO
);
761 /* prepare all dsp registers */
762 set_audio_standard_A2(core
, EN_A2_FORCE_MONO1
);
764 /* set nicam mode - otherwise
765 AUD_NICAM_STATUS2 contains wrong values */
766 set_audio_standard_NICAM(core
, EN_NICAM_AUTO_STEREO
);
767 if (0 == cx88_detect_nicam(core
)) {
768 /* fall back to fm / am mono */
769 set_audio_standard_A2(core
, EN_A2_FORCE_MONO1
);
776 set_audio_standard_EIAJ(core
);
779 set_audio_standard_FM(core
, FM_NO_DEEMPH
);
783 printk("%s/0: unknown tv audio mode [%d]\n",
784 core
->name
, core
->tvaudio
);
790 void cx88_newstation(struct cx88_core
*core
)
792 core
->audiomode_manual
= UNSET
;
795 void cx88_get_stereo(struct cx88_core
*core
, struct v4l2_tuner
*t
)
797 static char *m
[] = { "stereo", "dual mono", "mono", "sap" };
798 static char *p
[] = { "no pilot", "pilot c1", "pilot c2", "?" };
799 u32 reg
, mode
, pilot
;
801 reg
= cx_read(AUD_STATUS
);
803 pilot
= (reg
>> 2) & 0x03;
805 if (core
->astat
!= reg
)
806 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
807 reg
, m
[mode
], p
[pilot
],
808 aud_ctl_names
[cx_read(AUD_CTL
) & 63]);
812 Reading from AUD_STATUS is not enough
813 for auto-detecting sap/dual-fm/nicam.
814 Add some code here later.
818 t
->capability
= V4L2_TUNER_CAP_STEREO
| V4L2_TUNER_CAP_SAP
|
819 V4L2_TUNER_CAP_LANG1
| V4L2_TUNER_CAP_LANG2
;
820 t
->rxsubchans
= V4L2_TUNER_SUB_MONO
;
821 t
->audmode
= V4L2_TUNER_MODE_MONO
;
823 switch (core
->tvaudio
) {
825 t
->capability
= V4L2_TUNER_CAP_STEREO
| V4L2_TUNER_CAP_SAP
;
826 t
->rxsubchans
= V4L2_TUNER_SUB_STEREO
;
829 t
->rxsubchans
|= V4L2_TUNER_SUB_SAP
;
838 V4L2_TUNER_SUB_MONO
| V4L2_TUNER_SUB_STEREO
;
840 t
->audmode
= V4L2_TUNER_MODE_STEREO
;
843 /* dual language -- FIXME */
845 V4L2_TUNER_SUB_LANG1
| V4L2_TUNER_SUB_LANG2
;
846 t
->audmode
= V4L2_TUNER_MODE_LANG1
;
851 t
->audmode
= V4L2_TUNER_MODE_STEREO
;
852 t
->rxsubchans
|= V4L2_TUNER_SUB_STEREO
;
856 if (0x0 == mode
&& !(cx_read(AUD_INIT
) & 0x04)) {
857 t
->audmode
= V4L2_TUNER_MODE_STEREO
;
858 t
->rxsubchans
|= V4L2_TUNER_SUB_STEREO
;
869 void cx88_set_stereo(struct cx88_core
*core
, u32 mode
, int manual
)
875 core
->audiomode_manual
= mode
;
877 if (UNSET
!= core
->audiomode_manual
)
880 core
->audiomode_current
= mode
;
882 switch (core
->tvaudio
) {
885 case V4L2_TUNER_MODE_MONO
:
886 set_audio_standard_BTSC(core
, 0, EN_BTSC_FORCE_MONO
);
888 case V4L2_TUNER_MODE_LANG1
:
889 set_audio_standard_BTSC(core
, 0, EN_BTSC_AUTO_STEREO
);
891 case V4L2_TUNER_MODE_LANG2
:
892 set_audio_standard_BTSC(core
, 1, EN_BTSC_FORCE_SAP
);
894 case V4L2_TUNER_MODE_STEREO
:
895 case V4L2_TUNER_MODE_LANG1_LANG2
:
896 set_audio_standard_BTSC(core
, 0, EN_BTSC_FORCE_STEREO
);
904 if (1 == core
->use_nicam
) {
906 case V4L2_TUNER_MODE_MONO
:
907 case V4L2_TUNER_MODE_LANG1
:
908 set_audio_standard_NICAM(core
,
909 EN_NICAM_FORCE_MONO1
);
911 case V4L2_TUNER_MODE_LANG2
:
912 set_audio_standard_NICAM(core
,
913 EN_NICAM_FORCE_MONO2
);
915 case V4L2_TUNER_MODE_STEREO
:
916 case V4L2_TUNER_MODE_LANG1_LANG2
:
917 set_audio_standard_NICAM(core
,
918 EN_NICAM_FORCE_STEREO
);
922 if ((core
->tvaudio
== WW_I
) || (core
->tvaudio
== WW_L
)) {
923 /* fall back to fm / am mono */
924 set_audio_standard_A2(core
, EN_A2_FORCE_MONO1
);
926 /* TODO: Add A2 autodection */
928 case V4L2_TUNER_MODE_MONO
:
929 case V4L2_TUNER_MODE_LANG1
:
930 set_audio_standard_A2(core
,
933 case V4L2_TUNER_MODE_LANG2
:
934 set_audio_standard_A2(core
,
937 case V4L2_TUNER_MODE_STEREO
:
938 case V4L2_TUNER_MODE_LANG1_LANG2
:
939 set_audio_standard_A2(core
,
948 case V4L2_TUNER_MODE_MONO
:
949 ctl
= EN_FMRADIO_FORCE_MONO
;
952 case V4L2_TUNER_MODE_STEREO
:
953 ctl
= EN_FMRADIO_AUTO_STEREO
;
961 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
962 "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
963 mask
, ctl
, cx_read(AUD_STATUS
),
964 cx_read(AUD_CTL
), cx_sread(SHADOW_AUD_VOL_CTL
));
965 cx_andor(AUD_CTL
, mask
, ctl
);
970 int cx88_audio_thread(void *data
)
972 struct cx88_core
*core
= data
;
976 dprintk("cx88: tvaudio thread started\n");
978 msleep_interruptible(1000);
979 if (kthread_should_stop())
982 /* just monitor the audio status for now ... */
983 memset(&t
, 0, sizeof(t
));
984 cx88_get_stereo(core
, &t
);
986 if (UNSET
!= core
->audiomode_manual
)
987 /* manually set, don't do anything. */
991 if (t
.rxsubchans
& V4L2_TUNER_SUB_STEREO
)
992 mode
= V4L2_TUNER_MODE_STEREO
;
994 mode
= V4L2_TUNER_MODE_MONO
;
995 if (mode
== core
->audiomode_current
)
998 /* automatically switch to best available mode */
999 cx88_set_stereo(core
, mode
, 0);
1002 dprintk("cx88: tvaudio thread exiting\n");
1006 /* ----------------------------------------------------------- */
1008 EXPORT_SYMBOL(cx88_set_tvaudio
);
1009 EXPORT_SYMBOL(cx88_newstation
);
1010 EXPORT_SYMBOL(cx88_set_stereo
);
1011 EXPORT_SYMBOL(cx88_get_stereo
);
1012 EXPORT_SYMBOL(cx88_audio_thread
);
1018 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off