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[PATCH] v4l: 771: the wm8775 is a wolfson microelectronics 24 bit 96khz adc with 4
[linux-2.6/suspend2-2.6.18.git] / drivers / serial / sunsu.c
blobf0738533f39a7f5adddb1a24737155851eed43de
1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
34 #ifdef CONFIG_SERIO
35 #include <linux/serio.h>
36 #endif
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/oplib.h>
44 #include <asm/ebus.h>
45 #ifdef CONFIG_SPARC64
46 #include <asm/isa.h>
47 #endif
48
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50 #define SUPPORT_SYSRQ
51 #endif
52
53 #include <linux/serial_core.h>
54
55 #include "suncore.h"
56
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60 #define SU_BASE_BAUD (1846200 / 16)
61
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65 /*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83 };
84
85 struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned short rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98
99 #ifdef CONFIG_SERIO
100 struct serio *serio;
101 int serio_open;
102 #endif
103 };
104
105 #define _INLINE_
106
107 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
108 {
109 offset <<= up->port.regshift;
110
111 switch (up->port.iotype) {
112 case SERIAL_IO_HUB6:
113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1);
115
116 case SERIAL_IO_MEM:
117 return readb(up->port.membase + offset);
118
119 default:
120 return inb(up->port.iobase + offset);
121 }
122 }
123
124 static _INLINE_ void
125 serial_out(struct uart_sunsu_port *up, int offset, int value)
126 {
127 #ifndef CONFIG_SPARC64
128 /*
129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
131 * gate outputs a logical one. Since we use level triggered interrupts
132 * we have lockup and watchdog reset. We cannot mask IRQ because
133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
134 * This problem is similar to what Alpha people suffer, see serial.c.
135 */
136 if (offset == UART_MCR)
137 value |= UART_MCR_OUT2;
138 #endif
139 offset <<= up->port.regshift;
140
141 switch (up->port.iotype) {
142 case SERIAL_IO_HUB6:
143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1);
145 break;
146
147 case SERIAL_IO_MEM:
148 writeb(value, up->port.membase + offset);
149 break;
150
151 default:
152 outb(value, up->port.iobase + offset);
153 }
154 }
155
156 /*
157 * We used to support using pause I/O for certain machines. We
158 * haven't supported this for a while, but just in case it's badly
159 * needed for certain old 386 machines, I've left these #define's
160 * in....
161 */
162 #define serial_inp(up, offset) serial_in(up, offset)
163 #define serial_outp(up, offset, value) serial_out(up, offset, value)
164
165
166 /*
167 * For the 16C950
168 */
169 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
170 {
171 serial_out(up, UART_SCR, offset);
172 serial_out(up, UART_ICR, value);
173 }
174
175 #if 0 /* Unused currently */
176 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177 {
178 unsigned int value;
179
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
181 serial_out(up, UART_SCR, offset);
182 value = serial_in(up, UART_ICR);
183 serial_icr_write(up, UART_ACR, up->acr);
184
185 return value;
186 }
187 #endif
188
189 #ifdef CONFIG_SERIAL_8250_RSA
190 /*
191 * Attempts to turn on the RSA FIFO. Returns zero on failure.
192 * We set the port uart clock rate if we succeed.
193 */
194 static int __enable_rsa(struct uart_sunsu_port *up)
195 {
196 unsigned char mode;
197 int result;
198
199 mode = serial_inp(up, UART_RSA_MSR);
200 result = mode & UART_RSA_MSR_FIFO;
201
202 if (!result) {
203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
204 mode = serial_inp(up, UART_RSA_MSR);
205 result = mode & UART_RSA_MSR_FIFO;
206 }
207
208 if (result)
209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
210
211 return result;
212 }
213
214 static void enable_rsa(struct uart_sunsu_port *up)
215 {
216 if (up->port.type == PORT_RSA) {
217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
218 spin_lock_irq(&up->port.lock);
219 __enable_rsa(up);
220 spin_unlock_irq(&up->port.lock);
221 }
222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
223 serial_outp(up, UART_RSA_FRR, 0);
224 }
225 }
226
227 /*
228 * Attempts to turn off the RSA FIFO. Returns zero on failure.
229 * It is unknown why interrupts were disabled in here. However,
230 * the caller is expected to preserve this behaviour by grabbing
231 * the spinlock before calling this function.
232 */
233 static void disable_rsa(struct uart_sunsu_port *up)
234 {
235 unsigned char mode;
236 int result;
237
238 if (up->port.type == PORT_RSA &&
239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
240 spin_lock_irq(&up->port.lock);
241
242 mode = serial_inp(up, UART_RSA_MSR);
243 result = !(mode & UART_RSA_MSR_FIFO);
244
245 if (!result) {
246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
247 mode = serial_inp(up, UART_RSA_MSR);
248 result = !(mode & UART_RSA_MSR_FIFO);
249 }
250
251 if (result)
252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
253 spin_unlock_irq(&up->port.lock);
254 }
255 }
256 #endif /* CONFIG_SERIAL_8250_RSA */
257
258 static inline void __stop_tx(struct uart_sunsu_port *p)
259 {
260 if (p->ier & UART_IER_THRI) {
261 p->ier &= ~UART_IER_THRI;
262 serial_out(p, UART_IER, p->ier);
263 }
264 }
265
266 static void sunsu_stop_tx(struct uart_port *port)
267 {
268 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
269
270 __stop_tx(up);
271
272 /*
273 * We really want to stop the transmitter from sending.
274 */
275 if (up->port.type == PORT_16C950) {
276 up->acr |= UART_ACR_TXDIS;
277 serial_icr_write(up, UART_ACR, up->acr);
278 }
279 }
280
281 static void sunsu_start_tx(struct uart_port *port)
282 {
283 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
284
285 if (!(up->ier & UART_IER_THRI)) {
286 up->ier |= UART_IER_THRI;
287 serial_out(up, UART_IER, up->ier);
288 }
289
290 /*
291 * Re-enable the transmitter if we disabled it.
292 */
293 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
294 up->acr &= ~UART_ACR_TXDIS;
295 serial_icr_write(up, UART_ACR, up->acr);
296 }
297 }
298
299 static void sunsu_stop_rx(struct uart_port *port)
300 {
301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
302 unsigned long flags;
303
304 spin_lock_irqsave(&up->port.lock, flags);
305 up->ier &= ~UART_IER_RLSI;
306 up->port.read_status_mask &= ~UART_LSR_DR;
307 serial_out(up, UART_IER, up->ier);
308 spin_unlock_irqrestore(&up->port.lock, flags);
309 }
310
311 static void sunsu_enable_ms(struct uart_port *port)
312 {
313 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
314 unsigned long flags;
315
316 spin_lock_irqsave(&up->port.lock, flags);
317 up->ier |= UART_IER_MSI;
318 serial_out(up, UART_IER, up->ier);
319 spin_unlock_irqrestore(&up->port.lock, flags);
320 }
321
322 static _INLINE_ struct tty_struct *
323 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
324 {
325 struct tty_struct *tty = up->port.info->tty;
326 unsigned char ch;
327 int max_count = 256;
328 int saw_console_brk = 0;
329
330 do {
331 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
332 tty->flip.work.func((void *)tty);
333 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
334 return tty; // if TTY_DONT_FLIP is set
335 }
336 ch = serial_inp(up, UART_RX);
337 *tty->flip.char_buf_ptr = ch;
338 *tty->flip.flag_buf_ptr = TTY_NORMAL;
339 up->port.icount.rx++;
340
341 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
342 UART_LSR_FE | UART_LSR_OE))) {
343 /*
344 * For statistics only
345 */
346 if (*status & UART_LSR_BI) {
347 *status &= ~(UART_LSR_FE | UART_LSR_PE);
348 up->port.icount.brk++;
349 if (up->port.cons != NULL &&
350 up->port.line == up->port.cons->index)
351 saw_console_brk = 1;
352 /*
353 * We do the SysRQ and SAK checking
354 * here because otherwise the break
355 * may get masked by ignore_status_mask
356 * or read_status_mask.
357 */
358 if (uart_handle_break(&up->port))
359 goto ignore_char;
360 } else if (*status & UART_LSR_PE)
361 up->port.icount.parity++;
362 else if (*status & UART_LSR_FE)
363 up->port.icount.frame++;
364 if (*status & UART_LSR_OE)
365 up->port.icount.overrun++;
366
367 /*
368 * Mask off conditions which should be ingored.
369 */
370 *status &= up->port.read_status_mask;
371
372 if (up->port.cons != NULL &&
373 up->port.line == up->port.cons->index) {
374 /* Recover the break flag from console xmit */
375 *status |= up->lsr_break_flag;
376 up->lsr_break_flag = 0;
377 }
378
379 if (*status & UART_LSR_BI) {
380 *tty->flip.flag_buf_ptr = TTY_BREAK;
381 } else if (*status & UART_LSR_PE)
382 *tty->flip.flag_buf_ptr = TTY_PARITY;
383 else if (*status & UART_LSR_FE)
384 *tty->flip.flag_buf_ptr = TTY_FRAME;
385 }
386 if (uart_handle_sysrq_char(&up->port, ch, regs))
387 goto ignore_char;
388 if ((*status & up->port.ignore_status_mask) == 0) {
389 tty->flip.flag_buf_ptr++;
390 tty->flip.char_buf_ptr++;
391 tty->flip.count++;
392 }
393 if ((*status & UART_LSR_OE) &&
394 tty->flip.count < TTY_FLIPBUF_SIZE) {
395 /*
396 * Overrun is special, since it's reported
397 * immediately, and doesn't affect the current
398 * character.
399 */
400 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
401 tty->flip.flag_buf_ptr++;
402 tty->flip.char_buf_ptr++;
403 tty->flip.count++;
404 }
405 ignore_char:
406 *status = serial_inp(up, UART_LSR);
407 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
408
409 if (saw_console_brk)
410 sun_do_break();
411
412 return tty;
413 }
414
415 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
416 {
417 struct circ_buf *xmit = &up->port.info->xmit;
418 int count;
419
420 if (up->port.x_char) {
421 serial_outp(up, UART_TX, up->port.x_char);
422 up->port.icount.tx++;
423 up->port.x_char = 0;
424 return;
425 }
426 if (uart_tx_stopped(&up->port)) {
427 sunsu_stop_tx(&up->port);
428 return;
429 }
430 if (uart_circ_empty(xmit)) {
431 __stop_tx(up);
432 return;
433 }
434
435 count = up->port.fifosize;
436 do {
437 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
438 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
439 up->port.icount.tx++;
440 if (uart_circ_empty(xmit))
441 break;
442 } while (--count > 0);
443
444 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
445 uart_write_wakeup(&up->port);
446
447 if (uart_circ_empty(xmit))
448 __stop_tx(up);
449 }
450
451 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
452 {
453 int status;
454
455 status = serial_in(up, UART_MSR);
456
457 if ((status & UART_MSR_ANY_DELTA) == 0)
458 return;
459
460 if (status & UART_MSR_TERI)
461 up->port.icount.rng++;
462 if (status & UART_MSR_DDSR)
463 up->port.icount.dsr++;
464 if (status & UART_MSR_DDCD)
465 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
466 if (status & UART_MSR_DCTS)
467 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
468
469 wake_up_interruptible(&up->port.info->delta_msr_wait);
470 }
471
472 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
473 {
474 struct uart_sunsu_port *up = dev_id;
475 unsigned long flags;
476 unsigned char status;
477
478 spin_lock_irqsave(&up->port.lock, flags);
479
480 do {
481 struct tty_struct *tty;
482
483 status = serial_inp(up, UART_LSR);
484 tty = NULL;
485 if (status & UART_LSR_DR)
486 tty = receive_chars(up, &status, regs);
487 check_modem_status(up);
488 if (status & UART_LSR_THRE)
489 transmit_chars(up);
490
491 spin_unlock_irqrestore(&up->port.lock, flags);
492
493 if (tty)
494 tty_flip_buffer_push(tty);
495
496 spin_lock_irqsave(&up->port.lock, flags);
497
498 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
499
500 spin_unlock_irqrestore(&up->port.lock, flags);
501
502 return IRQ_HANDLED;
503 }
504
505 /* Separate interrupt handling path for keyboard/mouse ports. */
506
507 static void
508 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
509 unsigned int iflag, unsigned int quot);
510
511 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
512 {
513 unsigned int cur_cflag = up->cflag;
514 int quot, new_baud;
515
516 up->cflag &= ~CBAUD;
517 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
518
519 quot = up->port.uartclk / (16 * new_baud);
520
521 sunsu_change_speed(&up->port, up->cflag, 0, quot);
522 }
523
524 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
525 {
526 do {
527 unsigned char ch = serial_inp(up, UART_RX);
528
529 /* Stop-A is handled by drivers/char/keyboard.c now. */
530 if (up->su_type == SU_PORT_KBD) {
531 #ifdef CONFIG_SERIO
532 serio_interrupt(up->serio, ch, 0, regs);
533 #endif
534 } else if (up->su_type == SU_PORT_MS) {
535 int ret = suncore_mouse_baud_detection(ch, is_break);
536
537 switch (ret) {
538 case 2:
539 sunsu_change_mouse_baud(up);
540 /* fallthru */
541 case 1:
542 break;
543
544 case 0:
545 #ifdef CONFIG_SERIO
546 serio_interrupt(up->serio, ch, 0, regs);
547 #endif
548 break;
549 };
550 }
551 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
552 }
553
554 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
555 {
556 struct uart_sunsu_port *up = dev_id;
557
558 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
559 unsigned char status = serial_inp(up, UART_LSR);
560
561 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
562 receive_kbd_ms_chars(up, regs,
563 (status & UART_LSR_BI) != 0);
564 }
565
566 return IRQ_HANDLED;
567 }
568
569 static unsigned int sunsu_tx_empty(struct uart_port *port)
570 {
571 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
572 unsigned long flags;
573 unsigned int ret;
574
575 spin_lock_irqsave(&up->port.lock, flags);
576 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
577 spin_unlock_irqrestore(&up->port.lock, flags);
578
579 return ret;
580 }
581
582 static unsigned int sunsu_get_mctrl(struct uart_port *port)
583 {
584 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
585 unsigned char status;
586 unsigned int ret;
587
588 status = serial_in(up, UART_MSR);
589
590 ret = 0;
591 if (status & UART_MSR_DCD)
592 ret |= TIOCM_CAR;
593 if (status & UART_MSR_RI)
594 ret |= TIOCM_RNG;
595 if (status & UART_MSR_DSR)
596 ret |= TIOCM_DSR;
597 if (status & UART_MSR_CTS)
598 ret |= TIOCM_CTS;
599 return ret;
600 }
601
602 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
603 {
604 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
605 unsigned char mcr = 0;
606
607 if (mctrl & TIOCM_RTS)
608 mcr |= UART_MCR_RTS;
609 if (mctrl & TIOCM_DTR)
610 mcr |= UART_MCR_DTR;
611 if (mctrl & TIOCM_OUT1)
612 mcr |= UART_MCR_OUT1;
613 if (mctrl & TIOCM_OUT2)
614 mcr |= UART_MCR_OUT2;
615 if (mctrl & TIOCM_LOOP)
616 mcr |= UART_MCR_LOOP;
617
618 serial_out(up, UART_MCR, mcr);
619 }
620
621 static void sunsu_break_ctl(struct uart_port *port, int break_state)
622 {
623 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
624 unsigned long flags;
625
626 spin_lock_irqsave(&up->port.lock, flags);
627 if (break_state == -1)
628 up->lcr |= UART_LCR_SBC;
629 else
630 up->lcr &= ~UART_LCR_SBC;
631 serial_out(up, UART_LCR, up->lcr);
632 spin_unlock_irqrestore(&up->port.lock, flags);
633 }
634
635 static int sunsu_startup(struct uart_port *port)
636 {
637 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
638 unsigned long flags;
639 int retval;
640
641 if (up->port.type == PORT_16C950) {
642 /* Wake up and initialize UART */
643 up->acr = 0;
644 serial_outp(up, UART_LCR, 0xBF);
645 serial_outp(up, UART_EFR, UART_EFR_ECB);
646 serial_outp(up, UART_IER, 0);
647 serial_outp(up, UART_LCR, 0);
648 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
649 serial_outp(up, UART_LCR, 0xBF);
650 serial_outp(up, UART_EFR, UART_EFR_ECB);
651 serial_outp(up, UART_LCR, 0);
652 }
653
654 #ifdef CONFIG_SERIAL_8250_RSA
655 /*
656 * If this is an RSA port, see if we can kick it up to the
657 * higher speed clock.
658 */
659 enable_rsa(up);
660 #endif
661
662 /*
663 * Clear the FIFO buffers and disable them.
664 * (they will be reeanbled in set_termios())
665 */
666 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
667 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
668 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
669 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
670 serial_outp(up, UART_FCR, 0);
671 }
672
673 /*
674 * Clear the interrupt registers.
675 */
676 (void) serial_inp(up, UART_LSR);
677 (void) serial_inp(up, UART_RX);
678 (void) serial_inp(up, UART_IIR);
679 (void) serial_inp(up, UART_MSR);
680
681 /*
682 * At this point, there's no way the LSR could still be 0xff;
683 * if it is, then bail out, because there's likely no UART
684 * here.
685 */
686 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
687 (serial_inp(up, UART_LSR) == 0xff)) {
688 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
689 return -ENODEV;
690 }
691
692 if (up->su_type != SU_PORT_PORT) {
693 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
694 SA_SHIRQ, su_typev[up->su_type], up);
695 } else {
696 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
697 SA_SHIRQ, su_typev[up->su_type], up);
698 }
699 if (retval) {
700 printk("su: Cannot register IRQ %d\n", up->port.irq);
701 return retval;
702 }
703
704 /*
705 * Now, initialize the UART
706 */
707 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
708
709 spin_lock_irqsave(&up->port.lock, flags);
710
711 up->port.mctrl |= TIOCM_OUT2;
712
713 sunsu_set_mctrl(&up->port, up->port.mctrl);
714 spin_unlock_irqrestore(&up->port.lock, flags);
715
716 /*
717 * Finally, enable interrupts. Note: Modem status interrupts
718 * are set via set_termios(), which will be occurring imminently
719 * anyway, so we don't enable them here.
720 */
721 up->ier = UART_IER_RLSI | UART_IER_RDI;
722 serial_outp(up, UART_IER, up->ier);
723
724 if (up->port.flags & ASYNC_FOURPORT) {
725 unsigned int icp;
726 /*
727 * Enable interrupts on the AST Fourport board
728 */
729 icp = (up->port.iobase & 0xfe0) | 0x01f;
730 outb_p(0x80, icp);
731 (void) inb_p(icp);
732 }
733
734 /*
735 * And clear the interrupt registers again for luck.
736 */
737 (void) serial_inp(up, UART_LSR);
738 (void) serial_inp(up, UART_RX);
739 (void) serial_inp(up, UART_IIR);
740 (void) serial_inp(up, UART_MSR);
741
742 return 0;
743 }
744
745 static void sunsu_shutdown(struct uart_port *port)
746 {
747 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
748 unsigned long flags;
749
750 /*
751 * Disable interrupts from this port
752 */
753 up->ier = 0;
754 serial_outp(up, UART_IER, 0);
755
756 spin_lock_irqsave(&up->port.lock, flags);
757 if (up->port.flags & ASYNC_FOURPORT) {
758 /* reset interrupts on the AST Fourport board */
759 inb((up->port.iobase & 0xfe0) | 0x1f);
760 up->port.mctrl |= TIOCM_OUT1;
761 } else
762 up->port.mctrl &= ~TIOCM_OUT2;
763
764 sunsu_set_mctrl(&up->port, up->port.mctrl);
765 spin_unlock_irqrestore(&up->port.lock, flags);
766
767 /*
768 * Disable break condition and FIFOs
769 */
770 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
771 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
772 UART_FCR_CLEAR_RCVR |
773 UART_FCR_CLEAR_XMIT);
774 serial_outp(up, UART_FCR, 0);
775
776 #ifdef CONFIG_SERIAL_8250_RSA
777 /*
778 * Reset the RSA board back to 115kbps compat mode.
779 */
780 disable_rsa(up);
781 #endif
782
783 /*
784 * Read data port to reset things.
785 */
786 (void) serial_in(up, UART_RX);
787
788 free_irq(up->port.irq, up);
789 }
790
791 static void
792 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
793 unsigned int iflag, unsigned int quot)
794 {
795 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
796 unsigned char cval, fcr = 0;
797 unsigned long flags;
798
799 switch (cflag & CSIZE) {
800 case CS5:
801 cval = 0x00;
802 break;
803 case CS6:
804 cval = 0x01;
805 break;
806 case CS7:
807 cval = 0x02;
808 break;
809 default:
810 case CS8:
811 cval = 0x03;
812 break;
813 }
814
815 if (cflag & CSTOPB)
816 cval |= 0x04;
817 if (cflag & PARENB)
818 cval |= UART_LCR_PARITY;
819 if (!(cflag & PARODD))
820 cval |= UART_LCR_EPAR;
821 #ifdef CMSPAR
822 if (cflag & CMSPAR)
823 cval |= UART_LCR_SPAR;
824 #endif
825
826 /*
827 * Work around a bug in the Oxford Semiconductor 952 rev B
828 * chip which causes it to seriously miscalculate baud rates
829 * when DLL is 0.
830 */
831 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
832 up->rev == 0x5201)
833 quot ++;
834
835 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
836 if ((up->port.uartclk / quot) < (2400 * 16))
837 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
838 #ifdef CONFIG_SERIAL_8250_RSA
839 else if (up->port.type == PORT_RSA)
840 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
841 #endif
842 else
843 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
844 }
845 if (up->port.type == PORT_16750)
846 fcr |= UART_FCR7_64BYTE;
847
848 /*
849 * Ok, we're now changing the port state. Do it with
850 * interrupts disabled.
851 */
852 spin_lock_irqsave(&up->port.lock, flags);
853
854 /*
855 * Update the per-port timeout.
856 */
857 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
858
859 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
860 if (iflag & INPCK)
861 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
862 if (iflag & (BRKINT | PARMRK))
863 up->port.read_status_mask |= UART_LSR_BI;
864
865 /*
866 * Characteres to ignore
867 */
868 up->port.ignore_status_mask = 0;
869 if (iflag & IGNPAR)
870 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
871 if (iflag & IGNBRK) {
872 up->port.ignore_status_mask |= UART_LSR_BI;
873 /*
874 * If we're ignoring parity and break indicators,
875 * ignore overruns too (for real raw support).
876 */
877 if (iflag & IGNPAR)
878 up->port.ignore_status_mask |= UART_LSR_OE;
879 }
880
881 /*
882 * ignore all characters if CREAD is not set
883 */
884 if ((cflag & CREAD) == 0)
885 up->port.ignore_status_mask |= UART_LSR_DR;
886
887 /*
888 * CTS flow control flag and modem status interrupts
889 */
890 up->ier &= ~UART_IER_MSI;
891 if (UART_ENABLE_MS(&up->port, cflag))
892 up->ier |= UART_IER_MSI;
893
894 serial_out(up, UART_IER, up->ier);
895
896 if (uart_config[up->port.type].flags & UART_STARTECH) {
897 serial_outp(up, UART_LCR, 0xBF);
898 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
899 }
900 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
901 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
902 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
903 if (up->port.type == PORT_16750)
904 serial_outp(up, UART_FCR, fcr); /* set fcr */
905 serial_outp(up, UART_LCR, cval); /* reset DLAB */
906 up->lcr = cval; /* Save LCR */
907 if (up->port.type != PORT_16750) {
908 if (fcr & UART_FCR_ENABLE_FIFO) {
909 /* emulated UARTs (Lucent Venus 167x) need two steps */
910 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
911 }
912 serial_outp(up, UART_FCR, fcr); /* set fcr */
913 }
914
915 up->cflag = cflag;
916
917 spin_unlock_irqrestore(&up->port.lock, flags);
918 }
919
920 static void
921 sunsu_set_termios(struct uart_port *port, struct termios *termios,
922 struct termios *old)
923 {
924 unsigned int baud, quot;
925
926 /*
927 * Ask the core to calculate the divisor for us.
928 */
929 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
930 quot = uart_get_divisor(port, baud);
931
932 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
933 }
934
935 static void sunsu_release_port(struct uart_port *port)
936 {
937 }
938
939 static int sunsu_request_port(struct uart_port *port)
940 {
941 return 0;
942 }
943
944 static void sunsu_config_port(struct uart_port *port, int flags)
945 {
946 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
947
948 if (flags & UART_CONFIG_TYPE) {
949 /*
950 * We are supposed to call autoconfig here, but this requires
951 * splitting all the OBP probing crap from the UART probing.
952 * We'll do it when we kill sunsu.c altogether.
953 */
954 port->type = up->type_probed; /* XXX */
955 }
956 }
957
958 static int
959 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
960 {
961 return -EINVAL;
962 }
963
964 static const char *
965 sunsu_type(struct uart_port *port)
966 {
967 int type = port->type;
968
969 if (type >= ARRAY_SIZE(uart_config))
970 type = 0;
971 return uart_config[type].name;
972 }
973
974 static struct uart_ops sunsu_pops = {
975 .tx_empty = sunsu_tx_empty,
976 .set_mctrl = sunsu_set_mctrl,
977 .get_mctrl = sunsu_get_mctrl,
978 .stop_tx = sunsu_stop_tx,
979 .start_tx = sunsu_start_tx,
980 .stop_rx = sunsu_stop_rx,
981 .enable_ms = sunsu_enable_ms,
982 .break_ctl = sunsu_break_ctl,
983 .startup = sunsu_startup,
984 .shutdown = sunsu_shutdown,
985 .set_termios = sunsu_set_termios,
986 .type = sunsu_type,
987 .release_port = sunsu_release_port,
988 .request_port = sunsu_request_port,
989 .config_port = sunsu_config_port,
990 .verify_port = sunsu_verify_port,
991 };
992
993 #define UART_NR 4
994
995 static struct uart_sunsu_port sunsu_ports[UART_NR];
996
997 #ifdef CONFIG_SERIO
998
999 static DEFINE_SPINLOCK(sunsu_serio_lock);
1000
1001 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
1002 {
1003 struct uart_sunsu_port *up = serio->port_data;
1004 unsigned long flags;
1005 int lsr;
1006
1007 spin_lock_irqsave(&sunsu_serio_lock, flags);
1008
1009 do {
1010 lsr = serial_in(up, UART_LSR);
1011 } while (!(lsr & UART_LSR_THRE));
1012
1013 /* Send the character out. */
1014 serial_out(up, UART_TX, ch);
1015
1016 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1017
1018 return 0;
1019 }
1020
1021 static int sunsu_serio_open(struct serio *serio)
1022 {
1023 struct uart_sunsu_port *up = serio->port_data;
1024 unsigned long flags;
1025 int ret;
1026
1027 spin_lock_irqsave(&sunsu_serio_lock, flags);
1028 if (!up->serio_open) {
1029 up->serio_open = 1;
1030 ret = 0;
1031 } else
1032 ret = -EBUSY;
1033 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1034
1035 return ret;
1036 }
1037
1038 static void sunsu_serio_close(struct serio *serio)
1039 {
1040 struct uart_sunsu_port *up = serio->port_data;
1041 unsigned long flags;
1042
1043 spin_lock_irqsave(&sunsu_serio_lock, flags);
1044 up->serio_open = 0;
1045 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1046 }
1047
1048 #endif /* CONFIG_SERIO */
1049
1050 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1051 {
1052 unsigned char status1, status2, scratch, scratch2, scratch3;
1053 unsigned char save_lcr, save_mcr;
1054 struct linux_ebus_device *dev = NULL;
1055 struct linux_ebus *ebus;
1056 #ifdef CONFIG_SPARC64
1057 struct sparc_isa_bridge *isa_br;
1058 struct sparc_isa_device *isa_dev;
1059 #endif
1060 #ifndef CONFIG_SPARC64
1061 struct linux_prom_registers reg0;
1062 #endif
1063 unsigned long flags;
1064
1065 if (!up->port_node || !up->su_type)
1066 return;
1067
1068 up->type_probed = PORT_UNKNOWN;
1069 up->port.iotype = SERIAL_IO_MEM;
1070
1071 /*
1072 * First we look for Ebus-bases su's
1073 */
1074 for_each_ebus(ebus) {
1075 for_each_ebusdev(dev, ebus) {
1076 if (dev->prom_node == up->port_node) {
1077 /*
1078 * The EBus is broken on sparc; it delivers
1079 * virtual addresses in resources. Oh well...
1080 * This is correct on sparc64, though.
1081 */
1082 up->port.membase = (char *) dev->resource[0].start;
1083 /*
1084 * This is correct on both architectures.
1085 */
1086 up->port.mapbase = dev->resource[0].start;
1087 up->port.irq = dev->irqs[0];
1088 goto ebus_done;
1089 }
1090 }
1091 }
1092
1093 #ifdef CONFIG_SPARC64
1094 for_each_isa(isa_br) {
1095 for_each_isadev(isa_dev, isa_br) {
1096 if (isa_dev->prom_node == up->port_node) {
1097 /* Same on sparc64. Cool architecure... */
1098 up->port.membase = (char *) isa_dev->resource.start;
1099 up->port.mapbase = isa_dev->resource.start;
1100 up->port.irq = isa_dev->irq;
1101 goto ebus_done;
1102 }
1103 }
1104 }
1105 #endif
1106
1107 #ifdef CONFIG_SPARC64
1108 /*
1109 * Not on Ebus, bailing.
1110 */
1111 return;
1112 #else
1113 /*
1114 * Not on Ebus, must be OBIO.
1115 */
1116 if (prom_getproperty(up->port_node, "reg",
1117 (char *)&reg0, sizeof(reg0)) == -1) {
1118 prom_printf("sunsu: no \"reg\" property\n");
1119 return;
1120 }
1121 prom_apply_obio_ranges(&reg0, 1);
1122 if (reg0.which_io != 0) { /* Just in case... */
1123 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1124 reg0.which_io, reg0.phys_addr);
1125 return;
1126 }
1127 up->port.mapbase = reg0.phys_addr;
1128 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1129 prom_printf("sunsu: Cannot map registers.\n");
1130 return;
1131 }
1132
1133 /*
1134 * 0x20 is sun4m thing, Dave Redman heritage.
1135 * See arch/sparc/kernel/irq.c.
1136 */
1137 #define IRQ_4M(n) ((n)|0x20)
1138
1139 /*
1140 * There is no intr property on MrCoffee, so hardwire it.
1141 */
1142 up->port.irq = IRQ_4M(13);
1143 #endif
1144
1145 ebus_done:
1146
1147 spin_lock_irqsave(&up->port.lock, flags);
1148
1149 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1150 /*
1151 * Do a simple existence test first; if we fail this, there's
1152 * no point trying anything else.
1153 *
1154 * 0x80 is used as a nonsense port to prevent against false
1155 * positives due to ISA bus float. The assumption is that
1156 * 0x80 is a non-existent port; which should be safe since
1157 * include/asm/io.h also makes this assumption.
1158 */
1159 scratch = serial_inp(up, UART_IER);
1160 serial_outp(up, UART_IER, 0);
1161 #ifdef __i386__
1162 outb(0xff, 0x080);
1163 #endif
1164 scratch2 = serial_inp(up, UART_IER);
1165 serial_outp(up, UART_IER, 0x0f);
1166 #ifdef __i386__
1167 outb(0, 0x080);
1168 #endif
1169 scratch3 = serial_inp(up, UART_IER);
1170 serial_outp(up, UART_IER, scratch);
1171 if (scratch2 != 0 || scratch3 != 0x0F)
1172 goto out; /* We failed; there's nothing here */
1173 }
1174
1175 save_mcr = serial_in(up, UART_MCR);
1176 save_lcr = serial_in(up, UART_LCR);
1177
1178 /*
1179 * Check to see if a UART is really there. Certain broken
1180 * internal modems based on the Rockwell chipset fail this
1181 * test, because they apparently don't implement the loopback
1182 * test mode. So this test is skipped on the COM 1 through
1183 * COM 4 ports. This *should* be safe, since no board
1184 * manufacturer would be stupid enough to design a board
1185 * that conflicts with COM 1-4 --- we hope!
1186 */
1187 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1188 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1189 status1 = serial_inp(up, UART_MSR) & 0xF0;
1190 serial_outp(up, UART_MCR, save_mcr);
1191 if (status1 != 0x90)
1192 goto out; /* We failed loopback test */
1193 }
1194 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1195 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1196 serial_outp(up, UART_LCR, 0);
1197 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1198 scratch = serial_in(up, UART_IIR) >> 6;
1199 switch (scratch) {
1200 case 0:
1201 up->port.type = PORT_16450;
1202 break;
1203 case 1:
1204 up->port.type = PORT_UNKNOWN;
1205 break;
1206 case 2:
1207 up->port.type = PORT_16550;
1208 break;
1209 case 3:
1210 up->port.type = PORT_16550A;
1211 break;
1212 }
1213 if (up->port.type == PORT_16550A) {
1214 /* Check for Startech UART's */
1215 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1216 if (serial_in(up, UART_EFR) == 0) {
1217 up->port.type = PORT_16650;
1218 } else {
1219 serial_outp(up, UART_LCR, 0xBF);
1220 if (serial_in(up, UART_EFR) == 0)
1221 up->port.type = PORT_16650V2;
1222 }
1223 }
1224 if (up->port.type == PORT_16550A) {
1225 /* Check for TI 16750 */
1226 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1227 serial_outp(up, UART_FCR,
1228 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1229 scratch = serial_in(up, UART_IIR) >> 5;
1230 if (scratch == 7) {
1231 /*
1232 * If this is a 16750, and not a cheap UART
1233 * clone, then it should only go into 64 byte
1234 * mode if the UART_FCR7_64BYTE bit was set
1235 * while UART_LCR_DLAB was latched.
1236 */
1237 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1238 serial_outp(up, UART_LCR, 0);
1239 serial_outp(up, UART_FCR,
1240 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1241 scratch = serial_in(up, UART_IIR) >> 5;
1242 if (scratch == 6)
1243 up->port.type = PORT_16750;
1244 }
1245 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1246 }
1247 serial_outp(up, UART_LCR, save_lcr);
1248 if (up->port.type == PORT_16450) {
1249 scratch = serial_in(up, UART_SCR);
1250 serial_outp(up, UART_SCR, 0xa5);
1251 status1 = serial_in(up, UART_SCR);
1252 serial_outp(up, UART_SCR, 0x5a);
1253 status2 = serial_in(up, UART_SCR);
1254 serial_outp(up, UART_SCR, scratch);
1255
1256 if ((status1 != 0xa5) || (status2 != 0x5a))
1257 up->port.type = PORT_8250;
1258 }
1259
1260 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1261
1262 if (up->port.type == PORT_UNKNOWN)
1263 goto out;
1264 up->type_probed = up->port.type; /* XXX */
1265
1266 /*
1267 * Reset the UART.
1268 */
1269 #ifdef CONFIG_SERIAL_8250_RSA
1270 if (up->port.type == PORT_RSA)
1271 serial_outp(up, UART_RSA_FRR, 0);
1272 #endif
1273 serial_outp(up, UART_MCR, save_mcr);
1274 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1275 UART_FCR_CLEAR_RCVR |
1276 UART_FCR_CLEAR_XMIT));
1277 serial_outp(up, UART_FCR, 0);
1278 (void)serial_in(up, UART_RX);
1279 serial_outp(up, UART_IER, 0);
1280
1281 out:
1282 spin_unlock_irqrestore(&up->port.lock, flags);
1283 }
1284
1285 static struct uart_driver sunsu_reg = {
1286 .owner = THIS_MODULE,
1287 .driver_name = "serial",
1288 .devfs_name = "tts/",
1289 .dev_name = "ttyS",
1290 .major = TTY_MAJOR,
1291 };
1292
1293 static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1294 {
1295 int quot, baud;
1296 #ifdef CONFIG_SERIO
1297 struct serio *serio;
1298 #endif
1299
1300 up->port.line = channel;
1301 up->port.type = PORT_UNKNOWN;
1302 up->port.uartclk = (SU_BASE_BAUD * 16);
1303
1304 if (up->su_type == SU_PORT_KBD) {
1305 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1306 baud = 1200;
1307 } else {
1308 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1309 baud = 4800;
1310 }
1311 quot = up->port.uartclk / (16 * baud);
1312
1313 sunsu_autoconfig(up);
1314 if (up->port.type == PORT_UNKNOWN)
1315 return -1;
1316
1317 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1318 channel,
1319 up->port.membase, __irq_itoa(up->port.irq),
1320 sunsu_type(&up->port));
1321
1322 #ifdef CONFIG_SERIO
1323 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1324 if (serio) {
1325 memset(serio, 0, sizeof(*serio));
1326
1327 serio->port_data = up;
1328
1329 serio->id.type = SERIO_RS232;
1330 if (up->su_type == SU_PORT_KBD) {
1331 serio->id.proto = SERIO_SUNKBD;
1332 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1333 } else {
1334 serio->id.proto = SERIO_SUN;
1335 serio->id.extra = 1;
1336 strlcpy(serio->name, "sums", sizeof(serio->name));
1337 }
1338 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1339 sizeof(serio->phys));
1340
1341 serio->write = sunsu_serio_write;
1342 serio->open = sunsu_serio_open;
1343 serio->close = sunsu_serio_close;
1344
1345 serio_register_port(serio);
1346 } else {
1347 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1348 channel);
1349 }
1350 #endif
1351
1352 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1353
1354 sunsu_startup(&up->port);
1355 return 0;
1356 }
1357
1358 /*
1359 * ------------------------------------------------------------
1360 * Serial console driver
1361 * ------------------------------------------------------------
1362 */
1363
1364 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1365
1366 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1367
1368 /*
1369 * Wait for transmitter & holding register to empty
1370 */
1371 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1372 {
1373 unsigned int status, tmout = 10000;
1374
1375 /* Wait up to 10ms for the character(s) to be sent. */
1376 do {
1377 status = serial_in(up, UART_LSR);
1378
1379 if (status & UART_LSR_BI)
1380 up->lsr_break_flag = UART_LSR_BI;
1381
1382 if (--tmout == 0)
1383 break;
1384 udelay(1);
1385 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1386
1387 /* Wait up to 1s for flow control if necessary */
1388 if (up->port.flags & ASYNC_CONS_FLOW) {
1389 tmout = 1000000;
1390 while (--tmout &&
1391 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1392 udelay(1);
1393 }
1394 }
1395
1396 /*
1397 * Print a string to the serial port trying not to disturb
1398 * any possible real use of the port...
1399 */
1400 static void sunsu_console_write(struct console *co, const char *s,
1401 unsigned int count)
1402 {
1403 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1404 unsigned int ier;
1405 int i;
1406
1407 /*
1408 * First save the UER then disable the interrupts
1409 */
1410 ier = serial_in(up, UART_IER);
1411 serial_out(up, UART_IER, 0);
1412
1413 /*
1414 * Now, do each character
1415 */
1416 for (i = 0; i < count; i++, s++) {
1417 wait_for_xmitr(up);
1418
1419 /*
1420 * Send the character out.
1421 * If a LF, also do CR...
1422 */
1423 serial_out(up, UART_TX, *s);
1424 if (*s == 10) {
1425 wait_for_xmitr(up);
1426 serial_out(up, UART_TX, 13);
1427 }
1428 }
1429
1430 /*
1431 * Finally, wait for transmitter to become empty
1432 * and restore the IER
1433 */
1434 wait_for_xmitr(up);
1435 serial_out(up, UART_IER, ier);
1436 }
1437
1438 /*
1439 * Setup initial baud/bits/parity. We do two things here:
1440 * - construct a cflag setting for the first su_open()
1441 * - initialize the serial port
1442 * Return non-zero if we didn't find a serial port.
1443 */
1444 static int sunsu_console_setup(struct console *co, char *options)
1445 {
1446 struct uart_port *port;
1447 int baud = 9600;
1448 int bits = 8;
1449 int parity = 'n';
1450 int flow = 'n';
1451
1452 printk("Console: ttyS%d (SU)\n",
1453 (sunsu_reg.minor - 64) + co->index);
1454
1455 /*
1456 * Check whether an invalid uart number has been specified, and
1457 * if so, search for the first available port that does have
1458 * console support.
1459 */
1460 if (co->index >= UART_NR)
1461 co->index = 0;
1462 port = &sunsu_ports[co->index].port;
1463
1464 /*
1465 * Temporary fix.
1466 */
1467 spin_lock_init(&port->lock);
1468
1469 if (options)
1470 uart_parse_options(options, &baud, &parity, &bits, &flow);
1471
1472 return uart_set_options(port, co, baud, parity, bits, flow);
1473 }
1474
1475 static struct console sunsu_cons = {
1476 .name = "ttyS",
1477 .write = sunsu_console_write,
1478 .device = uart_console_device,
1479 .setup = sunsu_console_setup,
1480 .flags = CON_PRINTBUFFER,
1481 .index = -1,
1482 .data = &sunsu_reg,
1483 };
1484 #define SUNSU_CONSOLE (&sunsu_cons)
1485
1486 /*
1487 * Register console.
1488 */
1489
1490 static int __init sunsu_serial_console_init(void)
1491 {
1492 int i;
1493
1494 if (con_is_present())
1495 return 0;
1496
1497 for (i = 0; i < UART_NR; i++) {
1498 int this_minor = sunsu_reg.minor + i;
1499
1500 if ((this_minor - 64) == (serial_console - 1))
1501 break;
1502 }
1503 if (i == UART_NR)
1504 return 0;
1505 if (sunsu_ports[i].port_node == 0)
1506 return 0;
1507
1508 sunsu_cons.index = i;
1509 register_console(&sunsu_cons);
1510 return 0;
1511 }
1512 #else
1513 #define SUNSU_CONSOLE (NULL)
1514 #define sunsu_serial_console_init() do { } while (0)
1515 #endif
1516
1517 static int __init sunsu_serial_init(void)
1518 {
1519 int instance, ret, i;
1520
1521 /* How many instances do we need? */
1522 instance = 0;
1523 for (i = 0; i < UART_NR; i++) {
1524 struct uart_sunsu_port *up = &sunsu_ports[i];
1525
1526 if (up->su_type == SU_PORT_MS ||
1527 up->su_type == SU_PORT_KBD)
1528 continue;
1529
1530 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1531 up->port.type = PORT_UNKNOWN;
1532 up->port.uartclk = (SU_BASE_BAUD * 16);
1533
1534 sunsu_autoconfig(up);
1535 if (up->port.type == PORT_UNKNOWN)
1536 continue;
1537
1538 up->port.line = instance++;
1539 up->port.ops = &sunsu_pops;
1540 }
1541
1542 sunsu_reg.minor = sunserial_current_minor;
1543 sunserial_current_minor += instance;
1544
1545 sunsu_reg.nr = instance;
1546 sunsu_reg.cons = SUNSU_CONSOLE;
1547
1548 ret = uart_register_driver(&sunsu_reg);
1549 if (ret < 0)
1550 return ret;
1551
1552 sunsu_serial_console_init();
1553 for (i = 0; i < UART_NR; i++) {
1554 struct uart_sunsu_port *up = &sunsu_ports[i];
1555
1556 /* Do not register Keyboard/Mouse lines with UART
1557 * layer.
1558 */
1559 if (up->su_type == SU_PORT_MS ||
1560 up->su_type == SU_PORT_KBD)
1561 continue;
1562
1563 if (up->port.type == PORT_UNKNOWN)
1564 continue;
1565
1566 uart_add_one_port(&sunsu_reg, &up->port);
1567 }
1568
1569 return 0;
1570 }
1571
1572 static int su_node_ok(int node, char *name, int namelen)
1573 {
1574 if (strncmp(name, "su", namelen) == 0 ||
1575 strncmp(name, "su_pnp", namelen) == 0)
1576 return 1;
1577
1578 if (strncmp(name, "serial", namelen) == 0) {
1579 char compat[32];
1580 int clen;
1581
1582 /* Is it _really_ a 'su' device? */
1583 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1584 if (clen > 0) {
1585 if (strncmp(compat, "sab82532", 8) == 0) {
1586 /* Nope, Siemens serial, not for us. */
1587 return 0;
1588 }
1589 }
1590 return 1;
1591 }
1592
1593 return 0;
1594 }
1595
1596 #define SU_PROPSIZE 128
1597
1598 /*
1599 * Scan status structure.
1600 * "prop" is a local variable but it eats stack to keep it in each
1601 * stack frame of a recursive procedure.
1602 */
1603 struct su_probe_scan {
1604 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1605 int msx, kbx; /* minors for mouse and keyboard */
1606 int devices; /* scan index */
1607 char prop[SU_PROPSIZE];
1608 };
1609
1610 /*
1611 * We have several platforms which present 'su' in different parts
1612 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1613 * We walk over the tree and find them wherever PROM hides them.
1614 */
1615 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1616 {
1617 struct uart_sunsu_port *up;
1618 int len;
1619
1620 if (t->devices >= UART_NR)
1621 return;
1622
1623 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1624 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1625 if (len <= 1)
1626 continue; /* Broken PROM node */
1627
1628 if (su_node_ok(sunode, t->prop, len)) {
1629 up = &sunsu_ports[t->devices];
1630 if (t->kbnode != 0 && sunode == t->kbnode) {
1631 t->kbx = t->devices;
1632 up->su_type = SU_PORT_KBD;
1633 } else if (t->msnode != 0 && sunode == t->msnode) {
1634 t->msx = t->devices;
1635 up->su_type = SU_PORT_MS;
1636 } else {
1637 #ifdef CONFIG_SPARC64
1638 /*
1639 * Do not attempt to use the truncated
1640 * keyboard/mouse ports as serial ports
1641 * on Ultras with PC keyboard attached.
1642 */
1643 if (prom_getbool(sunode, "mouse"))
1644 continue;
1645 if (prom_getbool(sunode, "keyboard"))
1646 continue;
1647 #endif
1648 up->su_type = SU_PORT_PORT;
1649 }
1650 up->port_node = sunode;
1651 ++t->devices;
1652 } else {
1653 su_probe_any(t, prom_getchild(sunode));
1654 }
1655 }
1656 }
1657
1658 static int __init sunsu_probe(void)
1659 {
1660 int node;
1661 int len;
1662 struct su_probe_scan scan;
1663
1664 /*
1665 * First, we scan the tree.
1666 */
1667 scan.devices = 0;
1668 scan.msx = -1;
1669 scan.kbx = -1;
1670 scan.kbnode = 0;
1671 scan.msnode = 0;
1672
1673 /*
1674 * Get the nodes for keyboard and mouse from 'aliases'...
1675 */
1676 node = prom_getchild(prom_root_node);
1677 node = prom_searchsiblings(node, "aliases");
1678 if (node != 0) {
1679 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1680 if (len > 0) {
1681 scan.prop[len] = 0;
1682 scan.kbnode = prom_finddevice(scan.prop);
1683 }
1684
1685 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1686 if (len > 0) {
1687 scan.prop[len] = 0;
1688 scan.msnode = prom_finddevice(scan.prop);
1689 }
1690 }
1691
1692 su_probe_any(&scan, prom_getchild(prom_root_node));
1693
1694 /*
1695 * Second, we process the special case of keyboard and mouse.
1696 *
1697 * Currently if we got keyboard and mouse hooked to "su" ports
1698 * we do not use any possible remaining "su" as a serial port.
1699 * Thus, we ignore values of .msx and .kbx, then compact ports.
1700 */
1701 if (scan.msx != -1 && scan.kbx != -1) {
1702 sunsu_ports[0].su_type = SU_PORT_MS;
1703 sunsu_ports[0].port_node = scan.msnode;
1704 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1705
1706 sunsu_ports[1].su_type = SU_PORT_KBD;
1707 sunsu_ports[1].port_node = scan.kbnode;
1708 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1709
1710 return 0;
1711 }
1712
1713 if (scan.msx != -1 || scan.kbx != -1) {
1714 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1715 return -ENODEV;
1716 }
1717
1718 if (scan.devices == 0)
1719 return -ENODEV;
1720
1721 /*
1722 * Console must be initiated after the generic initialization.
1723 */
1724 sunsu_serial_init();
1725
1726 return 0;
1727 }
1728
1729 static void __exit sunsu_exit(void)
1730 {
1731 int i, saw_uart;
1732
1733 saw_uart = 0;
1734 for (i = 0; i < UART_NR; i++) {
1735 struct uart_sunsu_port *up = &sunsu_ports[i];
1736
1737 if (up->su_type == SU_PORT_MS ||
1738 up->su_type == SU_PORT_KBD) {
1739 #ifdef CONFIG_SERIO
1740 if (up->serio) {
1741 serio_unregister_port(up->serio);
1742 up->serio = NULL;
1743 }
1744 #endif
1745 } else if (up->port.type != PORT_UNKNOWN) {
1746 uart_remove_one_port(&sunsu_reg, &up->port);
1747 saw_uart++;
1748 }
1749 }
1750
1751 if (saw_uart)
1752 uart_unregister_driver(&sunsu_reg);
1753 }
1754
1755 module_init(sunsu_probe);
1756 module_exit(sunsu_exit);
Software Suspend 2 for 2.6.18.y (mirror)