arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/crash_dump.h>
  39 #include <linux/root_dev.h>
  40 #include <linux/pci.h>
  41 #include <linux/acpi.h>
  42 #include <linux/kallsyms.h>
  43 #include <linux/edd.h>
  44 #include <linux/mmzone.h>
  45 #include <linux/kexec.h>
  46 #include <linux/cpufreq.h>
  47 #include <linux/dmi.h>
  48 #include <linux/dma-mapping.h>
  49 #include <linux/ctype.h>
  50
  51 #include <asm/mtrr.h>
  52 #include <asm/uaccess.h>
  53 #include <asm/system.h>
  54 #include <asm/io.h>
  55 #include <asm/smp.h>
  56 #include <asm/msr.h>
  57 #include <asm/desc.h>
  58 #include <video/edid.h>
  59 #include <asm/e820.h>
  60 #include <asm/dma.h>
  61 #include <asm/mpspec.h>
  62 #include <asm/mmu_context.h>
  63 #include <asm/bootsetup.h>
  64 #include <asm/proto.h>
  65 #include <asm/setup.h>
  66 #include <asm/mach_apic.h>
  67 #include <asm/numa.h>
  68 #include <asm/swiotlb.h>
  69 #include <asm/sections.h>
  70 #include <asm/gart-mapping.h>
  71 #include <asm/dmi.h>
  72
  73 /*
  74  * Machine setup..
  75  */
  76
  77 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  78
  79 unsigned long mmu_cr4_features;
  80
  81 int acpi_disabled;
  82 EXPORT_SYMBOL(acpi_disabled);
  83 #ifdef  CONFIG_ACPI
  84 extern int __initdata acpi_ht;
  85 extern acpi_interrupt_flags     acpi_sci_flags;
  86 int __initdata acpi_force = 0;
  87 #endif
  88
  89 int acpi_numa __initdata;
  90
  91 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  92 int bootloader_type;
  93
  94 unsigned long saved_video_mode;
  95
  96 /*
  97  * Early DMI memory
  98  */
  99 int dmi_alloc_index;
 100 char dmi_alloc_data[DMI_MAX_DATA];
 101
 102 /*
 103  * Setup options
 104  */
 105 struct screen_info screen_info;
 106 struct sys_desc_table_struct {
 107         unsigned short length;
 108         unsigned char table[0];
 109 };
 110
 111 struct edid_info edid_info;
 112 struct e820map e820;
 113
 114 extern int root_mountflags;
 115
 116 char command_line[COMMAND_LINE_SIZE];
 117
 118 struct resource standard_io_resources[] = {
 119         { .name = "dma1", .start = 0x00, .end = 0x1f,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "pic1", .start = 0x20, .end = 0x21,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "timer0", .start = 0x40, .end = 0x43,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "timer1", .start = 0x50, .end = 0x53,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 129         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 130                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 131         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 132                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 133         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 134                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 135         { .name = "fpu", .start = 0xf0, .end = 0xff,
 136                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 137 };
 138
 139 #define STANDARD_IO_RESOURCES \
 140         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 141
 142 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 143
 144 struct resource data_resource = {
 145         .name = "Kernel data",
 146         .start = 0,
 147         .end = 0,
 148         .flags = IORESOURCE_RAM,
 149 };
 150 struct resource code_resource = {
 151         .name = "Kernel code",
 152         .start = 0,
 153         .end = 0,
 154         .flags = IORESOURCE_RAM,
 155 };
 156
 157 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 158
 159 static struct resource system_rom_resource = {
 160         .name = "System ROM",
 161         .start = 0xf0000,
 162         .end = 0xfffff,
 163         .flags = IORESOURCE_ROM,
 164 };
 165
 166 static struct resource extension_rom_resource = {
 167         .name = "Extension ROM",
 168         .start = 0xe0000,
 169         .end = 0xeffff,
 170         .flags = IORESOURCE_ROM,
 171 };
 172
 173 static struct resource adapter_rom_resources[] = {
 174         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM },
 178         { .name = "Adapter ROM", .start = 0, .end = 0,
 179                 .flags = IORESOURCE_ROM },
 180         { .name = "Adapter ROM", .start = 0, .end = 0,
 181                 .flags = IORESOURCE_ROM },
 182         { .name = "Adapter ROM", .start = 0, .end = 0,
 183                 .flags = IORESOURCE_ROM },
 184         { .name = "Adapter ROM", .start = 0, .end = 0,
 185                 .flags = IORESOURCE_ROM }
 186 };
 187
 188 #define ADAPTER_ROM_RESOURCES \
 189         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 190
 191 static struct resource video_rom_resource = {
 192         .name = "Video ROM",
 193         .start = 0xc0000,
 194         .end = 0xc7fff,
 195         .flags = IORESOURCE_ROM,
 196 };
 197
 198 static struct resource video_ram_resource = {
 199         .name = "Video RAM area",
 200         .start = 0xa0000,
 201         .end = 0xbffff,
 202         .flags = IORESOURCE_RAM,
 203 };
 204
 205 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 206
 207 static int __init romchecksum(unsigned char *rom, unsigned long length)
 208 {
 209         unsigned char *p, sum = 0;
 210
 211         for (p = rom; p < rom + length; p++)
 212                 sum += *p;
 213         return sum == 0;
 214 }
 215
 216 static void __init probe_roms(void)
 217 {
 218         unsigned long start, length, upper;
 219         unsigned char *rom;
 220         int           i;
 221
 222         /* video rom */
 223         upper = adapter_rom_resources[0].start;
 224         for (start = video_rom_resource.start; start < upper; start += 2048) {
 225                 rom = isa_bus_to_virt(start);
 226                 if (!romsignature(rom))
 227                         continue;
 228
 229                 video_rom_resource.start = start;
 230
 231                 /* 0 < length <= 0x7f * 512, historically */
 232                 length = rom[2] * 512;
 233
 234                 /* if checksum okay, trust length byte */
 235                 if (length && romchecksum(rom, length))
 236                         video_rom_resource.end = start + length - 1;
 237
 238                 request_resource(&iomem_resource, &video_rom_resource);
 239                 break;
 240                         }
 241
 242         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 243         if (start < upper)
 244                 start = upper;
 245
 246         /* system rom */
 247         request_resource(&iomem_resource, &system_rom_resource);
 248         upper = system_rom_resource.start;
 249
 250         /* check for extension rom (ignore length byte!) */
 251         rom = isa_bus_to_virt(extension_rom_resource.start);
 252         if (romsignature(rom)) {
 253                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 254                 if (romchecksum(rom, length)) {
 255                         request_resource(&iomem_resource, &extension_rom_resource);
 256                         upper = extension_rom_resource.start;
 257                 }
 258         }
 259
 260         /* check for adapter roms on 2k boundaries */
 261         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 262                 rom = isa_bus_to_virt(start);
 263                 if (!romsignature(rom))
 264                         continue;
 265
 266                 /* 0 < length <= 0x7f * 512, historically */
 267                 length = rom[2] * 512;
 268
 269                 /* but accept any length that fits if checksum okay */
 270                 if (!length || start + length > upper || !romchecksum(rom, length))
 271                         continue;
 272
 273                 adapter_rom_resources[i].start = start;
 274                 adapter_rom_resources[i].end = start + length - 1;
 275                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 276
 277                 start = adapter_rom_resources[i++].end & ~2047UL;
 278         }
 279 }
 280
 281 /* Check for full argument with no trailing characters */
 282 static int fullarg(char *p, char *arg)
 283 {
 284         int l = strlen(arg);
 285         return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
 286 }
 287
 288 static __init void parse_cmdline_early (char ** cmdline_p)
 289 {
 290         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 291         int len = 0;
 292         int userdef = 0;
 293
 294         for (;;) {
 295                 if (c != ' ')
 296                         goto next_char;
 297
 298 #ifdef  CONFIG_SMP
 299                 /*
 300                  * If the BIOS enumerates physical processors before logical,
 301                  * maxcpus=N at enumeration-time can be used to disable HT.
 302                  */
 303                 else if (!memcmp(from, "maxcpus=", 8)) {
 304                         extern unsigned int maxcpus;
 305
 306                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 307                 }
 308 #endif
 309 #ifdef CONFIG_ACPI
 310                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 311                 if (fullarg(from,"acpi=off"))
 312                         disable_acpi();
 313
 314                 if (fullarg(from, "acpi=force")) {
 315                         /* add later when we do DMI horrors: */
 316                         acpi_force = 1;
 317                         acpi_disabled = 0;
 318                 }
 319
 320                 /* acpi=ht just means: do ACPI MADT parsing
 321                    at bootup, but don't enable the full ACPI interpreter */
 322                 if (fullarg(from, "acpi=ht")) {
 323                         if (!acpi_force)
 324                                 disable_acpi();
 325                         acpi_ht = 1;
 326                 }
 327                 else if (fullarg(from, "pci=noacpi"))
 328                         acpi_disable_pci();
 329                 else if (fullarg(from, "acpi=noirq"))
 330                         acpi_noirq_set();
 331
 332                 else if (fullarg(from, "acpi_sci=edge"))
 333                         acpi_sci_flags.trigger =  1;
 334                 else if (fullarg(from, "acpi_sci=level"))
 335                         acpi_sci_flags.trigger = 3;
 336                 else if (fullarg(from, "acpi_sci=high"))
 337                         acpi_sci_flags.polarity = 1;
 338                 else if (fullarg(from, "acpi_sci=low"))
 339                         acpi_sci_flags.polarity = 3;
 340
 341                 /* acpi=strict disables out-of-spec workarounds */
 342                 else if (fullarg(from, "acpi=strict")) {
 343                         acpi_strict = 1;
 344                 }
 345 #ifdef CONFIG_X86_IO_APIC
 346                 else if (fullarg(from, "acpi_skip_timer_override"))
 347                         acpi_skip_timer_override = 1;
 348 #endif
 349 #endif
 350
 351                 if (fullarg(from, "disable_timer_pin_1"))
 352                         disable_timer_pin_1 = 1;
 353                 if (fullarg(from, "enable_timer_pin_1"))
 354                         disable_timer_pin_1 = -1;
 355
 356                 if (fullarg(from, "nolapic") || fullarg(from, "disableapic"))
 357                         disable_apic = 1;
 358
 359                 if (fullarg(from, "noapic"))
 360                         skip_ioapic_setup = 1;
 361
 362                 if (fullarg(from,"apic")) {
 363                         skip_ioapic_setup = 0;
 364                         ioapic_force = 1;
 365                 }
 366
 367                 if (!memcmp(from, "mem=", 4))
 368                         parse_memopt(from+4, &from);
 369
 370                 if (!memcmp(from, "memmap=", 7)) {
 371                         /* exactmap option is for used defined memory */
 372                         if (!memcmp(from+7, "exactmap", 8)) {
 373 #ifdef CONFIG_CRASH_DUMP
 374                                 /* If we are doing a crash dump, we
 375                                  * still need to know the real mem
 376                                  * size before original memory map is
 377                                  * reset.
 378                                  */
 379                                 saved_max_pfn = e820_end_of_ram();
 380 #endif
 381                                 from += 8+7;
 382                                 end_pfn_map = 0;
 383                                 e820.nr_map = 0;
 384                                 userdef = 1;
 385                         }
 386                         else {
 387                                 parse_memmapopt(from+7, &from);
 388                                 userdef = 1;
 389                         }
 390                 }
 391
 392 #ifdef CONFIG_NUMA
 393                 if (!memcmp(from, "numa=", 5))
 394                         numa_setup(from+5);
 395 #endif
 396
 397                 if (!memcmp(from,"iommu=",6)) {
 398                         iommu_setup(from+6);
 399                 }
 400
 401                 if (fullarg(from,"oops=panic"))
 402                         panic_on_oops = 1;
 403
 404                 if (!memcmp(from, "noexec=", 7))
 405                         nonx_setup(from + 7);
 406
 407 #ifdef CONFIG_KEXEC
 408                 /* crashkernel=size@addr specifies the location to reserve for
 409                  * a crash kernel.  By reserving this memory we guarantee
 410                  * that linux never set's it up as a DMA target.
 411                  * Useful for holding code to do something appropriate
 412                  * after a kernel panic.
 413                  */
 414                 else if (!memcmp(from, "crashkernel=", 12)) {
 415                         unsigned long size, base;
 416                         size = memparse(from+12, &from);
 417                         if (*from == '@') {
 418                                 base = memparse(from+1, &from);
 419                                 /* FIXME: Do I want a sanity check
 420                                  * to validate the memory range?
 421                                  */
 422                                 crashk_res.start = base;
 423                                 crashk_res.end   = base + size - 1;
 424                         }
 425                 }
 426 #endif
 427
 428 #ifdef CONFIG_PROC_VMCORE
 429                 /* elfcorehdr= specifies the location of elf core header
 430                  * stored by the crashed kernel. This option will be passed
 431                  * by kexec loader to the capture kernel.
 432                  */
 433                 else if(!memcmp(from, "elfcorehdr=", 11))
 434                         elfcorehdr_addr = memparse(from+11, &from);
 435 #endif
 436
 437 #ifdef CONFIG_HOTPLUG_CPU
 438                 else if (!memcmp(from, "additional_cpus=", 16))
 439                         setup_additional_cpus(from+16);
 440 #endif
 441
 442         next_char:
 443                 c = *(from++);
 444                 if (!c)
 445                         break;
 446                 if (COMMAND_LINE_SIZE <= ++len)
 447                         break;
 448                 *(to++) = c;
 449         }
 450         if (userdef) {
 451                 printk(KERN_INFO "user-defined physical RAM map:\n");
 452                 e820_print_map("user");
 453         }
 454         *to = '\0';
 455         *cmdline_p = command_line;
 456 }
 457
 458 #ifndef CONFIG_NUMA
 459 static void __init
 460 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 461 {
 462         unsigned long bootmap_size, bootmap;
 463
 464         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 465         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 466         if (bootmap == -1L)
 467                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 468         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 469         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 470         reserve_bootmem(bootmap, bootmap_size);
 471 }
 472 #endif
 473
 474 /* Use inline assembly to define this because the nops are defined
 475    as inline assembly strings in the include files and we cannot
 476    get them easily into strings. */
 477 asm("\t.data\nk8nops: "
 478     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 479     K8_NOP7 K8_NOP8);
 480
 481 extern unsigned char k8nops[];
 482 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 483      NULL,
 484      k8nops,
 485      k8nops + 1,
 486      k8nops + 1 + 2,
 487      k8nops + 1 + 2 + 3,
 488      k8nops + 1 + 2 + 3 + 4,
 489      k8nops + 1 + 2 + 3 + 4 + 5,
 490      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 491      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 492 };
 493
 494 extern char __vsyscall_0;
 495
 496 /* Replace instructions with better alternatives for this CPU type.
 497
 498    This runs before SMP is initialized to avoid SMP problems with
 499    self modifying code. This implies that assymetric systems where
 500    APs have less capabilities than the boot processor are not handled.
 501    In this case boot with "noreplacement". */
 502 void apply_alternatives(void *start, void *end)
 503 {
 504         struct alt_instr *a;
 505         int diff, i, k;
 506         for (a = start; (void *)a < end; a++) {
 507                 u8 *instr;
 508
 509                 if (!boot_cpu_has(a->cpuid))
 510                         continue;
 511
 512                 BUG_ON(a->replacementlen > a->instrlen);
 513                 instr = a->instr;
 514                 /* vsyscall code is not mapped yet. resolve it manually. */
 515                 if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END)
 516                         instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
 517                 __inline_memcpy(instr, a->replacement, a->replacementlen);
 518                 diff = a->instrlen - a->replacementlen;
 519
 520                 /* Pad the rest with nops */
 521                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 522                         k = diff;
 523                         if (k > ASM_NOP_MAX)
 524                                 k = ASM_NOP_MAX;
 525                         __inline_memcpy(instr + i, k8_nops[k], k);
 526                 }
 527         }
 528 }
 529
 530 static int no_replacement __initdata = 0;
 531
 532 void __init alternative_instructions(void)
 533 {
 534         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 535         if (no_replacement)
 536                 return;
 537         apply_alternatives(__alt_instructions, __alt_instructions_end);
 538 }
 539
 540 static int __init noreplacement_setup(char *s)
 541 {
 542      no_replacement = 1;
 543      return 0;
 544 }
 545
 546 __setup("noreplacement", noreplacement_setup);
 547
 548 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 549 struct edd edd;
 550 #ifdef CONFIG_EDD_MODULE
 551 EXPORT_SYMBOL(edd);
 552 #endif
 553 /**
 554  * copy_edd() - Copy the BIOS EDD information
 555  *              from boot_params into a safe place.
 556  *
 557  */
 558 static inline void copy_edd(void)
 559 {
 560      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 561      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 562      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 563      edd.edd_info_nr = EDD_NR;
 564 }
 565 #else
 566 static inline void copy_edd(void)
 567 {
 568 }
 569 #endif
 570
 571 #define EBDA_ADDR_POINTER 0x40E
 572 static void __init reserve_ebda_region(void)
 573 {
 574         unsigned int addr;
 575         /**
 576          * there is a real-mode segmented pointer pointing to the
 577          * 4K EBDA area at 0x40E
 578          */
 579         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 580         addr <<= 4;
 581         if (addr)
 582                 reserve_bootmem_generic(addr, PAGE_SIZE);
 583 }
 584
 585 void __init setup_arch(char **cmdline_p)
 586 {
 587         unsigned long kernel_end;
 588
 589         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 590         screen_info = SCREEN_INFO;
 591         edid_info = EDID_INFO;
 592         saved_video_mode = SAVED_VIDEO_MODE;
 593         bootloader_type = LOADER_TYPE;
 594
 595 #ifdef CONFIG_BLK_DEV_RAM
 596         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 597         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 598         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 599 #endif
 600         setup_memory_region();
 601         copy_edd();
 602
 603         if (!MOUNT_ROOT_RDONLY)
 604                 root_mountflags &= ~MS_RDONLY;
 605         init_mm.start_code = (unsigned long) &_text;
 606         init_mm.end_code = (unsigned long) &_etext;
 607         init_mm.end_data = (unsigned long) &_edata;
 608         init_mm.brk = (unsigned long) &_end;
 609
 610         code_resource.start = virt_to_phys(&_text);
 611         code_resource.end = virt_to_phys(&_etext)-1;
 612         data_resource.start = virt_to_phys(&_etext);
 613         data_resource.end = virt_to_phys(&_edata)-1;
 614
 615         parse_cmdline_early(cmdline_p);
 616
 617         early_identify_cpu(&boot_cpu_data);
 618
 619         /*
 620          * partially used pages are not usable - thus
 621          * we are rounding upwards:
 622          */
 623         end_pfn = e820_end_of_ram();
 624         num_physpages = end_pfn;                /* for pfn_valid */
 625
 626         check_efer();
 627
 628         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 629
 630         dmi_scan_machine();
 631
 632         zap_low_mappings(0);
 633
 634 #ifdef CONFIG_ACPI
 635         /*
 636          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 637          * Call this early for SRAT node setup.
 638          */
 639         acpi_boot_table_init();
 640 #endif
 641
 642 #ifdef CONFIG_ACPI_NUMA
 643         /*
 644          * Parse SRAT to discover nodes.
 645          */
 646         acpi_numa_init();
 647 #endif
 648
 649 #ifdef CONFIG_NUMA
 650         numa_initmem_init(0, end_pfn);
 651 #else
 652         contig_initmem_init(0, end_pfn);
 653 #endif
 654
 655         /* Reserve direct mapping */
 656         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 657                                 (table_end - table_start) << PAGE_SHIFT);
 658
 659         /* reserve kernel */
 660         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 661         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 662
 663         /*
 664          * reserve physical page 0 - it's a special BIOS page on many boxes,
 665          * enabling clean reboots, SMP operation, laptop functions.
 666          */
 667         reserve_bootmem_generic(0, PAGE_SIZE);
 668
 669         /* reserve ebda region */
 670         reserve_ebda_region();
 671
 672 #ifdef CONFIG_SMP
 673         /*
 674          * But first pinch a few for the stack/trampoline stuff
 675          * FIXME: Don't need the extra page at 4K, but need to fix
 676          * trampoline before removing it. (see the GDT stuff)
 677          */
 678         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 679
 680         /* Reserve SMP trampoline */
 681         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 682 #endif
 683
 684 #ifdef CONFIG_ACPI_SLEEP
 685        /*
 686         * Reserve low memory region for sleep support.
 687         */
 688        acpi_reserve_bootmem();
 689 #endif
 690 #ifdef CONFIG_X86_LOCAL_APIC
 691         /*
 692          * Find and reserve possible boot-time SMP configuration:
 693          */
 694         find_smp_config();
 695 #endif
 696 #ifdef CONFIG_BLK_DEV_INITRD
 697         if (LOADER_TYPE && INITRD_START) {
 698                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 699                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 700                         initrd_start =
 701                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 702                         initrd_end = initrd_start+INITRD_SIZE;
 703                 }
 704                 else {
 705                         printk(KERN_ERR "initrd extends beyond end of memory "
 706                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 707                             (unsigned long)(INITRD_START + INITRD_SIZE),
 708                             (unsigned long)(end_pfn << PAGE_SHIFT));
 709                         initrd_start = 0;
 710                 }
 711         }
 712 #endif
 713 #ifdef CONFIG_KEXEC
 714         if (crashk_res.start != crashk_res.end) {
 715                 reserve_bootmem(crashk_res.start,
 716                         crashk_res.end - crashk_res.start + 1);
 717         }
 718 #endif
 719
 720         paging_init();
 721
 722         check_ioapic();
 723
 724         /*
 725          * set this early, so we dont allocate cpu0
 726          * if MADT list doesnt list BSP first
 727          * mpparse.c/MP_processor_info() allocates logical cpu numbers.
 728          */
 729         cpu_set(0, cpu_present_map);
 730 #ifdef CONFIG_ACPI
 731         /*
 732          * Read APIC and some other early information from ACPI tables.
 733          */
 734         acpi_boot_init();
 735 #endif
 736
 737         init_cpu_to_node();
 738
 739 #ifdef CONFIG_X86_LOCAL_APIC
 740         /*
 741          * get boot-time SMP configuration:
 742          */
 743         if (smp_found_config)
 744                 get_smp_config();
 745         init_apic_mappings();
 746 #endif
 747
 748         /*
 749          * Request address space for all standard RAM and ROM resources
 750          * and also for regions reported as reserved by the e820.
 751          */
 752         probe_roms();
 753         e820_reserve_resources();
 754
 755         request_resource(&iomem_resource, &video_ram_resource);
 756
 757         {
 758         unsigned i;
 759         /* request I/O space for devices used on all i[345]86 PCs */
 760         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 761                 request_resource(&ioport_resource, &standard_io_resources[i]);
 762         }
 763
 764         e820_setup_gap();
 765
 766 #ifdef CONFIG_GART_IOMMU
 767         iommu_hole_init();
 768 #endif
 769
 770 #ifdef CONFIG_VT
 771 #if defined(CONFIG_VGA_CONSOLE)
 772         conswitchp = &vga_con;
 773 #elif defined(CONFIG_DUMMY_CONSOLE)
 774         conswitchp = &dummy_con;
 775 #endif
 776 #endif
 777 }
 778
 779 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 780 {
 781         unsigned int *v;
 782
 783         if (c->extended_cpuid_level < 0x80000004)
 784                 return 0;
 785
 786         v = (unsigned int *) c->x86_model_id;
 787         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 788         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 789         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 790         c->x86_model_id[48] = 0;
 791         return 1;
 792 }
 793
 794
 795 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 796 {
 797         unsigned int n, dummy, eax, ebx, ecx, edx;
 798
 799         n = c->extended_cpuid_level;
 800
 801         if (n >= 0x80000005) {
 802                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 803                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 804                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 805                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 806                 /* On K8 L1 TLB is inclusive, so don't count it */
 807                 c->x86_tlbsize = 0;
 808         }
 809
 810         if (n >= 0x80000006) {
 811                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 812                 ecx = cpuid_ecx(0x80000006);
 813                 c->x86_cache_size = ecx >> 16;
 814                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 815
 816                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 817                 c->x86_cache_size, ecx & 0xFF);
 818         }
 819
 820         if (n >= 0x80000007)
 821                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 822         if (n >= 0x80000008) {
 823                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 824                 c->x86_virt_bits = (eax >> 8) & 0xff;
 825                 c->x86_phys_bits = eax & 0xff;
 826         }
 827 }
 828
 829 #ifdef CONFIG_NUMA
 830 static int nearby_node(int apicid)
 831 {
 832         int i;
 833         for (i = apicid - 1; i >= 0; i--) {
 834                 int node = apicid_to_node[i];
 835                 if (node != NUMA_NO_NODE && node_online(node))
 836                         return node;
 837         }
 838         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 839                 int node = apicid_to_node[i];
 840                 if (node != NUMA_NO_NODE && node_online(node))
 841                         return node;
 842         }
 843         return first_node(node_online_map); /* Shouldn't happen */
 844 }
 845 #endif
 846
 847 /*
 848  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 849  * Assumes number of cores is a power of two.
 850  */
 851 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 852 {
 853 #ifdef CONFIG_SMP
 854         int cpu = smp_processor_id();
 855         unsigned bits;
 856 #ifdef CONFIG_NUMA
 857         int node = 0;
 858         unsigned apicid = hard_smp_processor_id();
 859 #endif
 860
 861         bits = 0;
 862         while ((1 << bits) < c->x86_max_cores)
 863                 bits++;
 864
 865         /* Low order bits define the core id (index of core in socket) */
 866         cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
 867         /* Convert the APIC ID into the socket ID */
 868         phys_proc_id[cpu] = phys_pkg_id(bits);
 869
 870 #ifdef CONFIG_NUMA
 871         node = phys_proc_id[cpu];
 872         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 873                 node = apicid_to_node[apicid];
 874         if (!node_online(node)) {
 875                 /* Two possibilities here:
 876                    - The CPU is missing memory and no node was created.
 877                    In that case try picking one from a nearby CPU
 878                    - The APIC IDs differ from the HyperTransport node IDs
 879                    which the K8 northbridge parsing fills in.
 880                    Assume they are all increased by a constant offset,
 881                    but in the same order as the HT nodeids.
 882                    If that doesn't result in a usable node fall back to the
 883                    path for the previous case.  */
 884                 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
 885                 if (ht_nodeid >= 0 &&
 886                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 887                         node = apicid_to_node[ht_nodeid];
 888                 /* Pick a nearby node */
 889                 if (!node_online(node))
 890                         node = nearby_node(apicid);
 891         }
 892         numa_set_node(cpu, node);
 893
 894         printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
 895                         cpu, apicid, c->x86_max_cores, node, cpu_core_id[cpu]);
 896 #endif
 897 #endif
 898 }
 899
 900 static int __init init_amd(struct cpuinfo_x86 *c)
 901 {
 902         int r;
 903         unsigned level;
 904
 905 #ifdef CONFIG_SMP
 906         unsigned long value;
 907
 908         /*
 909          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 910          * bit 6 of msr C001_0015
 911          *
 912          * Errata 63 for SH-B3 steppings
 913          * Errata 122 for all steppings (F+ have it disabled by default)
 914          */
 915         if (c->x86 == 15) {
 916                 rdmsrl(MSR_K8_HWCR, value);
 917                 value |= 1 << 6;
 918                 wrmsrl(MSR_K8_HWCR, value);
 919         }
 920 #endif
 921
 922         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 923            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 924         clear_bit(0*32+31, &c->x86_capability);
 925
 926         /* On C+ stepping K8 rep microcode works well for copy/memset */
 927         level = cpuid_eax(1);
 928         if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
 929                 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
 930
 931         r = get_model_name(c);
 932         if (!r) {
 933                 switch (c->x86) {
 934                 case 15:
 935                         /* Should distinguish Models here, but this is only
 936                            a fallback anyways. */
 937                         strcpy(c->x86_model_id, "Hammer");
 938                         break;
 939                 }
 940         }
 941         display_cacheinfo(c);
 942
 943         /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
 944         if (c->x86_power & (1<<8))
 945                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 946
 947         if (c->extended_cpuid_level >= 0x80000008) {
 948                 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 949
 950                 amd_detect_cmp(c);
 951         }
 952
 953         return r;
 954 }
 955
 956 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 957 {
 958 #ifdef CONFIG_SMP
 959         u32     eax, ebx, ecx, edx;
 960         int     index_msb, core_bits;
 961         int     cpu = smp_processor_id();
 962
 963         cpuid(1, &eax, &ebx, &ecx, &edx);
 964
 965         c->apicid = phys_pkg_id(0);
 966
 967         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 968                 return;
 969
 970         smp_num_siblings = (ebx & 0xff0000) >> 16;
 971
 972         if (smp_num_siblings == 1) {
 973                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 974         } else if (smp_num_siblings > 1 ) {
 975
 976                 if (smp_num_siblings > NR_CPUS) {
 977                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 978                         smp_num_siblings = 1;
 979                         return;
 980                 }
 981
 982                 index_msb = get_count_order(smp_num_siblings);
 983                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 984
 985                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 986                        phys_proc_id[cpu]);
 987
 988                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 989
 990                 index_msb = get_count_order(smp_num_siblings) ;
 991
 992                 core_bits = get_count_order(c->x86_max_cores);
 993
 994                 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
 995                                                ((1 << core_bits) - 1);
 996
 997                 if (c->x86_max_cores > 1)
 998                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 999                                cpu_core_id[cpu]);
1000         }
1001 #endif
1002 }
1003
1004 /*
1005  * find out the number of processor cores on the die
1006  */
1007 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
1008 {
1009         unsigned int eax;
1010
1011         if (c->cpuid_level < 4)
1012                 return 1;
1013
1014         __asm__("cpuid"
1015                 : "=a" (eax)
1016                 : "0" (4), "c" (0)
1017                 : "bx", "dx");
1018
1019         if (eax & 0x1f)
1020                 return ((eax >> 26) + 1);
1021         else
1022                 return 1;
1023 }
1024
1025 static void srat_detect_node(void)
1026 {
1027 #ifdef CONFIG_NUMA
1028         unsigned node;
1029         int cpu = smp_processor_id();
1030
1031         /* Don't do the funky fallback heuristics the AMD version employs
1032            for now. */
1033         node = apicid_to_node[hard_smp_processor_id()];
1034         if (node == NUMA_NO_NODE)
1035                 node = 0;
1036         numa_set_node(cpu, node);
1037
1038         if (acpi_numa > 0)
1039                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1040 #endif
1041 }
1042
1043 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1044 {
1045         /* Cache sizes */
1046         unsigned n;
1047
1048         init_intel_cacheinfo(c);
1049         n = c->extended_cpuid_level;
1050         if (n >= 0x80000008) {
1051                 unsigned eax = cpuid_eax(0x80000008);
1052                 c->x86_virt_bits = (eax >> 8) & 0xff;
1053                 c->x86_phys_bits = eax & 0xff;
1054                 /* CPUID workaround for Intel 0F34 CPU */
1055                 if (c->x86_vendor == X86_VENDOR_INTEL &&
1056                     c->x86 == 0xF && c->x86_model == 0x3 &&
1057                     c->x86_mask == 0x4)
1058                         c->x86_phys_bits = 36;
1059         }
1060
1061         if (c->x86 == 15)
1062                 c->x86_cache_alignment = c->x86_clflush_size * 2;
1063         if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1064             (c->x86 == 0x6 && c->x86_model >= 0x0e))
1065                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1066         set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1067         c->x86_max_cores = intel_num_cpu_cores(c);
1068
1069         srat_detect_node();
1070 }
1071
1072 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1073 {
1074         char *v = c->x86_vendor_id;
1075
1076         if (!strcmp(v, "AuthenticAMD"))
1077                 c->x86_vendor = X86_VENDOR_AMD;
1078         else if (!strcmp(v, "GenuineIntel"))
1079                 c->x86_vendor = X86_VENDOR_INTEL;
1080         else
1081                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1082 }
1083
1084 struct cpu_model_info {
1085         int vendor;
1086         int family;
1087         char *model_names[16];
1088 };
1089
1090 /* Do some early cpuid on the boot CPU to get some parameter that are
1091    needed before check_bugs. Everything advanced is in identify_cpu
1092    below. */
1093 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1094 {
1095         u32 tfms;
1096
1097         c->loops_per_jiffy = loops_per_jiffy;
1098         c->x86_cache_size = -1;
1099         c->x86_vendor = X86_VENDOR_UNKNOWN;
1100         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1101         c->x86_vendor_id[0] = '\0'; /* Unset */
1102         c->x86_model_id[0] = '\0';  /* Unset */
1103         c->x86_clflush_size = 64;
1104         c->x86_cache_alignment = c->x86_clflush_size;
1105         c->x86_max_cores = 1;
1106         c->extended_cpuid_level = 0;
1107         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1108
1109         /* Get vendor name */
1110         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1111               (unsigned int *)&c->x86_vendor_id[0],
1112               (unsigned int *)&c->x86_vendor_id[8],
1113               (unsigned int *)&c->x86_vendor_id[4]);
1114
1115         get_cpu_vendor(c);
1116
1117         /* Initialize the standard set of capabilities */
1118         /* Note that the vendor-specific code below might override */
1119
1120         /* Intel-defined flags: level 0x00000001 */
1121         if (c->cpuid_level >= 0x00000001) {
1122                 __u32 misc;
1123                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1124                       &c->x86_capability[0]);
1125                 c->x86 = (tfms >> 8) & 0xf;
1126                 c->x86_model = (tfms >> 4) & 0xf;
1127                 c->x86_mask = tfms & 0xf;
1128                 if (c->x86 == 0xf)
1129                         c->x86 += (tfms >> 20) & 0xff;
1130                 if (c->x86 >= 0x6)
1131                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1132                 if (c->x86_capability[0] & (1<<19))
1133                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1134         } else {
1135                 /* Have CPUID level 0 only - unheard of */
1136                 c->x86 = 4;
1137         }
1138
1139 #ifdef CONFIG_SMP
1140         phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1141 #endif
1142 }
1143
1144 /*
1145  * This does the hard work of actually picking apart the CPU stuff...
1146  */
1147 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1148 {
1149         int i;
1150         u32 xlvl;
1151
1152         early_identify_cpu(c);
1153
1154         /* AMD-defined flags: level 0x80000001 */
1155         xlvl = cpuid_eax(0x80000000);
1156         c->extended_cpuid_level = xlvl;
1157         if ((xlvl & 0xffff0000) == 0x80000000) {
1158                 if (xlvl >= 0x80000001) {
1159                         c->x86_capability[1] = cpuid_edx(0x80000001);
1160                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1161                 }
1162                 if (xlvl >= 0x80000004)
1163                         get_model_name(c); /* Default name */
1164         }
1165
1166         /* Transmeta-defined flags: level 0x80860001 */
1167         xlvl = cpuid_eax(0x80860000);
1168         if ((xlvl & 0xffff0000) == 0x80860000) {
1169                 /* Don't set x86_cpuid_level here for now to not confuse. */
1170                 if (xlvl >= 0x80860001)
1171                         c->x86_capability[2] = cpuid_edx(0x80860001);
1172         }
1173
1174         /*
1175          * Vendor-specific initialization.  In this section we
1176          * canonicalize the feature flags, meaning if there are
1177          * features a certain CPU supports which CPUID doesn't
1178          * tell us, CPUID claiming incorrect flags, or other bugs,
1179          * we handle them here.
1180          *
1181          * At the end of this section, c->x86_capability better
1182          * indicate the features this CPU genuinely supports!
1183          */
1184         switch (c->x86_vendor) {
1185         case X86_VENDOR_AMD:
1186                 init_amd(c);
1187                 break;
1188
1189         case X86_VENDOR_INTEL:
1190                 init_intel(c);
1191                 break;
1192
1193         case X86_VENDOR_UNKNOWN:
1194         default:
1195                 display_cacheinfo(c);
1196                 break;
1197         }
1198
1199         select_idle_routine(c);
1200         detect_ht(c);
1201
1202         /*
1203          * On SMP, boot_cpu_data holds the common feature set between
1204          * all CPUs; so make sure that we indicate which features are
1205          * common between the CPUs.  The first time this routine gets
1206          * executed, c == &boot_cpu_data.
1207          */
1208         if (c != &boot_cpu_data) {
1209                 /* AND the already accumulated flags with these */
1210                 for (i = 0 ; i < NCAPINTS ; i++)
1211                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1212         }
1213
1214 #ifdef CONFIG_X86_MCE
1215         mcheck_init(c);
1216 #endif
1217         if (c == &boot_cpu_data)
1218                 mtrr_bp_init();
1219         else
1220                 mtrr_ap_init();
1221 #ifdef CONFIG_NUMA
1222         numa_add_cpu(smp_processor_id());
1223 #endif
1224 }
1225
1226
1227 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1228 {
1229         if (c->x86_model_id[0])
1230                 printk("%s", c->x86_model_id);
1231
1232         if (c->x86_mask || c->cpuid_level >= 0)
1233                 printk(" stepping %02x\n", c->x86_mask);
1234         else
1235                 printk("\n");
1236 }
1237
1238 /*
1239  *      Get CPU information for use by the procfs.
1240  */
1241
1242 static int show_cpuinfo(struct seq_file *m, void *v)
1243 {
1244         struct cpuinfo_x86 *c = v;
1245
1246         /*
1247          * These flag bits must match the definitions in <asm/cpufeature.h>.
1248          * NULL means this bit is undefined or reserved; either way it doesn't
1249          * have meaning as far as Linux is concerned.  Note that it's important
1250          * to realize there is a difference between this table and CPUID -- if
1251          * applications want to get the raw CPUID data, they should access
1252          * /dev/cpu/<cpu_nr>/cpuid instead.
1253          */
1254         static char *x86_cap_flags[] = {
1255                 /* Intel-defined */
1256                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1257                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1258                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1259                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1260
1261                 /* AMD-defined */
1262                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1263                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1264                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1265                 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1266
1267                 /* Transmeta-defined */
1268                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1269                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1270                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1271                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1272
1273                 /* Other (Linux-defined) */
1274                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1275                 "constant_tsc", NULL, NULL,
1276                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1277                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1278                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1279
1280                 /* Intel-defined (#2) */
1281                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1282                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1283                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1284                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1285
1286                 /* VIA/Cyrix/Centaur-defined */
1287                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1288                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1289                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1290                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1291
1292                 /* AMD-defined (#2) */
1293                 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1294                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1295                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1296                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1297         };
1298         static char *x86_power_flags[] = {
1299                 "ts",   /* temperature sensor */
1300                 "fid",  /* frequency id control */
1301                 "vid",  /* voltage id control */
1302                 "ttp",  /* thermal trip */
1303                 "tm",
1304                 "stc",
1305                 NULL,
1306                 /* nothing */   /* constant_tsc - moved to flags */
1307         };
1308
1309
1310 #ifdef CONFIG_SMP
1311         if (!cpu_online(c-cpu_data))
1312                 return 0;
1313 #endif
1314
1315         seq_printf(m,"processor\t: %u\n"
1316                      "vendor_id\t: %s\n"
1317                      "cpu family\t: %d\n"
1318                      "model\t\t: %d\n"
1319                      "model name\t: %s\n",
1320                      (unsigned)(c-cpu_data),
1321                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1322                      c->x86,
1323                      (int)c->x86_model,
1324                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1325
1326         if (c->x86_mask || c->cpuid_level >= 0)
1327                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1328         else
1329                 seq_printf(m, "stepping\t: unknown\n");
1330
1331         if (cpu_has(c,X86_FEATURE_TSC)) {
1332                 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1333                 if (!freq)
1334                         freq = cpu_khz;
1335                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1336                              freq / 1000, (freq % 1000));
1337         }
1338
1339         /* Cache size */
1340         if (c->x86_cache_size >= 0)
1341                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1342
1343 #ifdef CONFIG_SMP
1344         if (smp_num_siblings * c->x86_max_cores > 1) {
1345                 int cpu = c - cpu_data;
1346                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1347                 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1348                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1349                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1350         }
1351 #endif
1352
1353         seq_printf(m,
1354                 "fpu\t\t: yes\n"
1355                 "fpu_exception\t: yes\n"
1356                 "cpuid level\t: %d\n"
1357                 "wp\t\t: yes\n"
1358                 "flags\t\t:",
1359                    c->cpuid_level);
1360
1361         {
1362                 int i;
1363                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1364                         if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1365                                 seq_printf(m, " %s", x86_cap_flags[i]);
1366         }
1367
1368         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1369                    c->loops_per_jiffy/(500000/HZ),
1370                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1371
1372         if (c->x86_tlbsize > 0)
1373                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1374         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1375         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1376
1377         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1378                    c->x86_phys_bits, c->x86_virt_bits);
1379
1380         seq_printf(m, "power management:");
1381         {
1382                 unsigned i;
1383                 for (i = 0; i < 32; i++)
1384                         if (c->x86_power & (1 << i)) {
1385                                 if (i < ARRAY_SIZE(x86_power_flags) &&
1386                                         x86_power_flags[i])
1387                                         seq_printf(m, "%s%s",
1388                                                 x86_power_flags[i][0]?" ":"",
1389                                                 x86_power_flags[i]);
1390                                 else
1391                                         seq_printf(m, " [%d]", i);
1392                         }
1393         }
1394
1395         seq_printf(m, "\n\n");
1396
1397         return 0;
1398 }
1399
1400 static void *c_start(struct seq_file *m, loff_t *pos)
1401 {
1402         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1403 }
1404
1405 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1406 {
1407         ++*pos;
1408         return c_start(m, pos);
1409 }
1410
1411 static void c_stop(struct seq_file *m, void *v)
1412 {
1413 }
1414
1415 struct seq_operations cpuinfo_op = {
1416         .start =c_start,
1417         .next = c_next,
1418         .stop = c_stop,
1419         .show = show_cpuinfo,
1420 };
1421