[Fix bug# 771] Too many (8) bytes recieved when using AES/hwcrypto
[linux-2.6/sactl.git] / drivers / scsi / libata-core.c
blob1c1a7caf785e9e1fbf6659daa72c18d2004842e5
1 /*
2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi.h"
55 #include "scsi_priv.h"
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
62 #include "libata.h"
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
66 unsigned long tmout);
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
74 u8 *xfer_mode_out,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
90 /**
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
97 * LOCKING:
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
109 ata_wait_idle(ap);
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
119 tf->hob_feature,
120 tf->hob_nsect,
121 tf->hob_lbal,
122 tf->hob_lbam,
123 tf->hob_lbah);
126 if (is_addr) {
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
133 tf->feature,
134 tf->nsect,
135 tf->lbal,
136 tf->lbam,
137 tf->lbah);
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
145 ata_wait_idle(ap);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
155 * LOCKING:
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
167 ata_wait_idle(ap);
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
177 tf->hob_feature,
178 tf->hob_nsect,
179 tf->hob_lbal,
180 tf->hob_lbam,
181 tf->hob_lbah);
184 if (is_addr) {
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
191 tf->feature,
192 tf->nsect,
193 tf->lbal,
194 tf->lbam,
195 tf->lbah);
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
203 ata_wait_idle(ap);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
225 * LOCKING:
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
232 else
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
244 * LOCKING:
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
253 ata_pause(ap);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
265 * LOCKING:
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
274 ata_pause(ap);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
286 * LOCKING:
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
293 else
294 ata_exec_command_pio(ap, tf);
298 * ata_tf_to_host - issue ATA taskfile to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues ATA taskfile register set to ATA host controller,
303 * with proper synchronization with interrupt handler and
304 * other threads.
306 * LOCKING:
307 * spin_lock_irqsave(host_set lock)
310 static inline void ata_tf_to_host(struct ata_port *ap,
311 const struct ata_taskfile *tf)
313 ap->ops->tf_load(ap, tf);
314 ap->ops->exec_command(ap, tf);
318 * ata_tf_read_pio - input device's ATA taskfile shadow registers
319 * @ap: Port from which input is read
320 * @tf: ATA taskfile register set for storing input
322 * Reads ATA taskfile registers for currently-selected device
323 * into @tf.
325 * LOCKING:
326 * Inherited from caller.
329 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
331 struct ata_ioports *ioaddr = &ap->ioaddr;
333 tf->command = ata_check_status(ap);
334 tf->feature = inb(ioaddr->error_addr);
335 tf->nsect = inb(ioaddr->nsect_addr);
336 tf->lbal = inb(ioaddr->lbal_addr);
337 tf->lbam = inb(ioaddr->lbam_addr);
338 tf->lbah = inb(ioaddr->lbah_addr);
339 tf->device = inb(ioaddr->device_addr);
341 if (tf->flags & ATA_TFLAG_LBA48) {
342 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
343 tf->hob_feature = inb(ioaddr->error_addr);
344 tf->hob_nsect = inb(ioaddr->nsect_addr);
345 tf->hob_lbal = inb(ioaddr->lbal_addr);
346 tf->hob_lbam = inb(ioaddr->lbam_addr);
347 tf->hob_lbah = inb(ioaddr->lbah_addr);
352 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
353 * @ap: Port from which input is read
354 * @tf: ATA taskfile register set for storing input
356 * Reads ATA taskfile registers for currently-selected device
357 * into @tf via MMIO.
359 * LOCKING:
360 * Inherited from caller.
363 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
365 struct ata_ioports *ioaddr = &ap->ioaddr;
367 tf->command = ata_check_status(ap);
368 tf->feature = readb((void __iomem *)ioaddr->error_addr);
369 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
370 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
371 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
372 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
373 tf->device = readb((void __iomem *)ioaddr->device_addr);
375 if (tf->flags & ATA_TFLAG_LBA48) {
376 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
377 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
378 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
379 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
380 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
381 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
387 * ata_tf_read - input device's ATA taskfile shadow registers
388 * @ap: Port from which input is read
389 * @tf: ATA taskfile register set for storing input
391 * Reads ATA taskfile registers for currently-selected device
392 * into @tf.
394 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
395 * is set, also reads the hob registers.
397 * May be used as the tf_read() entry in ata_port_operations.
399 * LOCKING:
400 * Inherited from caller.
402 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
404 if (ap->flags & ATA_FLAG_MMIO)
405 ata_tf_read_mmio(ap, tf);
406 else
407 ata_tf_read_pio(ap, tf);
411 * ata_check_status_pio - Read device status reg & clear interrupt
412 * @ap: port where the device is
414 * Reads ATA taskfile status register for currently-selected device
415 * and return its value. This also clears pending interrupts
416 * from this device
418 * LOCKING:
419 * Inherited from caller.
421 static u8 ata_check_status_pio(struct ata_port *ap)
423 return inb(ap->ioaddr.status_addr);
427 * ata_check_status_mmio - Read device status reg & clear interrupt
428 * @ap: port where the device is
430 * Reads ATA taskfile status register for currently-selected device
431 * via MMIO and return its value. This also clears pending interrupts
432 * from this device
434 * LOCKING:
435 * Inherited from caller.
437 static u8 ata_check_status_mmio(struct ata_port *ap)
439 return readb((void __iomem *) ap->ioaddr.status_addr);
444 * ata_check_status - Read device status reg & clear interrupt
445 * @ap: port where the device is
447 * Reads ATA taskfile status register for currently-selected device
448 * and return its value. This also clears pending interrupts
449 * from this device
451 * May be used as the check_status() entry in ata_port_operations.
453 * LOCKING:
454 * Inherited from caller.
456 u8 ata_check_status(struct ata_port *ap)
458 if (ap->flags & ATA_FLAG_MMIO)
459 return ata_check_status_mmio(ap);
460 return ata_check_status_pio(ap);
465 * ata_altstatus - Read device alternate status reg
466 * @ap: port where the device is
468 * Reads ATA taskfile alternate status register for
469 * currently-selected device and return its value.
471 * Note: may NOT be used as the check_altstatus() entry in
472 * ata_port_operations.
474 * LOCKING:
475 * Inherited from caller.
477 u8 ata_altstatus(struct ata_port *ap)
479 if (ap->ops->check_altstatus)
480 return ap->ops->check_altstatus(ap);
482 if (ap->flags & ATA_FLAG_MMIO)
483 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
484 return inb(ap->ioaddr.altstatus_addr);
489 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
490 * @tf: Taskfile to convert
491 * @fis: Buffer into which data will output
492 * @pmp: Port multiplier port
494 * Converts a standard ATA taskfile to a Serial ATA
495 * FIS structure (Register - Host to Device).
497 * LOCKING:
498 * Inherited from caller.
501 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
503 fis[0] = 0x27; /* Register - Host to Device FIS */
504 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
505 bit 7 indicates Command FIS */
506 fis[2] = tf->command;
507 fis[3] = tf->feature;
509 fis[4] = tf->lbal;
510 fis[5] = tf->lbam;
511 fis[6] = tf->lbah;
512 fis[7] = tf->device;
514 fis[8] = tf->hob_lbal;
515 fis[9] = tf->hob_lbam;
516 fis[10] = tf->hob_lbah;
517 fis[11] = tf->hob_feature;
519 fis[12] = tf->nsect;
520 fis[13] = tf->hob_nsect;
521 fis[14] = 0;
522 fis[15] = tf->ctl;
524 fis[16] = 0;
525 fis[17] = 0;
526 fis[18] = 0;
527 fis[19] = 0;
531 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
532 * @fis: Buffer from which data will be input
533 * @tf: Taskfile to output
535 * Converts a standard ATA taskfile to a Serial ATA
536 * FIS structure (Register - Host to Device).
538 * LOCKING:
539 * Inherited from caller.
542 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
544 tf->command = fis[2]; /* status */
545 tf->feature = fis[3]; /* error */
547 tf->lbal = fis[4];
548 tf->lbam = fis[5];
549 tf->lbah = fis[6];
550 tf->device = fis[7];
552 tf->hob_lbal = fis[8];
553 tf->hob_lbam = fis[9];
554 tf->hob_lbah = fis[10];
556 tf->nsect = fis[12];
557 tf->hob_nsect = fis[13];
560 static const u8 ata_rw_cmds[] = {
561 /* pio multi */
562 ATA_CMD_READ_MULTI,
563 ATA_CMD_WRITE_MULTI,
564 ATA_CMD_READ_MULTI_EXT,
565 ATA_CMD_WRITE_MULTI_EXT,
566 /* pio */
567 ATA_CMD_PIO_READ,
568 ATA_CMD_PIO_WRITE,
569 ATA_CMD_PIO_READ_EXT,
570 ATA_CMD_PIO_WRITE_EXT,
571 /* dma */
572 ATA_CMD_READ,
573 ATA_CMD_WRITE,
574 ATA_CMD_READ_EXT,
575 ATA_CMD_WRITE_EXT
579 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
580 * @qc: command to examine and configure
582 * Examine the device configuration and tf->flags to calculate
583 * the proper read/write commands and protocol to use.
585 * LOCKING:
586 * caller.
588 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
590 struct ata_taskfile *tf = &qc->tf;
591 struct ata_device *dev = qc->dev;
593 int index, lba48, write;
595 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
596 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
598 if (dev->flags & ATA_DFLAG_PIO) {
599 tf->protocol = ATA_PROT_PIO;
600 index = dev->multi_count ? 0 : 4;
601 } else {
602 tf->protocol = ATA_PROT_DMA;
603 index = 8;
606 tf->command = ata_rw_cmds[index + lba48 + write];
609 static const char * xfer_mode_str[] = {
610 "UDMA/16",
611 "UDMA/25",
612 "UDMA/33",
613 "UDMA/44",
614 "UDMA/66",
615 "UDMA/100",
616 "UDMA/133",
617 "UDMA7",
618 "MWDMA0",
619 "MWDMA1",
620 "MWDMA2",
621 "PIO0",
622 "PIO1",
623 "PIO2",
624 "PIO3",
625 "PIO4",
629 * ata_udma_string - convert UDMA bit offset to string
630 * @mask: mask of bits supported; only highest bit counts.
632 * Determine string which represents the highest speed
633 * (highest bit in @udma_mask).
635 * LOCKING:
636 * None.
638 * RETURNS:
639 * Constant C string representing highest speed listed in
640 * @udma_mask, or the constant C string "<n/a>".
643 static const char *ata_mode_string(unsigned int mask)
645 int i;
647 for (i = 7; i >= 0; i--)
648 if (mask & (1 << i))
649 goto out;
650 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
651 if (mask & (1 << i))
652 goto out;
653 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
654 if (mask & (1 << i))
655 goto out;
657 return "<n/a>";
659 out:
660 return xfer_mode_str[i];
664 * ata_pio_devchk - PATA device presence detection
665 * @ap: ATA channel to examine
666 * @device: Device to examine (starting at zero)
668 * This technique was originally described in
669 * Hale Landis's ATADRVR (www.ata-atapi.com), and
670 * later found its way into the ATA/ATAPI spec.
672 * Write a pattern to the ATA shadow registers,
673 * and if a device is present, it will respond by
674 * correctly storing and echoing back the
675 * ATA shadow register contents.
677 * LOCKING:
678 * caller.
681 static unsigned int ata_pio_devchk(struct ata_port *ap,
682 unsigned int device)
684 struct ata_ioports *ioaddr = &ap->ioaddr;
685 u8 nsect, lbal;
687 ap->ops->dev_select(ap, device);
689 outb(0x55, ioaddr->nsect_addr);
690 outb(0xaa, ioaddr->lbal_addr);
692 outb(0xaa, ioaddr->nsect_addr);
693 outb(0x55, ioaddr->lbal_addr);
695 outb(0x55, ioaddr->nsect_addr);
696 outb(0xaa, ioaddr->lbal_addr);
698 nsect = inb(ioaddr->nsect_addr);
699 lbal = inb(ioaddr->lbal_addr);
701 if ((nsect == 0x55) && (lbal == 0xaa))
702 return 1; /* we found a device */
704 return 0; /* nothing found */
708 * ata_mmio_devchk - PATA device presence detection
709 * @ap: ATA channel to examine
710 * @device: Device to examine (starting at zero)
712 * This technique was originally described in
713 * Hale Landis's ATADRVR (www.ata-atapi.com), and
714 * later found its way into the ATA/ATAPI spec.
716 * Write a pattern to the ATA shadow registers,
717 * and if a device is present, it will respond by
718 * correctly storing and echoing back the
719 * ATA shadow register contents.
721 * LOCKING:
722 * caller.
725 static unsigned int ata_mmio_devchk(struct ata_port *ap,
726 unsigned int device)
728 struct ata_ioports *ioaddr = &ap->ioaddr;
729 u8 nsect, lbal;
731 ap->ops->dev_select(ap, device);
733 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
734 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
736 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
737 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
739 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
740 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
742 nsect = readb((void __iomem *) ioaddr->nsect_addr);
743 lbal = readb((void __iomem *) ioaddr->lbal_addr);
745 if ((nsect == 0x55) && (lbal == 0xaa))
746 return 1; /* we found a device */
748 return 0; /* nothing found */
752 * ata_devchk - PATA device presence detection
753 * @ap: ATA channel to examine
754 * @device: Device to examine (starting at zero)
756 * Dispatch ATA device presence detection, depending
757 * on whether we are using PIO or MMIO to talk to the
758 * ATA shadow registers.
760 * LOCKING:
761 * caller.
764 static unsigned int ata_devchk(struct ata_port *ap,
765 unsigned int device)
767 if (ap->flags & ATA_FLAG_MMIO)
768 return ata_mmio_devchk(ap, device);
769 return ata_pio_devchk(ap, device);
773 * ata_dev_classify - determine device type based on ATA-spec signature
774 * @tf: ATA taskfile register set for device to be identified
776 * Determine from taskfile register contents whether a device is
777 * ATA or ATAPI, as per "Signature and persistence" section
778 * of ATA/PI spec (volume 1, sect 5.14).
780 * LOCKING:
781 * None.
783 * RETURNS:
784 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
785 * the event of failure.
788 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
790 /* Apple's open source Darwin code hints that some devices only
791 * put a proper signature into the LBA mid/high registers,
792 * So, we only check those. It's sufficient for uniqueness.
795 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
796 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
797 DPRINTK("found ATA device by sig\n");
798 return ATA_DEV_ATA;
801 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
802 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
803 DPRINTK("found ATAPI device by sig\n");
804 return ATA_DEV_ATAPI;
807 DPRINTK("unknown device\n");
808 return ATA_DEV_UNKNOWN;
812 * ata_dev_try_classify - Parse returned ATA device signature
813 * @ap: ATA channel to examine
814 * @device: Device to examine (starting at zero)
816 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
817 * an ATA/ATAPI-defined set of values is placed in the ATA
818 * shadow registers, indicating the results of device detection
819 * and diagnostics.
821 * Select the ATA device, and read the values from the ATA shadow
822 * registers. Then parse according to the Error register value,
823 * and the spec-defined values examined by ata_dev_classify().
825 * LOCKING:
826 * caller.
829 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
831 struct ata_device *dev = &ap->device[device];
832 struct ata_taskfile tf;
833 unsigned int class;
834 u8 err;
836 ap->ops->dev_select(ap, device);
838 memset(&tf, 0, sizeof(tf));
840 ap->ops->tf_read(ap, &tf);
841 err = tf.feature;
843 dev->class = ATA_DEV_NONE;
845 /* see if device passed diags */
846 if (err == 1)
847 /* do nothing */ ;
848 else if ((device == 0) && (err == 0x81))
849 /* do nothing */ ;
850 else
851 return err;
853 /* determine if device if ATA or ATAPI */
854 class = ata_dev_classify(&tf);
855 if (class == ATA_DEV_UNKNOWN)
856 return err;
857 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
858 return err;
860 dev->class = class;
862 return err;
866 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
867 * @id: IDENTIFY DEVICE results we will examine
868 * @s: string into which data is output
869 * @ofs: offset into identify device page
870 * @len: length of string to return. must be an even number.
872 * The strings in the IDENTIFY DEVICE page are broken up into
873 * 16-bit chunks. Run through the string, and output each
874 * 8-bit chunk linearly, regardless of platform.
876 * LOCKING:
877 * caller.
880 void ata_dev_id_string(const u16 *id, unsigned char *s,
881 unsigned int ofs, unsigned int len)
883 unsigned int c;
885 while (len > 0) {
886 c = id[ofs] >> 8;
887 *s = c;
888 s++;
890 c = id[ofs] & 0xff;
891 *s = c;
892 s++;
894 ofs++;
895 len -= 2;
901 * ata_noop_dev_select - Select device 0/1 on ATA bus
902 * @ap: ATA channel to manipulate
903 * @device: ATA device (numbered from zero) to select
905 * This function performs no actual function.
907 * May be used as the dev_select() entry in ata_port_operations.
909 * LOCKING:
910 * caller.
912 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
918 * ata_std_dev_select - Select device 0/1 on ATA bus
919 * @ap: ATA channel to manipulate
920 * @device: ATA device (numbered from zero) to select
922 * Use the method defined in the ATA specification to
923 * make either device 0, or device 1, active on the
924 * ATA channel. Works with both PIO and MMIO.
926 * May be used as the dev_select() entry in ata_port_operations.
928 * LOCKING:
929 * caller.
932 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
934 u8 tmp;
936 if (device == 0)
937 tmp = ATA_DEVICE_OBS;
938 else
939 tmp = ATA_DEVICE_OBS | ATA_DEV1;
941 if (ap->flags & ATA_FLAG_MMIO) {
942 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
943 } else {
944 outb(tmp, ap->ioaddr.device_addr);
946 ata_pause(ap); /* needed; also flushes, for mmio */
950 * ata_dev_select - Select device 0/1 on ATA bus
951 * @ap: ATA channel to manipulate
952 * @device: ATA device (numbered from zero) to select
953 * @wait: non-zero to wait for Status register BSY bit to clear
954 * @can_sleep: non-zero if context allows sleeping
956 * Use the method defined in the ATA specification to
957 * make either device 0, or device 1, active on the
958 * ATA channel.
960 * This is a high-level version of ata_std_dev_select(),
961 * which additionally provides the services of inserting
962 * the proper pauses and status polling, where needed.
964 * LOCKING:
965 * caller.
968 void ata_dev_select(struct ata_port *ap, unsigned int device,
969 unsigned int wait, unsigned int can_sleep)
971 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
972 ap->id, device, wait);
974 if (wait)
975 ata_wait_idle(ap);
977 ap->ops->dev_select(ap, device);
979 if (wait) {
980 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
981 msleep(150);
982 ata_wait_idle(ap);
987 * ata_dump_id - IDENTIFY DEVICE info debugging output
988 * @dev: Device whose IDENTIFY DEVICE page we will dump
990 * Dump selected 16-bit words from a detected device's
991 * IDENTIFY PAGE page.
993 * LOCKING:
994 * caller.
997 static inline void ata_dump_id(const struct ata_device *dev)
999 DPRINTK("49==0x%04x "
1000 "53==0x%04x "
1001 "63==0x%04x "
1002 "64==0x%04x "
1003 "75==0x%04x \n",
1004 dev->id[49],
1005 dev->id[53],
1006 dev->id[63],
1007 dev->id[64],
1008 dev->id[75]);
1009 DPRINTK("80==0x%04x "
1010 "81==0x%04x "
1011 "82==0x%04x "
1012 "83==0x%04x "
1013 "84==0x%04x \n",
1014 dev->id[80],
1015 dev->id[81],
1016 dev->id[82],
1017 dev->id[83],
1018 dev->id[84]);
1019 DPRINTK("88==0x%04x "
1020 "93==0x%04x\n",
1021 dev->id[88],
1022 dev->id[93]);
1026 * Compute the PIO modes available for this device. This is not as
1027 * trivial as it seems if we must consider early devices correctly.
1029 * FIXME: pre IDE drive timing (do we care ?).
1032 static unsigned int ata_pio_modes(const struct ata_device *adev)
1034 u16 modes;
1036 /* Usual case. Word 53 indicates word 88 is valid */
1037 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1038 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1039 modes <<= 3;
1040 modes |= 0x7;
1041 return modes;
1044 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1045 for the maximum. Turn it into a mask and return it */
1046 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1047 return modes;
1051 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1052 * @ap: port on which device we wish to probe resides
1053 * @device: device bus address, starting at zero
1055 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1056 * command, and read back the 512-byte device information page.
1057 * The device information page is fed to us via the standard
1058 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1059 * using standard PIO-IN paths)
1061 * After reading the device information page, we use several
1062 * bits of information from it to initialize data structures
1063 * that will be used during the lifetime of the ata_device.
1064 * Other data from the info page is used to disqualify certain
1065 * older ATA devices we do not wish to support.
1067 * LOCKING:
1068 * Inherited from caller. Some functions called by this function
1069 * obtain the host_set lock.
1072 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1074 struct ata_device *dev = &ap->device[device];
1075 unsigned int major_version;
1076 u16 tmp;
1077 unsigned long xfer_modes;
1078 unsigned int using_edd;
1079 DECLARE_COMPLETION(wait);
1080 struct ata_queued_cmd *qc;
1081 unsigned long flags;
1082 int rc;
1084 if (!ata_dev_present(dev)) {
1085 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1086 ap->id, device);
1087 return;
1090 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1091 using_edd = 0;
1092 else
1093 using_edd = 1;
1095 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1097 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1098 dev->class == ATA_DEV_NONE);
1100 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1102 qc = ata_qc_new_init(ap, dev);
1103 BUG_ON(qc == NULL);
1105 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1106 qc->dma_dir = DMA_FROM_DEVICE;
1107 qc->tf.protocol = ATA_PROT_PIO;
1108 qc->nsect = 1;
1110 retry:
1111 if (dev->class == ATA_DEV_ATA) {
1112 qc->tf.command = ATA_CMD_ID_ATA;
1113 DPRINTK("do ATA identify\n");
1114 } else {
1115 qc->tf.command = ATA_CMD_ID_ATAPI;
1116 DPRINTK("do ATAPI identify\n");
1119 qc->waiting = &wait;
1120 qc->complete_fn = ata_qc_complete_noop;
1122 spin_lock_irqsave(&ap->host_set->lock, flags);
1123 rc = ata_qc_issue(qc);
1124 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1126 if (rc)
1127 goto err_out;
1128 else
1129 wait_for_completion(&wait);
1131 spin_lock_irqsave(&ap->host_set->lock, flags);
1132 ap->ops->tf_read(ap, &qc->tf);
1133 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1135 if (qc->tf.command & ATA_ERR) {
1137 * arg! EDD works for all test cases, but seems to return
1138 * the ATA signature for some ATAPI devices. Until the
1139 * reason for this is found and fixed, we fix up the mess
1140 * here. If IDENTIFY DEVICE returns command aborted
1141 * (as ATAPI devices do), then we issue an
1142 * IDENTIFY PACKET DEVICE.
1144 * ATA software reset (SRST, the default) does not appear
1145 * to have this problem.
1147 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1148 u8 err = qc->tf.feature;
1149 if (err & ATA_ABORTED) {
1150 dev->class = ATA_DEV_ATAPI;
1151 qc->cursg = 0;
1152 qc->cursg_ofs = 0;
1153 qc->cursect = 0;
1154 qc->nsect = 1;
1155 goto retry;
1158 goto err_out;
1161 swap_buf_le16(dev->id, ATA_ID_WORDS);
1163 /* print device capabilities */
1164 printk(KERN_DEBUG "ata%u: dev %u cfg "
1165 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1166 ap->id, device, dev->id[49],
1167 dev->id[82], dev->id[83], dev->id[84],
1168 dev->id[85], dev->id[86], dev->id[87],
1169 dev->id[88]);
1172 * common ATA, ATAPI feature tests
1175 /* we require DMA support (bits 8 of word 49) */
1176 if (!ata_id_has_dma(dev->id)) {
1177 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1178 goto err_out_nosup;
1181 /* quick-n-dirty find max transfer mode; for printk only */
1182 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1183 if (!xfer_modes)
1184 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1185 if (!xfer_modes)
1186 xfer_modes = ata_pio_modes(dev);
1188 ata_dump_id(dev);
1190 /* ATA-specific feature tests */
1191 if (dev->class == ATA_DEV_ATA) {
1192 if (!ata_id_is_ata(dev->id)) /* sanity check */
1193 goto err_out_nosup;
1195 /* get major version */
1196 tmp = dev->id[ATA_ID_MAJOR_VER];
1197 for (major_version = 14; major_version >= 1; major_version--)
1198 if (tmp & (1 << major_version))
1199 break;
1202 * The exact sequence expected by certain pre-ATA4 drives is:
1203 * SRST RESET
1204 * IDENTIFY
1205 * INITIALIZE DEVICE PARAMETERS
1206 * anything else..
1207 * Some drives were very specific about that exact sequence.
1209 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1210 ata_dev_init_params(ap, dev);
1212 /* current CHS translation info (id[53-58]) might be
1213 * changed. reread the identify device info.
1215 ata_dev_reread_id(ap, dev);
1218 if (ata_id_has_lba(dev->id)) {
1219 dev->flags |= ATA_DFLAG_LBA;
1221 if (ata_id_has_lba48(dev->id)) {
1222 dev->flags |= ATA_DFLAG_LBA48;
1223 dev->n_sectors = ata_id_u64(dev->id, 100);
1224 } else {
1225 dev->n_sectors = ata_id_u32(dev->id, 60);
1228 /* print device info to dmesg */
1229 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1230 ap->id, device,
1231 major_version,
1232 ata_mode_string(xfer_modes),
1233 (unsigned long long)dev->n_sectors,
1234 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1235 } else {
1236 /* CHS */
1238 /* Default translation */
1239 dev->cylinders = dev->id[1];
1240 dev->heads = dev->id[3];
1241 dev->sectors = dev->id[6];
1242 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1244 if (ata_id_current_chs_valid(dev->id)) {
1245 /* Current CHS translation is valid. */
1246 dev->cylinders = dev->id[54];
1247 dev->heads = dev->id[55];
1248 dev->sectors = dev->id[56];
1250 dev->n_sectors = ata_id_u32(dev->id, 57);
1253 /* print device info to dmesg */
1254 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1255 ap->id, device,
1256 major_version,
1257 ata_mode_string(xfer_modes),
1258 (unsigned long long)dev->n_sectors,
1259 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1263 ap->host->max_cmd_len = 16;
1266 /* ATAPI-specific feature tests */
1267 else {
1268 if (ata_id_is_ata(dev->id)) /* sanity check */
1269 goto err_out_nosup;
1271 rc = atapi_cdb_len(dev->id);
1272 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1273 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1274 goto err_out_nosup;
1276 ap->cdb_len = (unsigned int) rc;
1277 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1279 /* print device info to dmesg */
1280 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1281 ap->id, device,
1282 ata_mode_string(xfer_modes));
1285 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1286 return;
1288 err_out_nosup:
1289 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1290 ap->id, device);
1291 err_out:
1292 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1293 DPRINTK("EXIT, err\n");
1297 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1299 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1303 * ata_dev_config - Run device specific handlers and check for
1304 * SATA->PATA bridges
1305 * @ap: Bus
1306 * @i: Device
1308 * LOCKING:
1311 void ata_dev_config(struct ata_port *ap, unsigned int i)
1313 /* limit bridge transfers to udma5, 200 sectors */
1314 if (ata_dev_knobble(ap)) {
1315 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1316 ap->id, ap->device->devno);
1317 ap->udma_mask &= ATA_UDMA5;
1318 ap->host->max_sectors = ATA_MAX_SECTORS;
1319 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1320 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1323 if (ap->ops->dev_config)
1324 ap->ops->dev_config(ap, &ap->device[i]);
1328 * ata_bus_probe - Reset and probe ATA bus
1329 * @ap: Bus to probe
1331 * Master ATA bus probing function. Initiates a hardware-dependent
1332 * bus reset, then attempts to identify any devices found on
1333 * the bus.
1335 * LOCKING:
1336 * PCI/etc. bus probe sem.
1338 * RETURNS:
1339 * Zero on success, non-zero on error.
1342 static int ata_bus_probe(struct ata_port *ap)
1344 unsigned int i, found = 0;
1346 ap->ops->phy_reset(ap);
1347 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1348 goto err_out;
1350 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1351 ata_dev_identify(ap, i);
1352 if (ata_dev_present(&ap->device[i])) {
1353 found = 1;
1354 ata_dev_config(ap,i);
1358 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1359 goto err_out_disable;
1361 ata_set_mode(ap);
1362 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1363 goto err_out_disable;
1365 return 0;
1367 err_out_disable:
1368 ap->ops->port_disable(ap);
1369 err_out:
1370 return -1;
1374 * ata_port_probe - Mark port as enabled
1375 * @ap: Port for which we indicate enablement
1377 * Modify @ap data structure such that the system
1378 * thinks that the entire port is enabled.
1380 * LOCKING: host_set lock, or some other form of
1381 * serialization.
1384 void ata_port_probe(struct ata_port *ap)
1386 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1390 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1391 * @ap: SATA port associated with target SATA PHY.
1393 * This function issues commands to standard SATA Sxxx
1394 * PHY registers, to wake up the phy (and device), and
1395 * clear any reset condition.
1397 * LOCKING:
1398 * PCI/etc. bus probe sem.
1401 void __sata_phy_reset(struct ata_port *ap)
1403 u32 sstatus;
1404 unsigned long timeout = jiffies + (HZ * 5);
1406 if (ap->flags & ATA_FLAG_SATA_RESET) {
1407 /* issue phy wake/reset */
1408 scr_write_flush(ap, SCR_CONTROL, 0x301);
1409 /* Couldn't find anything in SATA I/II specs, but
1410 * AHCI-1.1 10.4.2 says at least 1 ms. */
1411 mdelay(1);
1413 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1415 /* wait for phy to become ready, if necessary */
1416 do {
1417 msleep(200);
1418 sstatus = scr_read(ap, SCR_STATUS);
1419 if ((sstatus & 0xf) != 1)
1420 break;
1421 } while (time_before(jiffies, timeout));
1423 /* TODO: phy layer with polling, timeouts, etc. */
1424 if (sata_dev_present(ap))
1425 ata_port_probe(ap);
1426 else {
1427 sstatus = scr_read(ap, SCR_STATUS);
1428 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1429 ap->id, sstatus);
1430 ata_port_disable(ap);
1433 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1434 return;
1436 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1437 ata_port_disable(ap);
1438 return;
1441 ap->cbl = ATA_CBL_SATA;
1445 * sata_phy_reset - Reset SATA bus.
1446 * @ap: SATA port associated with target SATA PHY.
1448 * This function resets the SATA bus, and then probes
1449 * the bus for devices.
1451 * LOCKING:
1452 * PCI/etc. bus probe sem.
1455 void sata_phy_reset(struct ata_port *ap)
1457 __sata_phy_reset(ap);
1458 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1459 return;
1460 ata_bus_reset(ap);
1464 * ata_port_disable - Disable port.
1465 * @ap: Port to be disabled.
1467 * Modify @ap data structure such that the system
1468 * thinks that the entire port is disabled, and should
1469 * never attempt to probe or communicate with devices
1470 * on this port.
1472 * LOCKING: host_set lock, or some other form of
1473 * serialization.
1476 void ata_port_disable(struct ata_port *ap)
1478 ap->device[0].class = ATA_DEV_NONE;
1479 ap->device[1].class = ATA_DEV_NONE;
1480 ap->flags |= ATA_FLAG_PORT_DISABLED;
1484 * This mode timing computation functionality is ported over from
1485 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1488 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1489 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1490 * for PIO 5, which is a nonstandard extension and UDMA6, which
1491 * is currently supported only by Maxtor drives.
1494 static const struct ata_timing ata_timing[] = {
1496 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1497 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1498 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1499 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1501 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1502 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1503 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1505 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1507 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1508 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1509 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1511 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1512 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1513 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1515 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1516 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1517 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1519 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1520 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1521 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1523 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1525 { 0xFF }
1528 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1529 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1531 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1533 q->setup = EZ(t->setup * 1000, T);
1534 q->act8b = EZ(t->act8b * 1000, T);
1535 q->rec8b = EZ(t->rec8b * 1000, T);
1536 q->cyc8b = EZ(t->cyc8b * 1000, T);
1537 q->active = EZ(t->active * 1000, T);
1538 q->recover = EZ(t->recover * 1000, T);
1539 q->cycle = EZ(t->cycle * 1000, T);
1540 q->udma = EZ(t->udma * 1000, UT);
1543 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1544 struct ata_timing *m, unsigned int what)
1546 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1547 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1548 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1549 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1550 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1551 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1552 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1553 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1556 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1558 const struct ata_timing *t;
1560 for (t = ata_timing; t->mode != speed; t++)
1561 if (t->mode == 0xFF)
1562 return NULL;
1563 return t;
1566 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1567 struct ata_timing *t, int T, int UT)
1569 const struct ata_timing *s;
1570 struct ata_timing p;
1573 * Find the mode.
1576 if (!(s = ata_timing_find_mode(speed)))
1577 return -EINVAL;
1580 * If the drive is an EIDE drive, it can tell us it needs extended
1581 * PIO/MW_DMA cycle timing.
1584 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1585 memset(&p, 0, sizeof(p));
1586 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1587 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1588 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1589 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1590 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1592 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1596 * Convert the timing to bus clock counts.
1599 ata_timing_quantize(s, t, T, UT);
1602 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1603 * and some other commands. We have to ensure that the DMA cycle timing is
1604 * slower/equal than the fastest PIO timing.
1607 if (speed > XFER_PIO_4) {
1608 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1609 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1613 * Lenghten active & recovery time so that cycle time is correct.
1616 if (t->act8b + t->rec8b < t->cyc8b) {
1617 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1618 t->rec8b = t->cyc8b - t->act8b;
1621 if (t->active + t->recover < t->cycle) {
1622 t->active += (t->cycle - (t->active + t->recover)) / 2;
1623 t->recover = t->cycle - t->active;
1626 return 0;
1629 static const struct {
1630 unsigned int shift;
1631 u8 base;
1632 } xfer_mode_classes[] = {
1633 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1634 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1635 { ATA_SHIFT_PIO, XFER_PIO_0 },
1638 static inline u8 base_from_shift(unsigned int shift)
1640 int i;
1642 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1643 if (xfer_mode_classes[i].shift == shift)
1644 return xfer_mode_classes[i].base;
1646 return 0xff;
1649 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1651 int ofs, idx;
1652 u8 base;
1654 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1655 return;
1657 if (dev->xfer_shift == ATA_SHIFT_PIO)
1658 dev->flags |= ATA_DFLAG_PIO;
1660 ata_dev_set_xfermode(ap, dev);
1662 base = base_from_shift(dev->xfer_shift);
1663 ofs = dev->xfer_mode - base;
1664 idx = ofs + dev->xfer_shift;
1665 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1667 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1668 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1670 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1671 ap->id, dev->devno, xfer_mode_str[idx]);
1674 static int ata_host_set_pio(struct ata_port *ap)
1676 unsigned int mask;
1677 int x, i;
1678 u8 base, xfer_mode;
1680 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1681 x = fgb(mask);
1682 if (x < 0) {
1683 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1684 return -1;
1687 base = base_from_shift(ATA_SHIFT_PIO);
1688 xfer_mode = base + x;
1690 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1691 (int)base, (int)xfer_mode, mask, x);
1693 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1694 struct ata_device *dev = &ap->device[i];
1695 if (ata_dev_present(dev)) {
1696 dev->pio_mode = xfer_mode;
1697 dev->xfer_mode = xfer_mode;
1698 dev->xfer_shift = ATA_SHIFT_PIO;
1699 if (ap->ops->set_piomode)
1700 ap->ops->set_piomode(ap, dev);
1704 return 0;
1707 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1708 unsigned int xfer_shift)
1710 int i;
1712 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1713 struct ata_device *dev = &ap->device[i];
1714 if (ata_dev_present(dev)) {
1715 dev->dma_mode = xfer_mode;
1716 dev->xfer_mode = xfer_mode;
1717 dev->xfer_shift = xfer_shift;
1718 if (ap->ops->set_dmamode)
1719 ap->ops->set_dmamode(ap, dev);
1725 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1726 * @ap: port on which timings will be programmed
1728 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1730 * LOCKING:
1731 * PCI/etc. bus probe sem.
1734 static void ata_set_mode(struct ata_port *ap)
1736 unsigned int xfer_shift;
1737 u8 xfer_mode;
1738 int rc;
1740 /* step 1: always set host PIO timings */
1741 rc = ata_host_set_pio(ap);
1742 if (rc)
1743 goto err_out;
1745 /* step 2: choose the best data xfer mode */
1746 xfer_mode = xfer_shift = 0;
1747 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1748 if (rc)
1749 goto err_out;
1751 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1752 if (xfer_shift != ATA_SHIFT_PIO)
1753 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1755 /* step 4: update devices' xfer mode */
1756 ata_dev_set_mode(ap, &ap->device[0]);
1757 ata_dev_set_mode(ap, &ap->device[1]);
1759 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1760 return;
1762 if (ap->ops->post_set_mode)
1763 ap->ops->post_set_mode(ap);
1765 return;
1767 err_out:
1768 ata_port_disable(ap);
1772 * ata_busy_sleep - sleep until BSY clears, or timeout
1773 * @ap: port containing status register to be polled
1774 * @tmout_pat: impatience timeout
1775 * @tmout: overall timeout
1777 * Sleep until ATA Status register bit BSY clears,
1778 * or a timeout occurs.
1780 * LOCKING: None.
1784 static unsigned int ata_busy_sleep (struct ata_port *ap,
1785 unsigned long tmout_pat,
1786 unsigned long tmout)
1788 unsigned long timer_start, timeout;
1789 u8 status;
1791 status = ata_busy_wait(ap, ATA_BUSY, 300);
1792 timer_start = jiffies;
1793 timeout = timer_start + tmout_pat;
1794 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1795 msleep(50);
1796 status = ata_busy_wait(ap, ATA_BUSY, 3);
1799 if (status & ATA_BUSY)
1800 printk(KERN_WARNING "ata%u is slow to respond, "
1801 "please be patient\n", ap->id);
1803 timeout = timer_start + tmout;
1804 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1805 msleep(50);
1806 status = ata_chk_status(ap);
1809 if (status & ATA_BUSY) {
1810 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1811 ap->id, tmout / HZ);
1812 return 1;
1815 return 0;
1818 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1820 struct ata_ioports *ioaddr = &ap->ioaddr;
1821 unsigned int dev0 = devmask & (1 << 0);
1822 unsigned int dev1 = devmask & (1 << 1);
1823 unsigned long timeout;
1825 /* if device 0 was found in ata_devchk, wait for its
1826 * BSY bit to clear
1828 if (dev0)
1829 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1831 /* if device 1 was found in ata_devchk, wait for
1832 * register access, then wait for BSY to clear
1834 timeout = jiffies + ATA_TMOUT_BOOT;
1835 while (dev1) {
1836 u8 nsect, lbal;
1838 ap->ops->dev_select(ap, 1);
1839 if (ap->flags & ATA_FLAG_MMIO) {
1840 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1841 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1842 } else {
1843 nsect = inb(ioaddr->nsect_addr);
1844 lbal = inb(ioaddr->lbal_addr);
1846 if ((nsect == 1) && (lbal == 1))
1847 break;
1848 if (time_after(jiffies, timeout)) {
1849 dev1 = 0;
1850 break;
1852 msleep(50); /* give drive a breather */
1854 if (dev1)
1855 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1857 /* is all this really necessary? */
1858 ap->ops->dev_select(ap, 0);
1859 if (dev1)
1860 ap->ops->dev_select(ap, 1);
1861 if (dev0)
1862 ap->ops->dev_select(ap, 0);
1866 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1867 * @ap: Port to reset and probe
1869 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1870 * probe the bus. Not often used these days.
1872 * LOCKING:
1873 * PCI/etc. bus probe sem.
1874 * Obtains host_set lock.
1878 static unsigned int ata_bus_edd(struct ata_port *ap)
1880 struct ata_taskfile tf;
1881 unsigned long flags;
1883 /* set up execute-device-diag (bus reset) taskfile */
1884 /* also, take interrupts to a known state (disabled) */
1885 DPRINTK("execute-device-diag\n");
1886 ata_tf_init(ap, &tf, 0);
1887 tf.ctl |= ATA_NIEN;
1888 tf.command = ATA_CMD_EDD;
1889 tf.protocol = ATA_PROT_NODATA;
1891 /* do bus reset */
1892 spin_lock_irqsave(&ap->host_set->lock, flags);
1893 ata_tf_to_host(ap, &tf);
1894 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1896 /* spec says at least 2ms. but who knows with those
1897 * crazy ATAPI devices...
1899 msleep(150);
1901 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1904 static unsigned int ata_bus_softreset(struct ata_port *ap,
1905 unsigned int devmask)
1907 struct ata_ioports *ioaddr = &ap->ioaddr;
1909 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1911 /* software reset. causes dev0 to be selected */
1912 if (ap->flags & ATA_FLAG_MMIO) {
1913 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1914 udelay(20); /* FIXME: flush */
1915 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1916 udelay(20); /* FIXME: flush */
1917 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1918 } else {
1919 outb(ap->ctl, ioaddr->ctl_addr);
1920 udelay(10);
1921 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1922 udelay(10);
1923 outb(ap->ctl, ioaddr->ctl_addr);
1926 /* spec mandates ">= 2ms" before checking status.
1927 * We wait 150ms, because that was the magic delay used for
1928 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1929 * between when the ATA command register is written, and then
1930 * status is checked. Because waiting for "a while" before
1931 * checking status is fine, post SRST, we perform this magic
1932 * delay here as well.
1934 msleep(150);
1936 ata_bus_post_reset(ap, devmask);
1938 return 0;
1942 * ata_bus_reset - reset host port and associated ATA channel
1943 * @ap: port to reset
1945 * This is typically the first time we actually start issuing
1946 * commands to the ATA channel. We wait for BSY to clear, then
1947 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1948 * result. Determine what devices, if any, are on the channel
1949 * by looking at the device 0/1 error register. Look at the signature
1950 * stored in each device's taskfile registers, to determine if
1951 * the device is ATA or ATAPI.
1953 * LOCKING:
1954 * PCI/etc. bus probe sem.
1955 * Obtains host_set lock.
1957 * SIDE EFFECTS:
1958 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1961 void ata_bus_reset(struct ata_port *ap)
1963 struct ata_ioports *ioaddr = &ap->ioaddr;
1964 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1965 u8 err;
1966 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1968 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1970 /* determine if device 0/1 are present */
1971 if (ap->flags & ATA_FLAG_SATA_RESET)
1972 dev0 = 1;
1973 else {
1974 dev0 = ata_devchk(ap, 0);
1975 if (slave_possible)
1976 dev1 = ata_devchk(ap, 1);
1979 if (dev0)
1980 devmask |= (1 << 0);
1981 if (dev1)
1982 devmask |= (1 << 1);
1984 /* select device 0 again */
1985 ap->ops->dev_select(ap, 0);
1987 /* issue bus reset */
1988 if (ap->flags & ATA_FLAG_SRST)
1989 rc = ata_bus_softreset(ap, devmask);
1990 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1991 /* set up device control */
1992 if (ap->flags & ATA_FLAG_MMIO)
1993 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1994 else
1995 outb(ap->ctl, ioaddr->ctl_addr);
1996 rc = ata_bus_edd(ap);
1999 if (rc)
2000 goto err_out;
2003 * determine by signature whether we have ATA or ATAPI devices
2005 err = ata_dev_try_classify(ap, 0);
2006 if ((slave_possible) && (err != 0x81))
2007 ata_dev_try_classify(ap, 1);
2009 /* re-enable interrupts */
2010 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2011 ata_irq_on(ap);
2013 /* is double-select really necessary? */
2014 if (ap->device[1].class != ATA_DEV_NONE)
2015 ap->ops->dev_select(ap, 1);
2016 if (ap->device[0].class != ATA_DEV_NONE)
2017 ap->ops->dev_select(ap, 0);
2019 /* if no devices were detected, disable this port */
2020 if ((ap->device[0].class == ATA_DEV_NONE) &&
2021 (ap->device[1].class == ATA_DEV_NONE))
2022 goto err_out;
2024 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2025 /* set up device control for ATA_FLAG_SATA_RESET */
2026 if (ap->flags & ATA_FLAG_MMIO)
2027 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2028 else
2029 outb(ap->ctl, ioaddr->ctl_addr);
2032 DPRINTK("EXIT\n");
2033 return;
2035 err_out:
2036 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2037 ap->ops->port_disable(ap);
2039 DPRINTK("EXIT\n");
2042 static void ata_pr_blacklisted(const struct ata_port *ap,
2043 const struct ata_device *dev)
2045 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2046 ap->id, dev->devno);
2049 static const char * ata_dma_blacklist [] = {
2050 "WDC AC11000H",
2051 "WDC AC22100H",
2052 "WDC AC32500H",
2053 "WDC AC33100H",
2054 "WDC AC31600H",
2055 "WDC AC32100H",
2056 "WDC AC23200L",
2057 "Compaq CRD-8241B",
2058 "CRD-8400B",
2059 "CRD-8480B",
2060 "CRD-8482B",
2061 "CRD-84",
2062 "SanDisk SDP3B",
2063 "SanDisk SDP3B-64",
2064 "SANYO CD-ROM CRD",
2065 "HITACHI CDR-8",
2066 "HITACHI CDR-8335",
2067 "HITACHI CDR-8435",
2068 "Toshiba CD-ROM XM-6202B",
2069 "TOSHIBA CD-ROM XM-1702BC",
2070 "CD-532E-A",
2071 "E-IDE CD-ROM CR-840",
2072 "CD-ROM Drive/F5A",
2073 "WPI CDD-820",
2074 "SAMSUNG CD-ROM SC-148C",
2075 "SAMSUNG CD-ROM SC",
2076 "SanDisk SDP3B-64",
2077 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2078 "_NEC DV5800A",
2081 static int ata_dma_blacklisted(const struct ata_device *dev)
2083 unsigned char model_num[40];
2084 char *s;
2085 unsigned int len;
2086 int i;
2088 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2089 sizeof(model_num));
2090 s = &model_num[0];
2091 len = strnlen(s, sizeof(model_num));
2093 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2094 while ((len > 0) && (s[len - 1] == ' ')) {
2095 len--;
2096 s[len] = 0;
2099 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2100 if (!strncmp(ata_dma_blacklist[i], s, len))
2101 return 1;
2103 return 0;
2106 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2108 const struct ata_device *master, *slave;
2109 unsigned int mask;
2111 master = &ap->device[0];
2112 slave = &ap->device[1];
2114 assert (ata_dev_present(master) || ata_dev_present(slave));
2116 if (shift == ATA_SHIFT_UDMA) {
2117 mask = ap->udma_mask;
2118 if (ata_dev_present(master)) {
2119 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2120 if (ata_dma_blacklisted(master)) {
2121 mask = 0;
2122 ata_pr_blacklisted(ap, master);
2125 if (ata_dev_present(slave)) {
2126 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2127 if (ata_dma_blacklisted(slave)) {
2128 mask = 0;
2129 ata_pr_blacklisted(ap, slave);
2133 else if (shift == ATA_SHIFT_MWDMA) {
2134 mask = ap->mwdma_mask;
2135 if (ata_dev_present(master)) {
2136 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2137 if (ata_dma_blacklisted(master)) {
2138 mask = 0;
2139 ata_pr_blacklisted(ap, master);
2142 if (ata_dev_present(slave)) {
2143 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2144 if (ata_dma_blacklisted(slave)) {
2145 mask = 0;
2146 ata_pr_blacklisted(ap, slave);
2150 else if (shift == ATA_SHIFT_PIO) {
2151 mask = ap->pio_mask;
2152 if (ata_dev_present(master)) {
2153 /* spec doesn't return explicit support for
2154 * PIO0-2, so we fake it
2156 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2157 tmp_mode <<= 3;
2158 tmp_mode |= 0x7;
2159 mask &= tmp_mode;
2161 if (ata_dev_present(slave)) {
2162 /* spec doesn't return explicit support for
2163 * PIO0-2, so we fake it
2165 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2166 tmp_mode <<= 3;
2167 tmp_mode |= 0x7;
2168 mask &= tmp_mode;
2171 else {
2172 mask = 0xffffffff; /* shut up compiler warning */
2173 BUG();
2176 return mask;
2179 /* find greatest bit */
2180 static int fgb(u32 bitmap)
2182 unsigned int i;
2183 int x = -1;
2185 for (i = 0; i < 32; i++)
2186 if (bitmap & (1 << i))
2187 x = i;
2189 return x;
2193 * ata_choose_xfer_mode - attempt to find best transfer mode
2194 * @ap: Port for which an xfer mode will be selected
2195 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2196 * @xfer_shift_out: (output) bit shift that selects this mode
2198 * Based on host and device capabilities, determine the
2199 * maximum transfer mode that is amenable to all.
2201 * LOCKING:
2202 * PCI/etc. bus probe sem.
2204 * RETURNS:
2205 * Zero on success, negative on error.
2208 static int ata_choose_xfer_mode(const struct ata_port *ap,
2209 u8 *xfer_mode_out,
2210 unsigned int *xfer_shift_out)
2212 unsigned int mask, shift;
2213 int x, i;
2215 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2216 shift = xfer_mode_classes[i].shift;
2217 mask = ata_get_mode_mask(ap, shift);
2219 x = fgb(mask);
2220 if (x >= 0) {
2221 *xfer_mode_out = xfer_mode_classes[i].base + x;
2222 *xfer_shift_out = shift;
2223 return 0;
2227 return -1;
2231 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2232 * @ap: Port associated with device @dev
2233 * @dev: Device to which command will be sent
2235 * Issue SET FEATURES - XFER MODE command to device @dev
2236 * on port @ap.
2238 * LOCKING:
2239 * PCI/etc. bus probe sem.
2242 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2244 DECLARE_COMPLETION(wait);
2245 struct ata_queued_cmd *qc;
2246 int rc;
2247 unsigned long flags;
2249 /* set up set-features taskfile */
2250 DPRINTK("set features - xfer mode\n");
2252 qc = ata_qc_new_init(ap, dev);
2253 BUG_ON(qc == NULL);
2255 qc->tf.command = ATA_CMD_SET_FEATURES;
2256 qc->tf.feature = SETFEATURES_XFER;
2257 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2258 qc->tf.protocol = ATA_PROT_NODATA;
2259 qc->tf.nsect = dev->xfer_mode;
2261 qc->waiting = &wait;
2262 qc->complete_fn = ata_qc_complete_noop;
2264 spin_lock_irqsave(&ap->host_set->lock, flags);
2265 rc = ata_qc_issue(qc);
2266 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2268 if (rc)
2269 ata_port_disable(ap);
2270 else
2271 wait_for_completion(&wait);
2273 DPRINTK("EXIT\n");
2277 * ata_dev_reread_id - Reread the device identify device info
2278 * @ap: port where the device is
2279 * @dev: device to reread the identify device info
2281 * LOCKING:
2284 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2286 DECLARE_COMPLETION(wait);
2287 struct ata_queued_cmd *qc;
2288 unsigned long flags;
2289 int rc;
2291 qc = ata_qc_new_init(ap, dev);
2292 BUG_ON(qc == NULL);
2294 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2295 qc->dma_dir = DMA_FROM_DEVICE;
2297 if (dev->class == ATA_DEV_ATA) {
2298 qc->tf.command = ATA_CMD_ID_ATA;
2299 DPRINTK("do ATA identify\n");
2300 } else {
2301 qc->tf.command = ATA_CMD_ID_ATAPI;
2302 DPRINTK("do ATAPI identify\n");
2305 qc->tf.flags |= ATA_TFLAG_DEVICE;
2306 qc->tf.protocol = ATA_PROT_PIO;
2307 qc->nsect = 1;
2309 qc->waiting = &wait;
2310 qc->complete_fn = ata_qc_complete_noop;
2312 spin_lock_irqsave(&ap->host_set->lock, flags);
2313 rc = ata_qc_issue(qc);
2314 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2316 if (rc)
2317 goto err_out;
2319 wait_for_completion(&wait);
2321 swap_buf_le16(dev->id, ATA_ID_WORDS);
2323 ata_dump_id(dev);
2325 DPRINTK("EXIT\n");
2327 return;
2328 err_out:
2329 ata_port_disable(ap);
2333 * ata_dev_init_params - Issue INIT DEV PARAMS command
2334 * @ap: Port associated with device @dev
2335 * @dev: Device to which command will be sent
2337 * LOCKING:
2340 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2342 DECLARE_COMPLETION(wait);
2343 struct ata_queued_cmd *qc;
2344 int rc;
2345 unsigned long flags;
2346 u16 sectors = dev->id[6];
2347 u16 heads = dev->id[3];
2349 /* Number of sectors per track 1-255. Number of heads 1-16 */
2350 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2351 return;
2353 /* set up init dev params taskfile */
2354 DPRINTK("init dev params \n");
2356 qc = ata_qc_new_init(ap, dev);
2357 BUG_ON(qc == NULL);
2359 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2360 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2361 qc->tf.protocol = ATA_PROT_NODATA;
2362 qc->tf.nsect = sectors;
2363 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2365 qc->waiting = &wait;
2366 qc->complete_fn = ata_qc_complete_noop;
2368 spin_lock_irqsave(&ap->host_set->lock, flags);
2369 rc = ata_qc_issue(qc);
2370 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2372 if (rc)
2373 ata_port_disable(ap);
2374 else
2375 wait_for_completion(&wait);
2377 DPRINTK("EXIT\n");
2381 * ata_sg_clean - Unmap DMA memory associated with command
2382 * @qc: Command containing DMA memory to be released
2384 * Unmap all mapped DMA memory associated with this command.
2386 * LOCKING:
2387 * spin_lock_irqsave(host_set lock)
2390 static void ata_sg_clean(struct ata_queued_cmd *qc)
2392 struct ata_port *ap = qc->ap;
2393 struct scatterlist *sg = qc->__sg;
2394 int dir = qc->dma_dir;
2395 void *pad_buf = NULL;
2397 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2398 assert(sg != NULL);
2400 if (qc->flags & ATA_QCFLAG_SINGLE)
2401 assert(qc->n_elem == 1);
2403 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2405 /* if we padded the buffer out to 32-bit bound, and data
2406 * xfer direction is from-device, we must copy from the
2407 * pad buffer back into the supplied buffer
2409 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2410 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2412 if (qc->flags & ATA_QCFLAG_SG) {
2413 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2414 /* restore last sg */
2415 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2416 if (pad_buf) {
2417 struct scatterlist *psg = &qc->pad_sgent;
2418 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2419 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2420 kunmap_atomic(psg->page, KM_IRQ0);
2422 } else {
2423 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2424 sg_dma_len(&sg[0]), dir);
2425 /* restore sg */
2426 sg->length += qc->pad_len;
2427 if (pad_buf)
2428 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2429 pad_buf, qc->pad_len);
2432 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2433 qc->__sg = NULL;
2437 * ata_fill_sg - Fill PCI IDE PRD table
2438 * @qc: Metadata associated with taskfile to be transferred
2440 * Fill PCI IDE PRD (scatter-gather) table with segments
2441 * associated with the current disk command.
2443 * LOCKING:
2444 * spin_lock_irqsave(host_set lock)
2447 static void ata_fill_sg(struct ata_queued_cmd *qc)
2449 struct ata_port *ap = qc->ap;
2450 struct scatterlist *sg;
2451 unsigned int idx;
2453 assert(qc->__sg != NULL);
2454 assert(qc->n_elem > 0);
2456 idx = 0;
2457 ata_for_each_sg(sg, qc) {
2458 u32 addr, offset;
2459 u32 sg_len, len;
2461 /* determine if physical DMA addr spans 64K boundary.
2462 * Note h/w doesn't support 64-bit, so we unconditionally
2463 * truncate dma_addr_t to u32.
2465 addr = (u32) sg_dma_address(sg);
2466 sg_len = sg_dma_len(sg);
2468 while (sg_len) {
2469 offset = addr & 0xffff;
2470 len = sg_len;
2471 if ((offset + sg_len) > 0x10000)
2472 len = 0x10000 - offset;
2474 ap->prd[idx].addr = cpu_to_le32(addr);
2475 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2476 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2478 idx++;
2479 sg_len -= len;
2480 addr += len;
2484 if (idx)
2485 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2488 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2489 * @qc: Metadata associated with taskfile to check
2491 * Allow low-level driver to filter ATA PACKET commands, returning
2492 * a status indicating whether or not it is OK to use DMA for the
2493 * supplied PACKET command.
2495 * LOCKING:
2496 * spin_lock_irqsave(host_set lock)
2498 * RETURNS: 0 when ATAPI DMA can be used
2499 * nonzero otherwise
2501 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2503 struct ata_port *ap = qc->ap;
2504 int rc = 0; /* Assume ATAPI DMA is OK by default */
2506 if (ap->ops->check_atapi_dma)
2507 rc = ap->ops->check_atapi_dma(qc);
2509 return rc;
2512 * ata_qc_prep - Prepare taskfile for submission
2513 * @qc: Metadata associated with taskfile to be prepared
2515 * Prepare ATA taskfile for submission.
2517 * LOCKING:
2518 * spin_lock_irqsave(host_set lock)
2520 void ata_qc_prep(struct ata_queued_cmd *qc)
2522 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2523 return;
2525 ata_fill_sg(qc);
2529 * ata_sg_init_one - Associate command with memory buffer
2530 * @qc: Command to be associated
2531 * @buf: Memory buffer
2532 * @buflen: Length of memory buffer, in bytes.
2534 * Initialize the data-related elements of queued_cmd @qc
2535 * to point to a single memory buffer, @buf of byte length @buflen.
2537 * LOCKING:
2538 * spin_lock_irqsave(host_set lock)
2541 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2543 struct scatterlist *sg;
2545 qc->flags |= ATA_QCFLAG_SINGLE;
2547 memset(&qc->sgent, 0, sizeof(qc->sgent));
2548 qc->__sg = &qc->sgent;
2549 qc->n_elem = 1;
2550 qc->orig_n_elem = 1;
2551 qc->buf_virt = buf;
2553 sg = qc->__sg;
2554 sg_init_one(sg, buf, buflen);
2558 * ata_sg_init - Associate command with scatter-gather table.
2559 * @qc: Command to be associated
2560 * @sg: Scatter-gather table.
2561 * @n_elem: Number of elements in s/g table.
2563 * Initialize the data-related elements of queued_cmd @qc
2564 * to point to a scatter-gather table @sg, containing @n_elem
2565 * elements.
2567 * LOCKING:
2568 * spin_lock_irqsave(host_set lock)
2571 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2572 unsigned int n_elem)
2574 qc->flags |= ATA_QCFLAG_SG;
2575 qc->__sg = sg;
2576 qc->n_elem = n_elem;
2577 qc->orig_n_elem = n_elem;
2581 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2582 * @qc: Command with memory buffer to be mapped.
2584 * DMA-map the memory buffer associated with queued_cmd @qc.
2586 * LOCKING:
2587 * spin_lock_irqsave(host_set lock)
2589 * RETURNS:
2590 * Zero on success, negative on error.
2593 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2595 struct ata_port *ap = qc->ap;
2596 int dir = qc->dma_dir;
2597 struct scatterlist *sg = qc->__sg;
2598 dma_addr_t dma_address;
2600 /* we must lengthen transfers to end on a 32-bit boundary */
2601 qc->pad_len = sg->length & 3;
2602 if (qc->pad_len) {
2603 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2604 struct scatterlist *psg = &qc->pad_sgent;
2606 assert(qc->dev->class == ATA_DEV_ATAPI);
2608 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2610 if (qc->tf.flags & ATA_TFLAG_WRITE)
2611 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2612 qc->pad_len);
2614 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2615 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2616 /* trim sg */
2617 sg->length -= qc->pad_len;
2619 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2620 sg->length, qc->pad_len);
2623 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2624 sg->length, dir);
2625 if (dma_mapping_error(dma_address)) {
2626 /* restore sg */
2627 sg->length += qc->pad_len;
2628 return -1;
2631 sg_dma_address(sg) = dma_address;
2632 sg_dma_len(sg) = sg->length;
2634 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2635 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2637 return 0;
2641 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2642 * @qc: Command with scatter-gather table to be mapped.
2644 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2646 * LOCKING:
2647 * spin_lock_irqsave(host_set lock)
2649 * RETURNS:
2650 * Zero on success, negative on error.
2654 static int ata_sg_setup(struct ata_queued_cmd *qc)
2656 struct ata_port *ap = qc->ap;
2657 struct scatterlist *sg = qc->__sg;
2658 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2659 int n_elem, dir;
2661 VPRINTK("ENTER, ata%u\n", ap->id);
2662 assert(qc->flags & ATA_QCFLAG_SG);
2664 /* we must lengthen transfers to end on a 32-bit boundary */
2665 qc->pad_len = lsg->length & 3;
2666 if (qc->pad_len) {
2667 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2668 struct scatterlist *psg = &qc->pad_sgent;
2669 unsigned int offset;
2671 assert(qc->dev->class == ATA_DEV_ATAPI);
2673 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2676 * psg->page/offset are used to copy to-be-written
2677 * data in this function or read data in ata_sg_clean.
2679 offset = lsg->offset + lsg->length - qc->pad_len;
2680 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2681 psg->offset = offset_in_page(offset);
2683 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2684 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2685 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2686 kunmap_atomic(psg->page, KM_IRQ0);
2689 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2690 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2691 /* trim last sg */
2692 lsg->length -= qc->pad_len;
2694 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2695 qc->n_elem - 1, lsg->length, qc->pad_len);
2698 dir = qc->dma_dir;
2699 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2700 if (n_elem < 1) {
2701 /* restore last sg */
2702 lsg->length += qc->pad_len;
2703 return -1;
2706 DPRINTK("%d sg elements mapped\n", n_elem);
2708 qc->n_elem = n_elem;
2710 return 0;
2714 * ata_poll_qc_complete - turn irq back on and finish qc
2715 * @qc: Command to complete
2716 * @drv_stat: ATA status register content
2718 * LOCKING:
2719 * None. (grabs host lock)
2722 void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
2724 struct ata_port *ap = qc->ap;
2725 unsigned long flags;
2727 spin_lock_irqsave(&ap->host_set->lock, flags);
2728 ap->flags &= ~ATA_FLAG_NOINTR;
2729 ata_irq_on(ap);
2730 ata_qc_complete(qc, err_mask);
2731 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2735 * ata_pio_poll -
2736 * @ap: the target ata_port
2738 * LOCKING:
2739 * None. (executing in kernel thread context)
2741 * RETURNS:
2742 * timeout value to use
2745 static unsigned long ata_pio_poll(struct ata_port *ap)
2747 u8 status;
2748 unsigned int poll_state = HSM_ST_UNKNOWN;
2749 unsigned int reg_state = HSM_ST_UNKNOWN;
2750 const unsigned int tmout_state = HSM_ST_TMOUT;
2752 switch (ap->hsm_task_state) {
2753 case HSM_ST:
2754 case HSM_ST_POLL:
2755 poll_state = HSM_ST_POLL;
2756 reg_state = HSM_ST;
2757 break;
2758 case HSM_ST_LAST:
2759 case HSM_ST_LAST_POLL:
2760 poll_state = HSM_ST_LAST_POLL;
2761 reg_state = HSM_ST_LAST;
2762 break;
2763 default:
2764 BUG();
2765 break;
2768 status = ata_chk_status(ap);
2769 if (status & ATA_BUSY) {
2770 if (time_after(jiffies, ap->pio_task_timeout)) {
2771 ap->hsm_task_state = tmout_state;
2772 return 0;
2774 ap->hsm_task_state = poll_state;
2775 return ATA_SHORT_PAUSE;
2778 ap->hsm_task_state = reg_state;
2779 return 0;
2783 * ata_pio_complete - check if drive is busy or idle
2784 * @ap: the target ata_port
2786 * LOCKING:
2787 * None. (executing in kernel thread context)
2789 * RETURNS:
2790 * Non-zero if qc completed, zero otherwise.
2793 static int ata_pio_complete (struct ata_port *ap)
2795 struct ata_queued_cmd *qc;
2796 u8 drv_stat;
2799 * This is purely heuristic. This is a fast path. Sometimes when
2800 * we enter, BSY will be cleared in a chk-status or two. If not,
2801 * the drive is probably seeking or something. Snooze for a couple
2802 * msecs, then chk-status again. If still busy, fall back to
2803 * HSM_ST_POLL state.
2805 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2806 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2807 msleep(2);
2808 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2809 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2810 ap->hsm_task_state = HSM_ST_LAST_POLL;
2811 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2812 return 0;
2816 drv_stat = ata_wait_idle(ap);
2817 if (!ata_ok(drv_stat)) {
2818 ap->hsm_task_state = HSM_ST_ERR;
2819 return 0;
2822 qc = ata_qc_from_tag(ap, ap->active_tag);
2823 assert(qc != NULL);
2825 ap->hsm_task_state = HSM_ST_IDLE;
2827 ata_poll_qc_complete(qc, 0);
2829 /* another command may start at this point */
2831 return 1;
2836 * swap_buf_le16 - swap halves of 16-words in place
2837 * @buf: Buffer to swap
2838 * @buf_words: Number of 16-bit words in buffer.
2840 * Swap halves of 16-bit words if needed to convert from
2841 * little-endian byte order to native cpu byte order, or
2842 * vice-versa.
2844 * LOCKING:
2845 * Inherited from caller.
2847 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2849 #ifdef __BIG_ENDIAN
2850 unsigned int i;
2852 for (i = 0; i < buf_words; i++)
2853 buf[i] = le16_to_cpu(buf[i]);
2854 #endif /* __BIG_ENDIAN */
2858 * ata_mmio_data_xfer - Transfer data by MMIO
2859 * @ap: port to read/write
2860 * @buf: data buffer
2861 * @buflen: buffer length
2862 * @write_data: read/write
2864 * Transfer data from/to the device data register by MMIO.
2866 * LOCKING:
2867 * Inherited from caller.
2870 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2871 unsigned int buflen, int write_data)
2873 unsigned int i;
2874 unsigned int words = buflen >> 1;
2875 u16 *buf16 = (u16 *) buf;
2876 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2878 /* Transfer multiple of 2 bytes */
2879 if (write_data) {
2880 for (i = 0; i < words; i++)
2881 writew(le16_to_cpu(buf16[i]), mmio);
2882 } else {
2883 for (i = 0; i < words; i++)
2884 buf16[i] = cpu_to_le16(readw(mmio));
2887 /* Transfer trailing 1 byte, if any. */
2888 if (unlikely(buflen & 0x01)) {
2889 u16 align_buf[1] = { 0 };
2890 unsigned char *trailing_buf = buf + buflen - 1;
2892 if (write_data) {
2893 memcpy(align_buf, trailing_buf, 1);
2894 writew(le16_to_cpu(align_buf[0]), mmio);
2895 } else {
2896 align_buf[0] = cpu_to_le16(readw(mmio));
2897 memcpy(trailing_buf, align_buf, 1);
2903 * ata_pio_data_xfer - Transfer data by PIO
2904 * @ap: port to read/write
2905 * @buf: data buffer
2906 * @buflen: buffer length
2907 * @write_data: read/write
2909 * Transfer data from/to the device data register by PIO.
2911 * LOCKING:
2912 * Inherited from caller.
2915 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2916 unsigned int buflen, int write_data)
2918 unsigned int words = buflen >> 1;
2920 /* Transfer multiple of 2 bytes */
2921 if (write_data)
2922 outsw(ap->ioaddr.data_addr, buf, words);
2923 else
2924 insw(ap->ioaddr.data_addr, buf, words);
2926 /* Transfer trailing 1 byte, if any. */
2927 if (unlikely(buflen & 0x01)) {
2928 u16 align_buf[1] = { 0 };
2929 unsigned char *trailing_buf = buf + buflen - 1;
2931 if (write_data) {
2932 memcpy(align_buf, trailing_buf, 1);
2933 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2934 } else {
2935 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2936 memcpy(trailing_buf, align_buf, 1);
2942 * ata_data_xfer - Transfer data from/to the data register.
2943 * @ap: port to read/write
2944 * @buf: data buffer
2945 * @buflen: buffer length
2946 * @do_write: read/write
2948 * Transfer data from/to the device data register.
2950 * LOCKING:
2951 * Inherited from caller.
2954 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2955 unsigned int buflen, int do_write)
2957 if (ap->flags & ATA_FLAG_MMIO)
2958 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2959 else
2960 ata_pio_data_xfer(ap, buf, buflen, do_write);
2964 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2965 * @qc: Command on going
2967 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2969 * LOCKING:
2970 * Inherited from caller.
2973 static void ata_pio_sector(struct ata_queued_cmd *qc)
2975 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2976 struct scatterlist *sg = qc->__sg;
2977 struct ata_port *ap = qc->ap;
2978 struct page *page;
2979 unsigned int offset;
2980 unsigned char *buf;
2982 if (qc->cursect == (qc->nsect - 1))
2983 ap->hsm_task_state = HSM_ST_LAST;
2985 page = sg[qc->cursg].page;
2986 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2988 /* get the current page and offset */
2989 page = nth_page(page, (offset >> PAGE_SHIFT));
2990 offset %= PAGE_SIZE;
2992 buf = kmap(page) + offset;
2994 qc->cursect++;
2995 qc->cursg_ofs++;
2997 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
2998 qc->cursg++;
2999 qc->cursg_ofs = 0;
3002 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3004 /* do the actual data transfer */
3005 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3006 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3008 kunmap(page);
3012 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3013 * @qc: Command on going
3014 * @bytes: number of bytes
3016 * Transfer Transfer data from/to the ATAPI device.
3018 * LOCKING:
3019 * Inherited from caller.
3023 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3025 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3026 struct scatterlist *sg = qc->__sg;
3027 struct ata_port *ap = qc->ap;
3028 struct page *page;
3029 unsigned char *buf;
3030 unsigned int offset, count;
3032 if (qc->curbytes + bytes >= qc->nbytes)
3033 ap->hsm_task_state = HSM_ST_LAST;
3035 next_sg:
3036 if (unlikely(qc->cursg >= qc->n_elem)) {
3038 * The end of qc->sg is reached and the device expects
3039 * more data to transfer. In order not to overrun qc->sg
3040 * and fulfill length specified in the byte count register,
3041 * - for read case, discard trailing data from the device
3042 * - for write case, padding zero data to the device
3044 u16 pad_buf[1] = { 0 };
3045 unsigned int words = bytes >> 1;
3046 unsigned int i;
3048 if (words) /* warning if bytes > 1 */
3049 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3050 ap->id, bytes);
3052 for (i = 0; i < words; i++)
3053 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3055 ap->hsm_task_state = HSM_ST_LAST;
3056 return;
3059 sg = &qc->__sg[qc->cursg];
3061 page = sg->page;
3062 offset = sg->offset + qc->cursg_ofs;
3064 /* get the current page and offset */
3065 page = nth_page(page, (offset >> PAGE_SHIFT));
3066 offset %= PAGE_SIZE;
3068 /* don't overrun current sg */
3069 count = min(sg->length - qc->cursg_ofs, bytes);
3071 /* don't cross page boundaries */
3072 count = min(count, (unsigned int)PAGE_SIZE - offset);
3074 buf = kmap(page) + offset;
3076 bytes -= count;
3077 qc->curbytes += count;
3078 qc->cursg_ofs += count;
3080 if (qc->cursg_ofs == sg->length) {
3081 qc->cursg++;
3082 qc->cursg_ofs = 0;
3085 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3087 /* do the actual data transfer */
3088 ata_data_xfer(ap, buf, count, do_write);
3090 kunmap(page);
3092 if (bytes)
3093 goto next_sg;
3097 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3098 * @qc: Command on going
3100 * Transfer Transfer data from/to the ATAPI device.
3102 * LOCKING:
3103 * Inherited from caller.
3106 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3108 struct ata_port *ap = qc->ap;
3109 struct ata_device *dev = qc->dev;
3110 unsigned int ireason, bc_lo, bc_hi, bytes;
3111 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3113 ap->ops->tf_read(ap, &qc->tf);
3114 ireason = qc->tf.nsect;
3115 bc_lo = qc->tf.lbam;
3116 bc_hi = qc->tf.lbah;
3117 bytes = (bc_hi << 8) | bc_lo;
3119 /* shall be cleared to zero, indicating xfer of data */
3120 if (ireason & (1 << 0))
3121 goto err_out;
3123 /* make sure transfer direction matches expected */
3124 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3125 if (do_write != i_write)
3126 goto err_out;
3128 __atapi_pio_bytes(qc, bytes);
3130 return;
3132 err_out:
3133 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3134 ap->id, dev->devno);
3135 ap->hsm_task_state = HSM_ST_ERR;
3139 * ata_pio_block - start PIO on a block
3140 * @ap: the target ata_port
3142 * LOCKING:
3143 * None. (executing in kernel thread context)
3146 static void ata_pio_block(struct ata_port *ap)
3148 struct ata_queued_cmd *qc;
3149 u8 status;
3152 * This is purely heuristic. This is a fast path.
3153 * Sometimes when we enter, BSY will be cleared in
3154 * a chk-status or two. If not, the drive is probably seeking
3155 * or something. Snooze for a couple msecs, then
3156 * chk-status again. If still busy, fall back to
3157 * HSM_ST_POLL state.
3159 status = ata_busy_wait(ap, ATA_BUSY, 5);
3160 if (status & ATA_BUSY) {
3161 msleep(2);
3162 status = ata_busy_wait(ap, ATA_BUSY, 10);
3163 if (status & ATA_BUSY) {
3164 ap->hsm_task_state = HSM_ST_POLL;
3165 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3166 return;
3170 qc = ata_qc_from_tag(ap, ap->active_tag);
3171 assert(qc != NULL);
3173 if (is_atapi_taskfile(&qc->tf)) {
3174 /* no more data to transfer or unsupported ATAPI command */
3175 if ((status & ATA_DRQ) == 0) {
3176 ap->hsm_task_state = HSM_ST_LAST;
3177 return;
3180 atapi_pio_bytes(qc);
3181 } else {
3182 /* handle BSY=0, DRQ=0 as error */
3183 if ((status & ATA_DRQ) == 0) {
3184 ap->hsm_task_state = HSM_ST_ERR;
3185 return;
3188 ata_pio_sector(qc);
3192 static void ata_pio_error(struct ata_port *ap)
3194 struct ata_queued_cmd *qc;
3196 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3198 qc = ata_qc_from_tag(ap, ap->active_tag);
3199 assert(qc != NULL);
3201 ap->hsm_task_state = HSM_ST_IDLE;
3203 ata_poll_qc_complete(qc, AC_ERR_ATA_BUS);
3206 static void ata_pio_task(void *_data)
3208 struct ata_port *ap = _data;
3209 unsigned long timeout;
3210 int qc_completed;
3212 fsm_start:
3213 timeout = 0;
3214 qc_completed = 0;
3216 switch (ap->hsm_task_state) {
3217 case HSM_ST_IDLE:
3218 return;
3220 case HSM_ST:
3221 ata_pio_block(ap);
3222 break;
3224 case HSM_ST_LAST:
3225 qc_completed = ata_pio_complete(ap);
3226 break;
3228 case HSM_ST_POLL:
3229 case HSM_ST_LAST_POLL:
3230 timeout = ata_pio_poll(ap);
3231 break;
3233 case HSM_ST_TMOUT:
3234 case HSM_ST_ERR:
3235 ata_pio_error(ap);
3236 return;
3239 if (timeout)
3240 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3241 else if (!qc_completed)
3242 goto fsm_start;
3246 * ata_qc_timeout - Handle timeout of queued command
3247 * @qc: Command that timed out
3249 * Some part of the kernel (currently, only the SCSI layer)
3250 * has noticed that the active command on port @ap has not
3251 * completed after a specified length of time. Handle this
3252 * condition by disabling DMA (if necessary) and completing
3253 * transactions, with error if necessary.
3255 * This also handles the case of the "lost interrupt", where
3256 * for some reason (possibly hardware bug, possibly driver bug)
3257 * an interrupt was not delivered to the driver, even though the
3258 * transaction completed successfully.
3260 * LOCKING:
3261 * Inherited from SCSI layer (none, can sleep)
3264 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3266 struct ata_port *ap = qc->ap;
3267 struct ata_host_set *host_set = ap->host_set;
3268 struct ata_device *dev = qc->dev;
3269 u8 host_stat = 0, drv_stat;
3270 unsigned long flags;
3272 DPRINTK("ENTER\n");
3274 /* FIXME: doesn't this conflict with timeout handling? */
3275 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3276 struct scsi_cmnd *cmd = qc->scsicmd;
3278 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3280 /* finish completing original command */
3281 spin_lock_irqsave(&host_set->lock, flags);
3282 __ata_qc_complete(qc);
3283 spin_unlock_irqrestore(&host_set->lock, flags);
3285 atapi_request_sense(ap, dev, cmd);
3287 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3288 scsi_finish_command(cmd);
3290 goto out;
3294 spin_lock_irqsave(&host_set->lock, flags);
3296 /* hack alert! We cannot use the supplied completion
3297 * function from inside the ->eh_strategy_handler() thread.
3298 * libata is the only user of ->eh_strategy_handler() in
3299 * any kernel, so the default scsi_done() assumes it is
3300 * not being called from the SCSI EH.
3302 qc->scsidone = scsi_finish_command;
3304 switch (qc->tf.protocol) {
3306 case ATA_PROT_DMA:
3307 case ATA_PROT_ATAPI_DMA:
3308 host_stat = ap->ops->bmdma_status(ap);
3310 /* before we do anything else, clear DMA-Start bit */
3311 ap->ops->bmdma_stop(qc);
3313 /* fall through */
3315 default:
3316 ata_altstatus(ap);
3317 drv_stat = ata_chk_status(ap);
3319 /* ack bmdma irq events */
3320 ap->ops->irq_clear(ap);
3322 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3323 ap->id, qc->tf.command, drv_stat, host_stat);
3325 /* complete taskfile transaction */
3326 ata_qc_complete(qc, ac_err_mask(drv_stat));
3327 break;
3330 spin_unlock_irqrestore(&host_set->lock, flags);
3332 out:
3333 DPRINTK("EXIT\n");
3337 * ata_eng_timeout - Handle timeout of queued command
3338 * @ap: Port on which timed-out command is active
3340 * Some part of the kernel (currently, only the SCSI layer)
3341 * has noticed that the active command on port @ap has not
3342 * completed after a specified length of time. Handle this
3343 * condition by disabling DMA (if necessary) and completing
3344 * transactions, with error if necessary.
3346 * This also handles the case of the "lost interrupt", where
3347 * for some reason (possibly hardware bug, possibly driver bug)
3348 * an interrupt was not delivered to the driver, even though the
3349 * transaction completed successfully.
3351 * LOCKING:
3352 * Inherited from SCSI layer (none, can sleep)
3355 void ata_eng_timeout(struct ata_port *ap)
3357 struct ata_queued_cmd *qc;
3359 DPRINTK("ENTER\n");
3361 qc = ata_qc_from_tag(ap, ap->active_tag);
3362 if (qc)
3363 ata_qc_timeout(qc);
3364 else {
3365 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3366 ap->id);
3367 goto out;
3370 out:
3371 DPRINTK("EXIT\n");
3375 * ata_qc_new - Request an available ATA command, for queueing
3376 * @ap: Port associated with device @dev
3377 * @dev: Device from whom we request an available command structure
3379 * LOCKING:
3380 * None.
3383 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3385 struct ata_queued_cmd *qc = NULL;
3386 unsigned int i;
3388 for (i = 0; i < ATA_MAX_QUEUE; i++)
3389 if (!test_and_set_bit(i, &ap->qactive)) {
3390 qc = ata_qc_from_tag(ap, i);
3391 break;
3394 if (qc)
3395 qc->tag = i;
3397 return qc;
3401 * ata_qc_new_init - Request an available ATA command, and initialize it
3402 * @ap: Port associated with device @dev
3403 * @dev: Device from whom we request an available command structure
3405 * LOCKING:
3406 * None.
3409 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3410 struct ata_device *dev)
3412 struct ata_queued_cmd *qc;
3414 qc = ata_qc_new(ap);
3415 if (qc) {
3416 qc->__sg = NULL;
3417 qc->flags = 0;
3418 qc->scsicmd = NULL;
3419 qc->ap = ap;
3420 qc->dev = dev;
3421 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3422 qc->nsect = 0;
3423 qc->nbytes = qc->curbytes = 0;
3425 ata_tf_init(ap, &qc->tf, dev->devno);
3428 return qc;
3431 int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask)
3433 return 0;
3436 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3438 struct ata_port *ap = qc->ap;
3439 unsigned int tag, do_clear = 0;
3441 qc->flags = 0;
3442 tag = qc->tag;
3443 if (likely(ata_tag_valid(tag))) {
3444 if (tag == ap->active_tag)
3445 ap->active_tag = ATA_TAG_POISON;
3446 qc->tag = ATA_TAG_POISON;
3447 do_clear = 1;
3450 if (qc->waiting) {
3451 struct completion *waiting = qc->waiting;
3452 qc->waiting = NULL;
3453 complete(waiting);
3456 if (likely(do_clear))
3457 clear_bit(tag, &ap->qactive);
3461 * ata_qc_free - free unused ata_queued_cmd
3462 * @qc: Command to complete
3464 * Designed to free unused ata_queued_cmd object
3465 * in case something prevents using it.
3467 * LOCKING:
3468 * spin_lock_irqsave(host_set lock)
3470 void ata_qc_free(struct ata_queued_cmd *qc)
3472 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3473 assert(qc->waiting == NULL); /* nothing should be waiting */
3475 __ata_qc_complete(qc);
3479 * ata_qc_complete - Complete an active ATA command
3480 * @qc: Command to complete
3481 * @drv_stat: ATA Status register contents
3483 * Indicate to the mid and upper layers that an ATA
3484 * command has completed, with either an ok or not-ok status.
3486 * LOCKING:
3487 * spin_lock_irqsave(host_set lock)
3490 void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
3492 int rc;
3494 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3495 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3497 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3498 ata_sg_clean(qc);
3500 /* atapi: mark qc as inactive to prevent the interrupt handler
3501 * from completing the command twice later, before the error handler
3502 * is called. (when rc != 0 and atapi request sense is needed)
3504 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3506 /* call completion callback */
3507 rc = qc->complete_fn(qc, err_mask);
3509 /* if callback indicates not to complete command (non-zero),
3510 * return immediately
3512 if (rc != 0)
3513 return;
3515 __ata_qc_complete(qc);
3517 VPRINTK("EXIT\n");
3520 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3522 struct ata_port *ap = qc->ap;
3524 switch (qc->tf.protocol) {
3525 case ATA_PROT_DMA:
3526 case ATA_PROT_ATAPI_DMA:
3527 return 1;
3529 case ATA_PROT_ATAPI:
3530 case ATA_PROT_PIO:
3531 case ATA_PROT_PIO_MULT:
3532 if (ap->flags & ATA_FLAG_PIO_DMA)
3533 return 1;
3535 /* fall through */
3537 default:
3538 return 0;
3541 /* never reached */
3545 * ata_qc_issue - issue taskfile to device
3546 * @qc: command to issue to device
3548 * Prepare an ATA command to submission to device.
3549 * This includes mapping the data into a DMA-able
3550 * area, filling in the S/G table, and finally
3551 * writing the taskfile to hardware, starting the command.
3553 * LOCKING:
3554 * spin_lock_irqsave(host_set lock)
3556 * RETURNS:
3557 * Zero on success, negative on error.
3560 int ata_qc_issue(struct ata_queued_cmd *qc)
3562 struct ata_port *ap = qc->ap;
3564 if (ata_should_dma_map(qc)) {
3565 if (qc->flags & ATA_QCFLAG_SG) {
3566 if (ata_sg_setup(qc))
3567 goto err_out;
3568 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3569 if (ata_sg_setup_one(qc))
3570 goto err_out;
3572 } else {
3573 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3576 ap->ops->qc_prep(qc);
3578 qc->ap->active_tag = qc->tag;
3579 qc->flags |= ATA_QCFLAG_ACTIVE;
3581 return ap->ops->qc_issue(qc);
3583 err_out:
3584 return -1;
3589 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3590 * @qc: command to issue to device
3592 * Using various libata functions and hooks, this function
3593 * starts an ATA command. ATA commands are grouped into
3594 * classes called "protocols", and issuing each type of protocol
3595 * is slightly different.
3597 * May be used as the qc_issue() entry in ata_port_operations.
3599 * LOCKING:
3600 * spin_lock_irqsave(host_set lock)
3602 * RETURNS:
3603 * Zero on success, negative on error.
3606 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3608 struct ata_port *ap = qc->ap;
3610 ata_dev_select(ap, qc->dev->devno, 1, 0);
3612 switch (qc->tf.protocol) {
3613 case ATA_PROT_NODATA:
3614 ata_tf_to_host(ap, &qc->tf);
3615 break;
3617 case ATA_PROT_DMA:
3618 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3619 ap->ops->bmdma_setup(qc); /* set up bmdma */
3620 ap->ops->bmdma_start(qc); /* initiate bmdma */
3621 break;
3623 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3624 ata_qc_set_polling(qc);
3625 ata_tf_to_host(ap, &qc->tf);
3626 ap->hsm_task_state = HSM_ST;
3627 queue_work(ata_wq, &ap->pio_task);
3628 break;
3630 case ATA_PROT_ATAPI:
3631 ata_qc_set_polling(qc);
3632 ata_tf_to_host(ap, &qc->tf);
3633 queue_work(ata_wq, &ap->packet_task);
3634 break;
3636 case ATA_PROT_ATAPI_NODATA:
3637 ap->flags |= ATA_FLAG_NOINTR;
3638 ata_tf_to_host(ap, &qc->tf);
3639 queue_work(ata_wq, &ap->packet_task);
3640 break;
3642 case ATA_PROT_ATAPI_DMA:
3643 ap->flags |= ATA_FLAG_NOINTR;
3644 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3645 ap->ops->bmdma_setup(qc); /* set up bmdma */
3646 queue_work(ata_wq, &ap->packet_task);
3647 break;
3649 default:
3650 WARN_ON(1);
3651 return -1;
3654 return 0;
3658 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3659 * @qc: Info associated with this ATA transaction.
3661 * LOCKING:
3662 * spin_lock_irqsave(host_set lock)
3665 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3667 struct ata_port *ap = qc->ap;
3668 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3669 u8 dmactl;
3670 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3672 /* load PRD table addr. */
3673 mb(); /* make sure PRD table writes are visible to controller */
3674 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3676 /* specify data direction, triple-check start bit is clear */
3677 dmactl = readb(mmio + ATA_DMA_CMD);
3678 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3679 if (!rw)
3680 dmactl |= ATA_DMA_WR;
3681 writeb(dmactl, mmio + ATA_DMA_CMD);
3683 /* issue r/w command */
3684 ap->ops->exec_command(ap, &qc->tf);
3688 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3689 * @qc: Info associated with this ATA transaction.
3691 * LOCKING:
3692 * spin_lock_irqsave(host_set lock)
3695 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3697 struct ata_port *ap = qc->ap;
3698 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3699 u8 dmactl;
3701 /* start host DMA transaction */
3702 dmactl = readb(mmio + ATA_DMA_CMD);
3703 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3705 /* Strictly, one may wish to issue a readb() here, to
3706 * flush the mmio write. However, control also passes
3707 * to the hardware at this point, and it will interrupt
3708 * us when we are to resume control. So, in effect,
3709 * we don't care when the mmio write flushes.
3710 * Further, a read of the DMA status register _immediately_
3711 * following the write may not be what certain flaky hardware
3712 * is expected, so I think it is best to not add a readb()
3713 * without first all the MMIO ATA cards/mobos.
3714 * Or maybe I'm just being paranoid.
3719 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3720 * @qc: Info associated with this ATA transaction.
3722 * LOCKING:
3723 * spin_lock_irqsave(host_set lock)
3726 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3728 struct ata_port *ap = qc->ap;
3729 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3730 u8 dmactl;
3732 /* load PRD table addr. */
3733 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3735 /* specify data direction, triple-check start bit is clear */
3736 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3737 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3738 if (!rw)
3739 dmactl |= ATA_DMA_WR;
3740 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3742 /* issue r/w command */
3743 ap->ops->exec_command(ap, &qc->tf);
3747 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3748 * @qc: Info associated with this ATA transaction.
3750 * LOCKING:
3751 * spin_lock_irqsave(host_set lock)
3754 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3756 struct ata_port *ap = qc->ap;
3757 u8 dmactl;
3759 /* start host DMA transaction */
3760 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3761 outb(dmactl | ATA_DMA_START,
3762 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3767 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3768 * @qc: Info associated with this ATA transaction.
3770 * Writes the ATA_DMA_START flag to the DMA command register.
3772 * May be used as the bmdma_start() entry in ata_port_operations.
3774 * LOCKING:
3775 * spin_lock_irqsave(host_set lock)
3777 void ata_bmdma_start(struct ata_queued_cmd *qc)
3779 if (qc->ap->flags & ATA_FLAG_MMIO)
3780 ata_bmdma_start_mmio(qc);
3781 else
3782 ata_bmdma_start_pio(qc);
3787 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3788 * @qc: Info associated with this ATA transaction.
3790 * Writes address of PRD table to device's PRD Table Address
3791 * register, sets the DMA control register, and calls
3792 * ops->exec_command() to start the transfer.
3794 * May be used as the bmdma_setup() entry in ata_port_operations.
3796 * LOCKING:
3797 * spin_lock_irqsave(host_set lock)
3799 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3801 if (qc->ap->flags & ATA_FLAG_MMIO)
3802 ata_bmdma_setup_mmio(qc);
3803 else
3804 ata_bmdma_setup_pio(qc);
3809 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3810 * @ap: Port associated with this ATA transaction.
3812 * Clear interrupt and error flags in DMA status register.
3814 * May be used as the irq_clear() entry in ata_port_operations.
3816 * LOCKING:
3817 * spin_lock_irqsave(host_set lock)
3820 void ata_bmdma_irq_clear(struct ata_port *ap)
3822 if (ap->flags & ATA_FLAG_MMIO) {
3823 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3824 writeb(readb(mmio), mmio);
3825 } else {
3826 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3827 outb(inb(addr), addr);
3834 * ata_bmdma_status - Read PCI IDE BMDMA status
3835 * @ap: Port associated with this ATA transaction.
3837 * Read and return BMDMA status register.
3839 * May be used as the bmdma_status() entry in ata_port_operations.
3841 * LOCKING:
3842 * spin_lock_irqsave(host_set lock)
3845 u8 ata_bmdma_status(struct ata_port *ap)
3847 u8 host_stat;
3848 if (ap->flags & ATA_FLAG_MMIO) {
3849 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3850 host_stat = readb(mmio + ATA_DMA_STATUS);
3851 } else
3852 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3853 return host_stat;
3858 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3859 * @qc: Command we are ending DMA for
3861 * Clears the ATA_DMA_START flag in the dma control register
3863 * May be used as the bmdma_stop() entry in ata_port_operations.
3865 * LOCKING:
3866 * spin_lock_irqsave(host_set lock)
3869 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3871 struct ata_port *ap = qc->ap;
3872 if (ap->flags & ATA_FLAG_MMIO) {
3873 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3875 /* clear start/stop bit */
3876 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3877 mmio + ATA_DMA_CMD);
3878 } else {
3879 /* clear start/stop bit */
3880 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3881 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3884 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3885 ata_altstatus(ap); /* dummy read */
3889 * ata_host_intr - Handle host interrupt for given (port, task)
3890 * @ap: Port on which interrupt arrived (possibly...)
3891 * @qc: Taskfile currently active in engine
3893 * Handle host interrupt for given queued command. Currently,
3894 * only DMA interrupts are handled. All other commands are
3895 * handled via polling with interrupts disabled (nIEN bit).
3897 * LOCKING:
3898 * spin_lock_irqsave(host_set lock)
3900 * RETURNS:
3901 * One if interrupt was handled, zero if not (shared irq).
3904 inline unsigned int ata_host_intr (struct ata_port *ap,
3905 struct ata_queued_cmd *qc)
3907 u8 status, host_stat;
3909 switch (qc->tf.protocol) {
3911 case ATA_PROT_DMA:
3912 case ATA_PROT_ATAPI_DMA:
3913 case ATA_PROT_ATAPI:
3914 /* check status of DMA engine */
3915 host_stat = ap->ops->bmdma_status(ap);
3916 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3918 /* if it's not our irq... */
3919 if (!(host_stat & ATA_DMA_INTR))
3920 goto idle_irq;
3922 /* before we do anything else, clear DMA-Start bit */
3923 ap->ops->bmdma_stop(qc);
3925 /* fall through */
3927 case ATA_PROT_ATAPI_NODATA:
3928 case ATA_PROT_NODATA:
3929 /* check altstatus */
3930 status = ata_altstatus(ap);
3931 if (status & ATA_BUSY)
3932 goto idle_irq;
3934 /* check main status, clearing INTRQ */
3935 status = ata_chk_status(ap);
3936 if (unlikely(status & ATA_BUSY))
3937 goto idle_irq;
3938 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3939 ap->id, qc->tf.protocol, status);
3941 /* ack bmdma irq events */
3942 ap->ops->irq_clear(ap);
3944 /* complete taskfile transaction */
3945 ata_qc_complete(qc, ac_err_mask(status));
3946 break;
3948 default:
3949 goto idle_irq;
3952 return 1; /* irq handled */
3954 idle_irq:
3955 ap->stats.idle_irq++;
3957 #ifdef ATA_IRQ_TRAP
3958 if ((ap->stats.idle_irq % 1000) == 0) {
3959 handled = 1;
3960 ata_irq_ack(ap, 0); /* debug trap */
3961 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3963 #endif
3964 return 0; /* irq not handled */
3968 * ata_interrupt - Default ATA host interrupt handler
3969 * @irq: irq line (unused)
3970 * @dev_instance: pointer to our ata_host_set information structure
3971 * @regs: unused
3973 * Default interrupt handler for PCI IDE devices. Calls
3974 * ata_host_intr() for each port that is not disabled.
3976 * LOCKING:
3977 * Obtains host_set lock during operation.
3979 * RETURNS:
3980 * IRQ_NONE or IRQ_HANDLED.
3983 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3985 struct ata_host_set *host_set = dev_instance;
3986 unsigned int i;
3987 unsigned int handled = 0;
3988 unsigned long flags;
3990 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3991 spin_lock_irqsave(&host_set->lock, flags);
3993 for (i = 0; i < host_set->n_ports; i++) {
3994 struct ata_port *ap;
3996 ap = host_set->ports[i];
3997 if (ap &&
3998 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
3999 struct ata_queued_cmd *qc;
4001 qc = ata_qc_from_tag(ap, ap->active_tag);
4002 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4003 (qc->flags & ATA_QCFLAG_ACTIVE))
4004 handled |= ata_host_intr(ap, qc);
4008 spin_unlock_irqrestore(&host_set->lock, flags);
4010 return IRQ_RETVAL(handled);
4014 * atapi_packet_task - Write CDB bytes to hardware
4015 * @_data: Port to which ATAPI device is attached.
4017 * When device has indicated its readiness to accept
4018 * a CDB, this function is called. Send the CDB.
4019 * If DMA is to be performed, exit immediately.
4020 * Otherwise, we are in polling mode, so poll
4021 * status under operation succeeds or fails.
4023 * LOCKING:
4024 * Kernel thread context (may sleep)
4027 static void atapi_packet_task(void *_data)
4029 struct ata_port *ap = _data;
4030 struct ata_queued_cmd *qc;
4031 u8 status;
4033 qc = ata_qc_from_tag(ap, ap->active_tag);
4034 assert(qc != NULL);
4035 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4037 /* sleep-wait for BSY to clear */
4038 DPRINTK("busy wait\n");
4039 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4040 goto err_out_status;
4042 /* make sure DRQ is set */
4043 status = ata_chk_status(ap);
4044 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4045 goto err_out;
4047 /* send SCSI cdb */
4048 DPRINTK("send cdb\n");
4049 assert(ap->cdb_len >= 12);
4051 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4052 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4053 unsigned long flags;
4055 /* Once we're done issuing command and kicking bmdma,
4056 * irq handler takes over. To not lose irq, we need
4057 * to clear NOINTR flag before sending cdb, but
4058 * interrupt handler shouldn't be invoked before we're
4059 * finished. Hence, the following locking.
4061 spin_lock_irqsave(&ap->host_set->lock, flags);
4062 ap->flags &= ~ATA_FLAG_NOINTR;
4063 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4064 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4065 ap->ops->bmdma_start(qc); /* initiate bmdma */
4066 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4067 } else {
4068 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4070 /* PIO commands are handled by polling */
4071 ap->hsm_task_state = HSM_ST;
4072 queue_work(ata_wq, &ap->pio_task);
4075 return;
4077 err_out_status:
4078 status = ata_chk_status(ap);
4079 err_out:
4080 ata_poll_qc_complete(qc, __ac_err_mask(status));
4085 * ata_port_start - Set port up for dma.
4086 * @ap: Port to initialize
4088 * Called just after data structures for each port are
4089 * initialized. Allocates space for PRD table.
4091 * May be used as the port_start() entry in ata_port_operations.
4093 * LOCKING:
4094 * Inherited from caller.
4097 int ata_port_start (struct ata_port *ap)
4099 struct device *dev = ap->host_set->dev;
4100 int rc;
4102 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4103 if (!ap->prd)
4104 return -ENOMEM;
4106 rc = ata_pad_alloc(ap, dev);
4107 if (rc) {
4108 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4109 return rc;
4112 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4114 return 0;
4119 * ata_port_stop - Undo ata_port_start()
4120 * @ap: Port to shut down
4122 * Frees the PRD table.
4124 * May be used as the port_stop() entry in ata_port_operations.
4126 * LOCKING:
4127 * Inherited from caller.
4130 void ata_port_stop (struct ata_port *ap)
4132 struct device *dev = ap->host_set->dev;
4134 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4135 ata_pad_free(ap, dev);
4138 void ata_host_stop (struct ata_host_set *host_set)
4140 if (host_set->mmio_base)
4141 iounmap(host_set->mmio_base);
4146 * ata_host_remove - Unregister SCSI host structure with upper layers
4147 * @ap: Port to unregister
4148 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4150 * LOCKING:
4151 * Inherited from caller.
4154 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4156 struct Scsi_Host *sh = ap->host;
4158 DPRINTK("ENTER\n");
4160 if (do_unregister)
4161 scsi_remove_host(sh);
4163 ap->ops->port_stop(ap);
4167 * ata_host_init - Initialize an ata_port structure
4168 * @ap: Structure to initialize
4169 * @host: associated SCSI mid-layer structure
4170 * @host_set: Collection of hosts to which @ap belongs
4171 * @ent: Probe information provided by low-level driver
4172 * @port_no: Port number associated with this ata_port
4174 * Initialize a new ata_port structure, and its associated
4175 * scsi_host.
4177 * LOCKING:
4178 * Inherited from caller.
4181 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4182 struct ata_host_set *host_set,
4183 const struct ata_probe_ent *ent, unsigned int port_no)
4185 unsigned int i;
4187 host->max_id = 16;
4188 host->max_lun = 1;
4189 host->max_channel = 1;
4190 host->unique_id = ata_unique_id++;
4191 host->max_cmd_len = 12;
4193 ap->flags = ATA_FLAG_PORT_DISABLED;
4194 ap->id = host->unique_id;
4195 ap->host = host;
4196 ap->ctl = ATA_DEVCTL_OBS;
4197 ap->host_set = host_set;
4198 ap->port_no = port_no;
4199 ap->hard_port_no =
4200 ent->legacy_mode ? ent->hard_port_no : port_no;
4201 ap->pio_mask = ent->pio_mask;
4202 ap->mwdma_mask = ent->mwdma_mask;
4203 ap->udma_mask = ent->udma_mask;
4204 ap->flags |= ent->host_flags;
4205 ap->ops = ent->port_ops;
4206 ap->cbl = ATA_CBL_NONE;
4207 ap->active_tag = ATA_TAG_POISON;
4208 ap->last_ctl = 0xFF;
4210 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4211 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4213 for (i = 0; i < ATA_MAX_DEVICES; i++)
4214 ap->device[i].devno = i;
4216 #ifdef ATA_IRQ_TRAP
4217 ap->stats.unhandled_irq = 1;
4218 ap->stats.idle_irq = 1;
4219 #endif
4221 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4225 * ata_host_add - Attach low-level ATA driver to system
4226 * @ent: Information provided by low-level driver
4227 * @host_set: Collections of ports to which we add
4228 * @port_no: Port number associated with this host
4230 * Attach low-level ATA driver to system.
4232 * LOCKING:
4233 * PCI/etc. bus probe sem.
4235 * RETURNS:
4236 * New ata_port on success, for NULL on error.
4239 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4240 struct ata_host_set *host_set,
4241 unsigned int port_no)
4243 struct Scsi_Host *host;
4244 struct ata_port *ap;
4245 int rc;
4247 DPRINTK("ENTER\n");
4248 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4249 if (!host)
4250 return NULL;
4252 ap = (struct ata_port *) &host->hostdata[0];
4254 ata_host_init(ap, host, host_set, ent, port_no);
4256 rc = ap->ops->port_start(ap);
4257 if (rc)
4258 goto err_out;
4260 return ap;
4262 err_out:
4263 scsi_host_put(host);
4264 return NULL;
4268 * ata_device_add - Register hardware device with ATA and SCSI layers
4269 * @ent: Probe information describing hardware device to be registered
4271 * This function processes the information provided in the probe
4272 * information struct @ent, allocates the necessary ATA and SCSI
4273 * host information structures, initializes them, and registers
4274 * everything with requisite kernel subsystems.
4276 * This function requests irqs, probes the ATA bus, and probes
4277 * the SCSI bus.
4279 * LOCKING:
4280 * PCI/etc. bus probe sem.
4282 * RETURNS:
4283 * Number of ports registered. Zero on error (no ports registered).
4286 int ata_device_add(const struct ata_probe_ent *ent)
4288 unsigned int count = 0, i;
4289 struct device *dev = ent->dev;
4290 struct ata_host_set *host_set;
4292 DPRINTK("ENTER\n");
4293 /* alloc a container for our list of ATA ports (buses) */
4294 host_set = kzalloc(sizeof(struct ata_host_set) +
4295 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4296 if (!host_set)
4297 return 0;
4298 spin_lock_init(&host_set->lock);
4300 host_set->dev = dev;
4301 host_set->n_ports = ent->n_ports;
4302 host_set->irq = ent->irq;
4303 host_set->mmio_base = ent->mmio_base;
4304 host_set->private_data = ent->private_data;
4305 host_set->ops = ent->port_ops;
4307 /* register each port bound to this device */
4308 for (i = 0; i < ent->n_ports; i++) {
4309 struct ata_port *ap;
4310 unsigned long xfer_mode_mask;
4312 ap = ata_host_add(ent, host_set, i);
4313 if (!ap)
4314 goto err_out;
4316 host_set->ports[i] = ap;
4317 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4318 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4319 (ap->pio_mask << ATA_SHIFT_PIO);
4321 /* print per-port info to dmesg */
4322 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4323 "bmdma 0x%lX irq %lu\n",
4324 ap->id,
4325 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4326 ata_mode_string(xfer_mode_mask),
4327 ap->ioaddr.cmd_addr,
4328 ap->ioaddr.ctl_addr,
4329 ap->ioaddr.bmdma_addr,
4330 ent->irq);
4332 ata_chk_status(ap);
4333 host_set->ops->irq_clear(ap);
4334 count++;
4337 if (!count)
4338 goto err_free_ret;
4340 /* obtain irq, that is shared between channels */
4341 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4342 DRV_NAME, host_set))
4343 goto err_out;
4345 /* perform each probe synchronously */
4346 DPRINTK("probe begin\n");
4347 for (i = 0; i < count; i++) {
4348 struct ata_port *ap;
4349 int rc;
4351 ap = host_set->ports[i];
4353 DPRINTK("ata%u: probe begin\n", ap->id);
4354 rc = ata_bus_probe(ap);
4355 DPRINTK("ata%u: probe end\n", ap->id);
4357 if (rc) {
4358 /* FIXME: do something useful here?
4359 * Current libata behavior will
4360 * tear down everything when
4361 * the module is removed
4362 * or the h/w is unplugged.
4366 rc = scsi_add_host(ap->host, dev);
4367 if (rc) {
4368 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4369 ap->id);
4370 /* FIXME: do something useful here */
4371 /* FIXME: handle unconditional calls to
4372 * scsi_scan_host and ata_host_remove, below,
4373 * at the very least
4378 /* probes are done, now scan each port's disk(s) */
4379 DPRINTK("probe begin\n");
4380 for (i = 0; i < count; i++) {
4381 struct ata_port *ap = host_set->ports[i];
4383 ata_scsi_scan_host(ap);
4386 dev_set_drvdata(dev, host_set);
4388 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4389 return ent->n_ports; /* success */
4391 err_out:
4392 for (i = 0; i < count; i++) {
4393 ata_host_remove(host_set->ports[i], 1);
4394 scsi_host_put(host_set->ports[i]->host);
4396 err_free_ret:
4397 kfree(host_set);
4398 VPRINTK("EXIT, returning 0\n");
4399 return 0;
4403 * ata_host_set_remove - PCI layer callback for device removal
4404 * @host_set: ATA host set that was removed
4406 * Unregister all objects associated with this host set. Free those
4407 * objects.
4409 * LOCKING:
4410 * Inherited from calling layer (may sleep).
4413 void ata_host_set_remove(struct ata_host_set *host_set)
4415 struct ata_port *ap;
4416 unsigned int i;
4418 for (i = 0; i < host_set->n_ports; i++) {
4419 ap = host_set->ports[i];
4420 scsi_remove_host(ap->host);
4423 free_irq(host_set->irq, host_set);
4425 for (i = 0; i < host_set->n_ports; i++) {
4426 ap = host_set->ports[i];
4428 ata_scsi_release(ap->host);
4430 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4431 struct ata_ioports *ioaddr = &ap->ioaddr;
4433 if (ioaddr->cmd_addr == 0x1f0)
4434 release_region(0x1f0, 8);
4435 else if (ioaddr->cmd_addr == 0x170)
4436 release_region(0x170, 8);
4439 scsi_host_put(ap->host);
4442 if (host_set->ops->host_stop)
4443 host_set->ops->host_stop(host_set);
4445 kfree(host_set);
4449 * ata_scsi_release - SCSI layer callback hook for host unload
4450 * @host: libata host to be unloaded
4452 * Performs all duties necessary to shut down a libata port...
4453 * Kill port kthread, disable port, and release resources.
4455 * LOCKING:
4456 * Inherited from SCSI layer.
4458 * RETURNS:
4459 * One.
4462 int ata_scsi_release(struct Scsi_Host *host)
4464 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4466 DPRINTK("ENTER\n");
4468 ap->ops->port_disable(ap);
4469 ata_host_remove(ap, 0);
4471 DPRINTK("EXIT\n");
4472 return 1;
4476 * ata_std_ports - initialize ioaddr with standard port offsets.
4477 * @ioaddr: IO address structure to be initialized
4479 * Utility function which initializes data_addr, error_addr,
4480 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4481 * device_addr, status_addr, and command_addr to standard offsets
4482 * relative to cmd_addr.
4484 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4487 void ata_std_ports(struct ata_ioports *ioaddr)
4489 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4490 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4491 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4492 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4493 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4494 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4495 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4496 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4497 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4498 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4501 static struct ata_probe_ent *
4502 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4504 struct ata_probe_ent *probe_ent;
4506 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4507 if (!probe_ent) {
4508 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4509 kobject_name(&(dev->kobj)));
4510 return NULL;
4513 INIT_LIST_HEAD(&probe_ent->node);
4514 probe_ent->dev = dev;
4516 probe_ent->sht = port->sht;
4517 probe_ent->host_flags = port->host_flags;
4518 probe_ent->pio_mask = port->pio_mask;
4519 probe_ent->mwdma_mask = port->mwdma_mask;
4520 probe_ent->udma_mask = port->udma_mask;
4521 probe_ent->port_ops = port->port_ops;
4523 return probe_ent;
4528 #ifdef CONFIG_PCI
4530 void ata_pci_host_stop (struct ata_host_set *host_set)
4532 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4534 pci_iounmap(pdev, host_set->mmio_base);
4538 * ata_pci_init_native_mode - Initialize native-mode driver
4539 * @pdev: pci device to be initialized
4540 * @port: array[2] of pointers to port info structures.
4541 * @ports: bitmap of ports present
4543 * Utility function which allocates and initializes an
4544 * ata_probe_ent structure for a standard dual-port
4545 * PIO-based IDE controller. The returned ata_probe_ent
4546 * structure can be passed to ata_device_add(). The returned
4547 * ata_probe_ent structure should then be freed with kfree().
4549 * The caller need only pass the address of the primary port, the
4550 * secondary will be deduced automatically. If the device has non
4551 * standard secondary port mappings this function can be called twice,
4552 * once for each interface.
4555 struct ata_probe_ent *
4556 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4558 struct ata_probe_ent *probe_ent =
4559 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4560 int p = 0;
4562 if (!probe_ent)
4563 return NULL;
4565 probe_ent->irq = pdev->irq;
4566 probe_ent->irq_flags = SA_SHIRQ;
4568 if (ports & ATA_PORT_PRIMARY) {
4569 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4570 probe_ent->port[p].altstatus_addr =
4571 probe_ent->port[p].ctl_addr =
4572 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4573 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4574 ata_std_ports(&probe_ent->port[p]);
4575 p++;
4578 if (ports & ATA_PORT_SECONDARY) {
4579 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4580 probe_ent->port[p].altstatus_addr =
4581 probe_ent->port[p].ctl_addr =
4582 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4583 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4584 ata_std_ports(&probe_ent->port[p]);
4585 p++;
4588 probe_ent->n_ports = p;
4589 return probe_ent;
4592 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4594 struct ata_probe_ent *probe_ent;
4596 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4597 if (!probe_ent)
4598 return NULL;
4600 probe_ent->legacy_mode = 1;
4601 probe_ent->n_ports = 1;
4602 probe_ent->hard_port_no = port_num;
4604 switch(port_num)
4606 case 0:
4607 probe_ent->irq = 14;
4608 probe_ent->port[0].cmd_addr = 0x1f0;
4609 probe_ent->port[0].altstatus_addr =
4610 probe_ent->port[0].ctl_addr = 0x3f6;
4611 break;
4612 case 1:
4613 probe_ent->irq = 15;
4614 probe_ent->port[0].cmd_addr = 0x170;
4615 probe_ent->port[0].altstatus_addr =
4616 probe_ent->port[0].ctl_addr = 0x376;
4617 break;
4619 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4620 ata_std_ports(&probe_ent->port[0]);
4621 return probe_ent;
4625 * ata_pci_init_one - Initialize/register PCI IDE host controller
4626 * @pdev: Controller to be initialized
4627 * @port_info: Information from low-level host driver
4628 * @n_ports: Number of ports attached to host controller
4630 * This is a helper function which can be called from a driver's
4631 * xxx_init_one() probe function if the hardware uses traditional
4632 * IDE taskfile registers.
4634 * This function calls pci_enable_device(), reserves its register
4635 * regions, sets the dma mask, enables bus master mode, and calls
4636 * ata_device_add()
4638 * LOCKING:
4639 * Inherited from PCI layer (may sleep).
4641 * RETURNS:
4642 * Zero on success, negative on errno-based value on error.
4645 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4646 unsigned int n_ports)
4648 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4649 struct ata_port_info *port[2];
4650 u8 tmp8, mask;
4651 unsigned int legacy_mode = 0;
4652 int disable_dev_on_err = 1;
4653 int rc;
4655 DPRINTK("ENTER\n");
4657 port[0] = port_info[0];
4658 if (n_ports > 1)
4659 port[1] = port_info[1];
4660 else
4661 port[1] = port[0];
4663 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4664 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4665 /* TODO: What if one channel is in native mode ... */
4666 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4667 mask = (1 << 2) | (1 << 0);
4668 if ((tmp8 & mask) != mask)
4669 legacy_mode = (1 << 3);
4672 /* FIXME... */
4673 if ((!legacy_mode) && (n_ports > 2)) {
4674 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4675 n_ports = 2;
4676 /* For now */
4679 /* FIXME: Really for ATA it isn't safe because the device may be
4680 multi-purpose and we want to leave it alone if it was already
4681 enabled. Secondly for shared use as Arjan says we want refcounting
4683 Checking dev->is_enabled is insufficient as this is not set at
4684 boot for the primary video which is BIOS enabled
4687 rc = pci_enable_device(pdev);
4688 if (rc)
4689 return rc;
4691 rc = pci_request_regions(pdev, DRV_NAME);
4692 if (rc) {
4693 disable_dev_on_err = 0;
4694 goto err_out;
4697 /* FIXME: Should use platform specific mappers for legacy port ranges */
4698 if (legacy_mode) {
4699 if (!request_region(0x1f0, 8, "libata")) {
4700 struct resource *conflict, res;
4701 res.start = 0x1f0;
4702 res.end = 0x1f0 + 8 - 1;
4703 conflict = ____request_resource(&ioport_resource, &res);
4704 if (!strcmp(conflict->name, "libata"))
4705 legacy_mode |= (1 << 0);
4706 else {
4707 disable_dev_on_err = 0;
4708 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4710 } else
4711 legacy_mode |= (1 << 0);
4713 if (!request_region(0x170, 8, "libata")) {
4714 struct resource *conflict, res;
4715 res.start = 0x170;
4716 res.end = 0x170 + 8 - 1;
4717 conflict = ____request_resource(&ioport_resource, &res);
4718 if (!strcmp(conflict->name, "libata"))
4719 legacy_mode |= (1 << 1);
4720 else {
4721 disable_dev_on_err = 0;
4722 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4724 } else
4725 legacy_mode |= (1 << 1);
4728 /* we have legacy mode, but all ports are unavailable */
4729 if (legacy_mode == (1 << 3)) {
4730 rc = -EBUSY;
4731 goto err_out_regions;
4734 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4735 if (rc)
4736 goto err_out_regions;
4737 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4738 if (rc)
4739 goto err_out_regions;
4741 if (legacy_mode) {
4742 if (legacy_mode & (1 << 0))
4743 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
4744 if (legacy_mode & (1 << 1))
4745 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
4746 } else {
4747 if (n_ports == 2)
4748 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4749 else
4750 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4752 if (!probe_ent && !probe_ent2) {
4753 rc = -ENOMEM;
4754 goto err_out_regions;
4757 pci_set_master(pdev);
4759 /* FIXME: check ata_device_add return */
4760 if (legacy_mode) {
4761 if (legacy_mode & (1 << 0))
4762 ata_device_add(probe_ent);
4763 if (legacy_mode & (1 << 1))
4764 ata_device_add(probe_ent2);
4765 } else
4766 ata_device_add(probe_ent);
4768 kfree(probe_ent);
4769 kfree(probe_ent2);
4771 return 0;
4773 err_out_regions:
4774 if (legacy_mode & (1 << 0))
4775 release_region(0x1f0, 8);
4776 if (legacy_mode & (1 << 1))
4777 release_region(0x170, 8);
4778 pci_release_regions(pdev);
4779 err_out:
4780 if (disable_dev_on_err)
4781 pci_disable_device(pdev);
4782 return rc;
4786 * ata_pci_remove_one - PCI layer callback for device removal
4787 * @pdev: PCI device that was removed
4789 * PCI layer indicates to libata via this hook that
4790 * hot-unplug or module unload event has occurred.
4791 * Handle this by unregistering all objects associated
4792 * with this PCI device. Free those objects. Then finally
4793 * release PCI resources and disable device.
4795 * LOCKING:
4796 * Inherited from PCI layer (may sleep).
4799 void ata_pci_remove_one (struct pci_dev *pdev)
4801 struct device *dev = pci_dev_to_dev(pdev);
4802 struct ata_host_set *host_set = dev_get_drvdata(dev);
4804 ata_host_set_remove(host_set);
4805 pci_release_regions(pdev);
4806 pci_disable_device(pdev);
4807 dev_set_drvdata(dev, NULL);
4810 /* move to PCI subsystem */
4811 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4813 unsigned long tmp = 0;
4815 switch (bits->width) {
4816 case 1: {
4817 u8 tmp8 = 0;
4818 pci_read_config_byte(pdev, bits->reg, &tmp8);
4819 tmp = tmp8;
4820 break;
4822 case 2: {
4823 u16 tmp16 = 0;
4824 pci_read_config_word(pdev, bits->reg, &tmp16);
4825 tmp = tmp16;
4826 break;
4828 case 4: {
4829 u32 tmp32 = 0;
4830 pci_read_config_dword(pdev, bits->reg, &tmp32);
4831 tmp = tmp32;
4832 break;
4835 default:
4836 return -EINVAL;
4839 tmp &= bits->mask;
4841 return (tmp == bits->val) ? 1 : 0;
4843 #endif /* CONFIG_PCI */
4846 static int __init ata_init(void)
4848 ata_wq = create_workqueue("ata");
4849 if (!ata_wq)
4850 return -ENOMEM;
4852 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4853 return 0;
4856 static void __exit ata_exit(void)
4858 destroy_workqueue(ata_wq);
4861 module_init(ata_init);
4862 module_exit(ata_exit);
4864 static unsigned long ratelimit_time;
4865 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4867 int ata_ratelimit(void)
4869 int rc;
4870 unsigned long flags;
4872 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4874 if (time_after(jiffies, ratelimit_time)) {
4875 rc = 1;
4876 ratelimit_time = jiffies + (HZ/5);
4877 } else
4878 rc = 0;
4880 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4882 return rc;
4886 * libata is essentially a library of internal helper functions for
4887 * low-level ATA host controller drivers. As such, the API/ABI is
4888 * likely to change as new drivers are added and updated.
4889 * Do not depend on ABI/API stability.
4892 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4893 EXPORT_SYMBOL_GPL(ata_std_ports);
4894 EXPORT_SYMBOL_GPL(ata_device_add);
4895 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4896 EXPORT_SYMBOL_GPL(ata_sg_init);
4897 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4898 EXPORT_SYMBOL_GPL(ata_qc_complete);
4899 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4900 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4901 EXPORT_SYMBOL_GPL(ata_tf_load);
4902 EXPORT_SYMBOL_GPL(ata_tf_read);
4903 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4904 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4905 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4906 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4907 EXPORT_SYMBOL_GPL(ata_check_status);
4908 EXPORT_SYMBOL_GPL(ata_altstatus);
4909 EXPORT_SYMBOL_GPL(ata_exec_command);
4910 EXPORT_SYMBOL_GPL(ata_port_start);
4911 EXPORT_SYMBOL_GPL(ata_port_stop);
4912 EXPORT_SYMBOL_GPL(ata_host_stop);
4913 EXPORT_SYMBOL_GPL(ata_interrupt);
4914 EXPORT_SYMBOL_GPL(ata_qc_prep);
4915 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4916 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4917 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4918 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4919 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4920 EXPORT_SYMBOL_GPL(ata_port_probe);
4921 EXPORT_SYMBOL_GPL(sata_phy_reset);
4922 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4923 EXPORT_SYMBOL_GPL(ata_bus_reset);
4924 EXPORT_SYMBOL_GPL(ata_port_disable);
4925 EXPORT_SYMBOL_GPL(ata_ratelimit);
4926 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4927 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4928 EXPORT_SYMBOL_GPL(ata_scsi_error);
4929 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4930 EXPORT_SYMBOL_GPL(ata_scsi_release);
4931 EXPORT_SYMBOL_GPL(ata_host_intr);
4932 EXPORT_SYMBOL_GPL(ata_dev_classify);
4933 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4934 EXPORT_SYMBOL_GPL(ata_dev_config);
4935 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4937 EXPORT_SYMBOL_GPL(ata_timing_compute);
4938 EXPORT_SYMBOL_GPL(ata_timing_merge);
4940 #ifdef CONFIG_PCI
4941 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4942 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4943 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4944 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4945 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4946 #endif /* CONFIG_PCI */