drivers/spi/spi_s3c24xx.c

   1 /* linux/drivers/spi/spi_s3c24xx.c
   2  *
   3  * Copyright (c) 2006 Ben Dooks
   4  * Copyright (c) 2006 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11 */
  12
  13 #include <linux/init.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/errno.h>
  19 #include <linux/err.h>
  20 #include <linux/clk.h>
  21 #include <linux/platform_device.h>
  22
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/spi_bitbang.h>
  25
  26 #include <asm/io.h>
  27 #include <asm/dma.h>
  28 #include <asm/hardware.h>
  29
  30 #include <asm/arch/regs-gpio.h>
  31 #include <asm/arch/regs-spi.h>
  32 #include <asm/arch/spi.h>
  33
  34 struct s3c24xx_spi {
  35         /* bitbang has to be first */
  36         struct spi_bitbang       bitbang;
  37         struct completion        done;
  38
  39         void __iomem            *regs;
  40         int                      irq;
  41         int                      len;
  42         int                      count;
  43
  44         int                     (*set_cs)(struct s3c2410_spi_info *spi,
  45                                           int cs, int pol);
  46
  47         /* data buffers */
  48         const unsigned char     *tx;
  49         unsigned char           *rx;
  50
  51         struct clk              *clk;
  52         struct resource         *ioarea;
  53         struct spi_master       *master;
  54         struct spi_device       *curdev;
  55         struct device           *dev;
  56         struct s3c2410_spi_info *pdata;
  57 };
  58
  59 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
  60 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
  61
  62 static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev)
  63 {
  64         return spi_master_get_devdata(sdev->master);
  65 }
  66
  67 static void s3c24xx_spi_gpiocs(struct s3c2410_spi_info *spi, int cs, int pol)
  68 {
  69         s3c2410_gpio_setpin(spi->pin_cs, pol);
  70 }
  71
  72 static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
  73 {
  74         struct s3c24xx_spi *hw = to_hw(spi);
  75         unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0;
  76         unsigned int spcon;
  77
  78         switch (value) {
  79         case BITBANG_CS_INACTIVE:
  80                 hw->pdata->set_cs(hw->pdata, spi->chip_select, cspol^1);
  81                 break;
  82
  83         case BITBANG_CS_ACTIVE:
  84                 spcon = readb(hw->regs + S3C2410_SPCON);
  85
  86                 if (spi->mode & SPI_CPHA)
  87                         spcon |= S3C2410_SPCON_CPHA_FMTB;
  88                 else
  89                         spcon &= ~S3C2410_SPCON_CPHA_FMTB;
  90
  91                 if (spi->mode & SPI_CPOL)
  92                         spcon |= S3C2410_SPCON_CPOL_HIGH;
  93                 else
  94                         spcon &= ~S3C2410_SPCON_CPOL_HIGH;
  95
  96                 spcon |= S3C2410_SPCON_ENSCK;
  97
  98                 /* write new configration */
  99
 100                 writeb(spcon, hw->regs + S3C2410_SPCON);
 101                 hw->pdata->set_cs(hw->pdata, spi->chip_select, cspol);
 102
 103                 break;
 104         }
 105 }
 106
 107 static int s3c24xx_spi_setupxfer(struct spi_device *spi,
 108                                  struct spi_transfer *t)
 109 {
 110         struct s3c24xx_spi *hw = to_hw(spi);
 111         unsigned int bpw;
 112         unsigned int hz;
 113         unsigned int div;
 114
 115         bpw = t ? t->bits_per_word : spi->bits_per_word;
 116         hz  = t ? t->speed_hz : spi->max_speed_hz;
 117
 118         if (bpw != 8) {
 119                 dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
 120                 return -EINVAL;
 121         }
 122
 123         div = clk_get_rate(hw->clk) / hz;
 124
 125         /* is clk = pclk / (2 * (pre+1)), or is it
 126          *    clk = (pclk * 2) / ( pre + 1) */
 127
 128         div = (div / 2) - 1;
 129
 130         if (div < 0)
 131                 div = 1;
 132
 133         if (div > 255)
 134                 div = 255;
 135
 136         dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
 137         writeb(div, hw->regs + S3C2410_SPPRE);
 138
 139         spin_lock(&hw->bitbang.lock);
 140         if (!hw->bitbang.busy) {
 141                 hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
 142                 /* need to ndelay for 0.5 clocktick ? */
 143         }
 144         spin_unlock(&hw->bitbang.lock);
 145
 146         return 0;
 147 }
 148
 149 static int s3c24xx_spi_setup(struct spi_device *spi)
 150 {
 151         int ret;
 152
 153         if (!spi->bits_per_word)
 154                 spi->bits_per_word = 8;
 155
 156         if ((spi->mode & SPI_LSB_FIRST) != 0)
 157                 return -EINVAL;
 158
 159         ret = s3c24xx_spi_setupxfer(spi, NULL);
 160         if (ret < 0) {
 161                 dev_err(&spi->dev, "setupxfer returned %d\n", ret);
 162                 return ret;
 163         }
 164
 165         dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n",
 166                 __FUNCTION__, spi->mode, spi->bits_per_word,
 167                 spi->max_speed_hz);
 168
 169         return 0;
 170 }
 171
 172 static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
 173 {
 174         return hw->tx ? hw->tx[count] : 0;
 175 }
 176
 177 static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
 178 {
 179         struct s3c24xx_spi *hw = to_hw(spi);
 180
 181         dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
 182                 t->tx_buf, t->rx_buf, t->len);
 183
 184         hw->tx = t->tx_buf;
 185         hw->rx = t->rx_buf;
 186         hw->len = t->len;
 187         hw->count = 0;
 188
 189         /* send the first byte */
 190         writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
 191         wait_for_completion(&hw->done);
 192
 193         return hw->count;
 194 }
 195
 196 static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
 197 {
 198         struct s3c24xx_spi *hw = dev;
 199         unsigned int spsta = readb(hw->regs + S3C2410_SPSTA);
 200         unsigned int count = hw->count;
 201
 202         if (spsta & S3C2410_SPSTA_DCOL) {
 203                 dev_dbg(hw->dev, "data-collision\n");
 204                 complete(&hw->done);
 205                 goto irq_done;
 206         }
 207
 208         if (!(spsta & S3C2410_SPSTA_READY)) {
 209                 dev_dbg(hw->dev, "spi not ready for tx?\n");
 210                 complete(&hw->done);
 211                 goto irq_done;
 212         }
 213
 214         hw->count++;
 215
 216         if (hw->rx)
 217                 hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
 218
 219         count++;
 220
 221         if (count < hw->len)
 222                 writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
 223         else
 224                 complete(&hw->done);
 225
 226  irq_done:
 227         return IRQ_HANDLED;
 228 }
 229
 230 static int s3c24xx_spi_probe(struct platform_device *pdev)
 231 {
 232         struct s3c24xx_spi *hw;
 233         struct spi_master *master;
 234         struct spi_board_info *bi;
 235         struct resource *res;
 236         int err = 0;
 237         int i;
 238
 239         master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi));
 240         if (master == NULL) {
 241                 dev_err(&pdev->dev, "No memory for spi_master\n");
 242                 err = -ENOMEM;
 243                 goto err_nomem;
 244         }
 245
 246         hw = spi_master_get_devdata(master);
 247         memset(hw, 0, sizeof(struct s3c24xx_spi));
 248
 249         hw->master = spi_master_get(master);
 250         hw->pdata = pdev->dev.platform_data;
 251         hw->dev = &pdev->dev;
 252
 253         if (hw->pdata == NULL) {
 254                 dev_err(&pdev->dev, "No platform data supplied\n");
 255                 err = -ENOENT;
 256                 goto err_no_pdata;
 257         }
 258
 259         platform_set_drvdata(pdev, hw);
 260         init_completion(&hw->done);
 261
 262         /* setup the state for the bitbang driver */
 263
 264         hw->bitbang.master         = hw->master;
 265         hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer;
 266         hw->bitbang.chipselect     = s3c24xx_spi_chipsel;
 267         hw->bitbang.txrx_bufs      = s3c24xx_spi_txrx;
 268         hw->bitbang.master->setup  = s3c24xx_spi_setup;
 269
 270         dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
 271
 272         /* find and map our resources */
 273
 274         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 275         if (res == NULL) {
 276                 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
 277                 err = -ENOENT;
 278                 goto err_no_iores;
 279         }
 280
 281         hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1,
 282                                         pdev->name);
 283
 284         if (hw->ioarea == NULL) {
 285                 dev_err(&pdev->dev, "Cannot reserve region\n");
 286                 err = -ENXIO;
 287                 goto err_no_iores;
 288         }
 289
 290         hw->regs = ioremap(res->start, (res->end - res->start)+1);
 291         if (hw->regs == NULL) {
 292                 dev_err(&pdev->dev, "Cannot map IO\n");
 293                 err = -ENXIO;
 294                 goto err_no_iomap;
 295         }
 296
 297         hw->irq = platform_get_irq(pdev, 0);
 298         if (hw->irq < 0) {
 299                 dev_err(&pdev->dev, "No IRQ specified\n");
 300                 err = -ENOENT;
 301                 goto err_no_irq;
 302         }
 303
 304         err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw);
 305         if (err) {
 306                 dev_err(&pdev->dev, "Cannot claim IRQ\n");
 307                 goto err_no_irq;
 308         }
 309
 310         hw->clk = clk_get(&pdev->dev, "spi");
 311         if (IS_ERR(hw->clk)) {
 312                 dev_err(&pdev->dev, "No clock for device\n");
 313                 err = PTR_ERR(hw->clk);
 314                 goto err_no_clk;
 315         }
 316
 317         /* for the moment, permanently enable the clock */
 318
 319         clk_enable(hw->clk);
 320
 321         /* program defaults into the registers */
 322
 323         writeb(0xff, hw->regs + S3C2410_SPPRE);
 324         writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
 325         writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
 326
 327         /* setup any gpio we can */
 328
 329         if (!hw->pdata->set_cs) {
 330                 hw->set_cs = s3c24xx_spi_gpiocs;
 331
 332                 s3c2410_gpio_setpin(hw->pdata->pin_cs, 1);
 333                 s3c2410_gpio_cfgpin(hw->pdata->pin_cs, S3C2410_GPIO_OUTPUT);
 334         } else
 335                 hw->set_cs = hw->pdata->set_cs;
 336
 337         /* register our spi controller */
 338
 339         err = spi_bitbang_start(&hw->bitbang);
 340         if (err) {
 341                 dev_err(&pdev->dev, "Failed to register SPI master\n");
 342                 goto err_register;
 343         }
 344
 345         dev_dbg(hw->dev, "shutdown=%d\n", hw->bitbang.shutdown);
 346
 347         /* register all the devices associated */
 348
 349         bi = &hw->pdata->board_info[0];
 350         for (i = 0; i < hw->pdata->board_size; i++, bi++) {
 351                 dev_info(hw->dev, "registering %s\n", bi->modalias);
 352
 353                 bi->controller_data = hw;
 354                 spi_new_device(master, bi);
 355         }
 356
 357         return 0;
 358
 359  err_register:
 360         clk_disable(hw->clk);
 361         clk_put(hw->clk);
 362
 363  err_no_clk:
 364         free_irq(hw->irq, hw);
 365
 366  err_no_irq:
 367         iounmap(hw->regs);
 368
 369  err_no_iomap:
 370         release_resource(hw->ioarea);
 371         kfree(hw->ioarea);
 372
 373  err_no_iores:
 374  err_no_pdata:
 375         spi_master_put(hw->master);;
 376
 377  err_nomem:
 378         return err;
 379 }
 380
 381 static int s3c24xx_spi_remove(struct platform_device *dev)
 382 {
 383         struct s3c24xx_spi *hw = platform_get_drvdata(dev);
 384
 385         platform_set_drvdata(dev, NULL);
 386
 387         spi_unregister_master(hw->master);
 388
 389         clk_disable(hw->clk);
 390         clk_put(hw->clk);
 391
 392         free_irq(hw->irq, hw);
 393         iounmap(hw->regs);
 394
 395         release_resource(hw->ioarea);
 396         kfree(hw->ioarea);
 397
 398         spi_master_put(hw->master);
 399         return 0;
 400 }
 401
 402
 403 #ifdef CONFIG_PM
 404
 405 static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
 406 {
 407         struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
 408
 409         clk_disable(hw->clk);
 410         return 0;
 411 }
 412
 413 static int s3c24xx_spi_resume(struct platform_device *pdev)
 414 {
 415         struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
 416
 417         clk_enable(hw->clk);
 418         return 0;
 419 }
 420
 421 #else
 422 #define s3c24xx_spi_suspend NULL
 423 #define s3c24xx_spi_resume  NULL
 424 #endif
 425
 426 static struct platform_driver s3c24xx_spidrv = {
 427         .probe          = s3c24xx_spi_probe,
 428         .remove         = s3c24xx_spi_remove,
 429         .suspend        = s3c24xx_spi_suspend,
 430         .resume         = s3c24xx_spi_resume,
 431         .driver         = {
 432                 .name   = "s3c2410-spi",
 433                 .owner  = THIS_MODULE,
 434         },
 435 };
 436
 437 static int __init s3c24xx_spi_init(void)
 438 {
 439         return platform_driver_register(&s3c24xx_spidrv);
 440 }
 441
 442 static void __exit s3c24xx_spi_exit(void)
 443 {
 444         platform_driver_unregister(&s3c24xx_spidrv);
 445 }
 446
 447 module_init(s3c24xx_spi_init);
 448 module_exit(s3c24xx_spi_exit);
 449
 450 MODULE_DESCRIPTION("S3C24XX SPI Driver");
 451 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 452 MODULE_LICENSE("GPL");