1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
3 * Copyright 1996-1999 Thomas Bogendoerfer
5 * Derived from the lance driver written 1993,1994,1995 by Donald Becker.
7 * Copyright 1993 United States Government as represented by the
8 * Director, National Security Agency.
10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference.
13 * This driver is for PCnet32 and PCnetPCI based ethercards
15 /**************************************************************************
17 * Fixed a few bugs, related to running the controller in 32bit mode.
19 * Carsten Langgaard, carstenl@mips.com
20 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
22 *************************************************************************/
24 #define DRV_NAME "pcnet32"
25 #define DRV_VERSION "1.30j"
26 #define DRV_RELDATE "29.04.2005"
27 #define PFX DRV_NAME ": "
29 static const char *version
=
30 DRV_NAME
".c:v" DRV_VERSION
" " DRV_RELDATE
" tsbogend@alpha.franken.de\n";
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/string.h>
35 #include <linux/errno.h>
36 #include <linux/ioport.h>
37 #include <linux/slab.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
41 #include <linux/init.h>
42 #include <linux/ethtool.h>
43 #include <linux/mii.h>
44 #include <linux/crc32.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/spinlock.h>
49 #include <linux/moduleparam.h>
50 #include <linux/bitops.h>
54 #include <asm/uaccess.h>
58 * PCI device identifiers for "new style" Linux PCI Device Drivers
60 static struct pci_device_id pcnet32_pci_tbl
[] = {
61 { PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_LANCE_HOME
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0 },
62 { PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_LANCE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0 },
64 * Adapters that were sold with IBM's RS/6000 or pSeries hardware have
65 * the incorrect vendor id.
67 { PCI_VENDOR_ID_TRIDENT
, PCI_DEVICE_ID_AMD_LANCE
, PCI_ANY_ID
, PCI_ANY_ID
,
68 PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, 0 },
72 MODULE_DEVICE_TABLE (pci
, pcnet32_pci_tbl
);
74 static int cards_found
;
79 static unsigned int pcnet32_portlist
[] __initdata
=
80 { 0x300, 0x320, 0x340, 0x360, 0 };
84 static int pcnet32_debug
= 0;
85 static int tx_start
= 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
86 static int pcnet32vlb
; /* check for VLB cards ? */
88 static struct net_device
*pcnet32_dev
;
90 static int max_interrupt_work
= 2;
91 static int rx_copybreak
= 200;
93 #define PCNET32_PORT_AUI 0x00
94 #define PCNET32_PORT_10BT 0x01
95 #define PCNET32_PORT_GPSI 0x02
96 #define PCNET32_PORT_MII 0x03
98 #define PCNET32_PORT_PORTSEL 0x03
99 #define PCNET32_PORT_ASEL 0x04
100 #define PCNET32_PORT_100 0x40
101 #define PCNET32_PORT_FD 0x80
103 #define PCNET32_DMA_MASK 0xffffffff
105 #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
106 #define PCNET32_BLINK_TIMEOUT (jiffies + (HZ/4))
109 * table to translate option values from tulip
110 * to internal options
112 static unsigned char options_mapping
[] = {
113 PCNET32_PORT_ASEL
, /* 0 Auto-select */
114 PCNET32_PORT_AUI
, /* 1 BNC/AUI */
115 PCNET32_PORT_AUI
, /* 2 AUI/BNC */
116 PCNET32_PORT_ASEL
, /* 3 not supported */
117 PCNET32_PORT_10BT
| PCNET32_PORT_FD
, /* 4 10baseT-FD */
118 PCNET32_PORT_ASEL
, /* 5 not supported */
119 PCNET32_PORT_ASEL
, /* 6 not supported */
120 PCNET32_PORT_ASEL
, /* 7 not supported */
121 PCNET32_PORT_ASEL
, /* 8 not supported */
122 PCNET32_PORT_MII
, /* 9 MII 10baseT */
123 PCNET32_PORT_MII
| PCNET32_PORT_FD
, /* 10 MII 10baseT-FD */
124 PCNET32_PORT_MII
, /* 11 MII (autosel) */
125 PCNET32_PORT_10BT
, /* 12 10BaseT */
126 PCNET32_PORT_MII
| PCNET32_PORT_100
, /* 13 MII 100BaseTx */
127 PCNET32_PORT_MII
| PCNET32_PORT_100
| PCNET32_PORT_FD
, /* 14 MII 100BaseTx-FD */
128 PCNET32_PORT_ASEL
/* 15 not supported */
131 static const char pcnet32_gstrings_test
[][ETH_GSTRING_LEN
] = {
132 "Loopback test (offline)"
134 #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
136 #define PCNET32_NUM_REGS 168
138 #define MAX_UNITS 8 /* More are supported, limit only on options */
139 static int options
[MAX_UNITS
];
140 static int full_duplex
[MAX_UNITS
];
141 static int homepna
[MAX_UNITS
];
144 * Theory of Operation
146 * This driver uses the same software structure as the normal lance
147 * driver. So look for a verbose description in lance.c. The differences
148 * to the normal lance driver is the use of the 32bit mode of PCnet32
149 * and PCnetPCI chips. Because these chips are 32bit chips, there is no
150 * 16MB limitation and we don't need bounce buffers.
155 * v0.01: Initial version
156 * only tested on Alpha Noname Board
157 * v0.02: changed IRQ handling for new interrupt scheme (dev_id)
158 * tested on a ASUS SP3G
159 * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL
160 * looks like the 974 doesn't like stopping and restarting in a
161 * short period of time; now we do a reinit of the lance; the
162 * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
163 * and hangs the machine (thanks to Klaus Liedl for debugging)
164 * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32,
165 * made it standalone (no need for lance.c)
166 * v0.13: added additional PCI detecting for special PCI devices (Compaq)
167 * v0.14: stripped down additional PCI probe (thanks to David C Niemi
168 * and sveneric@xs4all.nl for testing this on their Compaq boxes)
169 * v0.15: added 79C965 (VLB) probe
170 * added interrupt sharing for PCI chips
171 * v0.16: fixed set_multicast_list on Alpha machines
172 * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
173 * v0.19: changed setting of autoselect bit
174 * v0.20: removed additional Compaq PCI probe; there is now a working one
175 * in arch/i386/bios32.c
176 * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu
177 * v0.22: added printing of status to ring dump
178 * v0.23: changed enet_statistics to net_devive_stats
179 * v0.90: added multicast filter
180 * added module support
181 * changed irq probe to new style
182 * added PCnetFast chip id
183 * added fix for receive stalls with Intel saturn chipsets
184 * added in-place rx skbs like in the tulip driver
186 * v0.91: added PCnetFast+ chip id
188 * v1.00: added some stuff from Donald Becker's 2.0.34 version
189 * added support for byte counters in net_dev_stats
190 * v1.01: do ring dumps, only when debugging the driver
191 * increased the transmit timeout
192 * v1.02: fixed memory leak in pcnet32_init_ring()
193 * v1.10: workaround for stopped transmitter
194 * added port selection for modules
195 * detect special T1/E1 WAN card and setup port selection
196 * v1.11: fixed wrong checking of Tx errors
197 * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu)
198 * added save original kmalloc addr for freeing (mcr@solidum.com)
199 * added support for PCnetHome chip (joe@MIT.EDU)
200 * rewritten PCI card detection
201 * added dwio mode to get driver working on some PPC machines
202 * v1.21: added mii selection and mii ioctl
203 * v1.22: changed pci scanning code to make PPC people happy
204 * fixed switching to 32bit mode in pcnet32_open() (thanks
205 * to Michael Richard <mcr@solidum.com> for noticing this one)
206 * added sub vendor/device id matching (thanks again to
207 * Michael Richard <mcr@solidum.com>)
208 * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
209 * v1.23 fixed small bug, when manual selecting MII speed/duplex
210 * v1.24 Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO
211 * underflows. Added tx_start_pt module parameter. Increased
212 * TX_RING_SIZE from 16 to 32. Added #ifdef'd code to use DXSUFLO
213 * for FAST[+] chipsets. <kaf@fc.hp.com>
214 * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
215 * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
216 * v1.26 Converted to pci_alloc_consistent, Jamey Hicks / George France
217 * <jamey@crl.dec.com>
218 * - Fixed a few bugs, related to running the controller in 32bit mode.
219 * 23 Oct, 2000. Carsten Langgaard, carstenl@mips.com
220 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
221 * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
222 * v1.27 improved CSR/PROM address detection, lots of cleanups,
223 * new pcnet32vlb module option, HP-PARISC support,
224 * added module parameter descriptions,
225 * initial ethtool support - Helge Deller <deller@gmx.de>
226 * v1.27a Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp>
227 * use alloc_etherdev and register_netdev
228 * fix pci probe not increment cards_found
229 * FD auto negotiate error workaround for xSeries250
230 * clean up and using new mii module
231 * v1.27b Sep 30 2002 Kent Yoder <yoder1@us.ibm.com>
232 * Added timer for cable connection state changes.
233 * v1.28 20 Feb 2004 Don Fry <brazilnut@us.ibm.com>
234 * Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com>
235 * Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl.
236 * Fixes bogus 'Bus master arbitration failure', pci_[un]map_single
237 * length errors, and transmit hangs. Cleans up after errors in open.
238 * Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test.
239 * Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections.
240 * v1.29 6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical
241 * identification code (blink led's) and register dump.
242 * Don Fry added timer for 971/972 so skbufs don't remain on tx ring
244 * v1.30 18 May 2004 Don Fry removed timer and Last Transmit Interrupt
245 * (ltint) as they added complexity and didn't give good throughput.
246 * v1.30a 22 May 2004 Don Fry limit frames received during interrupt.
247 * v1.30b 24 May 2004 Don Fry fix bogus tx carrier errors with 79c973,
248 * assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>.
249 * v1.30c 25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart.
250 * v1.30d 01 Jun 2004 Don Fry discard oversize rx packets.
251 * v1.30e 11 Jun 2004 Don Fry recover after fifo error and rx hang.
252 * v1.30f 16 Jun 2004 Don Fry cleanup IRQ to allow 0 and 1 for PCI,
253 * expanding on suggestions from Ralf Baechle <ralf@linux-mips.org>,
254 * and Brian Murphy <brian@murphy.dk>.
255 * v1.30g 22 Jun 2004 Patrick Simmons <psimmons@flash.net> added option
256 * homepna for selecting HomePNA mode for PCNet/Home 79C978.
257 * v1.30h 24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32.
258 * v1.30i 28 Jun 2004 Don Fry change to use module_param.
259 * v1.30j 29 Apr 2005 Don Fry fix skb/map leak with loopback test.
264 * Set the number of Tx and Rx buffers, using Log_2(# buffers).
265 * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
266 * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
268 #ifndef PCNET32_LOG_TX_BUFFERS
269 #define PCNET32_LOG_TX_BUFFERS 4
270 #define PCNET32_LOG_RX_BUFFERS 5
273 #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS))
274 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
275 #define TX_RING_LEN_BITS ((PCNET32_LOG_TX_BUFFERS) << 12)
277 #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS))
278 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
279 #define RX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4)
281 #define PKT_BUF_SZ 1544
283 /* Offsets from base I/O address. */
284 #define PCNET32_WIO_RDP 0x10
285 #define PCNET32_WIO_RAP 0x12
286 #define PCNET32_WIO_RESET 0x14
287 #define PCNET32_WIO_BDP 0x16
289 #define PCNET32_DWIO_RDP 0x10
290 #define PCNET32_DWIO_RAP 0x14
291 #define PCNET32_DWIO_RESET 0x18
292 #define PCNET32_DWIO_BDP 0x1C
294 #define PCNET32_TOTAL_SIZE 0x20
296 /* The PCNET32 Rx and Tx ring descriptors. */
297 struct pcnet32_rx_head
{
305 struct pcnet32_tx_head
{
313 /* The PCNET32 32-Bit initialization block, described in databook. */
314 struct pcnet32_init_block
{
320 /* Receive and transmit ring base, along with extra bits. */
325 /* PCnet32 access functions */
326 struct pcnet32_access
{
327 u16 (*read_csr
)(unsigned long, int);
328 void (*write_csr
)(unsigned long, int, u16
);
329 u16 (*read_bcr
)(unsigned long, int);
330 void (*write_bcr
)(unsigned long, int, u16
);
331 u16 (*read_rap
)(unsigned long);
332 void (*write_rap
)(unsigned long, u16
);
333 void (*reset
)(unsigned long);
337 * The first three fields of pcnet32_private are read by the ethernet device
338 * so we allocate the structure should be allocated by pci_alloc_consistent().
340 struct pcnet32_private
{
341 /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
342 struct pcnet32_rx_head rx_ring
[RX_RING_SIZE
];
343 struct pcnet32_tx_head tx_ring
[TX_RING_SIZE
];
344 struct pcnet32_init_block init_block
;
345 dma_addr_t dma_addr
; /* DMA address of beginning of this
347 pci_alloc_consistent */
348 struct pci_dev
*pci_dev
; /* Pointer to the associated pci device
351 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
352 struct sk_buff
*tx_skbuff
[TX_RING_SIZE
];
353 struct sk_buff
*rx_skbuff
[RX_RING_SIZE
];
354 dma_addr_t tx_dma_addr
[TX_RING_SIZE
];
355 dma_addr_t rx_dma_addr
[RX_RING_SIZE
];
356 struct pcnet32_access a
;
357 spinlock_t lock
; /* Guard lock */
358 unsigned int cur_rx
, cur_tx
; /* The next free ring entry */
359 unsigned int dirty_rx
, dirty_tx
; /* The ring entries to be free()ed. */
360 struct net_device_stats stats
;
363 unsigned int shared_irq
:1, /* shared irq possible */
364 dxsuflo
:1, /* disable transmit stop on uflo */
365 mii
:1; /* mii port available */
366 struct net_device
*next
;
367 struct mii_if_info mii_if
;
368 struct timer_list watchdog_timer
;
369 struct timer_list blink_timer
;
370 u32 msg_enable
; /* debug message level */
373 static void pcnet32_probe_vlbus(void);
374 static int pcnet32_probe_pci(struct pci_dev
*, const struct pci_device_id
*);
375 static int pcnet32_probe1(unsigned long, int, struct pci_dev
*);
376 static int pcnet32_open(struct net_device
*);
377 static int pcnet32_init_ring(struct net_device
*);
378 static int pcnet32_start_xmit(struct sk_buff
*, struct net_device
*);
379 static int pcnet32_rx(struct net_device
*);
380 static void pcnet32_tx_timeout (struct net_device
*dev
);
381 static irqreturn_t
pcnet32_interrupt(int, void *, struct pt_regs
*);
382 static int pcnet32_close(struct net_device
*);
383 static struct net_device_stats
*pcnet32_get_stats(struct net_device
*);
384 static void pcnet32_load_multicast(struct net_device
*dev
);
385 static void pcnet32_set_multicast_list(struct net_device
*);
386 static int pcnet32_ioctl(struct net_device
*, struct ifreq
*, int);
387 static void pcnet32_watchdog(struct net_device
*);
388 static int mdio_read(struct net_device
*dev
, int phy_id
, int reg_num
);
389 static void mdio_write(struct net_device
*dev
, int phy_id
, int reg_num
, int val
);
390 static void pcnet32_restart(struct net_device
*dev
, unsigned int csr0_bits
);
391 static void pcnet32_ethtool_test(struct net_device
*dev
,
392 struct ethtool_test
*eth_test
, u64
*data
);
393 static int pcnet32_loopback_test(struct net_device
*dev
, uint64_t *data1
);
394 static int pcnet32_phys_id(struct net_device
*dev
, u32 data
);
395 static void pcnet32_led_blink_callback(struct net_device
*dev
);
396 static int pcnet32_get_regs_len(struct net_device
*dev
);
397 static void pcnet32_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
399 static void pcnet32_purge_tx_ring(struct net_device
*dev
);
402 PCI_USES_IO
=1, PCI_USES_MEM
=2, PCI_USES_MASTER
=4,
403 PCI_ADDR0
=0x10<<0, PCI_ADDR1
=0x10<<1, PCI_ADDR2
=0x10<<2, PCI_ADDR3
=0x10<<3,
407 static u16
pcnet32_wio_read_csr (unsigned long addr
, int index
)
409 outw (index
, addr
+PCNET32_WIO_RAP
);
410 return inw (addr
+PCNET32_WIO_RDP
);
413 static void pcnet32_wio_write_csr (unsigned long addr
, int index
, u16 val
)
415 outw (index
, addr
+PCNET32_WIO_RAP
);
416 outw (val
, addr
+PCNET32_WIO_RDP
);
419 static u16
pcnet32_wio_read_bcr (unsigned long addr
, int index
)
421 outw (index
, addr
+PCNET32_WIO_RAP
);
422 return inw (addr
+PCNET32_WIO_BDP
);
425 static void pcnet32_wio_write_bcr (unsigned long addr
, int index
, u16 val
)
427 outw (index
, addr
+PCNET32_WIO_RAP
);
428 outw (val
, addr
+PCNET32_WIO_BDP
);
431 static u16
pcnet32_wio_read_rap (unsigned long addr
)
433 return inw (addr
+PCNET32_WIO_RAP
);
436 static void pcnet32_wio_write_rap (unsigned long addr
, u16 val
)
438 outw (val
, addr
+PCNET32_WIO_RAP
);
441 static void pcnet32_wio_reset (unsigned long addr
)
443 inw (addr
+PCNET32_WIO_RESET
);
446 static int pcnet32_wio_check (unsigned long addr
)
448 outw (88, addr
+PCNET32_WIO_RAP
);
449 return (inw (addr
+PCNET32_WIO_RAP
) == 88);
452 static struct pcnet32_access pcnet32_wio
= {
453 .read_csr
= pcnet32_wio_read_csr
,
454 .write_csr
= pcnet32_wio_write_csr
,
455 .read_bcr
= pcnet32_wio_read_bcr
,
456 .write_bcr
= pcnet32_wio_write_bcr
,
457 .read_rap
= pcnet32_wio_read_rap
,
458 .write_rap
= pcnet32_wio_write_rap
,
459 .reset
= pcnet32_wio_reset
462 static u16
pcnet32_dwio_read_csr (unsigned long addr
, int index
)
464 outl (index
, addr
+PCNET32_DWIO_RAP
);
465 return (inl (addr
+PCNET32_DWIO_RDP
) & 0xffff);
468 static void pcnet32_dwio_write_csr (unsigned long addr
, int index
, u16 val
)
470 outl (index
, addr
+PCNET32_DWIO_RAP
);
471 outl (val
, addr
+PCNET32_DWIO_RDP
);
474 static u16
pcnet32_dwio_read_bcr (unsigned long addr
, int index
)
476 outl (index
, addr
+PCNET32_DWIO_RAP
);
477 return (inl (addr
+PCNET32_DWIO_BDP
) & 0xffff);
480 static void pcnet32_dwio_write_bcr (unsigned long addr
, int index
, u16 val
)
482 outl (index
, addr
+PCNET32_DWIO_RAP
);
483 outl (val
, addr
+PCNET32_DWIO_BDP
);
486 static u16
pcnet32_dwio_read_rap (unsigned long addr
)
488 return (inl (addr
+PCNET32_DWIO_RAP
) & 0xffff);
491 static void pcnet32_dwio_write_rap (unsigned long addr
, u16 val
)
493 outl (val
, addr
+PCNET32_DWIO_RAP
);
496 static void pcnet32_dwio_reset (unsigned long addr
)
498 inl (addr
+PCNET32_DWIO_RESET
);
501 static int pcnet32_dwio_check (unsigned long addr
)
503 outl (88, addr
+PCNET32_DWIO_RAP
);
504 return ((inl (addr
+PCNET32_DWIO_RAP
) & 0xffff) == 88);
507 static struct pcnet32_access pcnet32_dwio
= {
508 .read_csr
= pcnet32_dwio_read_csr
,
509 .write_csr
= pcnet32_dwio_write_csr
,
510 .read_bcr
= pcnet32_dwio_read_bcr
,
511 .write_bcr
= pcnet32_dwio_write_bcr
,
512 .read_rap
= pcnet32_dwio_read_rap
,
513 .write_rap
= pcnet32_dwio_write_rap
,
514 .reset
= pcnet32_dwio_reset
517 #ifdef CONFIG_NET_POLL_CONTROLLER
518 static void pcnet32_poll_controller(struct net_device
*dev
)
520 disable_irq(dev
->irq
);
521 pcnet32_interrupt(0, dev
, NULL
);
522 enable_irq(dev
->irq
);
527 static int pcnet32_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
529 struct pcnet32_private
*lp
= dev
->priv
;
534 spin_lock_irqsave(&lp
->lock
, flags
);
535 mii_ethtool_gset(&lp
->mii_if
, cmd
);
536 spin_unlock_irqrestore(&lp
->lock
, flags
);
542 static int pcnet32_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
544 struct pcnet32_private
*lp
= dev
->priv
;
549 spin_lock_irqsave(&lp
->lock
, flags
);
550 r
= mii_ethtool_sset(&lp
->mii_if
, cmd
);
551 spin_unlock_irqrestore(&lp
->lock
, flags
);
556 static void pcnet32_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
558 struct pcnet32_private
*lp
= dev
->priv
;
560 strcpy (info
->driver
, DRV_NAME
);
561 strcpy (info
->version
, DRV_VERSION
);
563 strcpy (info
->bus_info
, pci_name(lp
->pci_dev
));
565 sprintf(info
->bus_info
, "VLB 0x%lx", dev
->base_addr
);
568 static u32
pcnet32_get_link(struct net_device
*dev
)
570 struct pcnet32_private
*lp
= dev
->priv
;
574 spin_lock_irqsave(&lp
->lock
, flags
);
576 r
= mii_link_ok(&lp
->mii_if
);
578 ulong ioaddr
= dev
->base_addr
; /* card base I/O address */
579 r
= (lp
->a
.read_bcr(ioaddr
, 4) != 0xc0);
581 spin_unlock_irqrestore(&lp
->lock
, flags
);
586 static u32
pcnet32_get_msglevel(struct net_device
*dev
)
588 struct pcnet32_private
*lp
= dev
->priv
;
589 return lp
->msg_enable
;
592 static void pcnet32_set_msglevel(struct net_device
*dev
, u32 value
)
594 struct pcnet32_private
*lp
= dev
->priv
;
595 lp
->msg_enable
= value
;
598 static int pcnet32_nway_reset(struct net_device
*dev
)
600 struct pcnet32_private
*lp
= dev
->priv
;
605 spin_lock_irqsave(&lp
->lock
, flags
);
606 r
= mii_nway_restart(&lp
->mii_if
);
607 spin_unlock_irqrestore(&lp
->lock
, flags
);
612 static void pcnet32_get_ringparam(struct net_device
*dev
, struct ethtool_ringparam
*ering
)
614 struct pcnet32_private
*lp
= dev
->priv
;
616 ering
->tx_max_pending
= TX_RING_SIZE
- 1;
617 ering
->tx_pending
= lp
->cur_tx
- lp
->dirty_tx
;
618 ering
->rx_max_pending
= RX_RING_SIZE
- 1;
619 ering
->rx_pending
= lp
->cur_rx
& RX_RING_MOD_MASK
;
622 static void pcnet32_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
624 memcpy(data
, pcnet32_gstrings_test
, sizeof(pcnet32_gstrings_test
));
627 static int pcnet32_self_test_count(struct net_device
*dev
)
629 return PCNET32_TEST_LEN
;
632 static void pcnet32_ethtool_test(struct net_device
*dev
,
633 struct ethtool_test
*test
, u64
*data
)
635 struct pcnet32_private
*lp
= dev
->priv
;
638 if (test
->flags
== ETH_TEST_FL_OFFLINE
) {
639 rc
= pcnet32_loopback_test(dev
, data
);
641 if (netif_msg_hw(lp
))
642 printk(KERN_DEBUG
"%s: Loopback test failed.\n", dev
->name
);
643 test
->flags
|= ETH_TEST_FL_FAILED
;
644 } else if (netif_msg_hw(lp
))
645 printk(KERN_DEBUG
"%s: Loopback test passed.\n", dev
->name
);
646 } else if (netif_msg_hw(lp
))
647 printk(KERN_DEBUG
"%s: No tests to run (specify 'Offline' on ethtool).", dev
->name
);
648 } /* end pcnet32_ethtool_test */
650 static int pcnet32_loopback_test(struct net_device
*dev
, uint64_t *data1
)
652 struct pcnet32_private
*lp
= dev
->priv
;
653 struct pcnet32_access
*a
= &lp
->a
; /* access to registers */
654 ulong ioaddr
= dev
->base_addr
; /* card base I/O address */
655 struct sk_buff
*skb
; /* sk buff */
656 int x
, i
; /* counters */
657 int numbuffs
= 4; /* number of TX/RX buffers and descs */
658 u16 status
= 0x8300; /* TX ring status */
659 u16 teststatus
; /* test of ring status */
660 int rc
; /* return code */
661 int size
; /* size of packets */
662 unsigned char *packet
; /* source packet data */
663 static int data_len
= 60; /* length of source packets */
667 *data1
= 1; /* status of test, default to fail */
668 rc
= 1; /* default to fail */
670 if (netif_running(dev
))
673 spin_lock_irqsave(&lp
->lock
, flags
);
675 /* Reset the PCNET32 */
676 lp
->a
.reset (ioaddr
);
678 /* switch pcnet32 to 32bit mode */
679 lp
->a
.write_bcr (ioaddr
, 20, 2);
681 lp
->init_block
.mode
= le16_to_cpu((lp
->options
& PCNET32_PORT_PORTSEL
) << 7);
682 lp
->init_block
.filter
[0] = 0;
683 lp
->init_block
.filter
[1] = 0;
685 /* purge & init rings but don't actually restart */
686 pcnet32_restart(dev
, 0x0000);
688 lp
->a
.write_csr(ioaddr
, 0, 0x0004); /* Set STOP bit */
690 /* Initialize Transmit buffers. */
691 size
= data_len
+ 15;
692 for (x
=0; x
<numbuffs
; x
++) {
693 if (!(skb
= dev_alloc_skb(size
))) {
694 if (netif_msg_hw(lp
))
695 printk(KERN_DEBUG
"%s: Cannot allocate skb at line: %d!\n",
696 dev
->name
, __LINE__
);
700 skb_put(skb
, size
); /* create space for data */
701 lp
->tx_skbuff
[x
] = skb
;
702 lp
->tx_ring
[x
].length
= le16_to_cpu(-skb
->len
);
703 lp
->tx_ring
[x
].misc
= 0;
705 /* put DA and SA into the skb */
707 *packet
++ = dev
->dev_addr
[i
];
709 *packet
++ = dev
->dev_addr
[i
];
715 /* fill packet with data */
716 for (i
=0; i
<data_len
; i
++)
719 lp
->tx_dma_addr
[x
] = pci_map_single(lp
->pci_dev
, skb
->data
,
720 skb
->len
, PCI_DMA_TODEVICE
);
721 lp
->tx_ring
[x
].base
= (u32
)le32_to_cpu(lp
->tx_dma_addr
[x
]);
722 wmb(); /* Make sure owner changes after all others are visible */
723 lp
->tx_ring
[x
].status
= le16_to_cpu(status
);
727 x
= a
->read_bcr(ioaddr
, 32); /* set internal loopback in BSR32 */
729 a
->write_bcr(ioaddr
, 32, x
);
731 lp
->a
.write_csr (ioaddr
, 15, 0x0044); /* set int loopback in CSR15 */
733 teststatus
= le16_to_cpu(0x8000);
734 lp
->a
.write_csr(ioaddr
, 0, 0x0002); /* Set STRT bit */
736 /* Check status of descriptors */
737 for (x
=0; x
<numbuffs
; x
++) {
740 while ((lp
->rx_ring
[x
].status
& teststatus
) && (ticks
< 200)) {
741 spin_unlock_irqrestore(&lp
->lock
, flags
);
743 spin_lock_irqsave(&lp
->lock
, flags
);
748 if (netif_msg_hw(lp
))
749 printk("%s: Desc %d failed to reset!\n",dev
->name
,x
);
754 lp
->a
.write_csr(ioaddr
, 0, 0x0004); /* Set STOP bit */
756 if (netif_msg_hw(lp
) && netif_msg_pktdata(lp
)) {
757 printk(KERN_DEBUG
"%s: RX loopback packets:\n", dev
->name
);
759 for (x
=0; x
<numbuffs
; x
++) {
760 printk(KERN_DEBUG
"%s: Packet %d:\n", dev
->name
, x
);
761 skb
= lp
->rx_skbuff
[x
];
762 for (i
=0; i
<size
; i
++) {
763 printk("%02x ", *(skb
->data
+i
));
771 while (x
<numbuffs
&& !rc
) {
772 skb
= lp
->rx_skbuff
[x
];
773 packet
= lp
->tx_skbuff
[x
]->data
;
774 for (i
=0; i
<size
; i
++) {
775 if (*(skb
->data
+i
) != packet
[i
]) {
776 if (netif_msg_hw(lp
))
777 printk(KERN_DEBUG
"%s: Error in compare! %2x - %02x %02x\n",
778 dev
->name
, i
, *(skb
->data
+i
), packet
[i
]);
790 pcnet32_purge_tx_ring(dev
);
791 x
= a
->read_csr(ioaddr
, 15) & 0xFFFF;
792 a
->write_csr(ioaddr
, 15, (x
& ~0x0044)); /* reset bits 6 and 2 */
794 x
= a
->read_bcr(ioaddr
, 32); /* reset internal loopback */
796 a
->write_bcr(ioaddr
, 32, x
);
798 spin_unlock_irqrestore(&lp
->lock
, flags
);
800 if (netif_running(dev
)) {
803 lp
->a
.write_bcr (ioaddr
, 20, 4); /* return to 16bit mode */
807 } /* end pcnet32_loopback_test */
809 static void pcnet32_led_blink_callback(struct net_device
*dev
)
811 struct pcnet32_private
*lp
= dev
->priv
;
812 struct pcnet32_access
*a
= &lp
->a
;
813 ulong ioaddr
= dev
->base_addr
;
817 spin_lock_irqsave(&lp
->lock
, flags
);
818 for (i
=4; i
<8; i
++) {
819 a
->write_bcr(ioaddr
, i
, a
->read_bcr(ioaddr
, i
) ^ 0x4000);
821 spin_unlock_irqrestore(&lp
->lock
, flags
);
823 mod_timer(&lp
->blink_timer
, PCNET32_BLINK_TIMEOUT
);
826 static int pcnet32_phys_id(struct net_device
*dev
, u32 data
)
828 struct pcnet32_private
*lp
= dev
->priv
;
829 struct pcnet32_access
*a
= &lp
->a
;
830 ulong ioaddr
= dev
->base_addr
;
834 if (!lp
->blink_timer
.function
) {
835 init_timer(&lp
->blink_timer
);
836 lp
->blink_timer
.function
= (void *) pcnet32_led_blink_callback
;
837 lp
->blink_timer
.data
= (unsigned long) dev
;
840 /* Save the current value of the bcrs */
841 spin_lock_irqsave(&lp
->lock
, flags
);
842 for (i
=4; i
<8; i
++) {
843 regs
[i
-4] = a
->read_bcr(ioaddr
, i
);
845 spin_unlock_irqrestore(&lp
->lock
, flags
);
847 mod_timer(&lp
->blink_timer
, jiffies
);
848 set_current_state(TASK_INTERRUPTIBLE
);
850 if ((!data
) || (data
> (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
)))
851 data
= (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
);
853 msleep_interruptible(data
* 1000);
854 del_timer_sync(&lp
->blink_timer
);
856 /* Restore the original value of the bcrs */
857 spin_lock_irqsave(&lp
->lock
, flags
);
858 for (i
=4; i
<8; i
++) {
859 a
->write_bcr(ioaddr
, i
, regs
[i
-4]);
861 spin_unlock_irqrestore(&lp
->lock
, flags
);
866 static int pcnet32_get_regs_len(struct net_device
*dev
)
868 return(PCNET32_NUM_REGS
* sizeof(u16
));
871 static void pcnet32_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
876 struct pcnet32_private
*lp
= dev
->priv
;
877 struct pcnet32_access
*a
= &lp
->a
;
878 ulong ioaddr
= dev
->base_addr
;
882 spin_lock_irqsave(&lp
->lock
, flags
);
884 csr0
= a
->read_csr(ioaddr
, 0);
885 if (!(csr0
& 0x0004)) { /* If not stopped */
886 /* set SUSPEND (SPND) - CSR5 bit 0 */
887 a
->write_csr(ioaddr
, 5, 0x0001);
889 /* poll waiting for bit to be set */
891 while (!(a
->read_csr(ioaddr
, 5) & 0x0001)) {
892 spin_unlock_irqrestore(&lp
->lock
, flags
);
894 spin_lock_irqsave(&lp
->lock
, flags
);
897 if (netif_msg_hw(lp
))
898 printk(KERN_DEBUG
"%s: Error getting into suspend!\n",
905 /* read address PROM */
906 for (i
=0; i
<16; i
+= 2)
907 *buff
++ = inw(ioaddr
+ i
);
909 /* read control and status registers */
910 for (i
=0; i
<90; i
++) {
911 *buff
++ = a
->read_csr(ioaddr
, i
);
914 *buff
++ = a
->read_csr(ioaddr
, 112);
915 *buff
++ = a
->read_csr(ioaddr
, 114);
917 /* read bus configuration registers */
918 for (i
=0; i
<36; i
++) {
919 *buff
++ = a
->read_bcr(ioaddr
, i
);
922 /* read mii phy registers */
924 for (i
=0; i
<32; i
++) {
925 lp
->a
.write_bcr(ioaddr
, 33, ((lp
->mii_if
.phy_id
) << 5) | i
);
926 *buff
++ = lp
->a
.read_bcr(ioaddr
, 34);
930 if (!(csr0
& 0x0004)) { /* If not stopped */
931 /* clear SUSPEND (SPND) - CSR5 bit 0 */
932 a
->write_csr(ioaddr
, 5, 0x0000);
935 i
= buff
- (u16
*)ptr
;
936 for (; i
< PCNET32_NUM_REGS
; i
++)
939 spin_unlock_irqrestore(&lp
->lock
, flags
);
942 static struct ethtool_ops pcnet32_ethtool_ops
= {
943 .get_settings
= pcnet32_get_settings
,
944 .set_settings
= pcnet32_set_settings
,
945 .get_drvinfo
= pcnet32_get_drvinfo
,
946 .get_msglevel
= pcnet32_get_msglevel
,
947 .set_msglevel
= pcnet32_set_msglevel
,
948 .nway_reset
= pcnet32_nway_reset
,
949 .get_link
= pcnet32_get_link
,
950 .get_ringparam
= pcnet32_get_ringparam
,
951 .get_tx_csum
= ethtool_op_get_tx_csum
,
952 .get_sg
= ethtool_op_get_sg
,
953 .get_tso
= ethtool_op_get_tso
,
954 .get_strings
= pcnet32_get_strings
,
955 .self_test_count
= pcnet32_self_test_count
,
956 .self_test
= pcnet32_ethtool_test
,
957 .phys_id
= pcnet32_phys_id
,
958 .get_regs_len
= pcnet32_get_regs_len
,
959 .get_regs
= pcnet32_get_regs
,
960 .get_perm_addr
= ethtool_op_get_perm_addr
,
963 /* only probes for non-PCI devices, the rest are handled by
964 * pci_register_driver via pcnet32_probe_pci */
966 static void __devinit
967 pcnet32_probe_vlbus(void)
969 unsigned int *port
, ioaddr
;
971 /* search for PCnet32 VLB cards at known addresses */
972 for (port
= pcnet32_portlist
; (ioaddr
= *port
); port
++) {
973 if (request_region(ioaddr
, PCNET32_TOTAL_SIZE
, "pcnet32_probe_vlbus")) {
974 /* check if there is really a pcnet chip on that ioaddr */
975 if ((inb(ioaddr
+ 14) == 0x57) && (inb(ioaddr
+ 15) == 0x57)) {
976 pcnet32_probe1(ioaddr
, 0, NULL
);
978 release_region(ioaddr
, PCNET32_TOTAL_SIZE
);
986 pcnet32_probe_pci(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
988 unsigned long ioaddr
;
991 err
= pci_enable_device(pdev
);
993 if (pcnet32_debug
& NETIF_MSG_PROBE
)
994 printk(KERN_ERR PFX
"failed to enable device -- err=%d\n", err
);
997 pci_set_master(pdev
);
999 ioaddr
= pci_resource_start (pdev
, 0);
1001 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1002 printk (KERN_ERR PFX
"card has no PCI IO resources, aborting\n");
1006 if (!pci_dma_supported(pdev
, PCNET32_DMA_MASK
)) {
1007 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1008 printk(KERN_ERR PFX
"architecture does not support 32bit PCI busmaster DMA\n");
1011 if (request_region(ioaddr
, PCNET32_TOTAL_SIZE
, "pcnet32_probe_pci") == NULL
) {
1012 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1013 printk(KERN_ERR PFX
"io address range already allocated\n");
1017 err
= pcnet32_probe1(ioaddr
, 1, pdev
);
1019 pci_disable_device(pdev
);
1026 * Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
1027 * pdev will be NULL when called from pcnet32_probe_vlbus.
1029 static int __devinit
1030 pcnet32_probe1(unsigned long ioaddr
, int shared
, struct pci_dev
*pdev
)
1032 struct pcnet32_private
*lp
;
1033 dma_addr_t lp_dma_addr
;
1035 int fdx
, mii
, fset
, dxsuflo
;
1038 struct net_device
*dev
;
1039 struct pcnet32_access
*a
= NULL
;
1043 /* reset the chip */
1044 pcnet32_wio_reset(ioaddr
);
1046 /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
1047 if (pcnet32_wio_read_csr(ioaddr
, 0) == 4 && pcnet32_wio_check(ioaddr
)) {
1050 pcnet32_dwio_reset(ioaddr
);
1051 if (pcnet32_dwio_read_csr(ioaddr
, 0) == 4 && pcnet32_dwio_check(ioaddr
)) {
1054 goto err_release_region
;
1057 chip_version
= a
->read_csr(ioaddr
, 88) | (a
->read_csr(ioaddr
,89) << 16);
1058 if ((pcnet32_debug
& NETIF_MSG_PROBE
) && (pcnet32_debug
& NETIF_MSG_HW
))
1059 printk(KERN_INFO
" PCnet chip version is %#x.\n", chip_version
);
1060 if ((chip_version
& 0xfff) != 0x003) {
1061 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1062 printk(KERN_INFO PFX
"Unsupported chip version.\n");
1063 goto err_release_region
;
1066 /* initialize variables */
1067 fdx
= mii
= fset
= dxsuflo
= 0;
1068 chip_version
= (chip_version
>> 12) & 0xffff;
1070 switch (chip_version
) {
1072 chipname
= "PCnet/PCI 79C970"; /* PCI */
1076 chipname
= "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
1078 chipname
= "PCnet/32 79C965"; /* 486/VL bus */
1081 chipname
= "PCnet/PCI II 79C970A"; /* PCI */
1085 chipname
= "PCnet/FAST 79C971"; /* PCI */
1086 fdx
= 1; mii
= 1; fset
= 1;
1089 chipname
= "PCnet/FAST+ 79C972"; /* PCI */
1090 fdx
= 1; mii
= 1; fset
= 1;
1093 chipname
= "PCnet/FAST III 79C973"; /* PCI */
1097 chipname
= "PCnet/Home 79C978"; /* PCI */
1100 * This is based on specs published at www.amd.com. This section
1101 * assumes that a card with a 79C978 wants to go into standard
1102 * ethernet mode. The 79C978 can also go into 1Mb HomePNA mode,
1103 * and the module option homepna=1 can select this instead.
1105 media
= a
->read_bcr(ioaddr
, 49);
1106 media
&= ~3; /* default to 10Mb ethernet */
1107 if (cards_found
< MAX_UNITS
&& homepna
[cards_found
])
1108 media
|= 1; /* switch to home wiring mode */
1109 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1110 printk(KERN_DEBUG PFX
"media set to %sMbit mode.\n",
1111 (media
& 1) ? "1" : "10");
1112 a
->write_bcr(ioaddr
, 49, media
);
1115 chipname
= "PCnet/FAST III 79C975"; /* PCI */
1119 chipname
= "PCnet/PRO 79C976";
1123 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1124 printk(KERN_INFO PFX
"PCnet version %#x, no PCnet32 chip.\n",
1126 goto err_release_region
;
1130 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
1131 * starting until the packet is loaded. Strike one for reliability, lose
1132 * one for latency - although on PCI this isnt a big loss. Older chips
1133 * have FIFO's smaller than a packet, so you can't do this.
1134 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
1138 a
->write_bcr(ioaddr
, 18, (a
->read_bcr(ioaddr
, 18) | 0x0860));
1139 a
->write_csr(ioaddr
, 80, (a
->read_csr(ioaddr
, 80) & 0x0C00) | 0x0c00);
1143 dev
= alloc_etherdev(0);
1145 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1146 printk(KERN_ERR PFX
"Memory allocation failed.\n");
1148 goto err_release_region
;
1150 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1152 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1153 printk(KERN_INFO PFX
"%s at %#3lx,", chipname
, ioaddr
);
1155 /* In most chips, after a chip reset, the ethernet address is read from the
1156 * station address PROM at the base address and programmed into the
1157 * "Physical Address Registers" CSR12-14.
1158 * As a precautionary measure, we read the PROM values and complain if
1159 * they disagree with the CSRs. Either way, we use the CSR values, and
1160 * double check that they are valid.
1162 for (i
= 0; i
< 3; i
++) {
1164 val
= a
->read_csr(ioaddr
, i
+12) & 0x0ffff;
1165 /* There may be endianness issues here. */
1166 dev
->dev_addr
[2*i
] = val
& 0x0ff;
1167 dev
->dev_addr
[2*i
+1] = (val
>> 8) & 0x0ff;
1170 /* read PROM address and compare with CSR address */
1171 for (i
= 0; i
< 6; i
++)
1172 promaddr
[i
] = inb(ioaddr
+ i
);
1174 if (memcmp(promaddr
, dev
->dev_addr
, 6)
1175 || !is_valid_ether_addr(dev
->dev_addr
)) {
1177 if (is_valid_ether_addr(promaddr
)) {
1179 if (!is_valid_ether_addr(dev
->dev_addr
)
1180 && is_valid_ether_addr(promaddr
)) {
1182 if (pcnet32_debug
& NETIF_MSG_PROBE
) {
1183 printk(" warning: CSR address invalid,\n");
1184 printk(KERN_INFO
" using instead PROM address of");
1186 memcpy(dev
->dev_addr
, promaddr
, 6);
1189 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
1191 /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1192 if (!is_valid_ether_addr(dev
->perm_addr
))
1193 memset(dev
->dev_addr
, 0, sizeof(dev
->dev_addr
));
1195 if (pcnet32_debug
& NETIF_MSG_PROBE
) {
1196 for (i
= 0; i
< 6; i
++)
1197 printk(" %2.2x", dev
->dev_addr
[i
]);
1199 /* Version 0x2623 and 0x2624 */
1200 if (((chip_version
+ 1) & 0xfffe) == 0x2624) {
1201 i
= a
->read_csr(ioaddr
, 80) & 0x0C00; /* Check tx_start_pt */
1202 printk("\n" KERN_INFO
" tx_start_pt(0x%04x):",i
);
1204 case 0: printk(" 20 bytes,"); break;
1205 case 1: printk(" 64 bytes,"); break;
1206 case 2: printk(" 128 bytes,"); break;
1207 case 3: printk("~220 bytes,"); break;
1209 i
= a
->read_bcr(ioaddr
, 18); /* Check Burst/Bus control */
1210 printk(" BCR18(%x):",i
&0xffff);
1211 if (i
& (1<<5)) printk("BurstWrEn ");
1212 if (i
& (1<<6)) printk("BurstRdEn ");
1213 if (i
& (1<<7)) printk("DWordIO ");
1214 if (i
& (1<<11)) printk("NoUFlow ");
1215 i
= a
->read_bcr(ioaddr
, 25);
1216 printk("\n" KERN_INFO
" SRAMSIZE=0x%04x,",i
<<8);
1217 i
= a
->read_bcr(ioaddr
, 26);
1218 printk(" SRAM_BND=0x%04x,",i
<<8);
1219 i
= a
->read_bcr(ioaddr
, 27);
1220 if (i
& (1<<14)) printk("LowLatRx");
1224 dev
->base_addr
= ioaddr
;
1225 /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
1226 if ((lp
= pci_alloc_consistent(pdev
, sizeof(*lp
), &lp_dma_addr
)) == NULL
) {
1227 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1228 printk(KERN_ERR PFX
"Consistent memory allocation failed.\n");
1230 goto err_free_netdev
;
1233 memset(lp
, 0, sizeof(*lp
));
1234 lp
->dma_addr
= lp_dma_addr
;
1237 spin_lock_init(&lp
->lock
);
1239 SET_MODULE_OWNER(dev
);
1240 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1242 lp
->name
= chipname
;
1243 lp
->shared_irq
= shared
;
1244 lp
->mii_if
.full_duplex
= fdx
;
1245 lp
->mii_if
.phy_id_mask
= 0x1f;
1246 lp
->mii_if
.reg_num_mask
= 0x1f;
1247 lp
->dxsuflo
= dxsuflo
;
1249 lp
->msg_enable
= pcnet32_debug
;
1250 if ((cards_found
>= MAX_UNITS
) || (options
[cards_found
] > sizeof(options_mapping
)))
1251 lp
->options
= PCNET32_PORT_ASEL
;
1253 lp
->options
= options_mapping
[options
[cards_found
]];
1254 lp
->mii_if
.dev
= dev
;
1255 lp
->mii_if
.mdio_read
= mdio_read
;
1256 lp
->mii_if
.mdio_write
= mdio_write
;
1258 if (fdx
&& !(lp
->options
& PCNET32_PORT_ASEL
) &&
1259 ((cards_found
>=MAX_UNITS
) || full_duplex
[cards_found
]))
1260 lp
->options
|= PCNET32_PORT_FD
;
1263 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1264 printk(KERN_ERR PFX
"No access methods\n");
1266 goto err_free_consistent
;
1270 /* detect special T1/E1 WAN card by checking for MAC address */
1271 if (dev
->dev_addr
[0] == 0x00 && dev
->dev_addr
[1] == 0xe0
1272 && dev
->dev_addr
[2] == 0x75)
1273 lp
->options
= PCNET32_PORT_FD
| PCNET32_PORT_GPSI
;
1275 lp
->init_block
.mode
= le16_to_cpu(0x0003); /* Disable Rx and Tx. */
1276 lp
->init_block
.tlen_rlen
= le16_to_cpu(TX_RING_LEN_BITS
| RX_RING_LEN_BITS
);
1277 for (i
= 0; i
< 6; i
++)
1278 lp
->init_block
.phys_addr
[i
] = dev
->dev_addr
[i
];
1279 lp
->init_block
.filter
[0] = 0x00000000;
1280 lp
->init_block
.filter
[1] = 0x00000000;
1281 lp
->init_block
.rx_ring
= (u32
)le32_to_cpu(lp
->dma_addr
+
1282 offsetof(struct pcnet32_private
, rx_ring
));
1283 lp
->init_block
.tx_ring
= (u32
)le32_to_cpu(lp
->dma_addr
+
1284 offsetof(struct pcnet32_private
, tx_ring
));
1286 /* switch pcnet32 to 32bit mode */
1287 a
->write_bcr(ioaddr
, 20, 2);
1289 a
->write_csr(ioaddr
, 1, (lp
->dma_addr
+ offsetof(struct pcnet32_private
,
1290 init_block
)) & 0xffff);
1291 a
->write_csr(ioaddr
, 2, (lp
->dma_addr
+ offsetof(struct pcnet32_private
,
1292 init_block
)) >> 16);
1294 if (pdev
) { /* use the IRQ provided by PCI */
1295 dev
->irq
= pdev
->irq
;
1296 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1297 printk(" assigned IRQ %d.\n", dev
->irq
);
1299 unsigned long irq_mask
= probe_irq_on();
1302 * To auto-IRQ we enable the initialization-done and DMA error
1303 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
1306 /* Trigger an initialization just for the interrupt. */
1307 a
->write_csr (ioaddr
, 0, 0x41);
1310 dev
->irq
= probe_irq_off (irq_mask
);
1312 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1313 printk(", failed to detect IRQ line.\n");
1315 goto err_free_consistent
;
1317 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1318 printk(", probed IRQ %d.\n", dev
->irq
);
1321 /* Set the mii phy_id so that we can query the link state */
1323 lp
->mii_if
.phy_id
= ((lp
->a
.read_bcr (ioaddr
, 33)) >> 5) & 0x1f;
1325 init_timer (&lp
->watchdog_timer
);
1326 lp
->watchdog_timer
.data
= (unsigned long) dev
;
1327 lp
->watchdog_timer
.function
= (void *) &pcnet32_watchdog
;
1329 /* The PCNET32-specific entries in the device structure. */
1330 dev
->open
= &pcnet32_open
;
1331 dev
->hard_start_xmit
= &pcnet32_start_xmit
;
1332 dev
->stop
= &pcnet32_close
;
1333 dev
->get_stats
= &pcnet32_get_stats
;
1334 dev
->set_multicast_list
= &pcnet32_set_multicast_list
;
1335 dev
->do_ioctl
= &pcnet32_ioctl
;
1336 dev
->ethtool_ops
= &pcnet32_ethtool_ops
;
1337 dev
->tx_timeout
= pcnet32_tx_timeout
;
1338 dev
->watchdog_timeo
= (5*HZ
);
1340 #ifdef CONFIG_NET_POLL_CONTROLLER
1341 dev
->poll_controller
= pcnet32_poll_controller
;
1344 /* Fill in the generic fields of the device structure. */
1345 if (register_netdev(dev
))
1346 goto err_free_consistent
;
1349 pci_set_drvdata(pdev
, dev
);
1351 lp
->next
= pcnet32_dev
;
1355 if (pcnet32_debug
& NETIF_MSG_PROBE
)
1356 printk(KERN_INFO
"%s: registered as %s\n", dev
->name
, lp
->name
);
1359 /* enable LED writes */
1360 a
->write_bcr(ioaddr
, 2, a
->read_bcr(ioaddr
, 2) | 0x1000);
1364 err_free_consistent
:
1365 pci_free_consistent(lp
->pci_dev
, sizeof(*lp
), lp
, lp
->dma_addr
);
1369 release_region(ioaddr
, PCNET32_TOTAL_SIZE
);
1375 pcnet32_open(struct net_device
*dev
)
1377 struct pcnet32_private
*lp
= dev
->priv
;
1378 unsigned long ioaddr
= dev
->base_addr
;
1382 unsigned long flags
;
1384 if (request_irq(dev
->irq
, &pcnet32_interrupt
,
1385 lp
->shared_irq
? SA_SHIRQ
: 0, dev
->name
, (void *)dev
)) {
1389 spin_lock_irqsave(&lp
->lock
, flags
);
1390 /* Check for a valid station address */
1391 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1396 /* Reset the PCNET32 */
1397 lp
->a
.reset (ioaddr
);
1399 /* switch pcnet32 to 32bit mode */
1400 lp
->a
.write_bcr (ioaddr
, 20, 2);
1402 if (netif_msg_ifup(lp
))
1403 printk(KERN_DEBUG
"%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
1404 dev
->name
, dev
->irq
,
1405 (u32
) (lp
->dma_addr
+ offsetof(struct pcnet32_private
, tx_ring
)),
1406 (u32
) (lp
->dma_addr
+ offsetof(struct pcnet32_private
, rx_ring
)),
1407 (u32
) (lp
->dma_addr
+ offsetof(struct pcnet32_private
, init_block
)));
1409 /* set/reset autoselect bit */
1410 val
= lp
->a
.read_bcr (ioaddr
, 2) & ~2;
1411 if (lp
->options
& PCNET32_PORT_ASEL
)
1413 lp
->a
.write_bcr (ioaddr
, 2, val
);
1415 /* handle full duplex setting */
1416 if (lp
->mii_if
.full_duplex
) {
1417 val
= lp
->a
.read_bcr (ioaddr
, 9) & ~3;
1418 if (lp
->options
& PCNET32_PORT_FD
) {
1420 if (lp
->options
== (PCNET32_PORT_FD
| PCNET32_PORT_AUI
))
1422 } else if (lp
->options
& PCNET32_PORT_ASEL
) {
1423 /* workaround of xSeries250, turn on for 79C975 only */
1424 i
= ((lp
->a
.read_csr(ioaddr
, 88) |
1425 (lp
->a
.read_csr(ioaddr
,89) << 16)) >> 12) & 0xffff;
1429 lp
->a
.write_bcr (ioaddr
, 9, val
);
1432 /* set/reset GPSI bit in test register */
1433 val
= lp
->a
.read_csr (ioaddr
, 124) & ~0x10;
1434 if ((lp
->options
& PCNET32_PORT_PORTSEL
) == PCNET32_PORT_GPSI
)
1436 lp
->a
.write_csr (ioaddr
, 124, val
);
1438 /* Allied Telesyn AT 2700/2701 FX looses the link, so skip that */
1439 if (lp
->pci_dev
->subsystem_vendor
== PCI_VENDOR_ID_AT
&&
1440 (lp
->pci_dev
->subsystem_device
== PCI_SUBDEVICE_ID_AT_2700FX
||
1441 lp
->pci_dev
->subsystem_device
== PCI_SUBDEVICE_ID_AT_2701FX
)) {
1442 printk(KERN_DEBUG
"%s: Skipping PHY selection.\n", dev
->name
);
1445 * 24 Jun 2004 according AMD, in order to change the PHY,
1446 * DANAS (or DISPM for 79C976) must be set; then select the speed,
1447 * duplex, and/or enable auto negotiation, and clear DANAS
1449 if (lp
->mii
&& !(lp
->options
& PCNET32_PORT_ASEL
)) {
1450 lp
->a
.write_bcr(ioaddr
, 32,
1451 lp
->a
.read_bcr(ioaddr
, 32) | 0x0080);
1452 /* disable Auto Negotiation, set 10Mpbs, HD */
1453 val
= lp
->a
.read_bcr(ioaddr
, 32) & ~0xb8;
1454 if (lp
->options
& PCNET32_PORT_FD
)
1456 if (lp
->options
& PCNET32_PORT_100
)
1458 lp
->a
.write_bcr (ioaddr
, 32, val
);
1460 if (lp
->options
& PCNET32_PORT_ASEL
) {
1461 lp
->a
.write_bcr(ioaddr
, 32,
1462 lp
->a
.read_bcr(ioaddr
, 32) | 0x0080);
1463 /* enable auto negotiate, setup, disable fd */
1464 val
= lp
->a
.read_bcr(ioaddr
, 32) & ~0x98;
1466 lp
->a
.write_bcr(ioaddr
, 32, val
);
1472 if (lp
->dxsuflo
) { /* Disable transmit stop on underflow */
1473 val
= lp
->a
.read_csr (ioaddr
, 3);
1475 lp
->a
.write_csr (ioaddr
, 3, val
);
1479 lp
->init_block
.mode
= le16_to_cpu((lp
->options
& PCNET32_PORT_PORTSEL
) << 7);
1480 pcnet32_load_multicast(dev
);
1482 if (pcnet32_init_ring(dev
)) {
1487 /* Re-initialize the PCNET32, and start it when done. */
1488 lp
->a
.write_csr (ioaddr
, 1, (lp
->dma_addr
+
1489 offsetof(struct pcnet32_private
, init_block
)) & 0xffff);
1490 lp
->a
.write_csr (ioaddr
, 2, (lp
->dma_addr
+
1491 offsetof(struct pcnet32_private
, init_block
)) >> 16);
1493 lp
->a
.write_csr (ioaddr
, 4, 0x0915);
1494 lp
->a
.write_csr (ioaddr
, 0, 0x0001);
1496 netif_start_queue(dev
);
1498 /* If we have mii, print the link status and start the watchdog */
1500 mii_check_media (&lp
->mii_if
, netif_msg_link(lp
), 1);
1501 mod_timer (&(lp
->watchdog_timer
), PCNET32_WATCHDOG_TIMEOUT
);
1506 if (lp
->a
.read_csr (ioaddr
, 0) & 0x0100)
1509 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
1510 * reports that doing so triggers a bug in the '974.
1512 lp
->a
.write_csr (ioaddr
, 0, 0x0042);
1514 if (netif_msg_ifup(lp
))
1515 printk(KERN_DEBUG
"%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
1516 dev
->name
, i
, (u32
) (lp
->dma_addr
+
1517 offsetof(struct pcnet32_private
, init_block
)),
1518 lp
->a
.read_csr(ioaddr
, 0));
1520 spin_unlock_irqrestore(&lp
->lock
, flags
);
1522 return 0; /* Always succeed */
1525 /* free any allocated skbuffs */
1526 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1527 lp
->rx_ring
[i
].status
= 0;
1528 if (lp
->rx_skbuff
[i
]) {
1529 pci_unmap_single(lp
->pci_dev
, lp
->rx_dma_addr
[i
], PKT_BUF_SZ
-2,
1530 PCI_DMA_FROMDEVICE
);
1531 dev_kfree_skb(lp
->rx_skbuff
[i
]);
1533 lp
->rx_skbuff
[i
] = NULL
;
1534 lp
->rx_dma_addr
[i
] = 0;
1537 * Switch back to 16bit mode to avoid problems with dumb
1538 * DOS packet driver after a warm reboot
1540 lp
->a
.write_bcr (ioaddr
, 20, 4);
1543 spin_unlock_irqrestore(&lp
->lock
, flags
);
1544 free_irq(dev
->irq
, dev
);
1549 * The LANCE has been halted for one reason or another (busmaster memory
1550 * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
1551 * etc.). Modern LANCE variants always reload their ring-buffer
1552 * configuration when restarted, so we must reinitialize our ring
1553 * context before restarting. As part of this reinitialization,
1554 * find all packets still on the Tx ring and pretend that they had been
1555 * sent (in effect, drop the packets on the floor) - the higher-level
1556 * protocols will time out and retransmit. It'd be better to shuffle
1557 * these skbs to a temp list and then actually re-Tx them after
1558 * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
1562 pcnet32_purge_tx_ring(struct net_device
*dev
)
1564 struct pcnet32_private
*lp
= dev
->priv
;
1567 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1568 lp
->tx_ring
[i
].status
= 0; /* CPU owns buffer */
1569 wmb(); /* Make sure adapter sees owner change */
1570 if (lp
->tx_skbuff
[i
]) {
1571 pci_unmap_single(lp
->pci_dev
, lp
->tx_dma_addr
[i
],
1572 lp
->tx_skbuff
[i
]->len
, PCI_DMA_TODEVICE
);
1573 dev_kfree_skb_any(lp
->tx_skbuff
[i
]);
1575 lp
->tx_skbuff
[i
] = NULL
;
1576 lp
->tx_dma_addr
[i
] = 0;
1581 /* Initialize the PCNET32 Rx and Tx rings. */
1583 pcnet32_init_ring(struct net_device
*dev
)
1585 struct pcnet32_private
*lp
= dev
->priv
;
1589 lp
->cur_rx
= lp
->cur_tx
= 0;
1590 lp
->dirty_rx
= lp
->dirty_tx
= 0;
1592 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1593 struct sk_buff
*rx_skbuff
= lp
->rx_skbuff
[i
];
1594 if (rx_skbuff
== NULL
) {
1595 if (!(rx_skbuff
= lp
->rx_skbuff
[i
] = dev_alloc_skb (PKT_BUF_SZ
))) {
1596 /* there is not much, we can do at this point */
1597 if (pcnet32_debug
& NETIF_MSG_DRV
)
1598 printk(KERN_ERR
"%s: pcnet32_init_ring dev_alloc_skb failed.\n",
1602 skb_reserve (rx_skbuff
, 2);
1606 if (lp
->rx_dma_addr
[i
] == 0)
1607 lp
->rx_dma_addr
[i
] = pci_map_single(lp
->pci_dev
, rx_skbuff
->data
,
1608 PKT_BUF_SZ
-2, PCI_DMA_FROMDEVICE
);
1609 lp
->rx_ring
[i
].base
= (u32
)le32_to_cpu(lp
->rx_dma_addr
[i
]);
1610 lp
->rx_ring
[i
].buf_length
= le16_to_cpu(2-PKT_BUF_SZ
);
1611 wmb(); /* Make sure owner changes after all others are visible */
1612 lp
->rx_ring
[i
].status
= le16_to_cpu(0x8000);
1614 /* The Tx buffer address is filled in as needed, but we do need to clear
1615 * the upper ownership bit. */
1616 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1617 lp
->tx_ring
[i
].status
= 0; /* CPU owns buffer */
1618 wmb(); /* Make sure adapter sees owner change */
1619 lp
->tx_ring
[i
].base
= 0;
1620 lp
->tx_dma_addr
[i
] = 0;
1623 lp
->init_block
.tlen_rlen
= le16_to_cpu(TX_RING_LEN_BITS
| RX_RING_LEN_BITS
);
1624 for (i
= 0; i
< 6; i
++)
1625 lp
->init_block
.phys_addr
[i
] = dev
->dev_addr
[i
];
1626 lp
->init_block
.rx_ring
= (u32
)le32_to_cpu(lp
->dma_addr
+
1627 offsetof(struct pcnet32_private
, rx_ring
));
1628 lp
->init_block
.tx_ring
= (u32
)le32_to_cpu(lp
->dma_addr
+
1629 offsetof(struct pcnet32_private
, tx_ring
));
1630 wmb(); /* Make sure all changes are visible */
1634 /* the pcnet32 has been issued a stop or reset. Wait for the stop bit
1635 * then flush the pending transmit operations, re-initialize the ring,
1636 * and tell the chip to initialize.
1639 pcnet32_restart(struct net_device
*dev
, unsigned int csr0_bits
)
1641 struct pcnet32_private
*lp
= dev
->priv
;
1642 unsigned long ioaddr
= dev
->base_addr
;
1646 for (i
=0; i
<100; i
++)
1647 if (lp
->a
.read_csr(ioaddr
, 0) & 0x0004)
1650 if (i
>= 100 && netif_msg_drv(lp
))
1651 printk(KERN_ERR
"%s: pcnet32_restart timed out waiting for stop.\n",
1654 pcnet32_purge_tx_ring(dev
);
1655 if (pcnet32_init_ring(dev
))
1659 lp
->a
.write_csr (ioaddr
, 0, 1);
1662 if (lp
->a
.read_csr (ioaddr
, 0) & 0x0100)
1665 lp
->a
.write_csr (ioaddr
, 0, csr0_bits
);
1670 pcnet32_tx_timeout (struct net_device
*dev
)
1672 struct pcnet32_private
*lp
= dev
->priv
;
1673 unsigned long ioaddr
= dev
->base_addr
, flags
;
1675 spin_lock_irqsave(&lp
->lock
, flags
);
1676 /* Transmitter timeout, serious problems. */
1677 if (pcnet32_debug
& NETIF_MSG_DRV
)
1678 printk(KERN_ERR
"%s: transmit timed out, status %4.4x, resetting.\n",
1679 dev
->name
, lp
->a
.read_csr(ioaddr
, 0));
1680 lp
->a
.write_csr (ioaddr
, 0, 0x0004);
1681 lp
->stats
.tx_errors
++;
1682 if (netif_msg_tx_err(lp
)) {
1684 printk(KERN_DEBUG
" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
1685 lp
->dirty_tx
, lp
->cur_tx
, lp
->tx_full
? " (full)" : "",
1687 for (i
= 0 ; i
< RX_RING_SIZE
; i
++)
1688 printk("%s %08x %04x %08x %04x", i
& 1 ? "" : "\n ",
1689 le32_to_cpu(lp
->rx_ring
[i
].base
),
1690 (-le16_to_cpu(lp
->rx_ring
[i
].buf_length
)) & 0xffff,
1691 le32_to_cpu(lp
->rx_ring
[i
].msg_length
),
1692 le16_to_cpu(lp
->rx_ring
[i
].status
));
1693 for (i
= 0 ; i
< TX_RING_SIZE
; i
++)
1694 printk("%s %08x %04x %08x %04x", i
& 1 ? "" : "\n ",
1695 le32_to_cpu(lp
->tx_ring
[i
].base
),
1696 (-le16_to_cpu(lp
->tx_ring
[i
].length
)) & 0xffff,
1697 le32_to_cpu(lp
->tx_ring
[i
].misc
),
1698 le16_to_cpu(lp
->tx_ring
[i
].status
));
1701 pcnet32_restart(dev
, 0x0042);
1703 dev
->trans_start
= jiffies
;
1704 netif_wake_queue(dev
);
1706 spin_unlock_irqrestore(&lp
->lock
, flags
);
1711 pcnet32_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1713 struct pcnet32_private
*lp
= dev
->priv
;
1714 unsigned long ioaddr
= dev
->base_addr
;
1717 unsigned long flags
;
1719 spin_lock_irqsave(&lp
->lock
, flags
);
1721 if (netif_msg_tx_queued(lp
)) {
1722 printk(KERN_DEBUG
"%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
1723 dev
->name
, lp
->a
.read_csr(ioaddr
, 0));
1726 /* Default status -- will not enable Successful-TxDone
1727 * interrupt when that option is available to us.
1731 /* Fill in a Tx ring entry */
1733 /* Mask to ring buffer boundary. */
1734 entry
= lp
->cur_tx
& TX_RING_MOD_MASK
;
1736 /* Caution: the write order is important here, set the status
1737 * with the "ownership" bits last. */
1739 lp
->tx_ring
[entry
].length
= le16_to_cpu(-skb
->len
);
1741 lp
->tx_ring
[entry
].misc
= 0x00000000;
1743 lp
->tx_skbuff
[entry
] = skb
;
1744 lp
->tx_dma_addr
[entry
] = pci_map_single(lp
->pci_dev
, skb
->data
, skb
->len
,
1746 lp
->tx_ring
[entry
].base
= (u32
)le32_to_cpu(lp
->tx_dma_addr
[entry
]);
1747 wmb(); /* Make sure owner changes after all others are visible */
1748 lp
->tx_ring
[entry
].status
= le16_to_cpu(status
);
1751 lp
->stats
.tx_bytes
+= skb
->len
;
1753 /* Trigger an immediate send poll. */
1754 lp
->a
.write_csr (ioaddr
, 0, 0x0048);
1756 dev
->trans_start
= jiffies
;
1758 if (lp
->tx_ring
[(entry
+1) & TX_RING_MOD_MASK
].base
!= 0) {
1760 netif_stop_queue(dev
);
1762 spin_unlock_irqrestore(&lp
->lock
, flags
);
1766 /* The PCNET32 interrupt handler. */
1768 pcnet32_interrupt(int irq
, void *dev_id
, struct pt_regs
* regs
)
1770 struct net_device
*dev
= dev_id
;
1771 struct pcnet32_private
*lp
;
1772 unsigned long ioaddr
;
1774 int boguscnt
= max_interrupt_work
;
1778 if (pcnet32_debug
& NETIF_MSG_INTR
)
1779 printk (KERN_DEBUG
"%s(): irq %d for unknown device\n",
1784 ioaddr
= dev
->base_addr
;
1787 spin_lock(&lp
->lock
);
1789 rap
= lp
->a
.read_rap(ioaddr
);
1790 while ((csr0
= lp
->a
.read_csr (ioaddr
, 0)) & 0x8f00 && --boguscnt
>= 0) {
1791 if (csr0
== 0xffff) {
1792 break; /* PCMCIA remove happened */
1794 /* Acknowledge all of the current interrupt sources ASAP. */
1795 lp
->a
.write_csr (ioaddr
, 0, csr0
& ~0x004f);
1799 if (netif_msg_intr(lp
))
1800 printk(KERN_DEBUG
"%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1801 dev
->name
, csr0
, lp
->a
.read_csr (ioaddr
, 0));
1803 if (csr0
& 0x0400) /* Rx interrupt */
1806 if (csr0
& 0x0200) { /* Tx-done interrupt */
1807 unsigned int dirty_tx
= lp
->dirty_tx
;
1810 while (dirty_tx
!= lp
->cur_tx
) {
1811 int entry
= dirty_tx
& TX_RING_MOD_MASK
;
1812 int status
= (short)le16_to_cpu(lp
->tx_ring
[entry
].status
);
1815 break; /* It still hasn't been Txed */
1817 lp
->tx_ring
[entry
].base
= 0;
1819 if (status
& 0x4000) {
1820 /* There was an major error, log it. */
1821 int err_status
= le32_to_cpu(lp
->tx_ring
[entry
].misc
);
1822 lp
->stats
.tx_errors
++;
1823 if (netif_msg_tx_err(lp
))
1824 printk(KERN_ERR
"%s: Tx error status=%04x err_status=%08x\n",
1825 dev
->name
, status
, err_status
);
1826 if (err_status
& 0x04000000) lp
->stats
.tx_aborted_errors
++;
1827 if (err_status
& 0x08000000) lp
->stats
.tx_carrier_errors
++;
1828 if (err_status
& 0x10000000) lp
->stats
.tx_window_errors
++;
1830 if (err_status
& 0x40000000) {
1831 lp
->stats
.tx_fifo_errors
++;
1832 /* Ackk! On FIFO errors the Tx unit is turned off! */
1833 /* Remove this verbosity later! */
1834 if (netif_msg_tx_err(lp
))
1835 printk(KERN_ERR
"%s: Tx FIFO error! CSR0=%4.4x\n",
1840 if (err_status
& 0x40000000) {
1841 lp
->stats
.tx_fifo_errors
++;
1842 if (! lp
->dxsuflo
) { /* If controller doesn't recover ... */
1843 /* Ackk! On FIFO errors the Tx unit is turned off! */
1844 /* Remove this verbosity later! */
1845 if (netif_msg_tx_err(lp
))
1846 printk(KERN_ERR
"%s: Tx FIFO error! CSR0=%4.4x\n",
1853 if (status
& 0x1800)
1854 lp
->stats
.collisions
++;
1855 lp
->stats
.tx_packets
++;
1858 /* We must free the original skb */
1859 if (lp
->tx_skbuff
[entry
]) {
1860 pci_unmap_single(lp
->pci_dev
, lp
->tx_dma_addr
[entry
],
1861 lp
->tx_skbuff
[entry
]->len
, PCI_DMA_TODEVICE
);
1862 dev_kfree_skb_irq(lp
->tx_skbuff
[entry
]);
1863 lp
->tx_skbuff
[entry
] = NULL
;
1864 lp
->tx_dma_addr
[entry
] = 0;
1869 delta
= (lp
->cur_tx
- dirty_tx
) & (TX_RING_MOD_MASK
+ TX_RING_SIZE
);
1870 if (delta
> TX_RING_SIZE
) {
1871 if (netif_msg_drv(lp
))
1872 printk(KERN_ERR
"%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1873 dev
->name
, dirty_tx
, lp
->cur_tx
, lp
->tx_full
);
1874 dirty_tx
+= TX_RING_SIZE
;
1875 delta
-= TX_RING_SIZE
;
1879 netif_queue_stopped(dev
) &&
1880 delta
< TX_RING_SIZE
- 2) {
1881 /* The ring is no longer full, clear tbusy. */
1883 netif_wake_queue (dev
);
1885 lp
->dirty_tx
= dirty_tx
;
1888 /* Log misc errors. */
1889 if (csr0
& 0x4000) lp
->stats
.tx_errors
++; /* Tx babble. */
1890 if (csr0
& 0x1000) {
1892 * this happens when our receive ring is full. This shouldn't
1893 * be a problem as we will see normal rx interrupts for the frames
1894 * in the receive ring. But there are some PCI chipsets (I can
1895 * reproduce this on SP3G with Intel saturn chipset) which have
1896 * sometimes problems and will fill up the receive ring with
1897 * error descriptors. In this situation we don't get a rx
1898 * interrupt, but a missed frame interrupt sooner or later.
1899 * So we try to clean up our receive ring here.
1902 lp
->stats
.rx_errors
++; /* Missed a Rx frame. */
1904 if (csr0
& 0x0800) {
1905 if (netif_msg_drv(lp
))
1906 printk(KERN_ERR
"%s: Bus master arbitration failure, status %4.4x.\n",
1908 /* unlike for the lance, there is no restart needed */
1912 /* reset the chip to clear the error condition, then restart */
1913 lp
->a
.reset(ioaddr
);
1914 lp
->a
.write_csr(ioaddr
, 4, 0x0915);
1915 pcnet32_restart(dev
, 0x0002);
1916 netif_wake_queue(dev
);
1920 /* Set interrupt enable. */
1921 lp
->a
.write_csr (ioaddr
, 0, 0x0040);
1922 lp
->a
.write_rap (ioaddr
,rap
);
1924 if (netif_msg_intr(lp
))
1925 printk(KERN_DEBUG
"%s: exiting interrupt, csr0=%#4.4x.\n",
1926 dev
->name
, lp
->a
.read_csr (ioaddr
, 0));
1928 spin_unlock(&lp
->lock
);
1934 pcnet32_rx(struct net_device
*dev
)
1936 struct pcnet32_private
*lp
= dev
->priv
;
1937 int entry
= lp
->cur_rx
& RX_RING_MOD_MASK
;
1938 int boguscnt
= RX_RING_SIZE
/ 2;
1940 /* If we own the next entry, it's a new packet. Send it up. */
1941 while ((short)le16_to_cpu(lp
->rx_ring
[entry
].status
) >= 0) {
1942 int status
= (short)le16_to_cpu(lp
->rx_ring
[entry
].status
) >> 8;
1944 if (status
!= 0x03) { /* There was an error. */
1946 * There is a tricky error noted by John Murphy,
1947 * <murf@perftech.com> to Russ Nelson: Even with full-sized
1948 * buffers it's possible for a jabber packet to use two
1949 * buffers, with only the last correctly noting the error.
1951 if (status
& 0x01) /* Only count a general error at the */
1952 lp
->stats
.rx_errors
++; /* end of a packet.*/
1953 if (status
& 0x20) lp
->stats
.rx_frame_errors
++;
1954 if (status
& 0x10) lp
->stats
.rx_over_errors
++;
1955 if (status
& 0x08) lp
->stats
.rx_crc_errors
++;
1956 if (status
& 0x04) lp
->stats
.rx_fifo_errors
++;
1957 lp
->rx_ring
[entry
].status
&= le16_to_cpu(0x03ff);
1959 /* Malloc up new buffer, compatible with net-2e. */
1960 short pkt_len
= (le32_to_cpu(lp
->rx_ring
[entry
].msg_length
) & 0xfff)-4;
1961 struct sk_buff
*skb
;
1963 /* Discard oversize frames. */
1964 if (unlikely(pkt_len
> PKT_BUF_SZ
- 2)) {
1965 if (netif_msg_drv(lp
))
1966 printk(KERN_ERR
"%s: Impossible packet size %d!\n",
1967 dev
->name
, pkt_len
);
1968 lp
->stats
.rx_errors
++;
1969 } else if (pkt_len
< 60) {
1970 if (netif_msg_rx_err(lp
))
1971 printk(KERN_ERR
"%s: Runt packet!\n", dev
->name
);
1972 lp
->stats
.rx_errors
++;
1974 int rx_in_place
= 0;
1976 if (pkt_len
> rx_copybreak
) {
1977 struct sk_buff
*newskb
;
1979 if ((newskb
= dev_alloc_skb(PKT_BUF_SZ
))) {
1980 skb_reserve (newskb
, 2);
1981 skb
= lp
->rx_skbuff
[entry
];
1982 pci_unmap_single(lp
->pci_dev
, lp
->rx_dma_addr
[entry
],
1983 PKT_BUF_SZ
-2, PCI_DMA_FROMDEVICE
);
1984 skb_put (skb
, pkt_len
);
1985 lp
->rx_skbuff
[entry
] = newskb
;
1987 lp
->rx_dma_addr
[entry
] =
1988 pci_map_single(lp
->pci_dev
, newskb
->data
,
1989 PKT_BUF_SZ
-2, PCI_DMA_FROMDEVICE
);
1990 lp
->rx_ring
[entry
].base
= le32_to_cpu(lp
->rx_dma_addr
[entry
]);
1995 skb
= dev_alloc_skb(pkt_len
+2);
2000 if (netif_msg_drv(lp
))
2001 printk(KERN_ERR
"%s: Memory squeeze, deferring packet.\n",
2003 for (i
= 0; i
< RX_RING_SIZE
; i
++)
2004 if ((short)le16_to_cpu(lp
->rx_ring
[(entry
+i
)
2005 & RX_RING_MOD_MASK
].status
) < 0)
2008 if (i
> RX_RING_SIZE
-2) {
2009 lp
->stats
.rx_dropped
++;
2010 lp
->rx_ring
[entry
].status
|= le16_to_cpu(0x8000);
2011 wmb(); /* Make sure adapter sees owner change */
2018 skb_reserve(skb
,2); /* 16 byte align */
2019 skb_put(skb
,pkt_len
); /* Make room */
2020 pci_dma_sync_single_for_cpu(lp
->pci_dev
,
2021 lp
->rx_dma_addr
[entry
],
2023 PCI_DMA_FROMDEVICE
);
2024 eth_copy_and_sum(skb
,
2025 (unsigned char *)(lp
->rx_skbuff
[entry
]->data
),
2027 pci_dma_sync_single_for_device(lp
->pci_dev
,
2028 lp
->rx_dma_addr
[entry
],
2030 PCI_DMA_FROMDEVICE
);
2032 lp
->stats
.rx_bytes
+= skb
->len
;
2033 skb
->protocol
=eth_type_trans(skb
,dev
);
2035 dev
->last_rx
= jiffies
;
2036 lp
->stats
.rx_packets
++;
2040 * The docs say that the buffer length isn't touched, but Andrew Boyd
2041 * of QNX reports that some revs of the 79C965 clear it.
2043 lp
->rx_ring
[entry
].buf_length
= le16_to_cpu(2-PKT_BUF_SZ
);
2044 wmb(); /* Make sure owner changes after all others are visible */
2045 lp
->rx_ring
[entry
].status
|= le16_to_cpu(0x8000);
2046 entry
= (++lp
->cur_rx
) & RX_RING_MOD_MASK
;
2047 if (--boguscnt
<= 0) break; /* don't stay in loop forever */
2054 pcnet32_close(struct net_device
*dev
)
2056 unsigned long ioaddr
= dev
->base_addr
;
2057 struct pcnet32_private
*lp
= dev
->priv
;
2059 unsigned long flags
;
2061 del_timer_sync(&lp
->watchdog_timer
);
2063 netif_stop_queue(dev
);
2065 spin_lock_irqsave(&lp
->lock
, flags
);
2067 lp
->stats
.rx_missed_errors
= lp
->a
.read_csr (ioaddr
, 112);
2069 if (netif_msg_ifdown(lp
))
2070 printk(KERN_DEBUG
"%s: Shutting down ethercard, status was %2.2x.\n",
2071 dev
->name
, lp
->a
.read_csr (ioaddr
, 0));
2073 /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
2074 lp
->a
.write_csr (ioaddr
, 0, 0x0004);
2077 * Switch back to 16bit mode to avoid problems with dumb
2078 * DOS packet driver after a warm reboot
2080 lp
->a
.write_bcr (ioaddr
, 20, 4);
2082 spin_unlock_irqrestore(&lp
->lock
, flags
);
2084 free_irq(dev
->irq
, dev
);
2086 spin_lock_irqsave(&lp
->lock
, flags
);
2088 /* free all allocated skbuffs */
2089 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
2090 lp
->rx_ring
[i
].status
= 0;
2091 wmb(); /* Make sure adapter sees owner change */
2092 if (lp
->rx_skbuff
[i
]) {
2093 pci_unmap_single(lp
->pci_dev
, lp
->rx_dma_addr
[i
], PKT_BUF_SZ
-2,
2094 PCI_DMA_FROMDEVICE
);
2095 dev_kfree_skb(lp
->rx_skbuff
[i
]);
2097 lp
->rx_skbuff
[i
] = NULL
;
2098 lp
->rx_dma_addr
[i
] = 0;
2101 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
2102 lp
->tx_ring
[i
].status
= 0; /* CPU owns buffer */
2103 wmb(); /* Make sure adapter sees owner change */
2104 if (lp
->tx_skbuff
[i
]) {
2105 pci_unmap_single(lp
->pci_dev
, lp
->tx_dma_addr
[i
],
2106 lp
->tx_skbuff
[i
]->len
, PCI_DMA_TODEVICE
);
2107 dev_kfree_skb(lp
->tx_skbuff
[i
]);
2109 lp
->tx_skbuff
[i
] = NULL
;
2110 lp
->tx_dma_addr
[i
] = 0;
2113 spin_unlock_irqrestore(&lp
->lock
, flags
);
2118 static struct net_device_stats
*
2119 pcnet32_get_stats(struct net_device
*dev
)
2121 struct pcnet32_private
*lp
= dev
->priv
;
2122 unsigned long ioaddr
= dev
->base_addr
;
2124 unsigned long flags
;
2126 spin_lock_irqsave(&lp
->lock
, flags
);
2127 saved_addr
= lp
->a
.read_rap(ioaddr
);
2128 lp
->stats
.rx_missed_errors
= lp
->a
.read_csr (ioaddr
, 112);
2129 lp
->a
.write_rap(ioaddr
, saved_addr
);
2130 spin_unlock_irqrestore(&lp
->lock
, flags
);
2135 /* taken from the sunlance driver, which it took from the depca driver */
2136 static void pcnet32_load_multicast (struct net_device
*dev
)
2138 struct pcnet32_private
*lp
= dev
->priv
;
2139 volatile struct pcnet32_init_block
*ib
= &lp
->init_block
;
2140 volatile u16
*mcast_table
= (u16
*)&ib
->filter
;
2141 struct dev_mc_list
*dmi
=dev
->mc_list
;
2146 /* set all multicast bits */
2147 if (dev
->flags
& IFF_ALLMULTI
) {
2148 ib
->filter
[0] = 0xffffffff;
2149 ib
->filter
[1] = 0xffffffff;
2152 /* clear the multicast filter */
2157 for (i
= 0; i
< dev
->mc_count
; i
++) {
2158 addrs
= dmi
->dmi_addr
;
2161 /* multicast address? */
2165 crc
= ether_crc_le(6, addrs
);
2167 mcast_table
[crc
>> 4] = le16_to_cpu(
2168 le16_to_cpu(mcast_table
[crc
>> 4]) | (1 << (crc
& 0xf)));
2175 * Set or clear the multicast filter for this adaptor.
2177 static void pcnet32_set_multicast_list(struct net_device
*dev
)
2179 unsigned long ioaddr
= dev
->base_addr
, flags
;
2180 struct pcnet32_private
*lp
= dev
->priv
;
2182 spin_lock_irqsave(&lp
->lock
, flags
);
2183 if (dev
->flags
&IFF_PROMISC
) {
2184 /* Log any net taps. */
2185 if (netif_msg_hw(lp
))
2186 printk(KERN_INFO
"%s: Promiscuous mode enabled.\n", dev
->name
);
2187 lp
->init_block
.mode
= le16_to_cpu(0x8000 | (lp
->options
& PCNET32_PORT_PORTSEL
) << 7);
2189 lp
->init_block
.mode
= le16_to_cpu((lp
->options
& PCNET32_PORT_PORTSEL
) << 7);
2190 pcnet32_load_multicast (dev
);
2193 lp
->a
.write_csr (ioaddr
, 0, 0x0004); /* Temporarily stop the lance. */
2194 pcnet32_restart(dev
, 0x0042); /* Resume normal operation */
2195 netif_wake_queue(dev
);
2197 spin_unlock_irqrestore(&lp
->lock
, flags
);
2200 /* This routine assumes that the lp->lock is held */
2201 static int mdio_read(struct net_device
*dev
, int phy_id
, int reg_num
)
2203 struct pcnet32_private
*lp
= dev
->priv
;
2204 unsigned long ioaddr
= dev
->base_addr
;
2210 lp
->a
.write_bcr(ioaddr
, 33, ((phy_id
& 0x1f) << 5) | (reg_num
& 0x1f));
2211 val_out
= lp
->a
.read_bcr(ioaddr
, 34);
2216 /* This routine assumes that the lp->lock is held */
2217 static void mdio_write(struct net_device
*dev
, int phy_id
, int reg_num
, int val
)
2219 struct pcnet32_private
*lp
= dev
->priv
;
2220 unsigned long ioaddr
= dev
->base_addr
;
2225 lp
->a
.write_bcr(ioaddr
, 33, ((phy_id
& 0x1f) << 5) | (reg_num
& 0x1f));
2226 lp
->a
.write_bcr(ioaddr
, 34, val
);
2229 static int pcnet32_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
2231 struct pcnet32_private
*lp
= dev
->priv
;
2233 unsigned long flags
;
2235 /* SIOC[GS]MIIxxx ioctls */
2237 spin_lock_irqsave(&lp
->lock
, flags
);
2238 rc
= generic_mii_ioctl(&lp
->mii_if
, if_mii(rq
), cmd
, NULL
);
2239 spin_unlock_irqrestore(&lp
->lock
, flags
);
2247 static void pcnet32_watchdog(struct net_device
*dev
)
2249 struct pcnet32_private
*lp
= dev
->priv
;
2250 unsigned long flags
;
2252 /* Print the link status if it has changed */
2254 spin_lock_irqsave(&lp
->lock
, flags
);
2255 mii_check_media (&lp
->mii_if
, netif_msg_link(lp
), 0);
2256 spin_unlock_irqrestore(&lp
->lock
, flags
);
2259 mod_timer (&(lp
->watchdog_timer
), PCNET32_WATCHDOG_TIMEOUT
);
2262 static void __devexit
pcnet32_remove_one(struct pci_dev
*pdev
)
2264 struct net_device
*dev
= pci_get_drvdata(pdev
);
2267 struct pcnet32_private
*lp
= dev
->priv
;
2269 unregister_netdev(dev
);
2270 release_region(dev
->base_addr
, PCNET32_TOTAL_SIZE
);
2271 pci_free_consistent(lp
->pci_dev
, sizeof(*lp
), lp
, lp
->dma_addr
);
2273 pci_disable_device(pdev
);
2274 pci_set_drvdata(pdev
, NULL
);
2278 static struct pci_driver pcnet32_driver
= {
2280 .probe
= pcnet32_probe_pci
,
2281 .remove
= __devexit_p(pcnet32_remove_one
),
2282 .id_table
= pcnet32_pci_tbl
,
2285 /* An additional parameter that may be passed in... */
2286 static int debug
= -1;
2287 static int tx_start_pt
= -1;
2288 static int pcnet32_have_pci
;
2290 module_param(debug
, int, 0);
2291 MODULE_PARM_DESC(debug
, DRV_NAME
" debug level");
2292 module_param(max_interrupt_work
, int, 0);
2293 MODULE_PARM_DESC(max_interrupt_work
, DRV_NAME
" maximum events handled per interrupt");
2294 module_param(rx_copybreak
, int, 0);
2295 MODULE_PARM_DESC(rx_copybreak
, DRV_NAME
" copy breakpoint for copy-only-tiny-frames");
2296 module_param(tx_start_pt
, int, 0);
2297 MODULE_PARM_DESC(tx_start_pt
, DRV_NAME
" transmit start point (0-3)");
2298 module_param(pcnet32vlb
, int, 0);
2299 MODULE_PARM_DESC(pcnet32vlb
, DRV_NAME
" Vesa local bus (VLB) support (0/1)");
2300 module_param_array(options
, int, NULL
, 0);
2301 MODULE_PARM_DESC(options
, DRV_NAME
" initial option setting(s) (0-15)");
2302 module_param_array(full_duplex
, int, NULL
, 0);
2303 MODULE_PARM_DESC(full_duplex
, DRV_NAME
" full duplex setting(s) (1)");
2304 /* Module Parameter for HomePNA cards added by Patrick Simmons, 2004 */
2305 module_param_array(homepna
, int, NULL
, 0);
2306 MODULE_PARM_DESC(homepna
, DRV_NAME
" mode for 79C978 cards (1 for HomePNA, 0 for Ethernet, default Ethernet");
2308 MODULE_AUTHOR("Thomas Bogendoerfer");
2309 MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
2310 MODULE_LICENSE("GPL");
2312 #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
2314 static int __init
pcnet32_init_module(void)
2316 printk(KERN_INFO
"%s", version
);
2318 pcnet32_debug
= netif_msg_init(debug
, PCNET32_MSG_DEFAULT
);
2320 if ((tx_start_pt
>= 0) && (tx_start_pt
<= 3))
2321 tx_start
= tx_start_pt
;
2323 /* find the PCI devices */
2324 if (!pci_module_init(&pcnet32_driver
))
2325 pcnet32_have_pci
= 1;
2327 /* should we find any remaining VLbus devices ? */
2329 pcnet32_probe_vlbus();
2331 if (cards_found
&& (pcnet32_debug
& NETIF_MSG_PROBE
))
2332 printk(KERN_INFO PFX
"%d cards_found.\n", cards_found
);
2334 return (pcnet32_have_pci
+ cards_found
) ? 0 : -ENODEV
;
2337 static void __exit
pcnet32_cleanup_module(void)
2339 struct net_device
*next_dev
;
2341 while (pcnet32_dev
) {
2342 struct pcnet32_private
*lp
= pcnet32_dev
->priv
;
2343 next_dev
= lp
->next
;
2344 unregister_netdev(pcnet32_dev
);
2345 release_region(pcnet32_dev
->base_addr
, PCNET32_TOTAL_SIZE
);
2346 pci_free_consistent(lp
->pci_dev
, sizeof(*lp
), lp
, lp
->dma_addr
);
2347 free_netdev(pcnet32_dev
);
2348 pcnet32_dev
= next_dev
;
2351 if (pcnet32_have_pci
)
2352 pci_unregister_driver(&pcnet32_driver
);
2355 module_init(pcnet32_init_module
);
2356 module_exit(pcnet32_cleanup_module
);