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[PATCH] PCI: clean up msi.c a bit
[linux-2.6/sactl.git] / arch / ppc / syslib / ppc85xx_rio.c
blob297f3b549177096d8f421ab836394fb324968f72
1 /*
2 * MPC85xx RapidIO support
3 *
4 * Copyright 2005 MontaVista Software, Inc.
5 * Matt Porter <mporter@kernel.crashing.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
19 #include <linux/rio.h>
20 #include <linux/rio_drv.h>
21
22 #include <asm/io.h>
23
24 #define RIO_REGS_BASE (CCSRBAR + 0xc0000)
25 #define RIO_ATMU_REGS_OFFSET 0x10c00
26 #define RIO_MSG_REGS_OFFSET 0x11000
27 #define RIO_MAINT_WIN_SIZE 0x400000
28 #define RIO_DBELL_WIN_SIZE 0x1000
29
30 #define RIO_MSG_OMR_MUI 0x00000002
31 #define RIO_MSG_OSR_TE 0x00000080
32 #define RIO_MSG_OSR_QOI 0x00000020
33 #define RIO_MSG_OSR_QFI 0x00000010
34 #define RIO_MSG_OSR_MUB 0x00000004
35 #define RIO_MSG_OSR_EOMI 0x00000002
36 #define RIO_MSG_OSR_QEI 0x00000001
37
38 #define RIO_MSG_IMR_MI 0x00000002
39 #define RIO_MSG_ISR_TE 0x00000080
40 #define RIO_MSG_ISR_QFI 0x00000010
41 #define RIO_MSG_ISR_DIQI 0x00000001
42
43 #define RIO_MSG_DESC_SIZE 32
44 #define RIO_MSG_BUFFER_SIZE 4096
45 #define RIO_MIN_TX_RING_SIZE 2
46 #define RIO_MAX_TX_RING_SIZE 2048
47 #define RIO_MIN_RX_RING_SIZE 2
48 #define RIO_MAX_RX_RING_SIZE 2048
49
50 #define DOORBELL_DMR_DI 0x00000002
51 #define DOORBELL_DSR_TE 0x00000080
52 #define DOORBELL_DSR_QFI 0x00000010
53 #define DOORBELL_DSR_DIQI 0x00000001
54 #define DOORBELL_TID_OFFSET 0x03
55 #define DOORBELL_SID_OFFSET 0x05
56 #define DOORBELL_INFO_OFFSET 0x06
57
58 #define DOORBELL_MESSAGE_SIZE 0x08
59 #define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
60 #define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
61 #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
62
63 #define is_power_of_2(x) (((x) & ((x) - 1)) == 0)
64
65 struct rio_atmu_regs {
66 u32 rowtar;
67 u32 pad1;
68 u32 rowbar;
69 u32 pad2;
70 u32 rowar;
71 u32 pad3[3];
72 };
73
74 struct rio_msg_regs {
75 u32 omr;
76 u32 osr;
77 u32 pad1;
78 u32 odqdpar;
79 u32 pad2;
80 u32 osar;
81 u32 odpr;
82 u32 odatr;
83 u32 odcr;
84 u32 pad3;
85 u32 odqepar;
86 u32 pad4[13];
87 u32 imr;
88 u32 isr;
89 u32 pad5;
90 u32 ifqdpar;
91 u32 pad6;
92 u32 ifqepar;
93 u32 pad7[250];
94 u32 dmr;
95 u32 dsr;
96 u32 pad8;
97 u32 dqdpar;
98 u32 pad9;
99 u32 dqepar;
100 u32 pad10[26];
101 u32 pwmr;
102 u32 pwsr;
103 u32 pad11;
104 u32 pwqbar;
105 };
106
107 struct rio_tx_desc {
108 u32 res1;
109 u32 saddr;
110 u32 dport;
111 u32 dattr;
112 u32 res2;
113 u32 res3;
114 u32 dwcnt;
115 u32 res4;
116 };
117
118 static u32 regs_win;
119 static struct rio_atmu_regs *atmu_regs;
120 static struct rio_atmu_regs *maint_atmu_regs;
121 static struct rio_atmu_regs *dbell_atmu_regs;
122 static u32 dbell_win;
123 static u32 maint_win;
124 static struct rio_msg_regs *msg_regs;
125
126 static struct rio_dbell_ring {
127 void *virt;
128 dma_addr_t phys;
129 } dbell_ring;
130
131 static struct rio_msg_tx_ring {
132 void *virt;
133 dma_addr_t phys;
134 void *virt_buffer[RIO_MAX_TX_RING_SIZE];
135 dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
136 int tx_slot;
137 int size;
138 void *dev_id;
139 } msg_tx_ring;
140
141 static struct rio_msg_rx_ring {
142 void *virt;
143 dma_addr_t phys;
144 void *virt_buffer[RIO_MAX_RX_RING_SIZE];
145 int rx_slot;
146 int size;
147 void *dev_id;
148 } msg_rx_ring;
149
150 /**
151 * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
152 * @index: ID of RapidIO interface
153 * @destid: Destination ID of target device
154 * @data: 16-bit info field of RapidIO doorbell message
155 *
156 * Sends a MPC85xx doorbell message. Returns %0 on success or
157 * %-EINVAL on failure.
158 */
159 static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
160 {
161 pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
162 index, destid, data);
163 out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
164 out_be16((void *)(dbell_win), data);
165
166 return 0;
167 }
168
169 /**
170 * mpc85xx_local_config_read - Generate a MPC85xx local config space read
171 * @index: ID of RapdiIO interface
172 * @offset: Offset into configuration space
173 * @len: Length (in bytes) of the maintenance transaction
174 * @data: Value to be read into
175 *
176 * Generates a MPC85xx local configuration space read. Returns %0 on
177 * success or %-EINVAL on failure.
178 */
179 static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
180 {
181 pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
182 offset);
183 *data = in_be32((void *)(regs_win + offset));
184
185 return 0;
186 }
187
188 /**
189 * mpc85xx_local_config_write - Generate a MPC85xx local config space write
190 * @index: ID of RapdiIO interface
191 * @offset: Offset into configuration space
192 * @len: Length (in bytes) of the maintenance transaction
193 * @data: Value to be written
194 *
195 * Generates a MPC85xx local configuration space write. Returns %0 on
196 * success or %-EINVAL on failure.
197 */
198 static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
199 {
200 pr_debug
201 ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
202 index, offset, data);
203 out_be32((void *)(regs_win + offset), data);
204
205 return 0;
206 }
207
208 /**
209 * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
210 * @index: ID of RapdiIO interface
211 * @destid: Destination ID of transaction
212 * @hopcount: Number of hops to target device
213 * @offset: Offset into configuration space
214 * @len: Length (in bytes) of the maintenance transaction
215 * @val: Location to be read into
216 *
217 * Generates a MPC85xx read maintenance transaction. Returns %0 on
218 * success or %-EINVAL on failure.
219 */
220 static int
221 mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
222 u32 * val)
223 {
224 u8 *data;
225
226 pr_debug
227 ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
228 index, destid, hopcount, offset, len);
229 out_be32((void *)&maint_atmu_regs->rowtar,
230 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
231
232 data = (u8 *) maint_win + offset;
233 switch (len) {
234 case 1:
235 *val = in_8((u8 *) data);
236 break;
237 case 2:
238 *val = in_be16((u16 *) data);
239 break;
240 default:
241 *val = in_be32((u32 *) data);
242 break;
243 }
244
245 return 0;
246 }
247
248 /**
249 * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
250 * @index: ID of RapdiIO interface
251 * @destid: Destination ID of transaction
252 * @hopcount: Number of hops to target device
253 * @offset: Offset into configuration space
254 * @len: Length (in bytes) of the maintenance transaction
255 * @val: Value to be written
256 *
257 * Generates an MPC85xx write maintenance transaction. Returns %0 on
258 * success or %-EINVAL on failure.
259 */
260 static int
261 mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
262 int len, u32 val)
263 {
264 u8 *data;
265 pr_debug
266 ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
267 index, destid, hopcount, offset, len, val);
268 out_be32((void *)&maint_atmu_regs->rowtar,
269 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
270
271 data = (u8 *) maint_win + offset;
272 switch (len) {
273 case 1:
274 out_8((u8 *) data, val);
275 break;
276 case 2:
277 out_be16((u16 *) data, val);
278 break;
279 default:
280 out_be32((u32 *) data, val);
281 break;
282 }
283
284 return 0;
285 }
286
287 /**
288 * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
289 * @mport: Master port with outbound message queue
290 * @rdev: Target of outbound message
291 * @mbox: Outbound mailbox
292 * @buffer: Message to add to outbound queue
293 * @len: Length of message
294 *
295 * Adds the @buffer message to the MPC85xx outbound message queue. Returns
296 * %0 on success or %-EINVAL on failure.
297 */
298 int
299 rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
300 void *buffer, size_t len)
301 {
302 u32 omr;
303 struct rio_tx_desc *desc =
304 (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
305 int ret = 0;
306
307 pr_debug
308 ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
309 rdev->destid, mbox, (int)buffer, len);
310
311 if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
312 ret = -EINVAL;
313 goto out;
314 }
315
316 /* Copy and clear rest of buffer */
317 memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
318 if (len < (RIO_MAX_MSG_SIZE - 4))
319 memset((void *)((u32) msg_tx_ring.
320 virt_buffer[msg_tx_ring.tx_slot] + len), 0,
321 RIO_MAX_MSG_SIZE - len);
322
323 /* Set mbox field for message */
324 desc->dport = mbox & 0x3;
325
326 /* Enable EOMI interrupt, set priority, and set destid */
327 desc->dattr = 0x28000000 | (rdev->destid << 2);
328
329 /* Set transfer size aligned to next power of 2 (in double words) */
330 desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
331
332 /* Set snooping and source buffer address */
333 desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
334
335 /* Increment enqueue pointer */
336 omr = in_be32((void *)&msg_regs->omr);
337 out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
338
339 /* Go to next descriptor */
340 if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
341 msg_tx_ring.tx_slot = 0;
342
343 out:
344 return ret;
345 }
346
347 EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
348
349 /**
350 * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
351 * @irq: Linux interrupt number
352 * @dev_instance: Pointer to interrupt-specific data
353 * @regs: Register context
354 *
355 * Handles outbound message interrupts. Executes a register outbound
356 * mailbox event handler and acks the interrupt occurence.
357 */
358 static irqreturn_t
359 mpc85xx_rio_tx_handler(int irq, void *dev_instance, struct pt_regs *regs)
360 {
361 int osr;
362 struct rio_mport *port = (struct rio_mport *)dev_instance;
363
364 osr = in_be32((void *)&msg_regs->osr);
365
366 if (osr & RIO_MSG_OSR_TE) {
367 pr_info("RIO: outbound message transmission error\n");
368 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
369 goto out;
370 }
371
372 if (osr & RIO_MSG_OSR_QOI) {
373 pr_info("RIO: outbound message queue overflow\n");
374 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
375 goto out;
376 }
377
378 if (osr & RIO_MSG_OSR_EOMI) {
379 u32 dqp = in_be32((void *)&msg_regs->odqdpar);
380 int slot = (dqp - msg_tx_ring.phys) >> 5;
381 port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
382
383 /* Ack the end-of-message interrupt */
384 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
385 }
386
387 out:
388 return IRQ_HANDLED;
389 }
390
391 /**
392 * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
393 * @mport: Master port implementing the outbound message unit
394 * @dev_id: Device specific pointer to pass on event
395 * @mbox: Mailbox to open
396 * @entries: Number of entries in the outbound mailbox ring
397 *
398 * Initializes buffer ring, request the outbound message interrupt,
399 * and enables the outbound message unit. Returns %0 on success and
400 * %-EINVAL or %-ENOMEM on failure.
401 */
402 int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
403 {
404 int i, j, rc = 0;
405
406 if ((entries < RIO_MIN_TX_RING_SIZE) ||
407 (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
408 rc = -EINVAL;
409 goto out;
410 }
411
412 /* Initialize shadow copy ring */
413 msg_tx_ring.dev_id = dev_id;
414 msg_tx_ring.size = entries;
415
416 for (i = 0; i < msg_tx_ring.size; i++) {
417 if (!
418 (msg_tx_ring.virt_buffer[i] =
419 dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
420 &msg_tx_ring.phys_buffer[i],
421 GFP_KERNEL))) {
422 rc = -ENOMEM;
423 for (j = 0; j < msg_tx_ring.size; j++)
424 if (msg_tx_ring.virt_buffer[j])
425 dma_free_coherent(NULL,
426 RIO_MSG_BUFFER_SIZE,
427 msg_tx_ring.
428 virt_buffer[j],
429 msg_tx_ring.
430 phys_buffer[j]);
431 goto out;
432 }
433 }
434
435 /* Initialize outbound message descriptor ring */
436 if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
437 msg_tx_ring.size *
438 RIO_MSG_DESC_SIZE,
439 &msg_tx_ring.phys,
440 GFP_KERNEL))) {
441 rc = -ENOMEM;
442 goto out_dma;
443 }
444 memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
445 msg_tx_ring.tx_slot = 0;
446
447 /* Point dequeue/enqueue pointers at first entry in ring */
448 out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
449 out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
450
451 /* Configure for snooping */
452 out_be32((void *)&msg_regs->osar, 0x00000004);
453
454 /* Clear interrupt status */
455 out_be32((void *)&msg_regs->osr, 0x000000b3);
456
457 /* Hook up outbound message handler */
458 if ((rc =
459 request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
460 "msg_tx", (void *)mport)) < 0)
461 goto out_irq;
462
463 /*
464 * Configure outbound message unit
465 * Snooping
466 * Interrupts (all enabled, except QEIE)
467 * Chaining mode
468 * Disable
469 */
470 out_be32((void *)&msg_regs->omr, 0x00100220);
471
472 /* Set number of entries */
473 out_be32((void *)&msg_regs->omr,
474 in_be32((void *)&msg_regs->omr) |
475 ((get_bitmask_order(entries) - 2) << 12));
476
477 /* Now enable the unit */
478 out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
479
480 out:
481 return rc;
482
483 out_irq:
484 dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
485 msg_tx_ring.virt, msg_tx_ring.phys);
486
487 out_dma:
488 for (i = 0; i < msg_tx_ring.size; i++)
489 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
490 msg_tx_ring.virt_buffer[i],
491 msg_tx_ring.phys_buffer[i]);
492
493 return rc;
494 }
495
496 /**
497 * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
498 * @mport: Master port implementing the outbound message unit
499 * @mbox: Mailbox to close
500 *
501 * Disables the outbound message unit, free all buffers, and
502 * frees the outbound message interrupt.
503 */
504 void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
505 {
506 /* Disable inbound message unit */
507 out_be32((void *)&msg_regs->omr, 0);
508
509 /* Free ring */
510 dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
511 msg_tx_ring.virt, msg_tx_ring.phys);
512
513 /* Free interrupt */
514 free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
515 }
516
517 /**
518 * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
519 * @irq: Linux interrupt number
520 * @dev_instance: Pointer to interrupt-specific data
521 * @regs: Register context
522 *
523 * Handles inbound message interrupts. Executes a registered inbound
524 * mailbox event handler and acks the interrupt occurence.
525 */
526 static irqreturn_t
527 mpc85xx_rio_rx_handler(int irq, void *dev_instance, struct pt_regs *regs)
528 {
529 int isr;
530 struct rio_mport *port = (struct rio_mport *)dev_instance;
531
532 isr = in_be32((void *)&msg_regs->isr);
533
534 if (isr & RIO_MSG_ISR_TE) {
535 pr_info("RIO: inbound message reception error\n");
536 out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
537 goto out;
538 }
539
540 /* XXX Need to check/dispatch until queue empty */
541 if (isr & RIO_MSG_ISR_DIQI) {
542 /*
543 * We implement *only* mailbox 0, but can receive messages
544 * for any mailbox/letter to that mailbox destination. So,
545 * make the callback with an unknown/invalid mailbox number
546 * argument.
547 */
548 port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
549
550 /* Ack the queueing interrupt */
551 out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
552 }
553
554 out:
555 return IRQ_HANDLED;
556 }
557
558 /**
559 * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
560 * @mport: Master port implementing the inbound message unit
561 * @dev_id: Device specific pointer to pass on event
562 * @mbox: Mailbox to open
563 * @entries: Number of entries in the inbound mailbox ring
564 *
565 * Initializes buffer ring, request the inbound message interrupt,
566 * and enables the inbound message unit. Returns %0 on success
567 * and %-EINVAL or %-ENOMEM on failure.
568 */
569 int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
570 {
571 int i, rc = 0;
572
573 if ((entries < RIO_MIN_RX_RING_SIZE) ||
574 (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
575 rc = -EINVAL;
576 goto out;
577 }
578
579 /* Initialize client buffer ring */
580 msg_rx_ring.dev_id = dev_id;
581 msg_rx_ring.size = entries;
582 msg_rx_ring.rx_slot = 0;
583 for (i = 0; i < msg_rx_ring.size; i++)
584 msg_rx_ring.virt_buffer[i] = NULL;
585
586 /* Initialize inbound message ring */
587 if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
588 msg_rx_ring.size *
589 RIO_MAX_MSG_SIZE,
590 &msg_rx_ring.phys,
591 GFP_KERNEL))) {
592 rc = -ENOMEM;
593 goto out;
594 }
595
596 /* Point dequeue/enqueue pointers at first entry in ring */
597 out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
598 out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
599
600 /* Clear interrupt status */
601 out_be32((void *)&msg_regs->isr, 0x00000091);
602
603 /* Hook up inbound message handler */
604 if ((rc =
605 request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
606 "msg_rx", (void *)mport)) < 0) {
607 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
608 msg_tx_ring.virt_buffer[i],
609 msg_tx_ring.phys_buffer[i]);
610 goto out;
611 }
612
613 /*
614 * Configure inbound message unit:
615 * Snooping
616 * 4KB max message size
617 * Unmask all interrupt sources
618 * Disable
619 */
620 out_be32((void *)&msg_regs->imr, 0x001b0060);
621
622 /* Set number of queue entries */
623 out_be32((void *)&msg_regs->imr,
624 in_be32((void *)&msg_regs->imr) |
625 ((get_bitmask_order(entries) - 2) << 12));
626
627 /* Now enable the unit */
628 out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
629
630 out:
631 return rc;
632 }
633
634 /**
635 * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
636 * @mport: Master port implementing the inbound message unit
637 * @mbox: Mailbox to close
638 *
639 * Disables the inbound message unit, free all buffers, and
640 * frees the inbound message interrupt.
641 */
642 void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
643 {
644 /* Disable inbound message unit */
645 out_be32((void *)&msg_regs->imr, 0);
646
647 /* Free ring */
648 dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
649 msg_rx_ring.virt, msg_rx_ring.phys);
650
651 /* Free interrupt */
652 free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
653 }
654
655 /**
656 * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
657 * @mport: Master port implementing the inbound message unit
658 * @mbox: Inbound mailbox number
659 * @buf: Buffer to add to inbound queue
660 *
661 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
662 * %0 on success or %-EINVAL on failure.
663 */
664 int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
665 {
666 int rc = 0;
667
668 pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
669 msg_rx_ring.rx_slot);
670
671 if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
672 printk(KERN_ERR
673 "RIO: error adding inbound buffer %d, buffer exists\n",
674 msg_rx_ring.rx_slot);
675 rc = -EINVAL;
676 goto out;
677 }
678
679 msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
680 if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
681 msg_rx_ring.rx_slot = 0;
682
683 out:
684 return rc;
685 }
686
687 EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
688
689 /**
690 * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
691 * @mport: Master port implementing the inbound message unit
692 * @mbox: Inbound mailbox number
693 *
694 * Gets the next available inbound message from the inbound message queue.
695 * A pointer to the message is returned on success or NULL on failure.
696 */
697 void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
698 {
699 u32 imr;
700 u32 phys_buf, virt_buf;
701 void *buf = NULL;
702 int buf_idx;
703
704 phys_buf = in_be32((void *)&msg_regs->ifqdpar);
705
706 /* If no more messages, then bail out */
707 if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
708 goto out2;
709
710 virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
711 buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
712 buf = msg_rx_ring.virt_buffer[buf_idx];
713
714 if (!buf) {
715 printk(KERN_ERR
716 "RIO: inbound message copy failed, no buffers\n");
717 goto out1;
718 }
719
720 /* Copy max message size, caller is expected to allocate that big */
721 memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
722
723 /* Clear the available buffer */
724 msg_rx_ring.virt_buffer[buf_idx] = NULL;
725
726 out1:
727 imr = in_be32((void *)&msg_regs->imr);
728 out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
729
730 out2:
731 return buf;
732 }
733
734 EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
735
736 /**
737 * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
738 * @irq: Linux interrupt number
739 * @dev_instance: Pointer to interrupt-specific data
740 * @regs: Register context
741 *
742 * Handles doorbell interrupts. Parses a list of registered
743 * doorbell event handlers and executes a matching event handler.
744 */
745 static irqreturn_t
746 mpc85xx_rio_dbell_handler(int irq, void *dev_instance, struct pt_regs *regs)
747 {
748 int dsr;
749 struct rio_mport *port = (struct rio_mport *)dev_instance;
750
751 dsr = in_be32((void *)&msg_regs->dsr);
752
753 if (dsr & DOORBELL_DSR_TE) {
754 pr_info("RIO: doorbell reception error\n");
755 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
756 goto out;
757 }
758
759 if (dsr & DOORBELL_DSR_QFI) {
760 pr_info("RIO: doorbell queue full\n");
761 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
762 goto out;
763 }
764
765 /* XXX Need to check/dispatch until queue empty */
766 if (dsr & DOORBELL_DSR_DIQI) {
767 u32 dmsg =
768 (u32) dbell_ring.virt +
769 (in_be32((void *)&msg_regs->dqdpar) & 0xfff);
770 u32 dmr;
771 struct rio_dbell *dbell;
772 int found = 0;
773
774 pr_debug
775 ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
776 DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
777
778 list_for_each_entry(dbell, &port->dbells, node) {
779 if ((dbell->res->start <= DBELL_INF(dmsg)) &&
780 (dbell->res->end >= DBELL_INF(dmsg))) {
781 found = 1;
782 break;
783 }
784 }
785 if (found) {
786 dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
787 DBELL_INF(dmsg));
788 } else {
789 pr_debug
790 ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
791 DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
792 }
793 dmr = in_be32((void *)&msg_regs->dmr);
794 out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
795 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
796 }
797
798 out:
799 return IRQ_HANDLED;
800 }
801
802 /**
803 * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
804 * @mport: Master port implementing the inbound doorbell unit
805 *
806 * Initializes doorbell unit hardware and inbound DMA buffer
807 * ring. Called from mpc85xx_rio_setup(). Returns %0 on success
808 * or %-ENOMEM on failure.
809 */
810 static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
811 {
812 int rc = 0;
813
814 /* Map outbound doorbell window immediately after maintenance window */
815 if (!(dbell_win =
816 (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
817 RIO_DBELL_WIN_SIZE))) {
818 printk(KERN_ERR
819 "RIO: unable to map outbound doorbell window\n");
820 rc = -ENOMEM;
821 goto out;
822 }
823
824 /* Initialize inbound doorbells */
825 if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
826 512 * DOORBELL_MESSAGE_SIZE,
827 &dbell_ring.phys,
828 GFP_KERNEL))) {
829 printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
830 rc = -ENOMEM;
831 iounmap((void *)dbell_win);
832 goto out;
833 }
834
835 /* Point dequeue/enqueue pointers at first entry in ring */
836 out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
837 out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
838
839 /* Clear interrupt status */
840 out_be32((void *)&msg_regs->dsr, 0x00000091);
841
842 /* Hook up doorbell handler */
843 if ((rc =
844 request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
845 "dbell_rx", (void *)mport) < 0)) {
846 iounmap((void *)dbell_win);
847 dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
848 dbell_ring.virt, dbell_ring.phys);
849 printk(KERN_ERR
850 "MPC85xx RIO: unable to request inbound doorbell irq");
851 goto out;
852 }
853
854 /* Configure doorbells for snooping, 512 entries, and enable */
855 out_be32((void *)&msg_regs->dmr, 0x00108161);
856
857 out:
858 return rc;
859 }
860
861 static char *cmdline = NULL;
862
863 static int mpc85xx_rio_get_hdid(int index)
864 {
865 /* XXX Need to parse multiple entries in some format */
866 if (!cmdline)
867 return -1;
868
869 return simple_strtol(cmdline, NULL, 0);
870 }
871
872 static int mpc85xx_rio_get_cmdline(char *s)
873 {
874 if (!s)
875 return 0;
876
877 cmdline = s;
878 return 1;
879 }
880
881 __setup("riohdid=", mpc85xx_rio_get_cmdline);
882
883 /**
884 * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
885 * @law_start: Starting physical address of RapidIO LAW
886 * @law_size: Size of RapidIO LAW
887 *
888 * Initializes MPC85xx RapidIO hardware interface, configures
889 * master port with system-specific info, and registers the
890 * master port with the RapidIO subsystem.
891 */
892 void mpc85xx_rio_setup(int law_start, int law_size)
893 {
894 struct rio_ops *ops;
895 struct rio_mport *port;
896
897 ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
898 ops->lcread = mpc85xx_local_config_read;
899 ops->lcwrite = mpc85xx_local_config_write;
900 ops->cread = mpc85xx_rio_config_read;
901 ops->cwrite = mpc85xx_rio_config_write;
902 ops->dsend = mpc85xx_rio_doorbell_send;
903
904 port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
905 port->id = 0;
906 port->index = 0;
907 INIT_LIST_HEAD(&port->dbells);
908 port->iores.start = law_start;
909 port->iores.end = law_start + law_size;
910 port->iores.flags = IORESOURCE_MEM;
911
912 rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
913 rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
914 rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
915 strcpy(port->name, "RIO0 mport");
916
917 port->ops = ops;
918 port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
919
920 rio_register_mport(port);
921
922 regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
923 atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
924 maint_atmu_regs = atmu_regs + 1;
925 dbell_atmu_regs = atmu_regs + 2;
926 msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
927
928 /* Configure maintenance transaction window */
929 out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
930 out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
931
932 maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
933
934 /* Configure outbound doorbell window */
935 out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
936 out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
937 mpc85xx_rio_doorbell_init(port);
938 }
SocketAccessConTroL development