arch/ppc/syslib/ibm440gp_common.c

   1 /*
   2  * PPC440GP system library
   3  *
   4  * Matt Porter <mporter@mvista.com>
   5  * Copyright 2002-2003 MontaVista Software Inc.
   6  *
   7  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
   8  * Copyright (c) 2003 Zultys Technologies
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/config.h>
  17 #include <linux/types.h>
  18 #include <asm/reg.h>
  19 #include <asm/ibm44x.h>
  20 #include <asm/mmu.h>
  21
  22 /*
  23  * Calculate 440GP clocks
  24  */
  25 void __init ibm440gp_get_clocks(struct ibm44x_clocks* p,
  26                                 unsigned int sys_clk,
  27                                 unsigned int ser_clk)
  28 {
  29         u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0);
  30         u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0);
  31         u32 opdv = ((cpc0_sys0 >> 10) & 0x3) + 1;
  32         u32 epdv = ((cpc0_sys0 >> 8) & 0x3) + 1;
  33
  34         if (cpc0_sys0 & 0x2){
  35                 /* Bypass system PLL */
  36                 p->cpu = p->plb = sys_clk;
  37         }
  38         else {
  39                 u32 fbdv, fwdva, fwdvb, m, vco;
  40
  41                 fbdv = (cpc0_sys0 >> 18) & 0x0f;
  42                 if (!fbdv)
  43                         fbdv = 16;
  44
  45                 fwdva = 8 - ((cpc0_sys0 >> 15) & 0x7);
  46                 fwdvb = 8 - ((cpc0_sys0 >> 12) & 0x7);
  47
  48                 /* Feedback path */
  49                 if (cpc0_sys0 & 0x00000080){
  50                         /* PerClk */
  51                         m = fwdvb * opdv * epdv;
  52                 }
  53                 else {
  54                         /* CPU clock */
  55                         m = fbdv * fwdva;
  56                 }
  57                 vco = sys_clk * m;
  58                 p->cpu = vco / fwdva;
  59                 p->plb = vco / fwdvb;
  60         }
  61
  62         p->opb = p->plb / opdv;
  63         p->ebc = p->opb / epdv;
  64
  65         if (cpc0_cr0 & 0x00400000){
  66                 /* External UART clock */
  67                 p->uart0 = p->uart1 = ser_clk;
  68         }
  69         else {
  70                 /* Internal UART clock */
  71                 u32 uart_div = ((cpc0_cr0 >> 16) & 0x1f) + 1;
  72                 p->uart0 = p->uart1 = p->plb / uart_div;
  73         }
  74 }