[PATCH] PCI: clean up msi.c a bit
[linux-2.6/sactl.git] / arch / arm / mach-s3c2410 / devs.c
blobca09ba516e4c1d92b5b7c4b090b702c2668702ef
1 /* linux/arch/arm/mach-s3c2410/devs.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Base S3C2410 platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Modifications:
13 * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
14 * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
15 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
16 * 29-Aug-2004 BJD Added timers 0 through 3
17 * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
18 * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
19 * 18-Aug-2004 BJD Created initial version
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/interrupt.h>
25 #include <linux/list.h>
26 #include <linux/timer.h>
27 #include <linux/init.h>
28 #include <linux/platform_device.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/irq.h>
33 #include <asm/arch/fb.h>
34 #include <asm/hardware.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
38 #include <asm/arch/regs-serial.h>
40 #include "devs.h"
42 /* Serial port registrations */
44 struct platform_device *s3c24xx_uart_devs[3];
46 /* USB Host Controller */
48 static struct resource s3c_usb_resource[] = {
49 [0] = {
50 .start = S3C24XX_PA_USBHOST,
51 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
52 .flags = IORESOURCE_MEM,
54 [1] = {
55 .start = IRQ_USBH,
56 .end = IRQ_USBH,
57 .flags = IORESOURCE_IRQ,
61 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
63 struct platform_device s3c_device_usb = {
64 .name = "s3c2410-ohci",
65 .id = -1,
66 .num_resources = ARRAY_SIZE(s3c_usb_resource),
67 .resource = s3c_usb_resource,
68 .dev = {
69 .dma_mask = &s3c_device_usb_dmamask,
70 .coherent_dma_mask = 0xffffffffUL
74 EXPORT_SYMBOL(s3c_device_usb);
76 /* LCD Controller */
78 static struct resource s3c_lcd_resource[] = {
79 [0] = {
80 .start = S3C24XX_PA_LCD,
81 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
82 .flags = IORESOURCE_MEM,
84 [1] = {
85 .start = IRQ_LCD,
86 .end = IRQ_LCD,
87 .flags = IORESOURCE_IRQ,
92 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
94 struct platform_device s3c_device_lcd = {
95 .name = "s3c2410-lcd",
96 .id = -1,
97 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
98 .resource = s3c_lcd_resource,
99 .dev = {
100 .dma_mask = &s3c_device_lcd_dmamask,
101 .coherent_dma_mask = 0xffffffffUL
105 EXPORT_SYMBOL(s3c_device_lcd);
107 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
109 struct s3c2410fb_mach_info *npd;
111 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
112 if (npd) {
113 memcpy(npd, pd, sizeof(*npd));
114 s3c_device_lcd.dev.platform_data = npd;
115 } else {
116 printk(KERN_ERR "no memory for LCD platform data\n");
120 /* NAND Controller */
122 static struct resource s3c_nand_resource[] = {
123 [0] = {
124 .start = S3C2410_PA_NAND,
125 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
126 .flags = IORESOURCE_MEM,
130 struct platform_device s3c_device_nand = {
131 .name = "s3c2410-nand",
132 .id = -1,
133 .num_resources = ARRAY_SIZE(s3c_nand_resource),
134 .resource = s3c_nand_resource,
137 EXPORT_SYMBOL(s3c_device_nand);
139 /* USB Device (Gadget)*/
141 static struct resource s3c_usbgadget_resource[] = {
142 [0] = {
143 .start = S3C24XX_PA_USBDEV,
144 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
145 .flags = IORESOURCE_MEM,
147 [1] = {
148 .start = IRQ_USBD,
149 .end = IRQ_USBD,
150 .flags = IORESOURCE_IRQ,
155 struct platform_device s3c_device_usbgadget = {
156 .name = "s3c2410-usbgadget",
157 .id = -1,
158 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
159 .resource = s3c_usbgadget_resource,
162 EXPORT_SYMBOL(s3c_device_usbgadget);
164 /* Watchdog */
166 static struct resource s3c_wdt_resource[] = {
167 [0] = {
168 .start = S3C24XX_PA_WATCHDOG,
169 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
170 .flags = IORESOURCE_MEM,
172 [1] = {
173 .start = IRQ_WDT,
174 .end = IRQ_WDT,
175 .flags = IORESOURCE_IRQ,
180 struct platform_device s3c_device_wdt = {
181 .name = "s3c2410-wdt",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
184 .resource = s3c_wdt_resource,
187 EXPORT_SYMBOL(s3c_device_wdt);
189 /* I2C */
191 static struct resource s3c_i2c_resource[] = {
192 [0] = {
193 .start = S3C24XX_PA_IIC,
194 .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
195 .flags = IORESOURCE_MEM,
197 [1] = {
198 .start = IRQ_IIC,
199 .end = IRQ_IIC,
200 .flags = IORESOURCE_IRQ,
205 struct platform_device s3c_device_i2c = {
206 .name = "s3c2410-i2c",
207 .id = -1,
208 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
209 .resource = s3c_i2c_resource,
212 EXPORT_SYMBOL(s3c_device_i2c);
214 /* IIS */
216 static struct resource s3c_iis_resource[] = {
217 [0] = {
218 .start = S3C24XX_PA_IIS,
219 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
220 .flags = IORESOURCE_MEM,
224 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
226 struct platform_device s3c_device_iis = {
227 .name = "s3c2410-iis",
228 .id = -1,
229 .num_resources = ARRAY_SIZE(s3c_iis_resource),
230 .resource = s3c_iis_resource,
231 .dev = {
232 .dma_mask = &s3c_device_iis_dmamask,
233 .coherent_dma_mask = 0xffffffffUL
237 EXPORT_SYMBOL(s3c_device_iis);
239 /* RTC */
241 static struct resource s3c_rtc_resource[] = {
242 [0] = {
243 .start = S3C24XX_PA_RTC,
244 .end = S3C24XX_PA_RTC + 0xff,
245 .flags = IORESOURCE_MEM,
247 [1] = {
248 .start = IRQ_RTC,
249 .end = IRQ_RTC,
250 .flags = IORESOURCE_IRQ,
252 [2] = {
253 .start = IRQ_TICK,
254 .end = IRQ_TICK,
255 .flags = IORESOURCE_IRQ
259 struct platform_device s3c_device_rtc = {
260 .name = "s3c2410-rtc",
261 .id = -1,
262 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
263 .resource = s3c_rtc_resource,
266 EXPORT_SYMBOL(s3c_device_rtc);
268 /* ADC */
270 static struct resource s3c_adc_resource[] = {
271 [0] = {
272 .start = S3C24XX_PA_ADC,
273 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
274 .flags = IORESOURCE_MEM,
276 [1] = {
277 .start = IRQ_TC,
278 .end = IRQ_TC,
279 .flags = IORESOURCE_IRQ,
281 [2] = {
282 .start = IRQ_ADC,
283 .end = IRQ_ADC,
284 .flags = IORESOURCE_IRQ,
289 struct platform_device s3c_device_adc = {
290 .name = "s3c2410-adc",
291 .id = -1,
292 .num_resources = ARRAY_SIZE(s3c_adc_resource),
293 .resource = s3c_adc_resource,
296 /* SDI */
298 static struct resource s3c_sdi_resource[] = {
299 [0] = {
300 .start = S3C2410_PA_SDI,
301 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
302 .flags = IORESOURCE_MEM,
304 [1] = {
305 .start = IRQ_SDI,
306 .end = IRQ_SDI,
307 .flags = IORESOURCE_IRQ,
312 struct platform_device s3c_device_sdi = {
313 .name = "s3c2410-sdi",
314 .id = -1,
315 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
316 .resource = s3c_sdi_resource,
319 EXPORT_SYMBOL(s3c_device_sdi);
321 /* SPI (0) */
323 static struct resource s3c_spi0_resource[] = {
324 [0] = {
325 .start = S3C24XX_PA_SPI,
326 .end = S3C24XX_PA_SPI + 0x1f,
327 .flags = IORESOURCE_MEM,
329 [1] = {
330 .start = IRQ_SPI0,
331 .end = IRQ_SPI0,
332 .flags = IORESOURCE_IRQ,
337 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
339 struct platform_device s3c_device_spi0 = {
340 .name = "s3c2410-spi",
341 .id = 0,
342 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
343 .resource = s3c_spi0_resource,
344 .dev = {
345 .dma_mask = &s3c_device_spi0_dmamask,
346 .coherent_dma_mask = 0xffffffffUL
350 EXPORT_SYMBOL(s3c_device_spi0);
352 /* SPI (1) */
354 static struct resource s3c_spi1_resource[] = {
355 [0] = {
356 .start = S3C24XX_PA_SPI + 0x20,
357 .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
358 .flags = IORESOURCE_MEM,
360 [1] = {
361 .start = IRQ_SPI1,
362 .end = IRQ_SPI1,
363 .flags = IORESOURCE_IRQ,
368 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
370 struct platform_device s3c_device_spi1 = {
371 .name = "s3c2410-spi",
372 .id = 1,
373 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
374 .resource = s3c_spi1_resource,
375 .dev = {
376 .dma_mask = &s3c_device_spi1_dmamask,
377 .coherent_dma_mask = 0xffffffffUL
381 EXPORT_SYMBOL(s3c_device_spi1);
383 /* pwm timer blocks */
385 static struct resource s3c_timer0_resource[] = {
386 [0] = {
387 .start = S3C24XX_PA_TIMER + 0x0C,
388 .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
389 .flags = IORESOURCE_MEM,
391 [1] = {
392 .start = IRQ_TIMER0,
393 .end = IRQ_TIMER0,
394 .flags = IORESOURCE_IRQ,
399 struct platform_device s3c_device_timer0 = {
400 .name = "s3c2410-timer",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
403 .resource = s3c_timer0_resource,
406 EXPORT_SYMBOL(s3c_device_timer0);
408 /* timer 1 */
410 static struct resource s3c_timer1_resource[] = {
411 [0] = {
412 .start = S3C24XX_PA_TIMER + 0x18,
413 .end = S3C24XX_PA_TIMER + 0x23,
414 .flags = IORESOURCE_MEM,
416 [1] = {
417 .start = IRQ_TIMER1,
418 .end = IRQ_TIMER1,
419 .flags = IORESOURCE_IRQ,
424 struct platform_device s3c_device_timer1 = {
425 .name = "s3c2410-timer",
426 .id = 1,
427 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
428 .resource = s3c_timer1_resource,
431 EXPORT_SYMBOL(s3c_device_timer1);
433 /* timer 2 */
435 static struct resource s3c_timer2_resource[] = {
436 [0] = {
437 .start = S3C24XX_PA_TIMER + 0x24,
438 .end = S3C24XX_PA_TIMER + 0x2F,
439 .flags = IORESOURCE_MEM,
441 [1] = {
442 .start = IRQ_TIMER2,
443 .end = IRQ_TIMER2,
444 .flags = IORESOURCE_IRQ,
449 struct platform_device s3c_device_timer2 = {
450 .name = "s3c2410-timer",
451 .id = 2,
452 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
453 .resource = s3c_timer2_resource,
456 EXPORT_SYMBOL(s3c_device_timer2);
458 /* timer 3 */
460 static struct resource s3c_timer3_resource[] = {
461 [0] = {
462 .start = S3C24XX_PA_TIMER + 0x30,
463 .end = S3C24XX_PA_TIMER + 0x3B,
464 .flags = IORESOURCE_MEM,
466 [1] = {
467 .start = IRQ_TIMER3,
468 .end = IRQ_TIMER3,
469 .flags = IORESOURCE_IRQ,
474 struct platform_device s3c_device_timer3 = {
475 .name = "s3c2410-timer",
476 .id = 3,
477 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
478 .resource = s3c_timer3_resource,
481 EXPORT_SYMBOL(s3c_device_timer3);
483 #ifdef CONFIG_CPU_S3C2440
485 /* Camif Controller */
487 static struct resource s3c_camif_resource[] = {
488 [0] = {
489 .start = S3C2440_PA_CAMIF,
490 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
491 .flags = IORESOURCE_MEM,
493 [1] = {
494 .start = IRQ_CAM,
495 .end = IRQ_CAM,
496 .flags = IORESOURCE_IRQ,
501 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
503 struct platform_device s3c_device_camif = {
504 .name = "s3c2440-camif",
505 .id = -1,
506 .num_resources = ARRAY_SIZE(s3c_camif_resource),
507 .resource = s3c_camif_resource,
508 .dev = {
509 .dma_mask = &s3c_device_camif_dmamask,
510 .coherent_dma_mask = 0xffffffffUL
514 EXPORT_SYMBOL(s3c_device_camif);
516 #endif // CONFIG_CPU_S32440