[IB] mthca: fix posting long lists of receive work requests
[linux-2.6/sactl.git] / drivers / infiniband / hw / mthca / mthca_wqe.h
blob73f1c0b9021e65b5f05bf9ee4cdd821bc6d6daee
1 /*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
32 * $Id: mthca_wqe.h 3047 2005-08-10 03:59:35Z roland $
35 #ifndef MTHCA_WQE_H
36 #define MTHCA_WQE_H
38 #include <linux/types.h>
40 enum {
41 MTHCA_NEXT_DBD = 1 << 7,
42 MTHCA_NEXT_FENCE = 1 << 6,
43 MTHCA_NEXT_CQ_UPDATE = 1 << 3,
44 MTHCA_NEXT_EVENT_GEN = 1 << 2,
45 MTHCA_NEXT_SOLICIT = 1 << 1,
47 MTHCA_MLX_VL15 = 1 << 17,
48 MTHCA_MLX_SLR = 1 << 16
51 enum {
52 MTHCA_INVAL_LKEY = 0x100,
53 MTHCA_TAVOR_MAX_WQES_PER_RECV_DB = 256
56 struct mthca_next_seg {
57 __be32 nda_op; /* [31:6] next WQE [4:0] next opcode */
58 __be32 ee_nds; /* [31:8] next EE [7] DBD [6] F [5:0] next WQE size */
59 __be32 flags; /* [3] CQ [2] Event [1] Solicit */
60 __be32 imm; /* immediate data */
63 struct mthca_tavor_ud_seg {
64 u32 reserved1;
65 __be32 lkey;
66 __be64 av_addr;
67 u32 reserved2[4];
68 __be32 dqpn;
69 __be32 qkey;
70 u32 reserved3[2];
73 struct mthca_arbel_ud_seg {
74 __be32 av[8];
75 __be32 dqpn;
76 __be32 qkey;
77 u32 reserved[2];
80 struct mthca_bind_seg {
81 __be32 flags; /* [31] Atomic [30] rem write [29] rem read */
82 u32 reserved;
83 __be32 new_rkey;
84 __be32 lkey;
85 __be64 addr;
86 __be64 length;
89 struct mthca_raddr_seg {
90 __be64 raddr;
91 __be32 rkey;
92 u32 reserved;
95 struct mthca_atomic_seg {
96 __be64 swap_add;
97 __be64 compare;
100 struct mthca_data_seg {
101 __be32 byte_count;
102 __be32 lkey;
103 __be64 addr;
106 struct mthca_mlx_seg {
107 __be32 nda_op;
108 __be32 nds;
109 __be32 flags; /* [17] VL15 [16] SLR [14:12] static rate
110 [11:8] SL [3] C [2] E */
111 __be16 rlid;
112 __be16 vcrc;
115 #endif /* MTHCA_WQE_H */