[PATCH] orinoco: Remove entry for Intel PRO/Wireless 2011B.
[linux-2.6/sactl.git] / drivers / usb / host / uhci-hcd.c
blob0d5d2545bf07ba151a40e617e52583a2a096f62b
1 /*
2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/config.h>
26 #ifdef CONFIG_USB_DEBUG
27 #define DEBUG
28 #else
29 #undef DEBUG
30 #endif
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36 #include <linux/ioport.h>
37 #include <linux/sched.h>
38 #include <linux/slab.h>
39 #include <linux/smp_lock.h>
40 #include <linux/errno.h>
41 #include <linux/unistd.h>
42 #include <linux/interrupt.h>
43 #include <linux/spinlock.h>
44 #include <linux/debugfs.h>
45 #include <linux/pm.h>
46 #include <linux/dmapool.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/usb.h>
49 #include <linux/bitops.h>
51 #include <asm/uaccess.h>
52 #include <asm/io.h>
53 #include <asm/irq.h>
54 #include <asm/system.h>
56 #include "../core/hcd.h"
57 #include "uhci-hcd.h"
60 * Version Information
62 #define DRIVER_VERSION "v2.3"
63 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
64 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
65 Alan Stern"
66 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
69 * debug = 0, no debugging messages
70 * debug = 1, dump failed URB's except for stalls
71 * debug = 2, dump all failed URB's (including stalls)
72 * show all queues in /debug/uhci/[pci_addr]
73 * debug = 3, show all TD's in URB's when dumping
75 #ifdef DEBUG
76 static int debug = 1;
77 #else
78 static int debug = 0;
79 #endif
80 module_param(debug, int, S_IRUGO | S_IWUSR);
81 MODULE_PARM_DESC(debug, "Debug level");
82 static char *errbuf;
83 #define ERRBUF_LEN (32 * 1024)
85 static kmem_cache_t *uhci_up_cachep; /* urb_priv */
87 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
88 static void wakeup_rh(struct uhci_hcd *uhci);
89 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
91 /* If a transfer is still active after this much time, turn off FSBR */
92 #define IDLE_TIMEOUT msecs_to_jiffies(50)
93 #define FSBR_DELAY msecs_to_jiffies(50)
95 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
96 /* depth first traversal. We'll do it in groups of this number of TD's */
97 /* to make sure it doesn't hog all of the bandwidth */
98 #define DEPTH_INTERVAL 5
100 static inline void restart_timer(struct uhci_hcd *uhci)
102 mod_timer(&uhci->stall_timer, jiffies + msecs_to_jiffies(100));
105 #include "uhci-hub.c"
106 #include "uhci-debug.c"
107 #include "uhci-q.c"
110 * Make sure the controller is completely inactive, unable to
111 * generate interrupts or do DMA.
113 static void reset_hc(struct uhci_hcd *uhci)
115 int port;
117 /* Turn off PIRQ enable and SMI enable. (This also turns off the
118 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
120 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
121 USBLEGSUP_RWC);
123 /* Reset the HC - this will force us to get a
124 * new notification of any already connected
125 * ports due to the virtual disconnect that it
126 * implies.
128 outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
129 mb();
130 udelay(5);
131 if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
132 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
134 /* Just to be safe, disable interrupt requests and
135 * make sure the controller is stopped.
137 outw(0, uhci->io_addr + USBINTR);
138 outw(0, uhci->io_addr + USBCMD);
140 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
141 * bits in the port status and control registers.
142 * We have to clear them by hand.
144 for (port = 0; port < uhci->rh_numports; ++port)
145 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
147 uhci->port_c_suspend = uhci->suspended_ports =
148 uhci->resuming_ports = 0;
149 uhci->rh_state = UHCI_RH_RESET;
150 uhci->is_stopped = UHCI_IS_STOPPED;
151 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
152 uhci_to_hcd(uhci)->poll_rh = 0;
156 * Last rites for a defunct/nonfunctional controller
157 * or one we don't want to use any more.
159 static void hc_died(struct uhci_hcd *uhci)
161 reset_hc(uhci);
162 uhci->hc_inaccessible = 1;
163 del_timer(&uhci->stall_timer);
167 * Initialize a controller that was newly discovered or has just been
168 * resumed. In either case we can't be sure of its previous state.
170 static void check_and_reset_hc(struct uhci_hcd *uhci)
172 u16 legsup;
173 unsigned int cmd, intr;
176 * When restarting a suspended controller, we expect all the
177 * settings to be the same as we left them:
179 * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
180 * Controller is stopped and configured with EGSM set;
181 * No interrupts enabled except possibly Resume Detect.
183 * If any of these conditions are violated we do a complete reset.
185 pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
186 if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) {
187 dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
188 __FUNCTION__, legsup);
189 goto reset_needed;
192 cmd = inw(uhci->io_addr + USBCMD);
193 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
194 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
195 __FUNCTION__, cmd);
196 goto reset_needed;
199 intr = inw(uhci->io_addr + USBINTR);
200 if (intr & (~USBINTR_RESUME)) {
201 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
202 __FUNCTION__, intr);
203 goto reset_needed;
205 return;
207 reset_needed:
208 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
209 reset_hc(uhci);
213 * Store the basic register settings needed by the controller.
215 static void configure_hc(struct uhci_hcd *uhci)
217 /* Set the frame length to the default: 1 ms exactly */
218 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
220 /* Store the frame list base address */
221 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
223 /* Set the current frame number */
224 outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
226 /* Mark controller as running before we enable interrupts */
227 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
228 mb();
230 /* Enable PIRQ */
231 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
232 USBLEGSUP_DEFAULT);
236 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
238 int port;
240 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
241 default:
242 break;
244 case PCI_VENDOR_ID_GENESYS:
245 /* Genesys Logic's GL880S controllers don't generate
246 * resume-detect interrupts.
248 return 1;
250 case PCI_VENDOR_ID_INTEL:
251 /* Some of Intel's USB controllers have a bug that causes
252 * resume-detect interrupts if any port has an over-current
253 * condition. To make matters worse, some motherboards
254 * hardwire unused USB ports' over-current inputs active!
255 * To prevent problems, we will not enable resume-detect
256 * interrupts if any ports are OC.
258 for (port = 0; port < uhci->rh_numports; ++port) {
259 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
260 USBPORTSC_OC)
261 return 1;
263 break;
265 return 0;
268 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
269 __releases(uhci->lock)
270 __acquires(uhci->lock)
272 int auto_stop;
273 int int_enable;
275 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
276 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
277 (auto_stop ? " (auto-stop)" : ""));
279 /* If we get a suspend request when we're already auto-stopped
280 * then there's nothing to do.
282 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
283 uhci->rh_state = new_state;
284 return;
287 /* Enable resume-detect interrupts if they work.
288 * Then enter Global Suspend mode, still configured.
290 int_enable = (resume_detect_interrupts_are_broken(uhci) ?
291 0 : USBINTR_RESUME);
292 outw(int_enable, uhci->io_addr + USBINTR);
293 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
294 mb();
295 udelay(5);
297 /* If we're auto-stopping then no devices have been attached
298 * for a while, so there shouldn't be any active URBs and the
299 * controller should stop after a few microseconds. Otherwise
300 * we will give the controller one frame to stop.
302 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
303 uhci->rh_state = UHCI_RH_SUSPENDING;
304 spin_unlock_irq(&uhci->lock);
305 msleep(1);
306 spin_lock_irq(&uhci->lock);
307 if (uhci->hc_inaccessible) /* Died */
308 return;
310 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
311 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
313 uhci_get_current_frame_number(uhci);
314 smp_wmb();
316 uhci->rh_state = new_state;
317 uhci->is_stopped = UHCI_IS_STOPPED;
318 del_timer(&uhci->stall_timer);
319 uhci_to_hcd(uhci)->poll_rh = !int_enable;
321 uhci_scan_schedule(uhci, NULL);
324 static void start_rh(struct uhci_hcd *uhci)
326 uhci->is_stopped = 0;
327 smp_wmb();
329 /* Mark it configured and running with a 64-byte max packet.
330 * All interrupts are enabled, even though RESUME won't do anything.
332 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
333 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
334 uhci->io_addr + USBINTR);
335 mb();
336 uhci->rh_state = UHCI_RH_RUNNING;
337 uhci_to_hcd(uhci)->poll_rh = 1;
338 restart_timer(uhci);
341 static void wakeup_rh(struct uhci_hcd *uhci)
342 __releases(uhci->lock)
343 __acquires(uhci->lock)
345 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
346 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
347 " (auto-start)" : "");
349 /* If we are auto-stopped then no devices are attached so there's
350 * no need for wakeup signals. Otherwise we send Global Resume
351 * for 20 ms.
353 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
354 uhci->rh_state = UHCI_RH_RESUMING;
355 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
356 uhci->io_addr + USBCMD);
357 spin_unlock_irq(&uhci->lock);
358 msleep(20);
359 spin_lock_irq(&uhci->lock);
360 if (uhci->hc_inaccessible) /* Died */
361 return;
363 /* End Global Resume and wait for EOP to be sent */
364 outw(USBCMD_CF, uhci->io_addr + USBCMD);
365 mb();
366 udelay(4);
367 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
368 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
371 start_rh(uhci);
373 /* Restart root hub polling */
374 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
377 static void stall_callback(unsigned long _uhci)
379 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
380 unsigned long flags;
382 spin_lock_irqsave(&uhci->lock, flags);
383 uhci_scan_schedule(uhci, NULL);
384 check_fsbr(uhci);
386 if (!uhci->is_stopped)
387 restart_timer(uhci);
388 spin_unlock_irqrestore(&uhci->lock, flags);
391 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
393 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
394 unsigned short status;
395 unsigned long flags;
398 * Read the interrupt status, and write it back to clear the
399 * interrupt cause. Contrary to the UHCI specification, the
400 * "HC Halted" status bit is persistent: it is RO, not R/WC.
402 status = inw(uhci->io_addr + USBSTS);
403 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
404 return IRQ_NONE;
405 outw(status, uhci->io_addr + USBSTS); /* Clear it */
407 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
408 if (status & USBSTS_HSE)
409 dev_err(uhci_dev(uhci), "host system error, "
410 "PCI problems?\n");
411 if (status & USBSTS_HCPE)
412 dev_err(uhci_dev(uhci), "host controller process "
413 "error, something bad happened!\n");
414 if (status & USBSTS_HCH) {
415 spin_lock_irqsave(&uhci->lock, flags);
416 if (uhci->rh_state >= UHCI_RH_RUNNING) {
417 dev_err(uhci_dev(uhci),
418 "host controller halted, "
419 "very bad!\n");
420 hc_died(uhci);
421 spin_unlock_irqrestore(&uhci->lock, flags);
422 return IRQ_HANDLED;
424 spin_unlock_irqrestore(&uhci->lock, flags);
428 if (status & USBSTS_RD)
429 usb_hcd_poll_rh_status(hcd);
431 spin_lock_irqsave(&uhci->lock, flags);
432 uhci_scan_schedule(uhci, regs);
433 spin_unlock_irqrestore(&uhci->lock, flags);
435 return IRQ_HANDLED;
439 * Store the current frame number in uhci->frame_number if the controller
440 * is runnning
442 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
444 if (!uhci->is_stopped)
445 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
449 * De-allocate all resources
451 static void release_uhci(struct uhci_hcd *uhci)
453 int i;
455 for (i = 0; i < UHCI_NUM_SKELQH; i++)
456 if (uhci->skelqh[i]) {
457 uhci_free_qh(uhci, uhci->skelqh[i]);
458 uhci->skelqh[i] = NULL;
461 if (uhci->term_td) {
462 uhci_free_td(uhci, uhci->term_td);
463 uhci->term_td = NULL;
466 if (uhci->qh_pool) {
467 dma_pool_destroy(uhci->qh_pool);
468 uhci->qh_pool = NULL;
471 if (uhci->td_pool) {
472 dma_pool_destroy(uhci->td_pool);
473 uhci->td_pool = NULL;
476 if (uhci->fl) {
477 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
478 uhci->fl, uhci->fl->dma_handle);
479 uhci->fl = NULL;
482 if (uhci->dentry) {
483 debugfs_remove(uhci->dentry);
484 uhci->dentry = NULL;
488 static int uhci_reset(struct usb_hcd *hcd)
490 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
491 unsigned io_size = (unsigned) hcd->rsrc_len;
492 int port;
494 uhci->io_addr = (unsigned long) hcd->rsrc_start;
496 /* The UHCI spec says devices must have 2 ports, and goes on to say
497 * they may have more but gives no way to determine how many there
498 * are. However according to the UHCI spec, Bit 7 of the port
499 * status and control register is always set to 1. So we try to
500 * use this to our advantage. Another common failure mode when
501 * a nonexistent register is addressed is to return all ones, so
502 * we test for that also.
504 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
505 unsigned int portstatus;
507 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
508 if (!(portstatus & 0x0080) || portstatus == 0xffff)
509 break;
511 if (debug)
512 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
514 /* Anything greater than 7 is weird so we'll ignore it. */
515 if (port > UHCI_RH_MAXCHILD) {
516 dev_info(uhci_dev(uhci), "port count misdetected? "
517 "forcing to 2 ports\n");
518 port = 2;
520 uhci->rh_numports = port;
522 /* Kick BIOS off this hardware and reset if the controller
523 * isn't already safely quiescent.
525 check_and_reset_hc(uhci);
526 return 0;
529 /* Make sure the controller is quiescent and that we're not using it
530 * any more. This is mainly for the benefit of programs which, like kexec,
531 * expect the hardware to be idle: not doing DMA or generating IRQs.
533 * This routine may be called in a damaged or failing kernel. Hence we
534 * do not acquire the spinlock before shutting down the controller.
536 static void uhci_shutdown(struct pci_dev *pdev)
538 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
540 hc_died(hcd_to_uhci(hcd));
544 * Allocate a frame list, and then setup the skeleton
546 * The hardware doesn't really know any difference
547 * in the queues, but the order does matter for the
548 * protocols higher up. The order is:
550 * - any isochronous events handled before any
551 * of the queues. We don't do that here, because
552 * we'll create the actual TD entries on demand.
553 * - The first queue is the interrupt queue.
554 * - The second queue is the control queue, split into low- and full-speed
555 * - The third queue is bulk queue.
556 * - The fourth queue is the bandwidth reclamation queue, which loops back
557 * to the full-speed control queue.
559 static int uhci_start(struct usb_hcd *hcd)
561 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
562 int retval = -EBUSY;
563 int i;
564 dma_addr_t dma_handle;
565 struct dentry *dentry;
567 hcd->uses_new_polling = 1;
568 if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM))
569 hcd->can_wakeup = 1; /* Assume it supports PME# */
571 dentry = debugfs_create_file(hcd->self.bus_name,
572 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci,
573 &uhci_debug_operations);
574 if (!dentry) {
575 dev_err(uhci_dev(uhci),
576 "couldn't create uhci debugfs entry\n");
577 retval = -ENOMEM;
578 goto err_create_debug_entry;
580 uhci->dentry = dentry;
582 uhci->fsbr = 0;
583 uhci->fsbrtimeout = 0;
585 spin_lock_init(&uhci->lock);
586 INIT_LIST_HEAD(&uhci->qh_remove_list);
588 INIT_LIST_HEAD(&uhci->td_remove_list);
590 INIT_LIST_HEAD(&uhci->urb_remove_list);
592 INIT_LIST_HEAD(&uhci->urb_list);
594 INIT_LIST_HEAD(&uhci->complete_list);
596 init_waitqueue_head(&uhci->waitqh);
598 init_timer(&uhci->stall_timer);
599 uhci->stall_timer.function = stall_callback;
600 uhci->stall_timer.data = (unsigned long) uhci;
602 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
603 &dma_handle, 0);
604 if (!uhci->fl) {
605 dev_err(uhci_dev(uhci), "unable to allocate "
606 "consistent memory for frame list\n");
607 goto err_alloc_fl;
610 memset((void *)uhci->fl, 0, sizeof(*uhci->fl));
612 uhci->fl->dma_handle = dma_handle;
614 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
615 sizeof(struct uhci_td), 16, 0);
616 if (!uhci->td_pool) {
617 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
618 goto err_create_td_pool;
621 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
622 sizeof(struct uhci_qh), 16, 0);
623 if (!uhci->qh_pool) {
624 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
625 goto err_create_qh_pool;
628 uhci->term_td = uhci_alloc_td(uhci);
629 if (!uhci->term_td) {
630 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
631 goto err_alloc_term_td;
634 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
635 uhci->skelqh[i] = uhci_alloc_qh(uhci);
636 if (!uhci->skelqh[i]) {
637 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
638 goto err_alloc_skelqh;
643 * 8 Interrupt queues; link all higher int queues to int1,
644 * then link int1 to control and control to bulk
646 uhci->skel_int128_qh->link =
647 uhci->skel_int64_qh->link =
648 uhci->skel_int32_qh->link =
649 uhci->skel_int16_qh->link =
650 uhci->skel_int8_qh->link =
651 uhci->skel_int4_qh->link =
652 uhci->skel_int2_qh->link =
653 cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
654 uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
656 uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
657 uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
658 uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
660 /* This dummy TD is to work around a bug in Intel PIIX controllers */
661 uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
662 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
663 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
665 uhci->skel_term_qh->link = UHCI_PTR_TERM;
666 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
669 * Fill the frame list: make all entries point to the proper
670 * interrupt queue.
672 * The interrupt queues will be interleaved as evenly as possible.
673 * There's not much to be done about period-1 interrupts; they have
674 * to occur in every frame. But we can schedule period-2 interrupts
675 * in odd-numbered frames, period-4 interrupts in frames congruent
676 * to 2 (mod 4), and so on. This way each frame only has two
677 * interrupt QHs, which will help spread out bandwidth utilization.
679 for (i = 0; i < UHCI_NUMFRAMES; i++) {
680 int irq;
683 * ffs (Find First bit Set) does exactly what we need:
684 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
685 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
686 * ffs > 6 => not on any high-period queue, so use
687 * skel_int1_qh = skelqh[7].
688 * Add UHCI_NUMFRAMES to insure at least one bit is set.
690 irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
691 if (irq < 0)
692 irq = 7;
694 /* Only place we don't use the frame list routines */
695 uhci->fl->frame[i] = UHCI_PTR_QH |
696 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
700 * Some architectures require a full mb() to enforce completion of
701 * the memory writes above before the I/O transfers in configure_hc().
703 mb();
705 configure_hc(uhci);
706 start_rh(uhci);
707 return 0;
710 * error exits:
712 err_alloc_skelqh:
713 for (i = 0; i < UHCI_NUM_SKELQH; i++)
714 if (uhci->skelqh[i]) {
715 uhci_free_qh(uhci, uhci->skelqh[i]);
716 uhci->skelqh[i] = NULL;
719 uhci_free_td(uhci, uhci->term_td);
720 uhci->term_td = NULL;
722 err_alloc_term_td:
723 dma_pool_destroy(uhci->qh_pool);
724 uhci->qh_pool = NULL;
726 err_create_qh_pool:
727 dma_pool_destroy(uhci->td_pool);
728 uhci->td_pool = NULL;
730 err_create_td_pool:
731 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
732 uhci->fl, uhci->fl->dma_handle);
733 uhci->fl = NULL;
735 err_alloc_fl:
736 debugfs_remove(uhci->dentry);
737 uhci->dentry = NULL;
739 err_create_debug_entry:
740 return retval;
743 static void uhci_stop(struct usb_hcd *hcd)
745 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
747 spin_lock_irq(&uhci->lock);
748 reset_hc(uhci);
749 uhci_scan_schedule(uhci, NULL);
750 spin_unlock_irq(&uhci->lock);
752 del_timer_sync(&uhci->stall_timer);
753 release_uhci(uhci);
756 #ifdef CONFIG_PM
757 static int uhci_rh_suspend(struct usb_hcd *hcd)
759 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
761 spin_lock_irq(&uhci->lock);
762 if (!uhci->hc_inaccessible) /* Not dead */
763 suspend_rh(uhci, UHCI_RH_SUSPENDED);
764 spin_unlock_irq(&uhci->lock);
765 return 0;
768 static int uhci_rh_resume(struct usb_hcd *hcd)
770 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
771 int rc = 0;
773 spin_lock_irq(&uhci->lock);
774 if (uhci->hc_inaccessible) {
775 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
776 dev_warn(uhci_dev(uhci), "HC isn't running!\n");
777 rc = -ENODEV;
779 /* Otherwise the HC is dead */
780 } else
781 wakeup_rh(uhci);
782 spin_unlock_irq(&uhci->lock);
783 return rc;
786 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
788 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
789 int rc = 0;
791 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
793 spin_lock_irq(&uhci->lock);
794 if (uhci->hc_inaccessible) /* Dead or already suspended */
795 goto done;
797 #ifndef CONFIG_USB_SUSPEND
798 /* Otherwise this would never happen */
799 suspend_rh(uhci, UHCI_RH_SUSPENDED);
800 #endif
802 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
803 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
804 hcd->state = HC_STATE_RUNNING;
805 rc = -EBUSY;
806 goto done;
809 /* All PCI host controllers are required to disable IRQ generation
810 * at the source, so we must turn off PIRQ.
812 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
813 uhci->hc_inaccessible = 1;
815 /* FIXME: Enable non-PME# remote wakeup? */
817 done:
818 spin_unlock_irq(&uhci->lock);
819 if (rc == 0)
820 del_timer_sync(&hcd->rh_timer);
821 return rc;
824 static int uhci_resume(struct usb_hcd *hcd)
826 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
828 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
830 if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
831 return 0;
832 spin_lock_irq(&uhci->lock);
834 /* FIXME: Disable non-PME# remote wakeup? */
836 uhci->hc_inaccessible = 0;
838 /* The BIOS may have changed the controller settings during a
839 * system wakeup. Check it and reconfigure to avoid problems.
841 check_and_reset_hc(uhci);
842 configure_hc(uhci);
844 #ifndef CONFIG_USB_SUSPEND
845 /* Otherwise this would never happen */
846 wakeup_rh(uhci);
847 #endif
848 if (uhci->rh_state == UHCI_RH_RESET)
849 suspend_rh(uhci, UHCI_RH_SUSPENDED);
851 spin_unlock_irq(&uhci->lock);
853 if (hcd->poll_rh)
854 usb_hcd_poll_rh_status(hcd);
855 return 0;
857 #endif
859 /* Wait until all the URBs for a particular device/endpoint are gone */
860 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
861 struct usb_host_endpoint *ep)
863 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
865 wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
868 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
870 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
871 unsigned long flags;
872 int is_stopped;
873 int frame_number;
875 /* Minimize latency by avoiding the spinlock */
876 local_irq_save(flags);
877 is_stopped = uhci->is_stopped;
878 smp_rmb();
879 frame_number = (is_stopped ? uhci->frame_number :
880 inw(uhci->io_addr + USBFRNUM));
881 local_irq_restore(flags);
882 return frame_number;
885 static const char hcd_name[] = "uhci_hcd";
887 static const struct hc_driver uhci_driver = {
888 .description = hcd_name,
889 .product_desc = "UHCI Host Controller",
890 .hcd_priv_size = sizeof(struct uhci_hcd),
892 /* Generic hardware linkage */
893 .irq = uhci_irq,
894 .flags = HCD_USB11,
896 /* Basic lifecycle operations */
897 .reset = uhci_reset,
898 .start = uhci_start,
899 #ifdef CONFIG_PM
900 .suspend = uhci_suspend,
901 .resume = uhci_resume,
902 .hub_suspend = uhci_rh_suspend,
903 .hub_resume = uhci_rh_resume,
904 #endif
905 .stop = uhci_stop,
907 .urb_enqueue = uhci_urb_enqueue,
908 .urb_dequeue = uhci_urb_dequeue,
910 .endpoint_disable = uhci_hcd_endpoint_disable,
911 .get_frame_number = uhci_hcd_get_frame_number,
913 .hub_status_data = uhci_hub_status_data,
914 .hub_control = uhci_hub_control,
917 static const struct pci_device_id uhci_pci_ids[] = { {
918 /* handle any USB UHCI controller */
919 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
920 .driver_data = (unsigned long) &uhci_driver,
921 }, { /* end: all zeroes */ }
924 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
926 static struct pci_driver uhci_pci_driver = {
927 .name = (char *)hcd_name,
928 .id_table = uhci_pci_ids,
930 .probe = usb_hcd_pci_probe,
931 .remove = usb_hcd_pci_remove,
932 .shutdown = uhci_shutdown,
934 #ifdef CONFIG_PM
935 .suspend = usb_hcd_pci_suspend,
936 .resume = usb_hcd_pci_resume,
937 #endif /* PM */
940 static int __init uhci_hcd_init(void)
942 int retval = -ENOMEM;
944 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
946 if (usb_disabled())
947 return -ENODEV;
949 if (debug) {
950 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
951 if (!errbuf)
952 goto errbuf_failed;
955 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
956 if (!uhci_debugfs_root)
957 goto debug_failed;
959 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
960 sizeof(struct urb_priv), 0, 0, NULL, NULL);
961 if (!uhci_up_cachep)
962 goto up_failed;
964 retval = pci_register_driver(&uhci_pci_driver);
965 if (retval)
966 goto init_failed;
968 return 0;
970 init_failed:
971 if (kmem_cache_destroy(uhci_up_cachep))
972 warn("not all urb_priv's were freed!");
974 up_failed:
975 debugfs_remove(uhci_debugfs_root);
977 debug_failed:
978 kfree(errbuf);
980 errbuf_failed:
982 return retval;
985 static void __exit uhci_hcd_cleanup(void)
987 pci_unregister_driver(&uhci_pci_driver);
989 if (kmem_cache_destroy(uhci_up_cachep))
990 warn("not all urb_priv's were freed!");
992 debugfs_remove(uhci_debugfs_root);
993 kfree(errbuf);
996 module_init(uhci_hcd_init);
997 module_exit(uhci_hcd_cleanup);
999 MODULE_AUTHOR(DRIVER_AUTHOR);
1000 MODULE_DESCRIPTION(DRIVER_DESC);
1001 MODULE_LICENSE("GPL");