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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/sactl.git] / sound / i2c / l3 / uda1341.c
blob9840eb43648d07e5a05a2a80c8bd3c1406d6aba3
1 /*
2 * Philips UDA1341 mixer device driver
3 * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
4 *
5 * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License.
9 *
10 * History:
11 *
12 * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
13 * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
14 * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
15 * features support
16 * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
17 * 2002-05-12 Tomas Kasparek another code cleanup
18 */
19
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/types.h>
23 #include <linux/slab.h>
24 #include <linux/errno.h>
25 #include <linux/ioctl.h>
26
27 #include <asm/uaccess.h>
28
29 #include <sound/core.h>
30 #include <sound/control.h>
31 #include <sound/initval.h>
32 #include <sound/info.h>
33
34 #include <linux/l3/l3.h>
35
36 #include <sound/uda1341.h>
37
38 /* {{{ HW regs definition */
39
40 #define STAT0 0x00
41 #define STAT1 0x80
42 #define STAT_MASK 0x80
43
44 #define DATA0_0 0x00
45 #define DATA0_1 0x40
46 #define DATA0_2 0x80
47 #define DATA_MASK 0xc0
48
49 #define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
50 #define IS_DATA1(x) ((x) == data1)
51 #define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
52 #define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
53
54 /* }}} */
55
56
57 static const char *peak_names[] = {
58 "before",
59 "after",
60 };
61
62 static const char *filter_names[] = {
63 "flat",
64 "min",
65 "min",
66 "max",
67 };
68
69 static const char *mixer_names[] = {
70 "double differential",
71 "input channel 1 (line in)",
72 "input channel 2 (microphone)",
73 "digital mixer",
74 };
75
76 static const char *deemp_names[] = {
77 "none",
78 "32 kHz",
79 "44.1 kHz",
80 "48 kHz",
81 };
82
83 enum uda1341_regs_names {
84 stat0,
85 stat1,
86 data0_0,
87 data0_1,
88 data0_2,
89 data1,
90 ext0,
91 ext1,
92 ext2,
93 empty,
94 ext4,
95 ext5,
96 ext6,
97 uda1341_reg_last,
98 };
99
100 static const char *uda1341_reg_names[] = {
101 "stat 0 ",
102 "stat 1 ",
103 "data 00",
104 "data 01",
105 "data 02",
106 "data 1 ",
107 "ext 0",
108 "ext 1",
109 "ext 2",
110 "empty",
111 "ext 4",
112 "ext 5",
113 "ext 6",
114 };
115
116 static const int uda1341_enum_items[] = {
117 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
118 2, //peak - before/after
119 4, //deemp - none/32/44.1/48
120 0,
121 4, //filter - flat/min/min/max
122 0, 0, 0,
123 4, //mixer - differ/line/mic/mixer
124 0, 0, 0, 0, 0,
125 };
126
127 static const char ** uda1341_enum_names[] = {
128 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
129 peak_names, //peak - before/after
130 deemp_names, //deemp - none/32/44.1/48
131 NULL,
132 filter_names, //filter - flat/min/min/max
133 NULL, NULL, NULL,
134 mixer_names, //mixer - differ/line/mic/mixer
135 NULL, NULL, NULL, NULL, NULL,
136 };
137
138 typedef int uda1341_cfg[CMD_LAST];
139
140 struct uda1341 {
141 int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
142 int (*read) (struct l3_client *uda1341, unsigned short reg);
143 unsigned char regs[uda1341_reg_last];
144 int active;
145 spinlock_t reg_lock;
146 struct snd_card *card;
147 uda1341_cfg cfg;
148 #ifdef CONFIG_PM
149 unsigned char suspend_regs[uda1341_reg_last];
150 uda1341_cfg suspend_cfg;
151 #endif
152 };
153
154 /* transfer 8bit integer into string with binary representation */
155 static void int2str_bin8(uint8_t val, char *buf)
156 {
157 const int size = sizeof(val) * 8;
158 int i;
159
160 for (i= 0; i < size; i++){
161 *(buf++) = (val >> (size - 1)) ? '1' : '0';
162 val <<= 1;
163 }
164 *buf = '\0'; //end the string with zero
165 }
166
167 /* {{{ HW manipulation routines */
168
169 static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
170 {
171 struct uda1341 *uda = clnt->driver_data;
172 unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
173 int err = 0;
174
175 uda->regs[reg] = val;
176
177 if (uda->active) {
178 if (IS_DATA0(reg)) {
179 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
180 } else if (IS_DATA1(reg)) {
181 err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
182 } else if (IS_STATUS(reg)) {
183 err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
184 } else if (IS_EXTEND(reg)) {
185 buf[0] |= (reg - ext0) & 0x7; //EXT address
186 buf[1] |= val; //EXT data
187 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
188 }
189 } else
190 printk(KERN_ERR "UDA1341 codec not active!\n");
191 return err;
192 }
193
194 static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
195 {
196 unsigned char val;
197 int err;
198
199 err = l3_read(clnt, reg, &val, 1);
200 if (err == 1)
201 // use just 6bits - the rest is address of the reg
202 return val & 63;
203 return err < 0 ? err : -EIO;
204 }
205
206 static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
207 {
208 return reg < uda1341_reg_last;
209 }
210
211 static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
212 unsigned short mask, unsigned short shift,
213 unsigned short value, int flush)
214 {
215 int change;
216 unsigned short old, new;
217 struct uda1341 *uda = clnt->driver_data;
218
219 #if 0
220 printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
221 uda1341_reg_names[reg], mask, shift, value);
222 #endif
223
224 if (!snd_uda1341_valid_reg(clnt, reg))
225 return -EINVAL;
226 spin_lock(&uda->reg_lock);
227 old = uda->regs[reg];
228 new = (old & ~(mask << shift)) | (value << shift);
229 change = old != new;
230 if (change) {
231 if (flush) uda->write(clnt, reg, new);
232 uda->regs[reg] = new;
233 }
234 spin_unlock(&uda->reg_lock);
235 return change;
236 }
237
238 static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
239 unsigned short value, int flush)
240 {
241 struct uda1341 *uda = clnt->driver_data;
242 int ret = 0;
243 #ifdef CONFIG_PM
244 int reg;
245 #endif
246
247 #if 0
248 printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
249 #endif
250
251 uda->cfg[what] = value;
252
253 switch(what) {
254 case CMD_RESET:
255 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
256 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
257 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
258 uda->cfg[CMD_RESET]=0;
259 break;
260 case CMD_FS:
261 ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
262 break;
263 case CMD_FORMAT:
264 ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
265 break;
266 case CMD_OGAIN:
267 ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
268 break;
269 case CMD_IGAIN:
270 ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
271 break;
272 case CMD_DAC:
273 ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
274 break;
275 case CMD_ADC:
276 ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
277 break;
278 case CMD_VOLUME:
279 ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
280 break;
281 case CMD_BASS:
282 ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
283 break;
284 case CMD_TREBBLE:
285 ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
286 break;
287 case CMD_PEAK:
288 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
289 break;
290 case CMD_DEEMP:
291 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
292 break;
293 case CMD_MUTE:
294 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
295 break;
296 case CMD_FILTER:
297 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
298 break;
299 case CMD_CH1:
300 ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
301 break;
302 case CMD_CH2:
303 ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
304 break;
305 case CMD_MIC:
306 ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
307 break;
308 case CMD_MIXER:
309 ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
310 break;
311 case CMD_AGC:
312 ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
313 break;
314 case CMD_IG:
315 ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
316 ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
317 break;
318 case CMD_AGC_TIME:
319 ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
320 break;
321 case CMD_AGC_LEVEL:
322 ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
323 break;
324 #ifdef CONFIG_PM
325 case CMD_SUSPEND:
326 for (reg = stat0; reg < uda1341_reg_last; reg++)
327 uda->suspend_regs[reg] = uda->regs[reg];
328 for (reg = 0; reg < CMD_LAST; reg++)
329 uda->suspend_cfg[reg] = uda->cfg[reg];
330 break;
331 case CMD_RESUME:
332 for (reg = stat0; reg < uda1341_reg_last; reg++)
333 snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
334 for (reg = 0; reg < CMD_LAST; reg++)
335 uda->cfg[reg] = uda->suspend_cfg[reg];
336 break;
337 #endif
338 default:
339 ret = -EINVAL;
340 break;
341 }
342
343 if (!uda->active)
344 printk(KERN_ERR "UDA1341 codec not active!\n");
345 return ret;
346 }
347
348 /* }}} */
349
350 /* {{{ Proc interface */
351 #ifdef CONFIG_PROC_FS
352
353 static const char *format_names[] = {
354 "I2S-bus",
355 "LSB 16bits",
356 "LSB 18bits",
357 "LSB 20bits",
358 "MSB",
359 "in LSB 16bits/out MSB",
360 "in LSB 18bits/out MSB",
361 "in LSB 20bits/out MSB",
362 };
363
364 static const char *fs_names[] = {
365 "512*fs",
366 "384*fs",
367 "256*fs",
368 "Unused - bad value!",
369 };
370
371 static const char* bass_values[][16] = {
372 {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
373 "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
374 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
375 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
376 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
377 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
378 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
379 "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
380 };
381
382 static const char *mic_sens_value[] = {
383 "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
384 };
385
386 static const unsigned short AGC_atime[] = {
387 11, 16, 11, 16, 21, 11, 16, 21,
388 };
389
390 static const unsigned short AGC_dtime[] = {
391 100, 100, 200, 200, 200, 400, 400, 400,
392 };
393
394 static const char *AGC_level[] = {
395 "-9.0", "-11.5", "-15.0", "-17.5",
396 };
397
398 static const char *ig_small_value[] = {
399 "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
400 };
401
402 /*
403 * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
404 *
405 * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
406 * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
407 * [61]=-2.78, [62] = -1.48, [63] = 0.0
408 * I tried to compute it, but using but even using logarithm with base either 10 or 2
409 * i was'n able to get values in the table from the formula. So I constructed another
410 * formula (see above) to interpolate the values as good as possible. If there is some
411 * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
412 * UDA1341TS datasheet is available at:
413 * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
414 */
415 static const char *peak_value[] = {
416 "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
417 "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
418 "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
419 "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
420 "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
421 "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
422 "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
423 "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
424 "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
425 };
426
427 static void snd_uda1341_proc_read(struct snd_info_entry *entry,
428 struct snd_info_buffer *buffer)
429 {
430 struct l3_client *clnt = entry->private_data;
431 struct uda1341 *uda = clnt->driver_data;
432 int peak;
433
434 peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
435 if (peak < 0)
436 peak = 0;
437
438 snd_iprintf(buffer, "%s\n\n", uda->card->longname);
439
440 // for information about computed values see UDA1341TS datasheet pages 15 - 21
441 snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
442 snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
443 snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
444 snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
445
446 snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
447 snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
448 snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
449 snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
450 snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
451
452 snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
453 snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
454 snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
455 snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
456
457 snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
458
459 if (uda->cfg[CMD_VOLUME] == 0)
460 snd_iprintf(buffer, "Volume : 0 dB\n");
461 else if (uda->cfg[CMD_VOLUME] < 62)
462 snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
463 else
464 snd_iprintf(buffer, "Volume : -INF dB\n");
465 snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
466 snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
467 snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
468 snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
469 snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
470
471
472 if(uda->cfg[CMD_CH1] < 31)
473 snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
474 ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
475 uda->cfg[CMD_CH1] & 1 ? '5' : '0');
476 else
477 snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
478 if(uda->cfg[CMD_CH2] < 31)
479 snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
480 ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
481 uda->cfg[CMD_CH2] & 1 ? '5' : '0');
482 else
483 snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
484
485 if(uda->cfg[CMD_IG] > 5)
486 snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
487 (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
488 else
489 snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
490 }
491
492 static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
493 struct snd_info_buffer *buffer)
494 {
495 struct l3_client *clnt = entry->private_data;
496 struct uda1341 *uda = clnt->driver_data;
497 int reg;
498 char buf[12];
499
500 for (reg = 0; reg < uda1341_reg_last; reg ++) {
501 if (reg == empty)
502 continue;
503 int2str_bin8(uda->regs[reg], buf);
504 snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
505 }
506
507 int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
508 snd_iprintf(buffer, "DATA1 = %s\n", buf);
509 }
510 #endif /* CONFIG_PROC_FS */
511
512 static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
513 {
514 struct snd_info_entry *entry;
515
516 if (! snd_card_proc_new(card, "uda1341", &entry))
517 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read);
518 if (! snd_card_proc_new(card, "uda1341-regs", &entry))
519 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read);
520 }
521
522 /* }}} */
523
524 /* {{{ Mixer controls setting */
525
526 /* {{{ UDA1341 single functions */
527
528 #define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
529 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
530 .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
531 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
532 }
533
534 static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_info *uinfo)
536 {
537 int mask = (kcontrol->private_value >> 12) & 63;
538
539 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
540 uinfo->count = 1;
541 uinfo->value.integer.min = 0;
542 uinfo->value.integer.max = mask;
543 return 0;
544 }
545
546 static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol)
548 {
549 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
550 struct uda1341 *uda = clnt->driver_data;
551 int where = kcontrol->private_value & 31;
552 int mask = (kcontrol->private_value >> 12) & 63;
553 int invert = (kcontrol->private_value >> 18) & 1;
554
555 ucontrol->value.integer.value[0] = uda->cfg[where];
556 if (invert)
557 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
558
559 return 0;
560 }
561
562 static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564 {
565 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
566 struct uda1341 *uda = clnt->driver_data;
567 int where = kcontrol->private_value & 31;
568 int reg = (kcontrol->private_value >> 5) & 15;
569 int shift = (kcontrol->private_value >> 9) & 7;
570 int mask = (kcontrol->private_value >> 12) & 63;
571 int invert = (kcontrol->private_value >> 18) & 1;
572 unsigned short val;
573
574 val = (ucontrol->value.integer.value[0] & mask);
575 if (invert)
576 val = mask - val;
577
578 uda->cfg[where] = val;
579 return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
580 }
581
582 /* }}} */
583
584 /* {{{ UDA1341 enum functions */
585
586 #define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
587 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
588 .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
589 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
590 }
591
592 static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
593 struct snd_ctl_elem_info *uinfo)
594 {
595 int where = kcontrol->private_value & 31;
596 const char **texts;
597
598 // this register we don't handle this way
599 if (!uda1341_enum_items[where])
600 return -EINVAL;
601
602 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
603 uinfo->count = 1;
604 uinfo->value.enumerated.items = uda1341_enum_items[where];
605
606 if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
607 uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
608
609 texts = uda1341_enum_names[where];
610 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
611 return 0;
612 }
613
614 static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616 {
617 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
618 struct uda1341 *uda = clnt->driver_data;
619 int where = kcontrol->private_value & 31;
620
621 ucontrol->value.enumerated.item[0] = uda->cfg[where];
622 return 0;
623 }
624
625 static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_value *ucontrol)
627 {
628 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
629 struct uda1341 *uda = clnt->driver_data;
630 int where = kcontrol->private_value & 31;
631 int reg = (kcontrol->private_value >> 5) & 15;
632 int shift = (kcontrol->private_value >> 9) & 7;
633 int mask = (kcontrol->private_value >> 12) & 63;
634
635 uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
636
637 return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
638 }
639
640 /* }}} */
641
642 /* {{{ UDA1341 2regs functions */
643
644 #define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
645 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
646 .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
647 .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
648 (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
649 }
650
651
652 static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_info *uinfo)
654 {
655 int mask_1 = (kcontrol->private_value >> 19) & 63;
656 int mask_2 = (kcontrol->private_value >> 25) & 63;
657 int mask;
658
659 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
660 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
661 uinfo->count = 1;
662 uinfo->value.integer.min = 0;
663 uinfo->value.integer.max = mask;
664 return 0;
665 }
666
667 static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669 {
670 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
671 struct uda1341 *uda = clnt->driver_data;
672 int where = kcontrol->private_value & 31;
673 int mask_1 = (kcontrol->private_value >> 19) & 63;
674 int mask_2 = (kcontrol->private_value >> 25) & 63;
675 int invert = (kcontrol->private_value >> 31) & 1;
676 int mask;
677
678 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
679
680 ucontrol->value.integer.value[0] = uda->cfg[where];
681 if (invert)
682 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
683 return 0;
684 }
685
686 static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
687 struct snd_ctl_elem_value *ucontrol)
688 {
689 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
690 struct uda1341 *uda = clnt->driver_data;
691 int where = kcontrol->private_value & 31;
692 int reg_1 = (kcontrol->private_value >> 5) & 15;
693 int reg_2 = (kcontrol->private_value >> 9) & 15;
694 int shift_1 = (kcontrol->private_value >> 13) & 7;
695 int shift_2 = (kcontrol->private_value >> 16) & 7;
696 int mask_1 = (kcontrol->private_value >> 19) & 63;
697 int mask_2 = (kcontrol->private_value >> 25) & 63;
698 int invert = (kcontrol->private_value >> 31) & 1;
699 int mask;
700 unsigned short val1, val2, val;
701
702 val = ucontrol->value.integer.value[0];
703
704 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
705
706 val1 = val & mask_1;
707 val2 = (val / (mask_1 + 1)) & mask_2;
708
709 if (invert) {
710 val1 = mask_1 - val1;
711 val2 = mask_2 - val2;
712 }
713
714 uda->cfg[where] = invert ? mask - val : val;
715
716 //FIXME - return value
717 snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
718 return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
719 }
720
721 /* }}} */
722
723 static struct snd_kcontrol_new snd_uda1341_controls[] = {
724 UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
725 UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
726
727 UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
728 UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
729
730 UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
731 UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
732
733 UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
734 UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
735
736 UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
737
738 UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
739 UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
740 UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
741
742 UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
743 UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
744
745 UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
746 UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
747 UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
748 UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
749
750 UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
751 };
752
753 static void uda1341_free(struct l3_client *clnt)
754 {
755 l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
756 kfree(clnt);
757 }
758
759 static int uda1341_dev_free(struct snd_device *device)
760 {
761 struct l3_client *clnt = device->device_data;
762 uda1341_free(clnt);
763 return 0;
764 }
765
766 int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
767 {
768 static struct snd_device_ops ops = {
769 .dev_free = uda1341_dev_free,
770 };
771 struct l3_client *clnt;
772 int idx, err;
773
774 if (snd_BUG_ON(!card))
775 return -EINVAL;
776
777 clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
778 if (clnt == NULL)
779 return -ENOMEM;
780
781 if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
782 kfree(clnt);
783 return err;
784 }
785
786 for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
787 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
788 uda1341_free(clnt);
789 return err;
790 }
791 }
792
793 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
794 uda1341_free(clnt);
795 return err;
796 }
797
798 *clntp = clnt;
799 strcpy(card->mixername, "UDA1341TS Mixer");
800 ((struct uda1341 *)clnt->driver_data)->card = card;
801
802 snd_uda1341_proc_init(card, clnt);
803
804 return 0;
805 }
806
807 /* }}} */
808
809 /* {{{ L3 operations */
810
811 static int uda1341_attach(struct l3_client *clnt)
812 {
813 struct uda1341 *uda;
814
815 uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
816 if (!uda)
817 return -ENOMEM;
818
819 /* init fixed parts of my copy of registers */
820 uda->regs[stat0] = STAT0;
821 uda->regs[stat1] = STAT1;
822
823 uda->regs[data0_0] = DATA0_0;
824 uda->regs[data0_1] = DATA0_1;
825 uda->regs[data0_2] = DATA0_2;
826
827 uda->write = snd_uda1341_codec_write;
828 uda->read = snd_uda1341_codec_read;
829
830 spin_lock_init(&uda->reg_lock);
831
832 clnt->driver_data = uda;
833 return 0;
834 }
835
836 static void uda1341_detach(struct l3_client *clnt)
837 {
838 kfree(clnt->driver_data);
839 }
840
841 static int
842 uda1341_command(struct l3_client *clnt, int cmd, void *arg)
843 {
844 if (cmd != CMD_READ_REG)
845 return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
846
847 return snd_uda1341_codec_read(clnt, (int) arg);
848 }
849
850 static int uda1341_open(struct l3_client *clnt)
851 {
852 struct uda1341 *uda = clnt->driver_data;
853
854 uda->active = 1;
855
856 /* init default configuration */
857 snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
858 snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
859 snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
860 snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
861 snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
862 snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
863 snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
864 snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
865 snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
866 snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
867 snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
868 snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
869 //at this moment should be QMUTED by h3600_audio_init
870 snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
871 snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
872 snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
873 snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
874 snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
875 snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
876 snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
877 snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
878 snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
879 snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
880
881 return 0;
882 }
883
884 static void uda1341_close(struct l3_client *clnt)
885 {
886 struct uda1341 *uda = clnt->driver_data;
887
888 uda->active = 0;
889 }
890
891 /* }}} */
892
893 /* {{{ Module and L3 initialization */
894
895 static struct l3_ops uda1341_ops = {
896 .open = uda1341_open,
897 .command = uda1341_command,
898 .close = uda1341_close,
899 };
900
901 static struct l3_driver uda1341_driver = {
902 .name = UDA1341_ALSA_NAME,
903 .attach_client = uda1341_attach,
904 .detach_client = uda1341_detach,
905 .ops = &uda1341_ops,
906 .owner = THIS_MODULE,
907 };
908
909 static int __init uda1341_init(void)
910 {
911 return l3_add_driver(&uda1341_driver);
912 }
913
914 static void __exit uda1341_exit(void)
915 {
916 l3_del_driver(&uda1341_driver);
917 }
918
919 module_init(uda1341_init);
920 module_exit(uda1341_exit);
921
922 MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
923 MODULE_LICENSE("GPL");
924 MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
925 MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
926
927 EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
928
929 /* }}} */
930
931 /*
932 * Local variables:
933 * indent-tabs-mode: t
934 * End:
935 */
SocketAccessConTroL development