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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/sactl.git] / drivers / net / cris / eth_v10.c
blobc9806c58b2fde2644505fde1409dbf6af24674fd
1 /*
2 * e100net.c: A network driver for the ETRAX 100LX network controller.
3 *
4 * Copyright (c) 1998-2002 Axis Communications AB.
5 *
6 * The outline of this driver comes from skeleton.c.
7 *
8 */
9
10
11 #include <linux/module.h>
12
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/types.h>
16 #include <linux/fcntl.h>
17 #include <linux/interrupt.h>
18 #include <linux/ptrace.h>
19 #include <linux/ioport.h>
20 #include <linux/in.h>
21 #include <linux/slab.h>
22 #include <linux/string.h>
23 #include <linux/spinlock.h>
24 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/bitops.h>
27
28 #include <linux/if.h>
29 #include <linux/mii.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/ethtool.h>
34
35 #include <arch/svinto.h>/* DMA and register descriptions */
36 #include <asm/io.h> /* CRIS_LED_* I/O functions */
37 #include <asm/irq.h>
38 #include <asm/dma.h>
39 #include <asm/system.h>
40 #include <asm/ethernet.h>
41 #include <asm/cache.h>
42 #include <arch/io_interface_mux.h>
43
44 //#define ETHDEBUG
45 #define D(x)
46
47 /*
48 * The name of the card. Is used for messages and in the requests for
49 * io regions, irqs and dma channels
50 */
51
52 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
53
54 /* A default ethernet address. Highlevel SW will set the real one later */
55
56 static struct sockaddr default_mac = {
57 0,
58 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
59 };
60
61 /* Information that need to be kept for each board. */
62 struct net_local {
63 struct net_device_stats stats;
64 struct mii_if_info mii_if;
65
66 /* Tx control lock. This protects the transmit buffer ring
67 * state along with the "tx full" state of the driver. This
68 * means all netif_queue flow control actions are protected
69 * by this lock as well.
70 */
71 spinlock_t lock;
72
73 spinlock_t led_lock; /* Protect LED state */
74 spinlock_t transceiver_lock; /* Protect transceiver state. */
75 };
76
77 typedef struct etrax_eth_descr
78 {
79 etrax_dma_descr descr;
80 struct sk_buff* skb;
81 } etrax_eth_descr;
82
83 /* Some transceivers requires special handling */
84 struct transceiver_ops
85 {
86 unsigned int oui;
87 void (*check_speed)(struct net_device* dev);
88 void (*check_duplex)(struct net_device* dev);
89 };
90
91 /* Duplex settings */
92 enum duplex
93 {
94 half,
95 full,
96 autoneg
97 };
98
99 /* Dma descriptors etc. */
100
101 #define MAX_MEDIA_DATA_SIZE 1522
102
103 #define MIN_PACKET_LEN 46
104 #define ETHER_HEAD_LEN 14
105
106 /*
107 ** MDIO constants.
108 */
109 #define MDIO_START 0x1
110 #define MDIO_READ 0x2
111 #define MDIO_WRITE 0x1
112 #define MDIO_PREAMBLE 0xfffffffful
113
114 /* Broadcom specific */
115 #define MDIO_AUX_CTRL_STATUS_REG 0x18
116 #define MDIO_BC_FULL_DUPLEX_IND 0x1
117 #define MDIO_BC_SPEED 0x2
118
119 /* TDK specific */
120 #define MDIO_TDK_DIAGNOSTIC_REG 18
121 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
122 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
123
124 /*Intel LXT972A specific*/
125 #define MDIO_INT_STATUS_REG_2 0x0011
126 #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
127 #define MDIO_INT_SPEED (1 << 14)
128
129 /* Network flash constants */
130 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
131 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
132 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
133 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
134
135 #define NO_NETWORK_ACTIVITY 0
136 #define NETWORK_ACTIVITY 1
137
138 #define NBR_OF_RX_DESC 32
139 #define NBR_OF_TX_DESC 16
140
141 /* Large packets are sent directly to upper layers while small packets are */
142 /* copied (to reduce memory waste). The following constant decides the breakpoint */
143 #define RX_COPYBREAK 256
144
145 /* Due to a chip bug we need to flush the cache when descriptors are returned */
146 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
147 /* The following constant determines the number of descriptors to return. */
148 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
149
150 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
151
152 /* Define some macros to access ETRAX 100 registers */
153 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
154 IO_FIELD_(reg##_, field##_, val)
155 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
156 IO_STATE_(reg##_, field##_, _##val)
157
158 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
159 to be processed */
160 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
161
162 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
163
164 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
165 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
166 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
167 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
168
169 static unsigned int network_rec_config_shadow = 0;
170
171 static unsigned int network_tr_ctrl_shadow = 0;
172
173 /* Network speed indication. */
174 static DEFINE_TIMER(speed_timer, NULL, 0, 0);
175 static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
176 static int current_speed; /* Speed read from transceiver */
177 static int current_speed_selection; /* Speed selected by user */
178 static unsigned long led_next_time;
179 static int led_active;
180 static int rx_queue_len;
181
182 /* Duplex */
183 static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
184 static int full_duplex;
185 static enum duplex current_duplex;
186
187 /* Index to functions, as function prototypes. */
188
189 static int etrax_ethernet_init(void);
190
191 static int e100_open(struct net_device *dev);
192 static int e100_set_mac_address(struct net_device *dev, void *addr);
193 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
194 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
195 static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
196 static void e100_rx(struct net_device *dev);
197 static int e100_close(struct net_device *dev);
198 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
199 static int e100_set_config(struct net_device* dev, struct ifmap* map);
200 static void e100_tx_timeout(struct net_device *dev);
201 static struct net_device_stats *e100_get_stats(struct net_device *dev);
202 static void set_multicast_list(struct net_device *dev);
203 static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
204 static void update_rx_stats(struct net_device_stats *);
205 static void update_tx_stats(struct net_device_stats *);
206 static int e100_probe_transceiver(struct net_device* dev);
207
208 static void e100_check_speed(unsigned long priv);
209 static void e100_set_speed(struct net_device* dev, unsigned long speed);
210 static void e100_check_duplex(unsigned long priv);
211 static void e100_set_duplex(struct net_device* dev, enum duplex);
212 static void e100_negotiate(struct net_device* dev);
213
214 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
215 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
216
217 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
218 static void e100_send_mdio_bit(unsigned char bit);
219 static unsigned char e100_receive_mdio_bit(void);
220 static void e100_reset_transceiver(struct net_device* net);
221
222 static void e100_clear_network_leds(unsigned long dummy);
223 static void e100_set_network_leds(int active);
224
225 static const struct ethtool_ops e100_ethtool_ops;
226 #if defined(CONFIG_ETRAX_NO_PHY)
227 static void dummy_check_speed(struct net_device* dev);
228 static void dummy_check_duplex(struct net_device* dev);
229 #else
230 static void broadcom_check_speed(struct net_device* dev);
231 static void broadcom_check_duplex(struct net_device* dev);
232 static void tdk_check_speed(struct net_device* dev);
233 static void tdk_check_duplex(struct net_device* dev);
234 static void intel_check_speed(struct net_device* dev);
235 static void intel_check_duplex(struct net_device* dev);
236 static void generic_check_speed(struct net_device* dev);
237 static void generic_check_duplex(struct net_device* dev);
238 #endif
239 #ifdef CONFIG_NET_POLL_CONTROLLER
240 static void e100_netpoll(struct net_device* dev);
241 #endif
242
243 static int autoneg_normal = 1;
244
245 struct transceiver_ops transceivers[] =
246 {
247 #if defined(CONFIG_ETRAX_NO_PHY)
248 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
249 #else
250 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
251 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
252 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
253 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
254 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
255 #endif
256 };
257
258 struct transceiver_ops* transceiver = &transceivers[0];
259
260 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
261
262 /*
263 * Check for a network adaptor of this type, and return '0' if one exists.
264 * If dev->base_addr == 0, probe all likely locations.
265 * If dev->base_addr == 1, always return failure.
266 * If dev->base_addr == 2, allocate space for the device and return success
267 * (detachable devices only).
268 */
269
270 static int __init
271 etrax_ethernet_init(void)
272 {
273 struct net_device *dev;
274 struct net_local* np;
275 int i, err;
276
277 printk(KERN_INFO
278 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
279
280 if (cris_request_io_interface(if_eth, cardname)) {
281 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
282 return -EBUSY;
283 }
284
285 dev = alloc_etherdev(sizeof(struct net_local));
286 if (!dev)
287 return -ENOMEM;
288
289 np = netdev_priv(dev);
290
291 /* we do our own locking */
292 dev->features |= NETIF_F_LLTX;
293
294 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
295
296 /* now setup our etrax specific stuff */
297
298 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
299 dev->dma = NETWORK_RX_DMA_NBR;
300
301 /* fill in our handlers so the network layer can talk to us in the future */
302
303 dev->open = e100_open;
304 dev->hard_start_xmit = e100_send_packet;
305 dev->stop = e100_close;
306 dev->get_stats = e100_get_stats;
307 dev->set_multicast_list = set_multicast_list;
308 dev->set_mac_address = e100_set_mac_address;
309 dev->ethtool_ops = &e100_ethtool_ops;
310 dev->do_ioctl = e100_ioctl;
311 dev->set_config = e100_set_config;
312 dev->tx_timeout = e100_tx_timeout;
313 #ifdef CONFIG_NET_POLL_CONTROLLER
314 dev->poll_controller = e100_netpoll;
315 #endif
316
317 spin_lock_init(&np->lock);
318 spin_lock_init(&np->led_lock);
319 spin_lock_init(&np->transceiver_lock);
320
321 /* Initialise the list of Etrax DMA-descriptors */
322
323 /* Initialise receive descriptors */
324
325 for (i = 0; i < NBR_OF_RX_DESC; i++) {
326 /* Allocate two extra cachelines to make sure that buffer used
327 * by DMA does not share cacheline with any other data (to
328 * avoid cache bug)
329 */
330 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
331 if (!RxDescList[i].skb)
332 return -ENOMEM;
333 RxDescList[i].descr.ctrl = 0;
334 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
335 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
336 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
337 RxDescList[i].descr.status = 0;
338 RxDescList[i].descr.hw_len = 0;
339 prepare_rx_descriptor(&RxDescList[i].descr);
340 }
341
342 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
343 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
344 rx_queue_len = 0;
345
346 /* Initialize transmit descriptors */
347 for (i = 0; i < NBR_OF_TX_DESC; i++) {
348 TxDescList[i].descr.ctrl = 0;
349 TxDescList[i].descr.sw_len = 0;
350 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
351 TxDescList[i].descr.buf = 0;
352 TxDescList[i].descr.status = 0;
353 TxDescList[i].descr.hw_len = 0;
354 TxDescList[i].skb = 0;
355 }
356
357 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
358 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
359
360 /* Initialise initial pointers */
361
362 myNextRxDesc = &RxDescList[0];
363 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
364 myFirstTxDesc = &TxDescList[0];
365 myNextTxDesc = &TxDescList[0];
366 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
367
368 /* Register device */
369 err = register_netdev(dev);
370 if (err) {
371 free_netdev(dev);
372 return err;
373 }
374
375 /* set the default MAC address */
376
377 e100_set_mac_address(dev, &default_mac);
378
379 /* Initialize speed indicator stuff. */
380
381 current_speed = 10;
382 current_speed_selection = 0; /* Auto */
383 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
384 speed_timer.data = (unsigned long)dev;
385 speed_timer.function = e100_check_speed;
386
387 clear_led_timer.function = e100_clear_network_leds;
388 clear_led_timer.data = (unsigned long)dev;
389
390 full_duplex = 0;
391 current_duplex = autoneg;
392 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
393 duplex_timer.data = (unsigned long)dev;
394 duplex_timer.function = e100_check_duplex;
395
396 /* Initialize mii interface */
397 np->mii_if.phy_id_mask = 0x1f;
398 np->mii_if.reg_num_mask = 0x1f;
399 np->mii_if.dev = dev;
400 np->mii_if.mdio_read = e100_get_mdio_reg;
401 np->mii_if.mdio_write = e100_set_mdio_reg;
402
403 /* Initialize group address registers to make sure that no */
404 /* unwanted addresses are matched */
405 *R_NETWORK_GA_0 = 0x00000000;
406 *R_NETWORK_GA_1 = 0x00000000;
407
408 /* Initialize next time the led can flash */
409 led_next_time = jiffies;
410 return 0;
411 }
412
413 /* set MAC address of the interface. called from the core after a
414 * SIOCSIFADDR ioctl, and from the bootup above.
415 */
416
417 static int
418 e100_set_mac_address(struct net_device *dev, void *p)
419 {
420 struct net_local *np = netdev_priv(dev);
421 struct sockaddr *addr = p;
422
423 spin_lock(&np->lock); /* preemption protection */
424
425 /* remember it */
426
427 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
428
429 /* Write it to the hardware.
430 * Note the way the address is wrapped:
431 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
432 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
433 */
434
435 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
436 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
437 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
438 *R_NETWORK_SA_2 = 0;
439
440 /* show it in the log as well */
441
442 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
443
444 spin_unlock(&np->lock);
445
446 return 0;
447 }
448
449 /*
450 * Open/initialize the board. This is called (in the current kernel)
451 * sometime after booting when the 'ifconfig' program is run.
452 *
453 * This routine should set everything up anew at each open, even
454 * registers that "should" only need to be set once at boot, so that
455 * there is non-reboot way to recover if something goes wrong.
456 */
457
458 static int
459 e100_open(struct net_device *dev)
460 {
461 unsigned long flags;
462
463 /* enable the MDIO output pin */
464
465 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
466
467 *R_IRQ_MASK0_CLR =
468 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
469 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
470 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
471
472 /* clear dma0 and 1 eop and descr irq masks */
473 *R_IRQ_MASK2_CLR =
474 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
475 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
476 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
477 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
478
479 /* Reset and wait for the DMA channels */
480
481 RESET_DMA(NETWORK_TX_DMA_NBR);
482 RESET_DMA(NETWORK_RX_DMA_NBR);
483 WAIT_DMA(NETWORK_TX_DMA_NBR);
484 WAIT_DMA(NETWORK_RX_DMA_NBR);
485
486 /* Initialise the etrax network controller */
487
488 /* allocate the irq corresponding to the receiving DMA */
489
490 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
491 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
492 goto grace_exit0;
493 }
494
495 /* allocate the irq corresponding to the transmitting DMA */
496
497 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
498 cardname, (void *)dev)) {
499 goto grace_exit1;
500 }
501
502 /* allocate the irq corresponding to the network errors etc */
503
504 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
505 cardname, (void *)dev)) {
506 goto grace_exit2;
507 }
508
509 /*
510 * Always allocate the DMA channels after the IRQ,
511 * and clean up on failure.
512 */
513
514 if (cris_request_dma(NETWORK_TX_DMA_NBR,
515 cardname,
516 DMA_VERBOSE_ON_ERROR,
517 dma_eth)) {
518 goto grace_exit3;
519 }
520
521 if (cris_request_dma(NETWORK_RX_DMA_NBR,
522 cardname,
523 DMA_VERBOSE_ON_ERROR,
524 dma_eth)) {
525 goto grace_exit4;
526 }
527
528 /* give the HW an idea of what MAC address we want */
529
530 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
531 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
532 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
533 *R_NETWORK_SA_2 = 0;
534
535 #if 0
536 /* use promiscuous mode for testing */
537 *R_NETWORK_GA_0 = 0xffffffff;
538 *R_NETWORK_GA_1 = 0xffffffff;
539
540 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
541 #else
542 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
543 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
544 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
545 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
546 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
547 #endif
548
549 *R_NETWORK_GEN_CONFIG =
550 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
551 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
552
553 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
554 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
555 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
557 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
558 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
560 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
561
562 local_irq_save(flags);
563
564 /* enable the irq's for ethernet DMA */
565
566 *R_IRQ_MASK2_SET =
567 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
568 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
569
570 *R_IRQ_MASK0_SET =
571 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
572 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
573 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
574
575 /* make sure the irqs are cleared */
576
577 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
578 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
579
580 /* make sure the rec and transmit error counters are cleared */
581
582 (void)*R_REC_COUNTERS; /* dummy read */
583 (void)*R_TR_COUNTERS; /* dummy read */
584
585 /* start the receiving DMA channel so we can receive packets from now on */
586
587 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
588 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
589
590 /* Set up transmit DMA channel so it can be restarted later */
591
592 *R_DMA_CH0_FIRST = 0;
593 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
594 netif_start_queue(dev);
595
596 local_irq_restore(flags);
597
598 /* Probe for transceiver */
599 if (e100_probe_transceiver(dev))
600 goto grace_exit5;
601
602 /* Start duplex/speed timers */
603 add_timer(&speed_timer);
604 add_timer(&duplex_timer);
605
606 /* We are now ready to accept transmit requeusts from
607 * the queueing layer of the networking.
608 */
609 netif_carrier_on(dev);
610
611 return 0;
612
613 grace_exit5:
614 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
615 grace_exit4:
616 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
617 grace_exit3:
618 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
619 grace_exit2:
620 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
621 grace_exit1:
622 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
623 grace_exit0:
624 return -EAGAIN;
625 }
626
627 #if defined(CONFIG_ETRAX_NO_PHY)
628 static void
629 dummy_check_speed(struct net_device* dev)
630 {
631 current_speed = 100;
632 }
633 #else
634 static void
635 generic_check_speed(struct net_device* dev)
636 {
637 unsigned long data;
638 struct net_local *np = netdev_priv(dev);
639
640 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
641 if ((data & ADVERTISE_100FULL) ||
642 (data & ADVERTISE_100HALF))
643 current_speed = 100;
644 else
645 current_speed = 10;
646 }
647
648 static void
649 tdk_check_speed(struct net_device* dev)
650 {
651 unsigned long data;
652 struct net_local *np = netdev_priv(dev);
653
654 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
655 MDIO_TDK_DIAGNOSTIC_REG);
656 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
657 }
658
659 static void
660 broadcom_check_speed(struct net_device* dev)
661 {
662 unsigned long data;
663 struct net_local *np = netdev_priv(dev);
664
665 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
666 MDIO_AUX_CTRL_STATUS_REG);
667 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
668 }
669
670 static void
671 intel_check_speed(struct net_device* dev)
672 {
673 unsigned long data;
674 struct net_local *np = netdev_priv(dev);
675
676 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
677 MDIO_INT_STATUS_REG_2);
678 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
679 }
680 #endif
681 static void
682 e100_check_speed(unsigned long priv)
683 {
684 struct net_device* dev = (struct net_device*)priv;
685 struct net_local *np = netdev_priv(dev);
686 static int led_initiated = 0;
687 unsigned long data;
688 int old_speed = current_speed;
689
690 spin_lock(&np->transceiver_lock);
691
692 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
693 if (!(data & BMSR_LSTATUS)) {
694 current_speed = 0;
695 } else {
696 transceiver->check_speed(dev);
697 }
698
699 spin_lock(&np->led_lock);
700 if ((old_speed != current_speed) || !led_initiated) {
701 led_initiated = 1;
702 e100_set_network_leds(NO_NETWORK_ACTIVITY);
703 if (current_speed)
704 netif_carrier_on(dev);
705 else
706 netif_carrier_off(dev);
707 }
708 spin_unlock(&np->led_lock);
709
710 /* Reinitialize the timer. */
711 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
712 add_timer(&speed_timer);
713
714 spin_unlock(&np->transceiver_lock);
715 }
716
717 static void
718 e100_negotiate(struct net_device* dev)
719 {
720 struct net_local *np = netdev_priv(dev);
721 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
722 MII_ADVERTISE);
723
724 /* Discard old speed and duplex settings */
725 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
726 ADVERTISE_10HALF | ADVERTISE_10FULL);
727
728 switch (current_speed_selection) {
729 case 10:
730 if (current_duplex == full)
731 data |= ADVERTISE_10FULL;
732 else if (current_duplex == half)
733 data |= ADVERTISE_10HALF;
734 else
735 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
736 break;
737
738 case 100:
739 if (current_duplex == full)
740 data |= ADVERTISE_100FULL;
741 else if (current_duplex == half)
742 data |= ADVERTISE_100HALF;
743 else
744 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
745 break;
746
747 case 0: /* Auto */
748 if (current_duplex == full)
749 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
750 else if (current_duplex == half)
751 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
752 else
753 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
754 ADVERTISE_100HALF | ADVERTISE_100FULL;
755 break;
756
757 default: /* assume autoneg speed and duplex */
758 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
759 ADVERTISE_100HALF | ADVERTISE_100FULL;
760 break;
761 }
762
763 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
764
765 /* Renegotiate with link partner */
766 if (autoneg_normal) {
767 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
768 data |= BMCR_ANENABLE | BMCR_ANRESTART;
769 }
770 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
771 }
772
773 static void
774 e100_set_speed(struct net_device* dev, unsigned long speed)
775 {
776 struct net_local *np = netdev_priv(dev);
777
778 spin_lock(&np->transceiver_lock);
779 if (speed != current_speed_selection) {
780 current_speed_selection = speed;
781 e100_negotiate(dev);
782 }
783 spin_unlock(&np->transceiver_lock);
784 }
785
786 static void
787 e100_check_duplex(unsigned long priv)
788 {
789 struct net_device *dev = (struct net_device *)priv;
790 struct net_local *np = netdev_priv(dev);
791 int old_duplex;
792
793 spin_lock(&np->transceiver_lock);
794 old_duplex = full_duplex;
795 transceiver->check_duplex(dev);
796 if (old_duplex != full_duplex) {
797 /* Duplex changed */
798 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
799 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
800 }
801
802 /* Reinitialize the timer. */
803 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
804 add_timer(&duplex_timer);
805 np->mii_if.full_duplex = full_duplex;
806 spin_unlock(&np->transceiver_lock);
807 }
808 #if defined(CONFIG_ETRAX_NO_PHY)
809 static void
810 dummy_check_duplex(struct net_device* dev)
811 {
812 full_duplex = 1;
813 }
814 #else
815 static void
816 generic_check_duplex(struct net_device* dev)
817 {
818 unsigned long data;
819 struct net_local *np = netdev_priv(dev);
820
821 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
822 if ((data & ADVERTISE_10FULL) ||
823 (data & ADVERTISE_100FULL))
824 full_duplex = 1;
825 else
826 full_duplex = 0;
827 }
828
829 static void
830 tdk_check_duplex(struct net_device* dev)
831 {
832 unsigned long data;
833 struct net_local *np = netdev_priv(dev);
834
835 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
836 MDIO_TDK_DIAGNOSTIC_REG);
837 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
838 }
839
840 static void
841 broadcom_check_duplex(struct net_device* dev)
842 {
843 unsigned long data;
844 struct net_local *np = netdev_priv(dev);
845
846 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
847 MDIO_AUX_CTRL_STATUS_REG);
848 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
849 }
850
851 static void
852 intel_check_duplex(struct net_device* dev)
853 {
854 unsigned long data;
855 struct net_local *np = netdev_priv(dev);
856
857 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
858 MDIO_INT_STATUS_REG_2);
859 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
860 }
861 #endif
862 static void
863 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
864 {
865 struct net_local *np = netdev_priv(dev);
866
867 spin_lock(&np->transceiver_lock);
868 if (new_duplex != current_duplex) {
869 current_duplex = new_duplex;
870 e100_negotiate(dev);
871 }
872 spin_unlock(&np->transceiver_lock);
873 }
874
875 static int
876 e100_probe_transceiver(struct net_device* dev)
877 {
878 int ret = 0;
879
880 #if !defined(CONFIG_ETRAX_NO_PHY)
881 unsigned int phyid_high;
882 unsigned int phyid_low;
883 unsigned int oui;
884 struct transceiver_ops* ops = NULL;
885 struct net_local *np = netdev_priv(dev);
886
887 spin_lock(&np->transceiver_lock);
888
889 /* Probe MDIO physical address */
890 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
891 np->mii_if.phy_id++) {
892 if (e100_get_mdio_reg(dev,
893 np->mii_if.phy_id, MII_BMSR) != 0xffff)
894 break;
895 }
896 if (np->mii_if.phy_id == 32) {
897 ret = -ENODEV;
898 goto out;
899 }
900
901 /* Get manufacturer */
902 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
903 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
904 oui = (phyid_high << 6) | (phyid_low >> 10);
905
906 for (ops = &transceivers[0]; ops->oui; ops++) {
907 if (ops->oui == oui)
908 break;
909 }
910 transceiver = ops;
911 out:
912 spin_unlock(&np->transceiver_lock);
913 #endif
914 return ret;
915 }
916
917 static int
918 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
919 {
920 unsigned short cmd; /* Data to be sent on MDIO port */
921 int data; /* Data read from MDIO */
922 int bitCounter;
923
924 /* Start of frame, OP Code, Physical Address, Register Address */
925 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
926 (location << 2);
927
928 e100_send_mdio_cmd(cmd, 0);
929
930 data = 0;
931
932 /* Data... */
933 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
934 data |= (e100_receive_mdio_bit() << bitCounter);
935 }
936
937 return data;
938 }
939
940 static void
941 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
942 {
943 int bitCounter;
944 unsigned short cmd;
945
946 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
947 (location << 2);
948
949 e100_send_mdio_cmd(cmd, 1);
950
951 /* Data... */
952 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
953 e100_send_mdio_bit(GET_BIT(bitCounter, value));
954 }
955
956 }
957
958 static void
959 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
960 {
961 int bitCounter;
962 unsigned char data = 0x2;
963
964 /* Preamble */
965 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
966 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
967
968 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
969 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
970
971 /* Turnaround */
972 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
973 if (write_cmd)
974 e100_send_mdio_bit(GET_BIT(bitCounter, data));
975 else
976 e100_receive_mdio_bit();
977 }
978
979 static void
980 e100_send_mdio_bit(unsigned char bit)
981 {
982 *R_NETWORK_MGM_CTRL =
983 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
984 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
985 udelay(1);
986 *R_NETWORK_MGM_CTRL =
987 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
988 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
989 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
990 udelay(1);
991 }
992
993 static unsigned char
994 e100_receive_mdio_bit()
995 {
996 unsigned char bit;
997 *R_NETWORK_MGM_CTRL = 0;
998 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
999 udelay(1);
1000 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1001 udelay(1);
1002 return bit;
1003 }
1004
1005 static void
1006 e100_reset_transceiver(struct net_device* dev)
1007 {
1008 struct net_local *np = netdev_priv(dev);
1009 unsigned short cmd;
1010 unsigned short data;
1011 int bitCounter;
1012
1013 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1014
1015 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1016
1017 e100_send_mdio_cmd(cmd, 1);
1018
1019 data |= 0x8000;
1020
1021 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1022 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1023 }
1024 }
1025
1026 /* Called by upper layers if they decide it took too long to complete
1027 * sending a packet - we need to reset and stuff.
1028 */
1029
1030 static void
1031 e100_tx_timeout(struct net_device *dev)
1032 {
1033 struct net_local *np = netdev_priv(dev);
1034 unsigned long flags;
1035
1036 spin_lock_irqsave(&np->lock, flags);
1037
1038 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1039 tx_done(dev) ? "IRQ problem" : "network cable problem");
1040
1041 /* remember we got an error */
1042
1043 np->stats.tx_errors++;
1044
1045 /* reset the TX DMA in case it has hung on something */
1046
1047 RESET_DMA(NETWORK_TX_DMA_NBR);
1048 WAIT_DMA(NETWORK_TX_DMA_NBR);
1049
1050 /* Reset the transceiver. */
1051
1052 e100_reset_transceiver(dev);
1053
1054 /* and get rid of the packets that never got an interrupt */
1055 while (myFirstTxDesc != myNextTxDesc) {
1056 dev_kfree_skb(myFirstTxDesc->skb);
1057 myFirstTxDesc->skb = 0;
1058 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1059 }
1060
1061 /* Set up transmit DMA channel so it can be restarted later */
1062 *R_DMA_CH0_FIRST = 0;
1063 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1064
1065 /* tell the upper layers we're ok again */
1066
1067 netif_wake_queue(dev);
1068 spin_unlock_irqrestore(&np->lock, flags);
1069 }
1070
1071
1072 /* This will only be invoked if the driver is _not_ in XOFF state.
1073 * What this means is that we need not check it, and that this
1074 * invariant will hold if we make sure that the netif_*_queue()
1075 * calls are done at the proper times.
1076 */
1077
1078 static int
1079 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1080 {
1081 struct net_local *np = netdev_priv(dev);
1082 unsigned char *buf = skb->data;
1083 unsigned long flags;
1084
1085 #ifdef ETHDEBUG
1086 printk("send packet len %d\n", length);
1087 #endif
1088 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1089
1090 myNextTxDesc->skb = skb;
1091
1092 dev->trans_start = jiffies;
1093
1094 e100_hardware_send_packet(np, buf, skb->len);
1095
1096 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1097
1098 /* Stop queue if full */
1099 if (myNextTxDesc == myFirstTxDesc) {
1100 netif_stop_queue(dev);
1101 }
1102
1103 spin_unlock_irqrestore(&np->lock, flags);
1104
1105 return 0;
1106 }
1107
1108 /*
1109 * The typical workload of the driver:
1110 * Handle the network interface interrupts.
1111 */
1112
1113 static irqreturn_t
1114 e100rxtx_interrupt(int irq, void *dev_id)
1115 {
1116 struct net_device *dev = (struct net_device *)dev_id;
1117 struct net_local *np = netdev_priv(dev);
1118 unsigned long irqbits;
1119
1120 /*
1121 * Note that both rx and tx interrupts are blocked at this point,
1122 * regardless of which got us here.
1123 */
1124
1125 irqbits = *R_IRQ_MASK2_RD;
1126
1127 /* Handle received packets */
1128 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1129 /* acknowledge the eop interrupt */
1130
1131 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1132
1133 /* check if one or more complete packets were indeed received */
1134
1135 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1136 (myNextRxDesc != myLastRxDesc)) {
1137 /* Take out the buffer and give it to the OS, then
1138 * allocate a new buffer to put a packet in.
1139 */
1140 e100_rx(dev);
1141 np->stats.rx_packets++;
1142 /* restart/continue on the channel, for safety */
1143 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1144 /* clear dma channel 1 eop/descr irq bits */
1145 *R_DMA_CH1_CLR_INTR =
1146 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1147 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1148
1149 /* now, we might have gotten another packet
1150 so we have to loop back and check if so */
1151 }
1152 }
1153
1154 /* Report any packets that have been sent */
1155 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1156 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1157 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1158 np->stats.tx_packets++;
1159
1160 /* dma is ready with the transmission of the data in tx_skb, so now
1161 we can release the skb memory */
1162 dev_kfree_skb_irq(myFirstTxDesc->skb);
1163 myFirstTxDesc->skb = 0;
1164 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1165 /* Wake up queue. */
1166 netif_wake_queue(dev);
1167 }
1168
1169 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1170 /* acknowledge the eop interrupt. */
1171 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1172 }
1173
1174 return IRQ_HANDLED;
1175 }
1176
1177 static irqreturn_t
1178 e100nw_interrupt(int irq, void *dev_id)
1179 {
1180 struct net_device *dev = (struct net_device *)dev_id;
1181 struct net_local *np = netdev_priv(dev);
1182 unsigned long irqbits = *R_IRQ_MASK0_RD;
1183
1184 /* check for underrun irq */
1185 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1186 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1187 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1188 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1189 np->stats.tx_errors++;
1190 D(printk("ethernet receiver underrun!\n"));
1191 }
1192
1193 /* check for overrun irq */
1194 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1195 update_rx_stats(&np->stats); /* this will ack the irq */
1196 D(printk("ethernet receiver overrun!\n"));
1197 }
1198 /* check for excessive collision irq */
1199 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1200 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1201 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1202 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1203 np->stats.tx_errors++;
1204 D(printk("ethernet excessive collisions!\n"));
1205 }
1206 return IRQ_HANDLED;
1207 }
1208
1209 /* We have a good packet(s), get it/them out of the buffers. */
1210 static void
1211 e100_rx(struct net_device *dev)
1212 {
1213 struct sk_buff *skb;
1214 int length = 0;
1215 struct net_local *np = netdev_priv(dev);
1216 unsigned char *skb_data_ptr;
1217 #ifdef ETHDEBUG
1218 int i;
1219 #endif
1220 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1221 spin_lock(&np->led_lock);
1222 if (!led_active && time_after(jiffies, led_next_time)) {
1223 /* light the network leds depending on the current speed. */
1224 e100_set_network_leds(NETWORK_ACTIVITY);
1225
1226 /* Set the earliest time we may clear the LED */
1227 led_next_time = jiffies + NET_FLASH_TIME;
1228 led_active = 1;
1229 mod_timer(&clear_led_timer, jiffies + HZ/10);
1230 }
1231 spin_unlock(&np->led_lock);
1232
1233 length = myNextRxDesc->descr.hw_len - 4;
1234 np->stats.rx_bytes += length;
1235
1236 #ifdef ETHDEBUG
1237 printk("Got a packet of length %d:\n", length);
1238 /* dump the first bytes in the packet */
1239 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1240 for (i = 0; i < 8; i++) {
1241 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1242 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1243 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1244 skb_data_ptr += 8;
1245 }
1246 #endif
1247
1248 if (length < RX_COPYBREAK) {
1249 /* Small packet, copy data */
1250 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1251 if (!skb) {
1252 np->stats.rx_errors++;
1253 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1254 goto update_nextrxdesc;
1255 }
1256
1257 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1258 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1259
1260 #ifdef ETHDEBUG
1261 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1262 skb->head, skb->data, skb_tail_pointer(skb),
1263 skb_end_pointer(skb));
1264 printk("copying packet to 0x%x.\n", skb_data_ptr);
1265 #endif
1266
1267 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1268 }
1269 else {
1270 /* Large packet, send directly to upper layers and allocate new
1271 * memory (aligned to cache line boundary to avoid bug).
1272 * Before sending the skb to upper layers we must make sure
1273 * that skb->data points to the aligned start of the packet.
1274 */
1275 int align;
1276 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1277 if (!new_skb) {
1278 np->stats.rx_errors++;
1279 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1280 goto update_nextrxdesc;
1281 }
1282 skb = myNextRxDesc->skb;
1283 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1284 skb_put(skb, length + align);
1285 skb_pull(skb, align); /* Remove alignment bytes */
1286 myNextRxDesc->skb = new_skb;
1287 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1288 }
1289
1290 skb->protocol = eth_type_trans(skb, dev);
1291
1292 /* Send the packet to the upper layers */
1293 netif_rx(skb);
1294
1295 update_nextrxdesc:
1296 /* Prepare for next packet */
1297 myNextRxDesc->descr.status = 0;
1298 prevRxDesc = myNextRxDesc;
1299 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1300
1301 rx_queue_len++;
1302
1303 /* Check if descriptors should be returned */
1304 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1305 flush_etrax_cache();
1306 prevRxDesc->descr.ctrl |= d_eol;
1307 myLastRxDesc->descr.ctrl &= ~d_eol;
1308 myLastRxDesc = prevRxDesc;
1309 rx_queue_len = 0;
1310 }
1311 }
1312
1313 /* The inverse routine to net_open(). */
1314 static int
1315 e100_close(struct net_device *dev)
1316 {
1317 struct net_local *np = netdev_priv(dev);
1318
1319 printk(KERN_INFO "Closing %s.\n", dev->name);
1320
1321 netif_stop_queue(dev);
1322
1323 *R_IRQ_MASK0_CLR =
1324 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1325 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1326 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1327
1328 *R_IRQ_MASK2_CLR =
1329 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1330 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1331 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1332 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1333
1334 /* Stop the receiver and the transmitter */
1335
1336 RESET_DMA(NETWORK_TX_DMA_NBR);
1337 RESET_DMA(NETWORK_RX_DMA_NBR);
1338
1339 /* Flush the Tx and disable Rx here. */
1340
1341 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1342 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1343 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1344
1345 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1346 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1347
1348 /* Update the statistics here. */
1349
1350 update_rx_stats(&np->stats);
1351 update_tx_stats(&np->stats);
1352
1353 /* Stop speed/duplex timers */
1354 del_timer(&speed_timer);
1355 del_timer(&duplex_timer);
1356
1357 return 0;
1358 }
1359
1360 static int
1361 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1362 {
1363 struct mii_ioctl_data *data = if_mii(ifr);
1364 struct net_local *np = netdev_priv(dev);
1365 int rc = 0;
1366 int old_autoneg;
1367
1368 spin_lock(&np->lock); /* Preempt protection */
1369 switch (cmd) {
1370 /* The ioctls below should be considered obsolete but are */
1371 /* still present for compatability with old scripts/apps */
1372 case SET_ETH_SPEED_10: /* 10 Mbps */
1373 e100_set_speed(dev, 10);
1374 break;
1375 case SET_ETH_SPEED_100: /* 100 Mbps */
1376 e100_set_speed(dev, 100);
1377 break;
1378 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1379 e100_set_speed(dev, 0);
1380 break;
1381 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1382 e100_set_duplex(dev, half);
1383 break;
1384 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1385 e100_set_duplex(dev, full);
1386 break;
1387 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1388 e100_set_duplex(dev, autoneg);
1389 break;
1390 case SET_ETH_AUTONEG:
1391 old_autoneg = autoneg_normal;
1392 autoneg_normal = *(int*)data;
1393 if (autoneg_normal != old_autoneg)
1394 e100_negotiate(dev);
1395 break;
1396 default:
1397 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1398 cmd, NULL);
1399 break;
1400 }
1401 spin_unlock(&np->lock);
1402 return rc;
1403 }
1404
1405 static int e100_get_settings(struct net_device *dev,
1406 struct ethtool_cmd *cmd)
1407 {
1408 struct net_local *np = netdev_priv(dev);
1409 int err;
1410
1411 spin_lock_irq(&np->lock);
1412 err = mii_ethtool_gset(&np->mii_if, cmd);
1413 spin_unlock_irq(&np->lock);
1414
1415 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1416 cmd->supported &= ~(SUPPORTED_1000baseT_Half
1417 | SUPPORTED_1000baseT_Full);
1418 return err;
1419 }
1420
1421 static int e100_set_settings(struct net_device *dev,
1422 struct ethtool_cmd *ecmd)
1423 {
1424 if (ecmd->autoneg == AUTONEG_ENABLE) {
1425 e100_set_duplex(dev, autoneg);
1426 e100_set_speed(dev, 0);
1427 } else {
1428 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1429 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1430 }
1431
1432 return 0;
1433 }
1434
1435 static void e100_get_drvinfo(struct net_device *dev,
1436 struct ethtool_drvinfo *info)
1437 {
1438 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1439 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1440 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1441 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1442 }
1443
1444 static int e100_nway_reset(struct net_device *dev)
1445 {
1446 if (current_duplex == autoneg && current_speed_selection == 0)
1447 e100_negotiate(dev);
1448 return 0;
1449 }
1450
1451 static const struct ethtool_ops e100_ethtool_ops = {
1452 .get_settings = e100_get_settings,
1453 .set_settings = e100_set_settings,
1454 .get_drvinfo = e100_get_drvinfo,
1455 .nway_reset = e100_nway_reset,
1456 .get_link = ethtool_op_get_link,
1457 };
1458
1459 static int
1460 e100_set_config(struct net_device *dev, struct ifmap *map)
1461 {
1462 struct net_local *np = netdev_priv(dev);
1463
1464 spin_lock(&np->lock); /* Preempt protection */
1465
1466 switch(map->port) {
1467 case IF_PORT_UNKNOWN:
1468 /* Use autoneg */
1469 e100_set_speed(dev, 0);
1470 e100_set_duplex(dev, autoneg);
1471 break;
1472 case IF_PORT_10BASET:
1473 e100_set_speed(dev, 10);
1474 e100_set_duplex(dev, autoneg);
1475 break;
1476 case IF_PORT_100BASET:
1477 case IF_PORT_100BASETX:
1478 e100_set_speed(dev, 100);
1479 e100_set_duplex(dev, autoneg);
1480 break;
1481 case IF_PORT_100BASEFX:
1482 case IF_PORT_10BASE2:
1483 case IF_PORT_AUI:
1484 spin_unlock(&np->lock);
1485 return -EOPNOTSUPP;
1486 break;
1487 default:
1488 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1489 spin_unlock(&np->lock);
1490 return -EINVAL;
1491 }
1492 spin_unlock(&np->lock);
1493 return 0;
1494 }
1495
1496 static void
1497 update_rx_stats(struct net_device_stats *es)
1498 {
1499 unsigned long r = *R_REC_COUNTERS;
1500 /* update stats relevant to reception errors */
1501 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1502 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1503 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1504 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1505 }
1506
1507 static void
1508 update_tx_stats(struct net_device_stats *es)
1509 {
1510 unsigned long r = *R_TR_COUNTERS;
1511 /* update stats relevant to transmission errors */
1512 es->collisions +=
1513 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1514 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1515 }
1516
1517 /*
1518 * Get the current statistics.
1519 * This may be called with the card open or closed.
1520 */
1521 static struct net_device_stats *
1522 e100_get_stats(struct net_device *dev)
1523 {
1524 struct net_local *lp = netdev_priv(dev);
1525 unsigned long flags;
1526
1527 spin_lock_irqsave(&lp->lock, flags);
1528
1529 update_rx_stats(&lp->stats);
1530 update_tx_stats(&lp->stats);
1531
1532 spin_unlock_irqrestore(&lp->lock, flags);
1533 return &lp->stats;
1534 }
1535
1536 /*
1537 * Set or clear the multicast filter for this adaptor.
1538 * num_addrs == -1 Promiscuous mode, receive all packets
1539 * num_addrs == 0 Normal mode, clear multicast list
1540 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1541 * and do best-effort filtering.
1542 */
1543 static void
1544 set_multicast_list(struct net_device *dev)
1545 {
1546 struct net_local *lp = netdev_priv(dev);
1547 int num_addr = dev->mc_count;
1548 unsigned long int lo_bits;
1549 unsigned long int hi_bits;
1550
1551 spin_lock(&lp->lock);
1552 if (dev->flags & IFF_PROMISC) {
1553 /* promiscuous mode */
1554 lo_bits = 0xfffffffful;
1555 hi_bits = 0xfffffffful;
1556
1557 /* Enable individual receive */
1558 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1559 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1560 } else if (dev->flags & IFF_ALLMULTI) {
1561 /* enable all multicasts */
1562 lo_bits = 0xfffffffful;
1563 hi_bits = 0xfffffffful;
1564
1565 /* Disable individual receive */
1566 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1567 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1568 } else if (num_addr == 0) {
1569 /* Normal, clear the mc list */
1570 lo_bits = 0x00000000ul;
1571 hi_bits = 0x00000000ul;
1572
1573 /* Disable individual receive */
1574 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1575 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1576 } else {
1577 /* MC mode, receive normal and MC packets */
1578 char hash_ix;
1579 struct dev_mc_list *dmi = dev->mc_list;
1580 int i;
1581 char *baddr;
1582
1583 lo_bits = 0x00000000ul;
1584 hi_bits = 0x00000000ul;
1585 for (i = 0; i < num_addr; i++) {
1586 /* Calculate the hash index for the GA registers */
1587
1588 hash_ix = 0;
1589 baddr = dmi->dmi_addr;
1590 hash_ix ^= (*baddr) & 0x3f;
1591 hash_ix ^= ((*baddr) >> 6) & 0x03;
1592 ++baddr;
1593 hash_ix ^= ((*baddr) << 2) & 0x03c;
1594 hash_ix ^= ((*baddr) >> 4) & 0xf;
1595 ++baddr;
1596 hash_ix ^= ((*baddr) << 4) & 0x30;
1597 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1598 ++baddr;
1599 hash_ix ^= (*baddr) & 0x3f;
1600 hash_ix ^= ((*baddr) >> 6) & 0x03;
1601 ++baddr;
1602 hash_ix ^= ((*baddr) << 2) & 0x03c;
1603 hash_ix ^= ((*baddr) >> 4) & 0xf;
1604 ++baddr;
1605 hash_ix ^= ((*baddr) << 4) & 0x30;
1606 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1607
1608 hash_ix &= 0x3f;
1609
1610 if (hash_ix >= 32) {
1611 hi_bits |= (1 << (hash_ix-32));
1612 } else {
1613 lo_bits |= (1 << hash_ix);
1614 }
1615 dmi = dmi->next;
1616 }
1617 /* Disable individual receive */
1618 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1619 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1620 }
1621 *R_NETWORK_GA_0 = lo_bits;
1622 *R_NETWORK_GA_1 = hi_bits;
1623 spin_unlock(&lp->lock);
1624 }
1625
1626 void
1627 e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1628 {
1629 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1630
1631 spin_lock(&np->led_lock);
1632 if (!led_active && time_after(jiffies, led_next_time)) {
1633 /* light the network leds depending on the current speed. */
1634 e100_set_network_leds(NETWORK_ACTIVITY);
1635
1636 /* Set the earliest time we may clear the LED */
1637 led_next_time = jiffies + NET_FLASH_TIME;
1638 led_active = 1;
1639 mod_timer(&clear_led_timer, jiffies + HZ/10);
1640 }
1641 spin_unlock(&np->led_lock);
1642
1643 /* configure the tx dma descriptor */
1644 myNextTxDesc->descr.sw_len = length;
1645 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1646 myNextTxDesc->descr.buf = virt_to_phys(buf);
1647
1648 /* Move end of list */
1649 myLastTxDesc->descr.ctrl &= ~d_eol;
1650 myLastTxDesc = myNextTxDesc;
1651
1652 /* Restart DMA channel */
1653 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1654 }
1655
1656 static void
1657 e100_clear_network_leds(unsigned long dummy)
1658 {
1659 struct net_device *dev = (struct net_device *)dummy;
1660 struct net_local *np = netdev_priv(dev);
1661
1662 spin_lock(&np->led_lock);
1663
1664 if (led_active && time_after(jiffies, led_next_time)) {
1665 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1666
1667 /* Set the earliest time we may set the LED */
1668 led_next_time = jiffies + NET_FLASH_PAUSE;
1669 led_active = 0;
1670 }
1671
1672 spin_unlock(&np->led_lock);
1673 }
1674
1675 static void
1676 e100_set_network_leds(int active)
1677 {
1678 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1679 int light_leds = (active == NO_NETWORK_ACTIVITY);
1680 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1681 int light_leds = (active == NETWORK_ACTIVITY);
1682 #else
1683 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1684 #endif
1685
1686 if (!current_speed) {
1687 /* Make LED red, link is down */
1688 #if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1689 CRIS_LED_NETWORK_SET(CRIS_LED_RED);
1690 #else
1691 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1692 #endif
1693 } else if (light_leds) {
1694 if (current_speed == 10) {
1695 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1696 } else {
1697 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1698 }
1699 } else {
1700 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1701 }
1702 }
1703
1704 #ifdef CONFIG_NET_POLL_CONTROLLER
1705 static void
1706 e100_netpoll(struct net_device* netdev)
1707 {
1708 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
1709 }
1710 #endif
1711
1712 static int
1713 etrax_init_module(void)
1714 {
1715 return etrax_ethernet_init();
1716 }
1717
1718 static int __init
1719 e100_boot_setup(char* str)
1720 {
1721 struct sockaddr sa = {0};
1722 int i;
1723
1724 /* Parse the colon separated Ethernet station address */
1725 for (i = 0; i < ETH_ALEN; i++) {
1726 unsigned int tmp;
1727 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1728 printk(KERN_WARNING "Malformed station address");
1729 return 0;
1730 }
1731 sa.sa_data[i] = (char)tmp;
1732 }
1733
1734 default_mac = sa;
1735 return 1;
1736 }
1737
1738 __setup("etrax100_eth=", e100_boot_setup);
1739
1740 module_init(etrax_init_module);
SocketAccessConTroL development