Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6/sactl.git] / arch / mips / rb532 / devices.c
blobc1c29181bd4641de62977a19107a4d5ad64734c0
1 /*
2 * RouterBoard 500 Platform devices
4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/ctype.h>
20 #include <linux/string.h>
21 #include <linux/platform_device.h>
22 #include <linux/mtd/nand.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/gpio_keys.h>
26 #include <linux/input.h>
28 #include <asm/bootinfo.h>
30 #include <asm/mach-rc32434/rc32434.h>
31 #include <asm/mach-rc32434/dma.h>
32 #include <asm/mach-rc32434/dma_v.h>
33 #include <asm/mach-rc32434/eth.h>
34 #include <asm/mach-rc32434/rb.h>
35 #include <asm/mach-rc32434/integ.h>
36 #include <asm/mach-rc32434/gpio.h>
37 #include <asm/mach-rc32434/irq.h>
39 #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
40 #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
42 static struct resource korina_dev0_res[] = {
44 .name = "korina_regs",
45 .start = ETH0_BASE_ADDR,
46 .end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
47 .flags = IORESOURCE_MEM,
48 }, {
49 .name = "korina_rx",
50 .start = ETH0_DMA_RX_IRQ,
51 .end = ETH0_DMA_RX_IRQ,
52 .flags = IORESOURCE_IRQ
53 }, {
54 .name = "korina_tx",
55 .start = ETH0_DMA_TX_IRQ,
56 .end = ETH0_DMA_TX_IRQ,
57 .flags = IORESOURCE_IRQ
58 }, {
59 .name = "korina_ovr",
60 .start = ETH0_RX_OVR_IRQ,
61 .end = ETH0_RX_OVR_IRQ,
62 .flags = IORESOURCE_IRQ
63 }, {
64 .name = "korina_und",
65 .start = ETH0_TX_UND_IRQ,
66 .end = ETH0_TX_UND_IRQ,
67 .flags = IORESOURCE_IRQ
68 }, {
69 .name = "korina_dma_rx",
70 .start = ETH0_RX_DMA_ADDR,
71 .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
72 .flags = IORESOURCE_MEM,
73 }, {
74 .name = "korina_dma_tx",
75 .start = ETH0_TX_DMA_ADDR,
76 .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
77 .flags = IORESOURCE_MEM,
81 static struct korina_device korina_dev0_data = {
82 .name = "korina0",
83 .mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
86 static struct platform_device korina_dev0 = {
87 .id = -1,
88 .name = "korina",
89 .dev.platform_data = &korina_dev0_data,
90 .resource = korina_dev0_res,
91 .num_resources = ARRAY_SIZE(korina_dev0_res),
94 static struct resource cf_slot0_res[] = {
96 .name = "cf_membase",
97 .flags = IORESOURCE_MEM
98 }, {
99 .name = "cf_irq",
100 .start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
101 .end = (8 + 4 * 32 + CF_GPIO_NUM),
102 .flags = IORESOURCE_IRQ
106 static struct cf_device cf_slot0_data = {
107 .gpio_pin = CF_GPIO_NUM
110 static struct platform_device cf_slot0 = {
111 .id = -1,
112 .name = "pata-rb532-cf",
113 .dev.platform_data = &cf_slot0_data,
114 .resource = cf_slot0_res,
115 .num_resources = ARRAY_SIZE(cf_slot0_res),
118 /* Resources and device for NAND */
119 static int rb532_dev_ready(struct mtd_info *mtd)
121 return gpio_get_value(GPIO_RDY);
124 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
126 struct nand_chip *chip = mtd->priv;
127 unsigned char orbits, nandbits;
129 if (ctrl & NAND_CTRL_CHANGE) {
130 orbits = (ctrl & NAND_CLE) << 1;
131 orbits |= (ctrl & NAND_ALE) >> 1;
133 nandbits = (~ctrl & NAND_CLE) << 1;
134 nandbits |= (~ctrl & NAND_ALE) >> 1;
136 set_latch_u5(orbits, nandbits);
138 if (cmd != NAND_CMD_NONE)
139 writeb(cmd, chip->IO_ADDR_W);
142 static struct resource nand_slot0_res[] = {
143 [0] = {
144 .name = "nand_membase",
145 .flags = IORESOURCE_MEM
149 static struct platform_nand_data rb532_nand_data = {
150 .ctrl.dev_ready = rb532_dev_ready,
151 .ctrl.cmd_ctrl = rb532_cmd_ctrl,
154 static struct platform_device nand_slot0 = {
155 .name = "gen_nand",
156 .id = -1,
157 .resource = nand_slot0_res,
158 .num_resources = ARRAY_SIZE(nand_slot0_res),
159 .dev.platform_data = &rb532_nand_data,
162 static struct mtd_partition rb532_partition_info[] = {
164 .name = "Routerboard NAND boot",
165 .offset = 0,
166 .size = 4 * 1024 * 1024,
167 }, {
168 .name = "rootfs",
169 .offset = MTDPART_OFS_NXTBLK,
170 .size = MTDPART_SIZ_FULL,
174 static struct platform_device rb532_led = {
175 .name = "rb532-led",
176 .id = -1,
179 static struct gpio_keys_button rb532_gpio_btn[] = {
181 .gpio = 1,
182 .code = BTN_0,
183 .desc = "S1",
184 .active_low = 1,
188 static struct gpio_keys_platform_data rb532_gpio_btn_data = {
189 .buttons = rb532_gpio_btn,
190 .nbuttons = ARRAY_SIZE(rb532_gpio_btn),
193 static struct platform_device rb532_button = {
194 .name = "gpio-keys",
195 .id = -1,
196 .dev = {
197 .platform_data = &rb532_gpio_btn_data,
201 static struct resource rb532_wdt_res[] = {
203 .name = "rb532_wdt_res",
204 .start = INTEG0_BASE_ADDR,
205 .end = INTEG0_BASE_ADDR + sizeof(struct integ),
206 .flags = IORESOURCE_MEM,
210 static struct platform_device rb532_wdt = {
211 .name = "rc32434_wdt",
212 .id = -1,
213 .resource = rb532_wdt_res,
214 .num_resources = ARRAY_SIZE(rb532_wdt_res),
217 static struct platform_device *rb532_devs[] = {
218 &korina_dev0,
219 &nand_slot0,
220 &cf_slot0,
221 &rb532_led,
222 &rb532_button,
223 &rb532_wdt
226 static void __init parse_mac_addr(char *macstr)
228 int i, j;
229 unsigned char result, value;
231 for (i = 0; i < 6; i++) {
232 result = 0;
234 if (i != 5 && *(macstr + 2) != ':')
235 return;
237 for (j = 0; j < 2; j++) {
238 if (isxdigit(*macstr)
239 && (value =
240 isdigit(*macstr) ? *macstr -
241 '0' : toupper(*macstr) - 'A' + 10) < 16) {
242 result = result * 16 + value;
243 macstr++;
244 } else
245 return;
248 macstr++;
249 korina_dev0_data.mac[i] = result;
254 /* NAND definitions */
255 #define NAND_CHIP_DELAY 25
257 static void __init rb532_nand_setup(void)
259 switch (mips_machtype) {
260 case MACH_MIKROTIK_RB532A:
261 set_latch_u5(LO_FOFF | LO_CEX,
262 LO_ULED | LO_ALE | LO_CLE | LO_WPX);
263 break;
264 default:
265 set_latch_u5(LO_WPX | LO_FOFF | LO_CEX,
266 LO_ULED | LO_ALE | LO_CLE);
267 break;
270 /* Setup NAND specific settings */
271 rb532_nand_data.chip.nr_chips = 1;
272 rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
273 rb532_nand_data.chip.partitions = rb532_partition_info;
274 rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
275 rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
279 static int __init plat_setup_devices(void)
281 /* Look for the CF card reader */
282 if (!readl(IDT434_REG_BASE + DEV1MASK))
283 rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */
284 else {
285 cf_slot0_res[0].start =
286 readl(IDT434_REG_BASE + DEV1BASE);
287 cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
290 /* Read the NAND resources from the device controller */
291 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
292 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
294 /* Initialise the NAND device */
295 rb532_nand_setup();
297 return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
300 static int __init setup_kmac(char *s)
302 printk(KERN_INFO "korina mac = %s\n", s);
303 parse_mac_addr(s);
304 return 0;
307 __setup("kmac=", setup_kmac);
309 arch_initcall(plat_setup_devices);