include/asm-x86/i387.h

   1 /*
   2  * Copyright (C) 1994 Linus Torvalds
   3  *
   4  * Pentium III FXSR, SSE support
   5  * General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  * x86-64 work by Andi Kleen 2002
   8  */
   9
  10 #ifndef _ASM_X86_I387_H
  11 #define _ASM_X86_I387_H
  12
  13 #include <linux/sched.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/regset.h>
  16 #include <asm/asm.h>
  17 #include <asm/processor.h>
  18 #include <asm/sigcontext.h>
  19 #include <asm/user.h>
  20 #include <asm/uaccess.h>
  21
  22 extern void fpu_init(void);
  23 extern void mxcsr_feature_mask_init(void);
  24 extern int init_fpu(struct task_struct *child);
  25 extern asmlinkage void math_state_restore(void);
  26 extern void init_thread_xstate(void);
  27
  28 extern user_regset_active_fn fpregs_active, xfpregs_active;
  29 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
  30 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
  31
  32 #ifdef CONFIG_IA32_EMULATION
  33 struct _fpstate_ia32;
  34 extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
  35 extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
  36 #endif
  37
  38 #ifdef CONFIG_X86_64
  39
  40 /* Ignore delayed exceptions from user space */
  41 static inline void tolerant_fwait(void)
  42 {
  43         asm volatile("1: fwait\n"
  44                      "2:\n"
  45                      _ASM_EXTABLE(1b, 2b));
  46 }
  47
  48 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
  49 {
  50         int err;
  51
  52         asm volatile("1:  rex64/fxrstor (%[fx])\n\t"
  53                      "2:\n"
  54                      ".section .fixup,\"ax\"\n"
  55                      "3:  movl $-1,%[err]\n"
  56                      "    jmp  2b\n"
  57                      ".previous\n"
  58                      _ASM_EXTABLE(1b, 3b)
  59                      : [err] "=r" (err)
  60 #if 0 /* See comment in __save_init_fpu() below. */
  61                      : [fx] "r" (fx), "m" (*fx), "0" (0));
  62 #else
  63                      : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
  64 #endif
  65         if (unlikely(err))
  66                 init_fpu(current);
  67         return err;
  68 }
  69
  70 #define X87_FSW_ES (1 << 7)     /* Exception Summary */
  71
  72 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
  73    is pending. Clear the x87 state here by setting it to fixed
  74    values. The kernel data segment can be sometimes 0 and sometimes
  75    new user value. Both should be ok.
  76    Use the PDA as safe address because it should be already in L1. */
  77 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
  78 {
  79         if (unlikely(fx->swd & X87_FSW_ES))
  80                 asm volatile("fnclex");
  81         alternative_input(ASM_NOP8 ASM_NOP2,
  82                           "    emms\n"          /* clear stack tags */
  83                           "    fildl %%gs:0",   /* load to clear state */
  84                           X86_FEATURE_FXSAVE_LEAK);
  85 }
  86
  87 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
  88 {
  89         int err;
  90
  91         asm volatile("1:  rex64/fxsave (%[fx])\n\t"
  92                      "2:\n"
  93                      ".section .fixup,\"ax\"\n"
  94                      "3:  movl $-1,%[err]\n"
  95                      "    jmp  2b\n"
  96                      ".previous\n"
  97                      _ASM_EXTABLE(1b, 3b)
  98                      : [err] "=r" (err), "=m" (*fx)
  99 #if 0 /* See comment in __fxsave_clear() below. */
 100                      : [fx] "r" (fx), "0" (0));
 101 #else
 102                      : [fx] "cdaSDb" (fx), "0" (0));
 103 #endif
 104         if (unlikely(err) &&
 105             __clear_user(fx, sizeof(struct i387_fxsave_struct)))
 106                 err = -EFAULT;
 107         /* No need to clear here because the caller clears USED_MATH */
 108         return err;
 109 }
 110
 111 static inline void __save_init_fpu(struct task_struct *tsk)
 112 {
 113         /* Using "rex64; fxsave %0" is broken because, if the memory operand
 114            uses any extended registers for addressing, a second REX prefix
 115            will be generated (to the assembler, rex64 followed by semicolon
 116            is a separate instruction), and hence the 64-bitness is lost. */
 117 #if 0
 118         /* Using "fxsaveq %0" would be the ideal choice, but is only supported
 119            starting with gas 2.16. */
 120         __asm__ __volatile__("fxsaveq %0"
 121                              : "=m" (tsk->thread.xstate->fxsave));
 122 #elif 0
 123         /* Using, as a workaround, the properly prefixed form below isn't
 124            accepted by any binutils version so far released, complaining that
 125            the same type of prefix is used twice if an extended register is
 126            needed for addressing (fix submitted to mainline 2005-11-21). */
 127         __asm__ __volatile__("rex64/fxsave %0"
 128                              : "=m" (tsk->thread.xstate->fxsave));
 129 #else
 130         /* This, however, we can work around by forcing the compiler to select
 131            an addressing mode that doesn't require extended registers. */
 132         __asm__ __volatile__("rex64/fxsave (%1)"
 133                              : "=m" (tsk->thread.xstate->fxsave)
 134                              : "cdaSDb" (&tsk->thread.xstate->fxsave));
 135 #endif
 136         clear_fpu_state(&tsk->thread.xstate->fxsave);
 137         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 138 }
 139
 140 #else  /* CONFIG_X86_32 */
 141
 142 extern void finit(void);
 143
 144 static inline void tolerant_fwait(void)
 145 {
 146         asm volatile("fnclex ; fwait");
 147 }
 148
 149 static inline void restore_fpu(struct task_struct *tsk)
 150 {
 151         /*
 152          * The "nop" is needed to make the instructions the same
 153          * length.
 154          */
 155         alternative_input(
 156                 "nop ; frstor %1",
 157                 "fxrstor %1",
 158                 X86_FEATURE_FXSR,
 159                 "m" (tsk->thread.xstate->fxsave));
 160 }
 161
 162 /* We need a safe address that is cheap to find and that is already
 163    in L1 during context switch. The best choices are unfortunately
 164    different for UP and SMP */
 165 #ifdef CONFIG_SMP
 166 #define safe_address (__per_cpu_offset[0])
 167 #else
 168 #define safe_address (kstat_cpu(0).cpustat.user)
 169 #endif
 170
 171 /*
 172  * These must be called with preempt disabled
 173  */
 174 static inline void __save_init_fpu(struct task_struct *tsk)
 175 {
 176         /* Use more nops than strictly needed in case the compiler
 177            varies code */
 178         alternative_input(
 179                 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
 180                 "fxsave %[fx]\n"
 181                 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
 182                 X86_FEATURE_FXSR,
 183                 [fx] "m" (tsk->thread.xstate->fxsave),
 184                 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
 185         /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
 186            is pending.  Clear the x87 state here by setting it to fixed
 187            values. safe_address is a random variable that should be in L1 */
 188         alternative_input(
 189                 GENERIC_NOP8 GENERIC_NOP2,
 190                 "emms\n\t"              /* clear stack tags */
 191                 "fildl %[addr]",        /* set F?P to defined value */
 192                 X86_FEATURE_FXSAVE_LEAK,
 193                 [addr] "m" (safe_address));
 194         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 195 }
 196
 197 /*
 198  * Signal frame handlers...
 199  */
 200 extern int save_i387(struct _fpstate __user *buf);
 201 extern int restore_i387(struct _fpstate __user *buf);
 202
 203 #endif  /* CONFIG_X86_64 */
 204
 205 static inline void __unlazy_fpu(struct task_struct *tsk)
 206 {
 207         if (task_thread_info(tsk)->status & TS_USEDFPU) {
 208                 __save_init_fpu(tsk);
 209                 stts();
 210         } else
 211                 tsk->fpu_counter = 0;
 212 }
 213
 214 static inline void __clear_fpu(struct task_struct *tsk)
 215 {
 216         if (task_thread_info(tsk)->status & TS_USEDFPU) {
 217                 tolerant_fwait();
 218                 task_thread_info(tsk)->status &= ~TS_USEDFPU;
 219                 stts();
 220         }
 221 }
 222
 223 static inline void kernel_fpu_begin(void)
 224 {
 225         struct thread_info *me = current_thread_info();
 226         preempt_disable();
 227         if (me->status & TS_USEDFPU)
 228                 __save_init_fpu(me->task);
 229         else
 230                 clts();
 231 }
 232
 233 static inline void kernel_fpu_end(void)
 234 {
 235         stts();
 236         preempt_enable();
 237 }
 238
 239 #ifdef CONFIG_X86_64
 240
 241 static inline void save_init_fpu(struct task_struct *tsk)
 242 {
 243         __save_init_fpu(tsk);
 244         stts();
 245 }
 246
 247 #define unlazy_fpu      __unlazy_fpu
 248 #define clear_fpu       __clear_fpu
 249
 250 #else  /* CONFIG_X86_32 */
 251
 252 /*
 253  * These disable preemption on their own and are safe
 254  */
 255 static inline void save_init_fpu(struct task_struct *tsk)
 256 {
 257         preempt_disable();
 258         __save_init_fpu(tsk);
 259         stts();
 260         preempt_enable();
 261 }
 262
 263 static inline void unlazy_fpu(struct task_struct *tsk)
 264 {
 265         preempt_disable();
 266         __unlazy_fpu(tsk);
 267         preempt_enable();
 268 }
 269
 270 static inline void clear_fpu(struct task_struct *tsk)
 271 {
 272         preempt_disable();
 273         __clear_fpu(tsk);
 274         preempt_enable();
 275 }
 276
 277 #endif  /* CONFIG_X86_64 */
 278
 279 /*
 280  * i387 state interaction
 281  */
 282 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
 283 {
 284         if (cpu_has_fxsr) {
 285                 return tsk->thread.xstate->fxsave.cwd;
 286         } else {
 287                 return (unsigned short)tsk->thread.xstate->fsave.cwd;
 288         }
 289 }
 290
 291 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
 292 {
 293         if (cpu_has_fxsr) {
 294                 return tsk->thread.xstate->fxsave.swd;
 295         } else {
 296                 return (unsigned short)tsk->thread.xstate->fsave.swd;
 297         }
 298 }
 299
 300 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
 301 {
 302         if (cpu_has_xmm) {
 303                 return tsk->thread.xstate->fxsave.mxcsr;
 304         } else {
 305                 return MXCSR_DEFAULT;
 306         }
 307 }
 308
 309 #endif  /* _ASM_X86_I387_H */