2 * linux/arch/arm/mach-imx/dma.c
4 * imx DMA registration and IRQ dispatching
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * 2004-03-03 Sascha Hauer <sascha@saschahauer.de>
11 * initial version heavily inspired by
12 * linux/arch/arm/mach-pxa/dma.c
14 * 2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz>
15 * Changed to support scatter gather DMA
16 * by taking Russell's code from RiscPC
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/interrupt.h>
26 #include <linux/errno.h>
28 #include <asm/system.h>
30 #include <asm/hardware.h>
32 #include <asm/arch/imx-dma.h>
34 struct imx_dma_channel imx_dma_channels
[IMX_DMA_CHANNELS
];
37 * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
38 * @dma_ch: i.MX DMA channel number
39 * @lastcount: number of bytes transferred during last transfer
41 * Functions prepares DMA controller for next sg data chunk transfer.
42 * The @lastcount argument informs function about number of bytes transferred
43 * during last block. Zero value can be used for @lastcount to setup DMA
44 * for the first chunk.
46 static inline int imx_dma_sg_next(imx_dmach_t dma_ch
, unsigned int lastcount
)
48 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
49 unsigned int nextcount
;
50 unsigned int nextaddr
;
53 printk(KERN_CRIT
"%s: called for not allocated channel %d\n",
54 __FUNCTION__
, dma_ch
);
58 imxdma
->resbytes
-= lastcount
;
61 pr_debug("imxdma%d: no sg data\n", dma_ch
);
65 imxdma
->sgbc
+= lastcount
;
66 if ((imxdma
->sgbc
>= imxdma
->sg
->length
) || !imxdma
->resbytes
) {
67 if ((imxdma
->sgcount
<= 1) || !imxdma
->resbytes
) {
68 pr_debug("imxdma%d: sg transfer limit reached\n",
79 nextcount
= imxdma
->sg
->length
- imxdma
->sgbc
;
80 nextaddr
= imxdma
->sg
->dma_address
+ imxdma
->sgbc
;
82 if(imxdma
->resbytes
< nextcount
)
83 nextcount
= imxdma
->resbytes
;
85 if ((imxdma
->dma_mode
& DMA_MODE_MASK
) == DMA_MODE_READ
)
86 DAR(dma_ch
) = nextaddr
;
88 SAR(dma_ch
) = nextaddr
;
90 CNTR(dma_ch
) = nextcount
;
91 pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, size 0x%08x\n",
92 dma_ch
, DAR(dma_ch
), SAR(dma_ch
), CNTR(dma_ch
));
98 * imx_dma_setup_sg_base - scatter-gather DMA emulation
99 * @dma_ch: i.MX DMA channel number
100 * @sg: pointer to the scatter-gather list/vector
101 * @sgcount: scatter-gather list hungs count
103 * Functions sets up i.MX DMA state for emulated scatter-gather transfer
104 * and sets up channel registers to be ready for the first chunk
107 imx_dma_setup_sg_base(imx_dmach_t dma_ch
,
108 struct scatterlist
*sg
, unsigned int sgcount
)
110 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
113 imxdma
->sgcount
= sgcount
;
115 return imx_dma_sg_next(dma_ch
, 0);
119 * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from device transfer
120 * @dma_ch: i.MX DMA channel number
121 * @dma_address: the DMA/physical memory address of the linear data block
123 * @dma_length: length of the data block in bytes
124 * @dev_addr: physical device port address
125 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
126 * or %DMA_MODE_WRITE from memory to the device
128 * The function setups DMA channel source and destination addresses for transfer
129 * specified by provided parameters. The scatter-gather emulation is disabled,
130 * because linear data block
131 * form the physical address range is transfered.
132 * Return value: if incorrect parameters are provided -%EINVAL.
133 * Zero indicates success.
136 imx_dma_setup_single(imx_dmach_t dma_ch
, dma_addr_t dma_address
,
137 unsigned int dma_length
, unsigned int dev_addr
,
140 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
144 imxdma
->dma_mode
= dmamode
;
145 imxdma
->resbytes
= dma_length
;
148 printk(KERN_ERR
"imxdma%d: imx_dma_setup_single null address\n",
154 printk(KERN_ERR
"imxdma%d: imx_dma_setup_single zero length\n",
159 if ((dmamode
& DMA_MODE_MASK
) == DMA_MODE_READ
) {
160 pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for read\n",
161 dma_ch
, (unsigned int)dma_address
, dma_length
,
163 SAR(dma_ch
) = dev_addr
;
164 DAR(dma_ch
) = (unsigned int)dma_address
;
165 } else if ((dmamode
& DMA_MODE_MASK
) == DMA_MODE_WRITE
) {
166 pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for write\n",
167 dma_ch
, (unsigned int)dma_address
, dma_length
,
169 SAR(dma_ch
) = (unsigned int)dma_address
;
170 DAR(dma_ch
) = dev_addr
;
172 printk(KERN_ERR
"imxdma%d: imx_dma_setup_single bad dmamode\n",
177 CNTR(dma_ch
) = dma_length
;
183 * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer
184 * @dma_ch: i.MX DMA channel number
185 * @sg: pointer to the scatter-gather list/vector
186 * @sgcount: scatter-gather list hungs count
187 * @dma_length: total length of the transfer request in bytes
188 * @dev_addr: physical device port address
189 * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
190 * or %DMA_MODE_WRITE from memory to the device
192 * The function setups DMA channel state and registers to be ready for transfer
193 * specified by provided parameters. The scatter-gather emulation is set up
194 * according to the parameters.
196 * The full preparation of the transfer requires setup of more register
197 * by the caller before imx_dma_enable() can be called.
199 * %BLR(dma_ch) holds transfer burst length in bytes, 0 means 64 bytes
201 * %RSSR(dma_ch) has to be set to the DMA request line source %DMA_REQ_xxx
203 * %CCR(dma_ch) has to specify transfer parameters, the next settings is typical
204 * for linear or simple scatter-gather transfers if %DMA_MODE_READ is specified
206 * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x
208 * The typical setup for %DMA_MODE_WRITE is specified by next options combination
210 * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
212 * Be carefull there and do not mistakenly mix source and target device
213 * port sizes constants, they are really different:
214 * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
215 * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
217 * Return value: if incorrect parameters are provided -%EINVAL.
218 * Zero indicates success.
221 imx_dma_setup_sg(imx_dmach_t dma_ch
,
222 struct scatterlist
*sg
, unsigned int sgcount
, unsigned int dma_length
,
223 unsigned int dev_addr
, dmamode_t dmamode
)
226 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
230 imxdma
->dma_mode
= dmamode
;
231 imxdma
->resbytes
= dma_length
;
233 if (!sg
|| !sgcount
) {
234 printk(KERN_ERR
"imxdma%d: imx_dma_setup_sg epty sg list\n",
240 printk(KERN_ERR
"imxdma%d: imx_dma_setup_sg zero length\n",
245 if ((dmamode
& DMA_MODE_MASK
) == DMA_MODE_READ
) {
246 pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for read\n",
247 dma_ch
, sg
, sgcount
, dma_length
, dev_addr
);
248 SAR(dma_ch
) = dev_addr
;
249 } else if ((dmamode
& DMA_MODE_MASK
) == DMA_MODE_WRITE
) {
250 pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for write\n",
251 dma_ch
, sg
, sgcount
, dma_length
, dev_addr
);
252 DAR(dma_ch
) = dev_addr
;
254 printk(KERN_ERR
"imxdma%d: imx_dma_setup_sg bad dmamode\n",
259 res
= imx_dma_setup_sg_base(dma_ch
, sg
, sgcount
);
261 printk(KERN_ERR
"imxdma%d: no sg chunk ready\n", dma_ch
);
269 * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification handlers
270 * @dma_ch: i.MX DMA channel number
271 * @irq_handler: the pointer to the function called if the transfer
273 * @err_handler: the pointer to the function called if the premature
274 * end caused by error occurs
275 * @data: user specified value to be passed to the handlers
278 imx_dma_setup_handlers(imx_dmach_t dma_ch
,
279 void (*irq_handler
) (int, void *, struct pt_regs
*),
280 void (*err_handler
) (int, void *, struct pt_regs
*),
283 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
287 printk(KERN_CRIT
"%s: called for not allocated channel %d\n",
288 __FUNCTION__
, dma_ch
);
292 local_irq_save(flags
);
293 DISR
= (1 << dma_ch
);
294 imxdma
->irq_handler
= irq_handler
;
295 imxdma
->err_handler
= err_handler
;
297 local_irq_restore(flags
);
302 * imx_dma_enable - function to start i.MX DMA channel operation
303 * @dma_ch: i.MX DMA channel number
305 * The channel has to be allocated by driver through imx_dma_request()
306 * or imx_dma_request_by_prio() function.
307 * The transfer parameters has to be set to the channel registers through
308 * call of the imx_dma_setup_single() or imx_dma_setup_sg() function
309 * and registers %BLR(dma_ch), %RSSR(dma_ch) and %CCR(dma_ch) has to
310 * be set prior this function call by the channel user.
312 void imx_dma_enable(imx_dmach_t dma_ch
)
314 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
317 pr_debug("imxdma%d: imx_dma_enable\n", dma_ch
);
320 printk(KERN_CRIT
"%s: called for not allocated channel %d\n",
321 __FUNCTION__
, dma_ch
);
325 local_irq_save(flags
);
326 DISR
= (1 << dma_ch
);
327 DIMR
&= ~(1 << dma_ch
);
328 CCR(dma_ch
) |= CCR_CEN
;
329 local_irq_restore(flags
);
333 * imx_dma_disable - stop, finish i.MX DMA channel operatin
334 * @dma_ch: i.MX DMA channel number
336 void imx_dma_disable(imx_dmach_t dma_ch
)
340 pr_debug("imxdma%d: imx_dma_disable\n", dma_ch
);
342 local_irq_save(flags
);
343 DIMR
|= (1 << dma_ch
);
344 CCR(dma_ch
) &= ~CCR_CEN
;
345 DISR
= (1 << dma_ch
);
346 local_irq_restore(flags
);
350 * imx_dma_request - request/allocate specified channel number
351 * @dma_ch: i.MX DMA channel number
352 * @name: the driver/caller own non-%NULL identification
354 int imx_dma_request(imx_dmach_t dma_ch
, const char *name
)
356 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
359 /* basic sanity checks */
363 if (dma_ch
>= IMX_DMA_CHANNELS
) {
364 printk(KERN_CRIT
"%s: called for non-existed channel %d\n",
365 __FUNCTION__
, dma_ch
);
369 local_irq_save(flags
);
371 local_irq_restore(flags
);
376 imxdma
->irq_handler
= NULL
;
377 imxdma
->err_handler
= NULL
;
380 local_irq_restore(flags
);
385 * imx_dma_free - release previously acquired channel
386 * @dma_ch: i.MX DMA channel number
388 void imx_dma_free(imx_dmach_t dma_ch
)
391 struct imx_dma_channel
*imxdma
= &imx_dma_channels
[dma_ch
];
395 "%s: trying to free channel %d which is already freed\n",
396 __FUNCTION__
, dma_ch
);
400 local_irq_save(flags
);
401 /* Disable interrupts */
402 DIMR
|= (1 << dma_ch
);
403 CCR(dma_ch
) &= ~CCR_CEN
;
405 local_irq_restore(flags
);
409 * imx_dma_request_by_prio - find and request some of free channels best suiting requested priority
410 * @dma_ch: i.MX DMA channel number
411 * @name: the driver/caller own non-%NULL identification
412 * @prio: one of the hardware distinguished priority level:
413 * %DMA_PRIO_HIGH, %DMA_PRIO_MEDIUM, %DMA_PRIO_LOW
415 * This function tries to find free channel in the specified priority group
416 * if the priority cannot be achieved it tries to look for free channel
417 * in the higher and then even lower priority groups.
419 * Return value: If there is no free channel to allocate, -%ENODEV is returned.
420 * Zero value indicates successful channel allocation.
423 imx_dma_request_by_prio(imx_dmach_t
* pdma_ch
, const char *name
,
430 case (DMA_PRIO_HIGH
):
433 case (DMA_PRIO_MEDIUM
):
442 for (i
= best
; i
< IMX_DMA_CHANNELS
; i
++) {
443 if (!imx_dma_request(i
, name
)) {
449 for (i
= best
- 1; i
>= 0; i
--) {
450 if (!imx_dma_request(i
, name
)) {
456 printk(KERN_ERR
"%s: no free DMA channel found\n", __FUNCTION__
);
461 static irqreturn_t
dma_err_handler(int irq
, void *dev_id
, struct pt_regs
*regs
)
464 struct imx_dma_channel
*channel
;
465 unsigned int err_mask
= DBTOSR
| DRTOSR
| DSESR
| DBOSR
;
468 for (i
= 0; i
< IMX_DMA_CHANNELS
; i
++) {
469 channel
= &imx_dma_channels
[i
];
471 if ((err_mask
& 1 << i
) && channel
->name
472 && channel
->err_handler
) {
473 channel
->err_handler(i
, channel
->data
, regs
);
477 imx_dma_channels
[i
].sg
= NULL
;
479 if (DBTOSR
& (1 << i
)) {
481 "Burst timeout on channel %d (%s)\n",
485 if (DRTOSR
& (1 << i
)) {
487 "Request timeout on channel %d (%s)\n",
491 if (DSESR
& (1 << i
)) {
493 "Transfer timeout on channel %d (%s)\n",
497 if (DBOSR
& (1 << i
)) {
499 "Buffer overflow timeout on channel %d (%s)\n",
507 static irqreturn_t
dma_irq_handler(int irq
, void *dev_id
, struct pt_regs
*regs
)
511 pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
515 for (i
= 0; i
< IMX_DMA_CHANNELS
; i
++) {
516 if (disr
& (1 << i
)) {
517 struct imx_dma_channel
*channel
= &imx_dma_channels
[i
];
519 if (imx_dma_sg_next(i
, CNTR(i
))) {
524 if (channel
->irq_handler
)
525 channel
->irq_handler(i
,
526 channel
->data
, regs
);
530 * IRQ for an unregistered DMA channel:
531 * let's clear the interrupts and disable it.
534 "spurious IRQ for DMA channel %d\n", i
);
541 static int __init
imx_dma_init(void)
546 /* reset DMA module */
549 ret
= request_irq(DMA_INT
, dma_irq_handler
, 0, "DMA", NULL
);
551 printk(KERN_CRIT
"Wow! Can't register IRQ for DMA\n");
555 ret
= request_irq(DMA_ERR
, dma_err_handler
, 0, "DMA", NULL
);
557 printk(KERN_CRIT
"Wow! Can't register ERRIRQ for DMA\n");
558 free_irq(DMA_INT
, NULL
);
561 /* enable DMA module */
564 /* clear all interrupts */
565 DISR
= (1 << IMX_DMA_CHANNELS
) - 1;
567 /* enable interrupts */
568 DIMR
= (1 << IMX_DMA_CHANNELS
) - 1;
570 for (i
= 0; i
< IMX_DMA_CHANNELS
; i
++) {
571 imx_dma_channels
[i
].sg
= NULL
;
572 imx_dma_channels
[i
].dma_num
= i
;
578 arch_initcall(imx_dma_init
);
580 EXPORT_SYMBOL(imx_dma_setup_single
);
581 EXPORT_SYMBOL(imx_dma_setup_sg
);
582 EXPORT_SYMBOL(imx_dma_setup_handlers
);
583 EXPORT_SYMBOL(imx_dma_enable
);
584 EXPORT_SYMBOL(imx_dma_disable
);
585 EXPORT_SYMBOL(imx_dma_request
);
586 EXPORT_SYMBOL(imx_dma_free
);
587 EXPORT_SYMBOL(imx_dma_request_by_prio
);
588 EXPORT_SYMBOL(imx_dma_channels
);