2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
26 #include "rtl8187_rtl8225.h"
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
33 static struct usb_device_id rtl8187_table
[] __devinitdata
= {
35 {USB_DEVICE(0x0b05, 0x171d), .driver_info
= DEVICE_RTL8187
},
37 {USB_DEVICE(0x050d, 0x705e), .driver_info
= DEVICE_RTL8187B
},
39 {USB_DEVICE(0x0bda, 0x8187), .driver_info
= DEVICE_RTL8187
},
40 {USB_DEVICE(0x0bda, 0x8189), .driver_info
= DEVICE_RTL8187B
},
41 {USB_DEVICE(0x0bda, 0x8197), .driver_info
= DEVICE_RTL8187B
},
42 {USB_DEVICE(0x0bda, 0x8198), .driver_info
= DEVICE_RTL8187B
},
44 {USB_DEVICE(0x0846, 0x6100), .driver_info
= DEVICE_RTL8187
},
45 {USB_DEVICE(0x0846, 0x6a00), .driver_info
= DEVICE_RTL8187
},
46 {USB_DEVICE(0x0846, 0x4260), .driver_info
= DEVICE_RTL8187B
},
48 {USB_DEVICE(0x03f0, 0xca02), .driver_info
= DEVICE_RTL8187
},
50 {USB_DEVICE(0x0df6, 0x000d), .driver_info
= DEVICE_RTL8187
},
52 {USB_DEVICE(0x13d1, 0xabe6), .driver_info
= DEVICE_RTL8187
},
56 MODULE_DEVICE_TABLE(usb
, rtl8187_table
);
58 static const struct ieee80211_rate rtl818x_rates
[] = {
59 { .bitrate
= 10, .hw_value
= 0, },
60 { .bitrate
= 20, .hw_value
= 1, },
61 { .bitrate
= 55, .hw_value
= 2, },
62 { .bitrate
= 110, .hw_value
= 3, },
63 { .bitrate
= 60, .hw_value
= 4, },
64 { .bitrate
= 90, .hw_value
= 5, },
65 { .bitrate
= 120, .hw_value
= 6, },
66 { .bitrate
= 180, .hw_value
= 7, },
67 { .bitrate
= 240, .hw_value
= 8, },
68 { .bitrate
= 360, .hw_value
= 9, },
69 { .bitrate
= 480, .hw_value
= 10, },
70 { .bitrate
= 540, .hw_value
= 11, },
73 static const struct ieee80211_channel rtl818x_channels
[] = {
74 { .center_freq
= 2412 },
75 { .center_freq
= 2417 },
76 { .center_freq
= 2422 },
77 { .center_freq
= 2427 },
78 { .center_freq
= 2432 },
79 { .center_freq
= 2437 },
80 { .center_freq
= 2442 },
81 { .center_freq
= 2447 },
82 { .center_freq
= 2452 },
83 { .center_freq
= 2457 },
84 { .center_freq
= 2462 },
85 { .center_freq
= 2467 },
86 { .center_freq
= 2472 },
87 { .center_freq
= 2484 },
90 static void rtl8187_iowrite_async_cb(struct urb
*urb
)
96 static void rtl8187_iowrite_async(struct rtl8187_priv
*priv
, __le16 addr
,
99 struct usb_ctrlrequest
*dr
;
101 struct rtl8187_async_write_data
{
103 struct usb_ctrlrequest dr
;
107 buf
= kmalloc(sizeof(*buf
), GFP_ATOMIC
);
111 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
119 dr
->bRequestType
= RTL8187_REQT_WRITE
;
120 dr
->bRequest
= RTL8187_REQ_SET_REG
;
123 dr
->wLength
= cpu_to_le16(len
);
125 memcpy(buf
, data
, len
);
127 usb_fill_control_urb(urb
, priv
->udev
, usb_sndctrlpipe(priv
->udev
, 0),
128 (unsigned char *)dr
, buf
, len
,
129 rtl8187_iowrite_async_cb
, buf
);
130 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
137 static inline void rtl818x_iowrite32_async(struct rtl8187_priv
*priv
,
138 __le32
*addr
, u32 val
)
140 __le32 buf
= cpu_to_le32(val
);
142 rtl8187_iowrite_async(priv
, cpu_to_le16((unsigned long)addr
),
146 void rtl8187_write_phy(struct ieee80211_hw
*dev
, u8 addr
, u32 data
)
148 struct rtl8187_priv
*priv
= dev
->priv
;
153 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[3], (data
>> 24) & 0xFF);
154 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[2], (data
>> 16) & 0xFF);
155 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[1], (data
>> 8) & 0xFF);
156 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[0], data
& 0xFF);
161 static void rtl8187_tx_cb(struct urb
*urb
)
163 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
164 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
165 struct ieee80211_hw
*hw
= info
->driver_data
[0];
166 struct rtl8187_priv
*priv
= hw
->priv
;
168 usb_free_urb(info
->driver_data
[1]);
169 skb_pull(skb
, priv
->is_rtl8187b
? sizeof(struct rtl8187b_tx_hdr
) :
170 sizeof(struct rtl8187_tx_hdr
));
171 memset(&info
->status
, 0, sizeof(info
->status
));
172 info
->flags
|= IEEE80211_TX_STAT_ACK
;
173 ieee80211_tx_status_irqsafe(hw
, skb
);
176 static int rtl8187_tx(struct ieee80211_hw
*dev
, struct sk_buff
*skb
)
178 struct rtl8187_priv
*priv
= dev
->priv
;
179 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
180 struct ieee80211_hdr
*ieee80211hdr
= (struct ieee80211_hdr
*)skb
->data
;
188 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
195 flags
|= RTL818X_TX_DESC_FLAG_NO_ENC
;
197 flags
|= ieee80211_get_tx_rate(dev
, info
)->hw_value
<< 24;
198 if (ieee80211_has_morefrags(((struct ieee80211_hdr
*)skb
->data
)->frame_control
))
199 flags
|= RTL818X_TX_DESC_FLAG_MOREFRAG
;
200 if (info
->flags
& IEEE80211_TX_CTL_USE_RTS_CTS
) {
201 flags
|= RTL818X_TX_DESC_FLAG_RTS
;
202 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
203 rts_dur
= ieee80211_rts_duration(dev
, priv
->vif
,
205 } else if (info
->flags
& IEEE80211_TX_CTL_USE_CTS_PROTECT
) {
206 flags
|= RTL818X_TX_DESC_FLAG_CTS
;
207 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
210 if (!priv
->is_rtl8187b
) {
211 struct rtl8187_tx_hdr
*hdr
=
212 (struct rtl8187_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
213 hdr
->flags
= cpu_to_le32(flags
);
215 hdr
->rts_duration
= rts_dur
;
216 hdr
->retry
= cpu_to_le32(info
->control
.retry_limit
<< 8);
221 /* fc needs to be calculated before skb_push() */
222 unsigned int epmap
[4] = { 6, 7, 5, 4 };
223 struct ieee80211_hdr
*tx_hdr
=
224 (struct ieee80211_hdr
*)(skb
->data
);
225 u16 fc
= le16_to_cpu(tx_hdr
->frame_control
);
227 struct rtl8187b_tx_hdr
*hdr
=
228 (struct rtl8187b_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
229 struct ieee80211_rate
*txrate
=
230 ieee80211_get_tx_rate(dev
, info
);
231 memset(hdr
, 0, sizeof(*hdr
));
232 hdr
->flags
= cpu_to_le32(flags
);
233 hdr
->rts_duration
= rts_dur
;
234 hdr
->retry
= cpu_to_le32(info
->control
.retry_limit
<< 8);
236 ieee80211_generic_frame_duration(dev
, priv
->vif
,
240 if ((fc
& IEEE80211_FCTL_FTYPE
) == IEEE80211_FTYPE_MGMT
)
243 ep
= epmap
[skb_get_queue_mapping(skb
)];
246 /* FIXME: The sequence that follows is needed for this driver to
247 * work with mac80211 since "mac80211: fix TX sequence numbers".
248 * As with the temporary code in rt2x00, changes will be needed
249 * to get proper sequence numbers on beacons. In addition, this
250 * patch places the sequence number in the hardware state, which
251 * limits us to a single virtual state.
253 if (info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
254 if (info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
256 ieee80211hdr
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
257 ieee80211hdr
->seq_ctrl
|= cpu_to_le16(priv
->seqno
);
260 info
->driver_data
[0] = dev
;
261 info
->driver_data
[1] = urb
;
263 usb_fill_bulk_urb(urb
, priv
->udev
, usb_sndbulkpipe(priv
->udev
, ep
),
264 buf
, skb
->len
, rtl8187_tx_cb
, skb
);
265 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
274 static void rtl8187_rx_cb(struct urb
*urb
)
276 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
277 struct rtl8187_rx_info
*info
= (struct rtl8187_rx_info
*)skb
->cb
;
278 struct ieee80211_hw
*dev
= info
->dev
;
279 struct rtl8187_priv
*priv
= dev
->priv
;
280 struct ieee80211_rx_status rx_status
= { 0 };
285 spin_lock(&priv
->rx_queue
.lock
);
287 __skb_unlink(skb
, &priv
->rx_queue
);
289 spin_unlock(&priv
->rx_queue
.lock
);
292 spin_unlock(&priv
->rx_queue
.lock
);
294 if (unlikely(urb
->status
)) {
296 dev_kfree_skb_irq(skb
);
300 skb_put(skb
, urb
->actual_length
);
301 if (!priv
->is_rtl8187b
) {
302 struct rtl8187_rx_hdr
*hdr
=
303 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
304 flags
= le32_to_cpu(hdr
->flags
);
305 signal
= hdr
->signal
& 0x7f;
306 rx_status
.antenna
= (hdr
->signal
>> 7) & 1;
307 rx_status
.noise
= hdr
->noise
;
308 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
309 priv
->quality
= signal
;
310 rx_status
.qual
= priv
->quality
;
311 priv
->noise
= hdr
->noise
;
312 rate
= (flags
>> 20) & 0xF;
313 if (rate
> 3) { /* OFDM rate */
316 else if (signal
< 25)
318 signal
= 90 - signal
;
319 } else { /* CCK rate */
322 else if (signal
< 30)
324 signal
= 95 - signal
;
326 rx_status
.signal
= signal
;
327 priv
->signal
= signal
;
329 struct rtl8187b_rx_hdr
*hdr
=
330 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
331 /* The Realtek datasheet for the RTL8187B shows that the RX
332 * header contains the following quantities: signal quality,
333 * RSSI, AGC, the received power in dB, and the measured SNR.
334 * In testing, none of these quantities show qualitative
335 * agreement with AP signal strength, except for the AGC,
336 * which is inversely proportional to the strength of the
337 * signal. In the following, the quality and signal strength
338 * are derived from the AGC. The arbitrary scaling constants
339 * are chosen to make the results close to the values obtained
340 * for a BCM4312 using b43 as the driver. The noise is ignored
343 flags
= le32_to_cpu(hdr
->flags
);
344 quality
= 170 - hdr
->agc
;
347 signal
= 14 - hdr
->agc
/ 2;
348 rx_status
.qual
= quality
;
349 priv
->quality
= quality
;
350 rx_status
.signal
= signal
;
351 priv
->signal
= signal
;
352 rx_status
.antenna
= (hdr
->rssi
>> 7) & 1;
353 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
354 rate
= (flags
>> 20) & 0xF;
357 skb_trim(skb
, flags
& 0x0FFF);
358 rx_status
.rate_idx
= rate
;
359 rx_status
.freq
= dev
->conf
.channel
->center_freq
;
360 rx_status
.band
= dev
->conf
.channel
->band
;
361 rx_status
.flag
|= RX_FLAG_TSFT
;
362 if (flags
& RTL818X_RX_DESC_FLAG_CRC32_ERR
)
363 rx_status
.flag
|= RX_FLAG_FAILED_FCS_CRC
;
364 ieee80211_rx_irqsafe(dev
, skb
, &rx_status
);
366 skb
= dev_alloc_skb(RTL8187_MAX_RX
);
367 if (unlikely(!skb
)) {
369 /* TODO check rx queue length and refill *somewhere* */
373 info
= (struct rtl8187_rx_info
*)skb
->cb
;
376 urb
->transfer_buffer
= skb_tail_pointer(skb
);
378 skb_queue_tail(&priv
->rx_queue
, skb
);
380 usb_submit_urb(urb
, GFP_ATOMIC
);
383 static int rtl8187_init_urbs(struct ieee80211_hw
*dev
)
385 struct rtl8187_priv
*priv
= dev
->priv
;
388 struct rtl8187_rx_info
*info
;
390 while (skb_queue_len(&priv
->rx_queue
) < 8) {
391 skb
= __dev_alloc_skb(RTL8187_MAX_RX
, GFP_KERNEL
);
394 entry
= usb_alloc_urb(0, GFP_KERNEL
);
399 usb_fill_bulk_urb(entry
, priv
->udev
,
400 usb_rcvbulkpipe(priv
->udev
,
401 priv
->is_rtl8187b
? 3 : 1),
402 skb_tail_pointer(skb
),
403 RTL8187_MAX_RX
, rtl8187_rx_cb
, skb
);
404 info
= (struct rtl8187_rx_info
*)skb
->cb
;
407 skb_queue_tail(&priv
->rx_queue
, skb
);
408 usb_submit_urb(entry
, GFP_KERNEL
);
414 static int rtl8187_cmd_reset(struct ieee80211_hw
*dev
)
416 struct rtl8187_priv
*priv
= dev
->priv
;
420 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
422 reg
|= RTL818X_CMD_RESET
;
423 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
428 if (!(rtl818x_ioread8(priv
, &priv
->map
->CMD
) &
434 printk(KERN_ERR
"%s: Reset timeout!\n", wiphy_name(dev
->wiphy
));
438 /* reload registers from eeprom */
439 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_LOAD
);
444 if (!(rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
) &
445 RTL818X_EEPROM_CMD_CONFIG
))
450 printk(KERN_ERR
"%s: eeprom reset timeout!\n",
451 wiphy_name(dev
->wiphy
));
458 static int rtl8187_init_hw(struct ieee80211_hw
*dev
)
460 struct rtl8187_priv
*priv
= dev
->priv
;
465 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
466 RTL818X_EEPROM_CMD_CONFIG
);
467 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
468 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
|
469 RTL818X_CONFIG3_ANAPARAM_WRITE
);
470 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
471 RTL8187_RTL8225_ANAPARAM_ON
);
472 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
473 RTL8187_RTL8225_ANAPARAM2_ON
);
474 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
&
475 ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
476 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
477 RTL818X_EEPROM_CMD_NORMAL
);
479 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
482 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x10);
483 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x11);
484 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x00);
487 res
= rtl8187_cmd_reset(dev
);
491 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
492 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
493 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
494 reg
| RTL818X_CONFIG3_ANAPARAM_WRITE
);
495 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
496 RTL8187_RTL8225_ANAPARAM_ON
);
497 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
498 RTL8187_RTL8225_ANAPARAM2_ON
);
499 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
500 reg
& ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
501 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
504 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
505 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0);
507 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
508 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 1);
509 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
511 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
513 rtl818x_iowrite16(priv
, (__le16
*)0xFFF4, 0xFFFF);
514 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
517 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, reg
);
519 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
521 rtl818x_iowrite32(priv
, &priv
->map
->INT_TIMEOUT
, 0);
522 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
523 rtl818x_iowrite8(priv
, &priv
->map
->RATE_FALLBACK
, 0x81);
525 // TODO: set RESP_RATE and BRSR properly
526 rtl818x_iowrite8(priv
, &priv
->map
->RESP_RATE
, (8 << 4) | 0);
527 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
530 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
531 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0);
532 reg
= rtl818x_ioread8(priv
, (u8
*)0xFE53);
533 rtl818x_iowrite8(priv
, (u8
*)0xFE53, reg
| (1 << 7));
534 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
535 rtl818x_iowrite8(priv
, &priv
->map
->GPIO
, 0x20);
536 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
537 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x80);
538 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x80);
539 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x80);
542 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x000a8008);
543 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0xFFFF);
544 rtl818x_iowrite32(priv
, &priv
->map
->RF_PARA
, 0x00100044);
545 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
546 RTL818X_EEPROM_CMD_CONFIG
);
547 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, 0x44);
548 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
549 RTL818X_EEPROM_CMD_NORMAL
);
550 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FF7);
555 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
556 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
557 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
558 rtl818x_iowrite16(priv
, (__le16
*)0xFFFE, 0x10);
559 rtl818x_iowrite8(priv
, &priv
->map
->TALLY_SEL
, 0x80);
560 rtl818x_iowrite8(priv
, (u8
*)0xFFFF, 0x60);
561 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
566 static const u8 rtl8187b_reg_table
[][3] = {
567 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
568 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
569 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
570 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
572 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
573 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
574 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
575 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
576 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
577 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
579 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
580 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
581 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
582 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
583 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
584 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
585 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
588 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
589 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
590 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
591 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
592 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
594 {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
595 {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
598 static int rtl8187b_init_hw(struct ieee80211_hw
*dev
)
600 struct rtl8187_priv
*priv
= dev
->priv
;
604 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
605 RTL818X_EEPROM_CMD_CONFIG
);
607 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
608 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
| RTL818X_CONFIG3_GNT_SELECT
;
609 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
610 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
611 RTL8187B_RTL8225_ANAPARAM2_ON
);
612 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
613 RTL8187B_RTL8225_ANAPARAM_ON
);
614 rtl818x_iowrite8(priv
, &priv
->map
->ANAPARAM3
,
615 RTL8187B_RTL8225_ANAPARAM3_ON
);
617 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0x10);
618 reg
= rtl818x_ioread8(priv
, (u8
*)0xFF62);
619 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
& ~(1 << 5));
620 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
| (1 << 5));
622 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
623 reg
&= ~RTL818X_CONFIG3_ANAPARAM_WRITE
;
624 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
626 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
627 RTL818X_EEPROM_CMD_NORMAL
);
629 res
= rtl8187_cmd_reset(dev
);
633 rtl818x_iowrite16(priv
, (__le16
*)0xFF2D, 0x0FFF);
634 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
635 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
636 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
637 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
638 reg
|= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
|
639 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
640 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
642 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFE0, 0x0FFF, 1);
643 reg
= rtl818x_ioread8(priv
, &priv
->map
->RATE_FALLBACK
);
644 reg
|= RTL818X_RATE_FALLBACK_ENABLE
;
645 rtl818x_iowrite8(priv
, &priv
->map
->RATE_FALLBACK
, reg
);
647 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
648 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
649 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFD4, 0xFFFF, 1);
651 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
652 RTL818X_EEPROM_CMD_CONFIG
);
653 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
654 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, (reg
& 0x3F) | 0x80);
655 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
656 RTL818X_EEPROM_CMD_NORMAL
);
658 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
659 for (i
= 0; i
< ARRAY_SIZE(rtl8187b_reg_table
); i
++) {
660 rtl818x_iowrite8_idx(priv
,
662 (rtl8187b_reg_table
[i
][0] | 0xFF00),
663 rtl8187b_reg_table
[i
][1],
664 rtl8187b_reg_table
[i
][2]);
667 rtl818x_iowrite16(priv
, &priv
->map
->TID_AC_MAP
, 0xFA50);
668 rtl818x_iowrite16(priv
, &priv
->map
->INT_MIG
, 0);
670 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF0, 0, 1);
671 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF4, 0, 1);
672 rtl818x_iowrite8_idx(priv
, (u8
*)0xFFF8, 0, 1);
674 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x00004001);
676 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x569A, 2);
678 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
679 RTL818X_EEPROM_CMD_CONFIG
);
680 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
681 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
;
682 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
683 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
684 RTL818X_EEPROM_CMD_NORMAL
);
686 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x0480);
687 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x2488);
688 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FFF);
693 reg
= RTL818X_CMD_TX_ENABLE
| RTL818X_CMD_RX_ENABLE
;
694 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
695 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
697 rtl818x_iowrite8(priv
, (u8
*)0xFE41, 0xF4);
698 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x00);
699 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
700 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
701 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x0F);
702 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
703 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
705 reg
= rtl818x_ioread8(priv
, (u8
*)0xFFDB);
706 rtl818x_iowrite8(priv
, (u8
*)0xFFDB, reg
| (1 << 2));
707 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x59FA, 3);
708 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF74, 0x59D2, 3);
709 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF76, 0x59D2, 3);
710 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF78, 0x19FA, 3);
711 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7A, 0x19FA, 3);
712 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7C, 0x00D0, 3);
713 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0);
714 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF80, 0x0F, 1);
715 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF83, 0x03, 1);
716 rtl818x_iowrite8(priv
, (u8
*)0xFFDA, 0x10);
717 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF4D, 0x08, 2);
719 rtl818x_iowrite32(priv
, &priv
->map
->HSSI_PARA
, 0x0600321B);
721 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFEC, 0x0800, 1);
726 static int rtl8187_start(struct ieee80211_hw
*dev
)
728 struct rtl8187_priv
*priv
= dev
->priv
;
732 ret
= (!priv
->is_rtl8187b
) ? rtl8187_init_hw(dev
) :
733 rtl8187b_init_hw(dev
);
737 mutex_lock(&priv
->conf_mutex
);
738 if (priv
->is_rtl8187b
) {
739 reg
= RTL818X_RX_CONF_MGMT
|
740 RTL818X_RX_CONF_DATA
|
741 RTL818X_RX_CONF_BROADCAST
|
742 RTL818X_RX_CONF_NICMAC
|
743 RTL818X_RX_CONF_BSSID
|
744 (7 << 13 /* RX FIFO threshold NONE */) |
745 (7 << 10 /* MAX RX DMA */) |
746 RTL818X_RX_CONF_RX_AUTORESETPHY
|
747 RTL818X_RX_CONF_ONLYERLPKT
|
748 RTL818X_RX_CONF_MULTICAST
;
750 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
752 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
753 RTL818X_TX_CONF_HW_SEQNUM
|
754 RTL818X_TX_CONF_DISREQQSIZE
|
755 (7 << 8 /* short retry limit */) |
756 (7 << 0 /* long retry limit */) |
757 (7 << 21 /* MAX TX DMA */));
758 rtl8187_init_urbs(dev
);
759 mutex_unlock(&priv
->conf_mutex
);
763 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
765 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[0], ~0);
766 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[1], ~0);
768 rtl8187_init_urbs(dev
);
770 reg
= RTL818X_RX_CONF_ONLYERLPKT
|
771 RTL818X_RX_CONF_RX_AUTORESETPHY
|
772 RTL818X_RX_CONF_BSSID
|
773 RTL818X_RX_CONF_MGMT
|
774 RTL818X_RX_CONF_DATA
|
775 (7 << 13 /* RX FIFO threshold NONE */) |
776 (7 << 10 /* MAX RX DMA */) |
777 RTL818X_RX_CONF_BROADCAST
|
778 RTL818X_RX_CONF_NICMAC
;
781 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
783 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
784 reg
&= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT
;
785 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
786 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
788 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
789 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
;
790 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
791 reg
&= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT
;
792 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
794 reg
= RTL818X_TX_CONF_CW_MIN
|
795 (7 << 21 /* MAX TX DMA */) |
796 RTL818X_TX_CONF_NO_ICV
;
797 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
799 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
800 reg
|= RTL818X_CMD_TX_ENABLE
;
801 reg
|= RTL818X_CMD_RX_ENABLE
;
802 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
803 mutex_unlock(&priv
->conf_mutex
);
808 static void rtl8187_stop(struct ieee80211_hw
*dev
)
810 struct rtl8187_priv
*priv
= dev
->priv
;
811 struct rtl8187_rx_info
*info
;
815 mutex_lock(&priv
->conf_mutex
);
816 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
818 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
819 reg
&= ~RTL818X_CMD_TX_ENABLE
;
820 reg
&= ~RTL818X_CMD_RX_ENABLE
;
821 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
825 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
826 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG4
);
827 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG4
, reg
| RTL818X_CONFIG4_VCOOFF
);
828 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
830 while ((skb
= skb_dequeue(&priv
->rx_queue
))) {
831 info
= (struct rtl8187_rx_info
*)skb
->cb
;
832 usb_kill_urb(info
->urb
);
835 mutex_unlock(&priv
->conf_mutex
);
838 static int rtl8187_add_interface(struct ieee80211_hw
*dev
,
839 struct ieee80211_if_init_conf
*conf
)
841 struct rtl8187_priv
*priv
= dev
->priv
;
844 if (priv
->mode
!= NL80211_IFTYPE_MONITOR
)
847 switch (conf
->type
) {
848 case NL80211_IFTYPE_STATION
:
849 priv
->mode
= conf
->type
;
855 mutex_lock(&priv
->conf_mutex
);
856 priv
->vif
= conf
->vif
;
858 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
859 for (i
= 0; i
< ETH_ALEN
; i
++)
860 rtl818x_iowrite8(priv
, &priv
->map
->MAC
[i
],
861 ((u8
*)conf
->mac_addr
)[i
]);
862 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
864 mutex_unlock(&priv
->conf_mutex
);
868 static void rtl8187_remove_interface(struct ieee80211_hw
*dev
,
869 struct ieee80211_if_init_conf
*conf
)
871 struct rtl8187_priv
*priv
= dev
->priv
;
872 mutex_lock(&priv
->conf_mutex
);
873 priv
->mode
= NL80211_IFTYPE_MONITOR
;
875 mutex_unlock(&priv
->conf_mutex
);
878 static int rtl8187_config(struct ieee80211_hw
*dev
, struct ieee80211_conf
*conf
)
880 struct rtl8187_priv
*priv
= dev
->priv
;
883 mutex_lock(&priv
->conf_mutex
);
884 reg
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
885 /* Enable TX loopback on MAC level to avoid TX during channel
886 * changes, as this has be seen to causes problems and the
887 * card will stop work until next reset
889 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
890 reg
| RTL818X_TX_CONF_LOOPBACK_MAC
);
892 priv
->rf
->set_chan(dev
, conf
);
894 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
896 if (!priv
->is_rtl8187b
) {
897 rtl818x_iowrite8(priv
, &priv
->map
->SIFS
, 0x22);
899 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
) {
900 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x9);
901 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x14);
902 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x14);
903 rtl818x_iowrite8(priv
, &priv
->map
->CW_VAL
, 0x73);
905 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x14);
906 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x24);
907 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x24);
908 rtl818x_iowrite8(priv
, &priv
->map
->CW_VAL
, 0xa5);
912 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
913 rtl818x_iowrite16(priv
, &priv
->map
->ATIMTR_INTERVAL
, 100);
914 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
915 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL_TIME
, 100);
916 mutex_unlock(&priv
->conf_mutex
);
920 static int rtl8187_config_interface(struct ieee80211_hw
*dev
,
921 struct ieee80211_vif
*vif
,
922 struct ieee80211_if_conf
*conf
)
924 struct rtl8187_priv
*priv
= dev
->priv
;
928 mutex_lock(&priv
->conf_mutex
);
929 for (i
= 0; i
< ETH_ALEN
; i
++)
930 rtl818x_iowrite8(priv
, &priv
->map
->BSSID
[i
], conf
->bssid
[i
]);
932 if (is_valid_ether_addr(conf
->bssid
)) {
933 reg
= RTL818X_MSR_INFRA
;
934 if (priv
->is_rtl8187b
)
935 reg
|= RTL818X_MSR_ENEDCA
;
936 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
938 reg
= RTL818X_MSR_NO_LINK
;
939 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
942 mutex_unlock(&priv
->conf_mutex
);
946 static void rtl8187_configure_filter(struct ieee80211_hw
*dev
,
947 unsigned int changed_flags
,
948 unsigned int *total_flags
,
949 int mc_count
, struct dev_addr_list
*mclist
)
951 struct rtl8187_priv
*priv
= dev
->priv
;
953 if (changed_flags
& FIF_FCSFAIL
)
954 priv
->rx_conf
^= RTL818X_RX_CONF_FCS
;
955 if (changed_flags
& FIF_CONTROL
)
956 priv
->rx_conf
^= RTL818X_RX_CONF_CTRL
;
957 if (changed_flags
& FIF_OTHER_BSS
)
958 priv
->rx_conf
^= RTL818X_RX_CONF_MONITOR
;
959 if (*total_flags
& FIF_ALLMULTI
|| mc_count
> 0)
960 priv
->rx_conf
|= RTL818X_RX_CONF_MULTICAST
;
962 priv
->rx_conf
&= ~RTL818X_RX_CONF_MULTICAST
;
966 if (priv
->rx_conf
& RTL818X_RX_CONF_FCS
)
967 *total_flags
|= FIF_FCSFAIL
;
968 if (priv
->rx_conf
& RTL818X_RX_CONF_CTRL
)
969 *total_flags
|= FIF_CONTROL
;
970 if (priv
->rx_conf
& RTL818X_RX_CONF_MONITOR
)
971 *total_flags
|= FIF_OTHER_BSS
;
972 if (priv
->rx_conf
& RTL818X_RX_CONF_MULTICAST
)
973 *total_flags
|= FIF_ALLMULTI
;
975 rtl818x_iowrite32_async(priv
, &priv
->map
->RX_CONF
, priv
->rx_conf
);
978 static const struct ieee80211_ops rtl8187_ops
= {
980 .start
= rtl8187_start
,
981 .stop
= rtl8187_stop
,
982 .add_interface
= rtl8187_add_interface
,
983 .remove_interface
= rtl8187_remove_interface
,
984 .config
= rtl8187_config
,
985 .config_interface
= rtl8187_config_interface
,
986 .configure_filter
= rtl8187_configure_filter
,
989 static void rtl8187_eeprom_register_read(struct eeprom_93cx6
*eeprom
)
991 struct ieee80211_hw
*dev
= eeprom
->data
;
992 struct rtl8187_priv
*priv
= dev
->priv
;
993 u8 reg
= rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
);
995 eeprom
->reg_data_in
= reg
& RTL818X_EEPROM_CMD_WRITE
;
996 eeprom
->reg_data_out
= reg
& RTL818X_EEPROM_CMD_READ
;
997 eeprom
->reg_data_clock
= reg
& RTL818X_EEPROM_CMD_CK
;
998 eeprom
->reg_chip_select
= reg
& RTL818X_EEPROM_CMD_CS
;
1001 static void rtl8187_eeprom_register_write(struct eeprom_93cx6
*eeprom
)
1003 struct ieee80211_hw
*dev
= eeprom
->data
;
1004 struct rtl8187_priv
*priv
= dev
->priv
;
1005 u8 reg
= RTL818X_EEPROM_CMD_PROGRAM
;
1007 if (eeprom
->reg_data_in
)
1008 reg
|= RTL818X_EEPROM_CMD_WRITE
;
1009 if (eeprom
->reg_data_out
)
1010 reg
|= RTL818X_EEPROM_CMD_READ
;
1011 if (eeprom
->reg_data_clock
)
1012 reg
|= RTL818X_EEPROM_CMD_CK
;
1013 if (eeprom
->reg_chip_select
)
1014 reg
|= RTL818X_EEPROM_CMD_CS
;
1016 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, reg
);
1020 static int __devinit
rtl8187_probe(struct usb_interface
*intf
,
1021 const struct usb_device_id
*id
)
1023 struct usb_device
*udev
= interface_to_usbdev(intf
);
1024 struct ieee80211_hw
*dev
;
1025 struct rtl8187_priv
*priv
;
1026 struct eeprom_93cx6 eeprom
;
1027 struct ieee80211_channel
*channel
;
1028 const char *chip_name
;
1031 DECLARE_MAC_BUF(mac
);
1033 dev
= ieee80211_alloc_hw(sizeof(*priv
), &rtl8187_ops
);
1035 printk(KERN_ERR
"rtl8187: ieee80211 alloc failed\n");
1040 priv
->is_rtl8187b
= (id
->driver_info
== DEVICE_RTL8187B
);
1042 SET_IEEE80211_DEV(dev
, &intf
->dev
);
1043 usb_set_intfdata(intf
, dev
);
1048 skb_queue_head_init(&priv
->rx_queue
);
1050 BUILD_BUG_ON(sizeof(priv
->channels
) != sizeof(rtl818x_channels
));
1051 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(rtl818x_rates
));
1053 memcpy(priv
->channels
, rtl818x_channels
, sizeof(rtl818x_channels
));
1054 memcpy(priv
->rates
, rtl818x_rates
, sizeof(rtl818x_rates
));
1055 priv
->map
= (struct rtl818x_csr
*)0xFF00;
1057 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
1058 priv
->band
.channels
= priv
->channels
;
1059 priv
->band
.n_channels
= ARRAY_SIZE(rtl818x_channels
);
1060 priv
->band
.bitrates
= priv
->rates
;
1061 priv
->band
.n_bitrates
= ARRAY_SIZE(rtl818x_rates
);
1062 dev
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
1065 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1066 dev
->flags
= IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING
|
1067 IEEE80211_HW_RX_INCLUDES_FCS
;
1070 eeprom
.register_read
= rtl8187_eeprom_register_read
;
1071 eeprom
.register_write
= rtl8187_eeprom_register_write
;
1072 if (rtl818x_ioread32(priv
, &priv
->map
->RX_CONF
) & (1 << 6))
1073 eeprom
.width
= PCI_EEPROM_WIDTH_93C66
;
1075 eeprom
.width
= PCI_EEPROM_WIDTH_93C46
;
1077 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
1080 eeprom_93cx6_multiread(&eeprom
, RTL8187_EEPROM_MAC_ADDR
,
1081 (__le16 __force
*)dev
->wiphy
->perm_addr
, 3);
1082 if (!is_valid_ether_addr(dev
->wiphy
->perm_addr
)) {
1083 printk(KERN_WARNING
"rtl8187: Invalid hwaddr! Using randomly "
1084 "generated MAC address\n");
1085 random_ether_addr(dev
->wiphy
->perm_addr
);
1088 channel
= priv
->channels
;
1089 for (i
= 0; i
< 3; i
++) {
1090 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_1
+ i
,
1092 (*channel
++).hw_value
= txpwr
& 0xFF;
1093 (*channel
++).hw_value
= txpwr
>> 8;
1095 for (i
= 0; i
< 2; i
++) {
1096 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_4
+ i
,
1098 (*channel
++).hw_value
= txpwr
& 0xFF;
1099 (*channel
++).hw_value
= txpwr
>> 8;
1102 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_BASE
,
1105 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
1106 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
1107 /* 0 means asic B-cut, we should use SW 3 wire
1108 * bit-by-bit banging for radio. 1 means we can use
1109 * USB specific request to write radio registers */
1110 priv
->asic_rev
= rtl818x_ioread8(priv
, (u8
*)0xFFFE) & 0x3;
1111 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
1112 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
1114 if (!priv
->is_rtl8187b
) {
1116 reg32
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
1117 reg32
&= RTL818X_TX_CONF_HWVER_MASK
;
1119 case RTL818X_TX_CONF_R8187vD_B
:
1120 /* Some RTL8187B devices have a USB ID of 0x8187
1121 * detect them here */
1122 chip_name
= "RTL8187BvB(early)";
1123 priv
->is_rtl8187b
= 1;
1124 priv
->hw_rev
= RTL8187BvB
;
1126 case RTL818X_TX_CONF_R8187vD
:
1127 chip_name
= "RTL8187vD";
1130 chip_name
= "RTL8187vB (default)";
1134 * Force USB request to write radio registers for 8187B, Realtek
1135 * only uses it in their sources
1137 /*if (priv->asic_rev == 0) {
1138 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1139 "requests to write to radio registers\n");
1142 switch (rtl818x_ioread8(priv
, (u8
*)0xFFE1)) {
1143 case RTL818X_R8187B_B
:
1144 chip_name
= "RTL8187BvB";
1145 priv
->hw_rev
= RTL8187BvB
;
1147 case RTL818X_R8187B_D
:
1148 chip_name
= "RTL8187BvD";
1149 priv
->hw_rev
= RTL8187BvD
;
1151 case RTL818X_R8187B_E
:
1152 chip_name
= "RTL8187BvE";
1153 priv
->hw_rev
= RTL8187BvE
;
1156 chip_name
= "RTL8187BvB (default)";
1157 priv
->hw_rev
= RTL8187BvB
;
1161 if (!priv
->is_rtl8187b
) {
1162 for (i
= 0; i
< 2; i
++) {
1163 eeprom_93cx6_read(&eeprom
,
1164 RTL8187_EEPROM_TXPWR_CHAN_6
+ i
,
1166 (*channel
++).hw_value
= txpwr
& 0xFF;
1167 (*channel
++).hw_value
= txpwr
>> 8;
1170 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_6
,
1172 (*channel
++).hw_value
= txpwr
& 0xFF;
1174 eeprom_93cx6_read(&eeprom
, 0x0A, &txpwr
);
1175 (*channel
++).hw_value
= txpwr
& 0xFF;
1177 eeprom_93cx6_read(&eeprom
, 0x1C, &txpwr
);
1178 (*channel
++).hw_value
= txpwr
& 0xFF;
1179 (*channel
++).hw_value
= txpwr
>> 8;
1182 if (priv
->is_rtl8187b
) {
1183 printk(KERN_WARNING
"rtl8187: 8187B chip detected. Support "
1184 "is EXPERIMENTAL, and could damage your\n"
1185 " hardware, use at your own risk\n");
1186 dev
->flags
|= IEEE80211_HW_SIGNAL_DBM
;
1188 dev
->flags
|= IEEE80211_HW_SIGNAL_UNSPEC
;
1189 dev
->max_signal
= 65;
1192 dev
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
1194 if ((id
->driver_info
== DEVICE_RTL8187
) && priv
->is_rtl8187b
)
1195 printk(KERN_INFO
"rtl8187: inconsistency between id with OEM"
1198 priv
->rf
= rtl8187_detect_rf(dev
);
1199 dev
->extra_tx_headroom
= (!priv
->is_rtl8187b
) ?
1200 sizeof(struct rtl8187_tx_hdr
) :
1201 sizeof(struct rtl8187b_tx_hdr
);
1202 if (!priv
->is_rtl8187b
)
1207 err
= ieee80211_register_hw(dev
);
1209 printk(KERN_ERR
"rtl8187: Cannot register device\n");
1212 mutex_init(&priv
->conf_mutex
);
1214 printk(KERN_INFO
"%s: hwaddr %s, %s V%d + %s\n",
1215 wiphy_name(dev
->wiphy
), print_mac(mac
, dev
->wiphy
->perm_addr
),
1216 chip_name
, priv
->asic_rev
, priv
->rf
->name
);
1221 ieee80211_free_hw(dev
);
1222 usb_set_intfdata(intf
, NULL
);
1227 static void __devexit
rtl8187_disconnect(struct usb_interface
*intf
)
1229 struct ieee80211_hw
*dev
= usb_get_intfdata(intf
);
1230 struct rtl8187_priv
*priv
;
1235 ieee80211_unregister_hw(dev
);
1238 usb_put_dev(interface_to_usbdev(intf
));
1239 ieee80211_free_hw(dev
);
1242 static struct usb_driver rtl8187_driver
= {
1243 .name
= KBUILD_MODNAME
,
1244 .id_table
= rtl8187_table
,
1245 .probe
= rtl8187_probe
,
1246 .disconnect
= __devexit_p(rtl8187_disconnect
),
1249 static int __init
rtl8187_init(void)
1251 return usb_register(&rtl8187_driver
);
1254 static void __exit
rtl8187_exit(void)
1256 usb_deregister(&rtl8187_driver
);
1259 module_init(rtl8187_init
);
1260 module_exit(rtl8187_exit
);