?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[PATCH] Kconfig fix (PHYLIB vs. s390)
[linux-2.6/sactl.git] / drivers / serial / pxa.c
blobeaa0af8352907da7f6ea4f18a8d9df7f7c096edb
1 /*
2 * linux/drivers/serial/pxa.c
3 *
4 * Based on drivers/serial/8250.c by Russell King.
5 *
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
18 *
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
25 */
26
27 #include <linux/config.h>
28
29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ
31 #endif
32
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/serial_reg.h>
39 #include <linux/circ_buf.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
42 #include <linux/device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
46
47 #include <asm/io.h>
48 #include <asm/hardware.h>
49 #include <asm/irq.h>
50 #include <asm/arch/pxa-regs.h>
51
52
53 struct uart_pxa_port {
54 struct uart_port port;
55 unsigned char ier;
56 unsigned char lcr;
57 unsigned char mcr;
58 unsigned int lsr_break_flag;
59 unsigned int cken;
60 char *name;
61 };
62
63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
64 {
65 offset <<= 2;
66 return readl(up->port.membase + offset);
67 }
68
69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
70 {
71 offset <<= 2;
72 writel(value, up->port.membase + offset);
73 }
74
75 static void serial_pxa_enable_ms(struct uart_port *port)
76 {
77 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
78
79 up->ier |= UART_IER_MSI;
80 serial_out(up, UART_IER, up->ier);
81 }
82
83 static void serial_pxa_stop_tx(struct uart_port *port)
84 {
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
86
87 if (up->ier & UART_IER_THRI) {
88 up->ier &= ~UART_IER_THRI;
89 serial_out(up, UART_IER, up->ier);
90 }
91 }
92
93 static void serial_pxa_stop_rx(struct uart_port *port)
94 {
95 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
96
97 up->ier &= ~UART_IER_RLSI;
98 up->port.read_status_mask &= ~UART_LSR_DR;
99 serial_out(up, UART_IER, up->ier);
100 }
101
102 static inline void
103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
104 {
105 struct tty_struct *tty = up->port.info->tty;
106 unsigned int ch, flag;
107 int max_count = 256;
108
109 do {
110 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
111 if (tty->low_latency)
112 tty_flip_buffer_push(tty);
113 /*
114 * If this failed then we will throw away the
115 * bytes but must do so to clear interrupts
116 */
117 }
118 ch = serial_in(up, UART_RX);
119 flag = TTY_NORMAL;
120 up->port.icount.rx++;
121
122 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
123 UART_LSR_FE | UART_LSR_OE))) {
124 /*
125 * For statistics only
126 */
127 if (*status & UART_LSR_BI) {
128 *status &= ~(UART_LSR_FE | UART_LSR_PE);
129 up->port.icount.brk++;
130 /*
131 * We do the SysRQ and SAK checking
132 * here because otherwise the break
133 * may get masked by ignore_status_mask
134 * or read_status_mask.
135 */
136 if (uart_handle_break(&up->port))
137 goto ignore_char;
138 } else if (*status & UART_LSR_PE)
139 up->port.icount.parity++;
140 else if (*status & UART_LSR_FE)
141 up->port.icount.frame++;
142 if (*status & UART_LSR_OE)
143 up->port.icount.overrun++;
144
145 /*
146 * Mask off conditions which should be ignored.
147 */
148 *status &= up->port.read_status_mask;
149
150 #ifdef CONFIG_SERIAL_PXA_CONSOLE
151 if (up->port.line == up->port.cons->index) {
152 /* Recover the break flag from console xmit */
153 *status |= up->lsr_break_flag;
154 up->lsr_break_flag = 0;
155 }
156 #endif
157 if (*status & UART_LSR_BI) {
158 flag = TTY_BREAK;
159 } else if (*status & UART_LSR_PE)
160 flag = TTY_PARITY;
161 else if (*status & UART_LSR_FE)
162 flag = TTY_FRAME;
163 }
164
165 if (uart_handle_sysrq_char(&up->port, ch, regs))
166 goto ignore_char;
167
168 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
169
170 ignore_char:
171 *status = serial_in(up, UART_LSR);
172 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
173 tty_flip_buffer_push(tty);
174 }
175
176 static void transmit_chars(struct uart_pxa_port *up)
177 {
178 struct circ_buf *xmit = &up->port.info->xmit;
179 int count;
180
181 if (up->port.x_char) {
182 serial_out(up, UART_TX, up->port.x_char);
183 up->port.icount.tx++;
184 up->port.x_char = 0;
185 return;
186 }
187 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
188 serial_pxa_stop_tx(&up->port);
189 return;
190 }
191
192 count = up->port.fifosize / 2;
193 do {
194 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
195 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
196 up->port.icount.tx++;
197 if (uart_circ_empty(xmit))
198 break;
199 } while (--count > 0);
200
201 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
202 uart_write_wakeup(&up->port);
203
204
205 if (uart_circ_empty(xmit))
206 serial_pxa_stop_tx(&up->port);
207 }
208
209 static void serial_pxa_start_tx(struct uart_port *port)
210 {
211 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
212
213 if (!(up->ier & UART_IER_THRI)) {
214 up->ier |= UART_IER_THRI;
215 serial_out(up, UART_IER, up->ier);
216 }
217 }
218
219 static inline void check_modem_status(struct uart_pxa_port *up)
220 {
221 int status;
222
223 status = serial_in(up, UART_MSR);
224
225 if ((status & UART_MSR_ANY_DELTA) == 0)
226 return;
227
228 if (status & UART_MSR_TERI)
229 up->port.icount.rng++;
230 if (status & UART_MSR_DDSR)
231 up->port.icount.dsr++;
232 if (status & UART_MSR_DDCD)
233 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
234 if (status & UART_MSR_DCTS)
235 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
236
237 wake_up_interruptible(&up->port.info->delta_msr_wait);
238 }
239
240 /*
241 * This handles the interrupt from one port.
242 */
243 static inline irqreturn_t
244 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
245 {
246 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
247 unsigned int iir, lsr;
248
249 iir = serial_in(up, UART_IIR);
250 if (iir & UART_IIR_NO_INT)
251 return IRQ_NONE;
252 lsr = serial_in(up, UART_LSR);
253 if (lsr & UART_LSR_DR)
254 receive_chars(up, &lsr, regs);
255 check_modem_status(up);
256 if (lsr & UART_LSR_THRE)
257 transmit_chars(up);
258 return IRQ_HANDLED;
259 }
260
261 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
262 {
263 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
264 unsigned long flags;
265 unsigned int ret;
266
267 spin_lock_irqsave(&up->port.lock, flags);
268 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
269 spin_unlock_irqrestore(&up->port.lock, flags);
270
271 return ret;
272 }
273
274 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
275 {
276 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
277 unsigned char status;
278 unsigned int ret;
279
280 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
281 status = serial_in(up, UART_MSR);
282
283 ret = 0;
284 if (status & UART_MSR_DCD)
285 ret |= TIOCM_CAR;
286 if (status & UART_MSR_RI)
287 ret |= TIOCM_RNG;
288 if (status & UART_MSR_DSR)
289 ret |= TIOCM_DSR;
290 if (status & UART_MSR_CTS)
291 ret |= TIOCM_CTS;
292 return ret;
293 }
294
295 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
296 {
297 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
298 unsigned char mcr = 0;
299
300 if (mctrl & TIOCM_RTS)
301 mcr |= UART_MCR_RTS;
302 if (mctrl & TIOCM_DTR)
303 mcr |= UART_MCR_DTR;
304 if (mctrl & TIOCM_OUT1)
305 mcr |= UART_MCR_OUT1;
306 if (mctrl & TIOCM_OUT2)
307 mcr |= UART_MCR_OUT2;
308 if (mctrl & TIOCM_LOOP)
309 mcr |= UART_MCR_LOOP;
310
311 mcr |= up->mcr;
312
313 serial_out(up, UART_MCR, mcr);
314 }
315
316 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
317 {
318 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
319 unsigned long flags;
320
321 spin_lock_irqsave(&up->port.lock, flags);
322 if (break_state == -1)
323 up->lcr |= UART_LCR_SBC;
324 else
325 up->lcr &= ~UART_LCR_SBC;
326 serial_out(up, UART_LCR, up->lcr);
327 spin_unlock_irqrestore(&up->port.lock, flags);
328 }
329
330 #if 0
331 static void serial_pxa_dma_init(struct pxa_uart *up)
332 {
333 up->rxdma =
334 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
335 if (up->rxdma < 0)
336 goto out;
337 up->txdma =
338 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
339 if (up->txdma < 0)
340 goto err_txdma;
341 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
342 if (!up->dmadesc)
343 goto err_alloc;
344
345 /* ... */
346 err_alloc:
347 pxa_free_dma(up->txdma);
348 err_rxdma:
349 pxa_free_dma(up->rxdma);
350 out:
351 return;
352 }
353 #endif
354
355 static int serial_pxa_startup(struct uart_port *port)
356 {
357 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
358 unsigned long flags;
359 int retval;
360
361 up->mcr = 0;
362
363 /*
364 * Allocate the IRQ
365 */
366 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
367 if (retval)
368 return retval;
369
370 /*
371 * Clear the FIFO buffers and disable them.
372 * (they will be reenabled in set_termios())
373 */
374 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
375 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
376 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
377 serial_out(up, UART_FCR, 0);
378
379 /*
380 * Clear the interrupt registers.
381 */
382 (void) serial_in(up, UART_LSR);
383 (void) serial_in(up, UART_RX);
384 (void) serial_in(up, UART_IIR);
385 (void) serial_in(up, UART_MSR);
386
387 /*
388 * Now, initialize the UART
389 */
390 serial_out(up, UART_LCR, UART_LCR_WLEN8);
391
392 spin_lock_irqsave(&up->port.lock, flags);
393 up->port.mctrl |= TIOCM_OUT2;
394 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
395 spin_unlock_irqrestore(&up->port.lock, flags);
396
397 /*
398 * Finally, enable interrupts. Note: Modem status interrupts
399 * are set via set_termios(), which will be occuring imminently
400 * anyway, so we don't enable them here.
401 */
402 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
403 serial_out(up, UART_IER, up->ier);
404
405 /*
406 * And clear the interrupt registers again for luck.
407 */
408 (void) serial_in(up, UART_LSR);
409 (void) serial_in(up, UART_RX);
410 (void) serial_in(up, UART_IIR);
411 (void) serial_in(up, UART_MSR);
412
413 return 0;
414 }
415
416 static void serial_pxa_shutdown(struct uart_port *port)
417 {
418 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
419 unsigned long flags;
420
421 free_irq(up->port.irq, up);
422
423 /*
424 * Disable interrupts from this port
425 */
426 up->ier = 0;
427 serial_out(up, UART_IER, 0);
428
429 spin_lock_irqsave(&up->port.lock, flags);
430 up->port.mctrl &= ~TIOCM_OUT2;
431 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
432 spin_unlock_irqrestore(&up->port.lock, flags);
433
434 /*
435 * Disable break condition and FIFOs
436 */
437 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
438 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
439 UART_FCR_CLEAR_RCVR |
440 UART_FCR_CLEAR_XMIT);
441 serial_out(up, UART_FCR, 0);
442 }
443
444 static void
445 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
446 struct termios *old)
447 {
448 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
449 unsigned char cval, fcr = 0;
450 unsigned long flags;
451 unsigned int baud, quot;
452
453 switch (termios->c_cflag & CSIZE) {
454 case CS5:
455 cval = UART_LCR_WLEN5;
456 break;
457 case CS6:
458 cval = UART_LCR_WLEN6;
459 break;
460 case CS7:
461 cval = UART_LCR_WLEN7;
462 break;
463 default:
464 case CS8:
465 cval = UART_LCR_WLEN8;
466 break;
467 }
468
469 if (termios->c_cflag & CSTOPB)
470 cval |= UART_LCR_STOP;
471 if (termios->c_cflag & PARENB)
472 cval |= UART_LCR_PARITY;
473 if (!(termios->c_cflag & PARODD))
474 cval |= UART_LCR_EPAR;
475
476 /*
477 * Ask the core to calculate the divisor for us.
478 */
479 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
480 quot = uart_get_divisor(port, baud);
481
482 if ((up->port.uartclk / quot) < (2400 * 16))
483 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
484 else
485 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
486
487 /*
488 * Ok, we're now changing the port state. Do it with
489 * interrupts disabled.
490 */
491 spin_lock_irqsave(&up->port.lock, flags);
492
493 /*
494 * Ensure the port will be enabled.
495 * This is required especially for serial console.
496 */
497 up->ier |= IER_UUE;
498
499 /*
500 * Update the per-port timeout.
501 */
502 uart_update_timeout(port, termios->c_cflag, quot);
503
504 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
505 if (termios->c_iflag & INPCK)
506 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
507 if (termios->c_iflag & (BRKINT | PARMRK))
508 up->port.read_status_mask |= UART_LSR_BI;
509
510 /*
511 * Characters to ignore
512 */
513 up->port.ignore_status_mask = 0;
514 if (termios->c_iflag & IGNPAR)
515 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
516 if (termios->c_iflag & IGNBRK) {
517 up->port.ignore_status_mask |= UART_LSR_BI;
518 /*
519 * If we're ignoring parity and break indicators,
520 * ignore overruns too (for real raw support).
521 */
522 if (termios->c_iflag & IGNPAR)
523 up->port.ignore_status_mask |= UART_LSR_OE;
524 }
525
526 /*
527 * ignore all characters if CREAD is not set
528 */
529 if ((termios->c_cflag & CREAD) == 0)
530 up->port.ignore_status_mask |= UART_LSR_DR;
531
532 /*
533 * CTS flow control flag and modem status interrupts
534 */
535 up->ier &= ~UART_IER_MSI;
536 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
537 up->ier |= UART_IER_MSI;
538
539 serial_out(up, UART_IER, up->ier);
540
541 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
542 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
543 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
544 serial_out(up, UART_LCR, cval); /* reset DLAB */
545 up->lcr = cval; /* Save LCR */
546 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
547 serial_out(up, UART_FCR, fcr);
548 spin_unlock_irqrestore(&up->port.lock, flags);
549 }
550
551 static void
552 serial_pxa_pm(struct uart_port *port, unsigned int state,
553 unsigned int oldstate)
554 {
555 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
556 pxa_set_cken(up->cken, !state);
557 if (!state)
558 udelay(1);
559 }
560
561 static void serial_pxa_release_port(struct uart_port *port)
562 {
563 }
564
565 static int serial_pxa_request_port(struct uart_port *port)
566 {
567 return 0;
568 }
569
570 static void serial_pxa_config_port(struct uart_port *port, int flags)
571 {
572 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
573 up->port.type = PORT_PXA;
574 }
575
576 static int
577 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
578 {
579 /* we don't want the core code to modify any port params */
580 return -EINVAL;
581 }
582
583 static const char *
584 serial_pxa_type(struct uart_port *port)
585 {
586 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
587 return up->name;
588 }
589
590 #ifdef CONFIG_SERIAL_PXA_CONSOLE
591
592 extern struct uart_pxa_port serial_pxa_ports[];
593 extern struct uart_driver serial_pxa_reg;
594
595 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
596
597 /*
598 * Wait for transmitter & holding register to empty
599 */
600 static inline void wait_for_xmitr(struct uart_pxa_port *up)
601 {
602 unsigned int status, tmout = 10000;
603
604 /* Wait up to 10ms for the character(s) to be sent. */
605 do {
606 status = serial_in(up, UART_LSR);
607
608 if (status & UART_LSR_BI)
609 up->lsr_break_flag = UART_LSR_BI;
610
611 if (--tmout == 0)
612 break;
613 udelay(1);
614 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
615
616 /* Wait up to 1s for flow control if necessary */
617 if (up->port.flags & UPF_CONS_FLOW) {
618 tmout = 1000000;
619 while (--tmout &&
620 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
621 udelay(1);
622 }
623 }
624
625 /*
626 * Print a string to the serial port trying not to disturb
627 * any possible real use of the port...
628 *
629 * The console_lock must be held when we get here.
630 */
631 static void
632 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
633 {
634 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
635 unsigned int ier;
636 int i;
637
638 /*
639 * First save the UER then disable the interrupts
640 */
641 ier = serial_in(up, UART_IER);
642 serial_out(up, UART_IER, UART_IER_UUE);
643
644 /*
645 * Now, do each character
646 */
647 for (i = 0; i < count; i++, s++) {
648 wait_for_xmitr(up);
649
650 /*
651 * Send the character out.
652 * If a LF, also do CR...
653 */
654 serial_out(up, UART_TX, *s);
655 if (*s == 10) {
656 wait_for_xmitr(up);
657 serial_out(up, UART_TX, 13);
658 }
659 }
660
661 /*
662 * Finally, wait for transmitter to become empty
663 * and restore the IER
664 */
665 wait_for_xmitr(up);
666 serial_out(up, UART_IER, ier);
667 }
668
669 static int __init
670 serial_pxa_console_setup(struct console *co, char *options)
671 {
672 struct uart_pxa_port *up;
673 int baud = 9600;
674 int bits = 8;
675 int parity = 'n';
676 int flow = 'n';
677
678 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
679 co->index = 0;
680 up = &serial_pxa_ports[co->index];
681
682 if (options)
683 uart_parse_options(options, &baud, &parity, &bits, &flow);
684
685 return uart_set_options(&up->port, co, baud, parity, bits, flow);
686 }
687
688 static struct console serial_pxa_console = {
689 .name = "ttyS",
690 .write = serial_pxa_console_write,
691 .device = uart_console_device,
692 .setup = serial_pxa_console_setup,
693 .flags = CON_PRINTBUFFER,
694 .index = -1,
695 .data = &serial_pxa_reg,
696 };
697
698 static int __init
699 serial_pxa_console_init(void)
700 {
701 register_console(&serial_pxa_console);
702 return 0;
703 }
704
705 console_initcall(serial_pxa_console_init);
706
707 #define PXA_CONSOLE &serial_pxa_console
708 #else
709 #define PXA_CONSOLE NULL
710 #endif
711
712 struct uart_ops serial_pxa_pops = {
713 .tx_empty = serial_pxa_tx_empty,
714 .set_mctrl = serial_pxa_set_mctrl,
715 .get_mctrl = serial_pxa_get_mctrl,
716 .stop_tx = serial_pxa_stop_tx,
717 .start_tx = serial_pxa_start_tx,
718 .stop_rx = serial_pxa_stop_rx,
719 .enable_ms = serial_pxa_enable_ms,
720 .break_ctl = serial_pxa_break_ctl,
721 .startup = serial_pxa_startup,
722 .shutdown = serial_pxa_shutdown,
723 .set_termios = serial_pxa_set_termios,
724 .pm = serial_pxa_pm,
725 .type = serial_pxa_type,
726 .release_port = serial_pxa_release_port,
727 .request_port = serial_pxa_request_port,
728 .config_port = serial_pxa_config_port,
729 .verify_port = serial_pxa_verify_port,
730 };
731
732 static struct uart_pxa_port serial_pxa_ports[] = {
733 { /* FFUART */
734 .name = "FFUART",
735 .cken = CKEN6_FFUART,
736 .port = {
737 .type = PORT_PXA,
738 .iotype = UPIO_MEM,
739 .membase = (void *)&FFUART,
740 .mapbase = __PREG(FFUART),
741 .irq = IRQ_FFUART,
742 .uartclk = 921600 * 16,
743 .fifosize = 64,
744 .ops = &serial_pxa_pops,
745 .line = 0,
746 },
747 }, { /* BTUART */
748 .name = "BTUART",
749 .cken = CKEN7_BTUART,
750 .port = {
751 .type = PORT_PXA,
752 .iotype = UPIO_MEM,
753 .membase = (void *)&BTUART,
754 .mapbase = __PREG(BTUART),
755 .irq = IRQ_BTUART,
756 .uartclk = 921600 * 16,
757 .fifosize = 64,
758 .ops = &serial_pxa_pops,
759 .line = 1,
760 },
761 }, { /* STUART */
762 .name = "STUART",
763 .cken = CKEN5_STUART,
764 .port = {
765 .type = PORT_PXA,
766 .iotype = UPIO_MEM,
767 .membase = (void *)&STUART,
768 .mapbase = __PREG(STUART),
769 .irq = IRQ_STUART,
770 .uartclk = 921600 * 16,
771 .fifosize = 64,
772 .ops = &serial_pxa_pops,
773 .line = 2,
774 },
775 }
776 };
777
778 static struct uart_driver serial_pxa_reg = {
779 .owner = THIS_MODULE,
780 .driver_name = "PXA serial",
781 .devfs_name = "tts/",
782 .dev_name = "ttyS",
783 .major = TTY_MAJOR,
784 .minor = 64,
785 .nr = ARRAY_SIZE(serial_pxa_ports),
786 .cons = PXA_CONSOLE,
787 };
788
789 static int serial_pxa_suspend(struct device *_dev, pm_message_t state, u32 level)
790 {
791 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
792
793 if (sport && level == SUSPEND_DISABLE)
794 uart_suspend_port(&serial_pxa_reg, &sport->port);
795
796 return 0;
797 }
798
799 static int serial_pxa_resume(struct device *_dev, u32 level)
800 {
801 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
802
803 if (sport && level == RESUME_ENABLE)
804 uart_resume_port(&serial_pxa_reg, &sport->port);
805
806 return 0;
807 }
808
809 static int serial_pxa_probe(struct device *_dev)
810 {
811 struct platform_device *dev = to_platform_device(_dev);
812
813 serial_pxa_ports[dev->id].port.dev = _dev;
814 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
815 dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]);
816 return 0;
817 }
818
819 static int serial_pxa_remove(struct device *_dev)
820 {
821 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
822
823 dev_set_drvdata(_dev, NULL);
824
825 if (sport)
826 uart_remove_one_port(&serial_pxa_reg, &sport->port);
827
828 return 0;
829 }
830
831 static struct device_driver serial_pxa_driver = {
832 .name = "pxa2xx-uart",
833 .bus = &platform_bus_type,
834 .probe = serial_pxa_probe,
835 .remove = serial_pxa_remove,
836
837 .suspend = serial_pxa_suspend,
838 .resume = serial_pxa_resume,
839 };
840
841 int __init serial_pxa_init(void)
842 {
843 int ret;
844
845 ret = uart_register_driver(&serial_pxa_reg);
846 if (ret != 0)
847 return ret;
848
849 ret = driver_register(&serial_pxa_driver);
850 if (ret != 0)
851 uart_unregister_driver(&serial_pxa_reg);
852
853 return ret;
854 }
855
856 void __exit serial_pxa_exit(void)
857 {
858 driver_unregister(&serial_pxa_driver);
859 uart_unregister_driver(&serial_pxa_reg);
860 }
861
862 module_init(serial_pxa_init);
863 module_exit(serial_pxa_exit);
864
865 MODULE_LICENSE("GPL");
866
SocketAccessConTroL development