2 * arch/arm/mach-ks8695/irq.c
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/sysdev.h>
28 #include <asm/hardware.h>
32 #include <asm/mach/irq.h>
34 #include <asm/arch/regs-irq.h>
35 #include <asm/arch/regs-gpio.h>
37 static void ks8695_irq_mask(unsigned int irqno
)
41 inten
= __raw_readl(KS8695_IRQ_VA
+ KS8695_INTEN
);
42 inten
&= ~(1 << irqno
);
44 __raw_writel(inten
, KS8695_IRQ_VA
+ KS8695_INTEN
);
47 static void ks8695_irq_unmask(unsigned int irqno
)
51 inten
= __raw_readl(KS8695_IRQ_VA
+ KS8695_INTEN
);
52 inten
|= (1 << irqno
);
54 __raw_writel(inten
, KS8695_IRQ_VA
+ KS8695_INTEN
);
57 static void ks8695_irq_ack(unsigned int irqno
)
59 __raw_writel((1 << irqno
), KS8695_IRQ_VA
+ KS8695_INTST
);
63 static struct irq_chip ks8695_irq_level_chip
;
64 static struct irq_chip ks8695_irq_edge_chip
;
67 static int ks8695_irq_set_type(unsigned int irqno
, unsigned int type
)
69 unsigned long ctrl
, mode
;
70 unsigned short level_triggered
= 0;
72 ctrl
= __raw_readl(KS8695_GPIO_VA
+ KS8695_IOPC
);
84 mode
= IOPC_TM_RISING
;
87 mode
= IOPC_TM_FALLING
;
97 case KS8695_IRQ_EXTERN0
:
98 ctrl
&= ~IOPC_IOEINT0TM
;
99 ctrl
|= IOPC_IOEINT0_MODE(mode
);
101 case KS8695_IRQ_EXTERN1
:
102 ctrl
&= ~IOPC_IOEINT1TM
;
103 ctrl
|= IOPC_IOEINT1_MODE(mode
);
105 case KS8695_IRQ_EXTERN2
:
106 ctrl
&= ~IOPC_IOEINT2TM
;
107 ctrl
|= IOPC_IOEINT2_MODE(mode
);
109 case KS8695_IRQ_EXTERN3
:
110 ctrl
&= ~IOPC_IOEINT3TM
;
111 ctrl
|= IOPC_IOEINT3_MODE(mode
);
117 if (level_triggered
) {
118 set_irq_chip(irqno
, &ks8695_irq_level_chip
);
119 set_irq_handler(irqno
, handle_level_irq
);
122 set_irq_chip(irqno
, &ks8695_irq_edge_chip
);
123 set_irq_handler(irqno
, handle_edge_irq
);
126 __raw_writel(ctrl
, KS8695_GPIO_VA
+ KS8695_IOPC
);
130 static struct irq_chip ks8695_irq_level_chip
= {
131 .ack
= ks8695_irq_mask
,
132 .mask
= ks8695_irq_mask
,
133 .unmask
= ks8695_irq_unmask
,
134 .set_type
= ks8695_irq_set_type
,
137 static struct irq_chip ks8695_irq_edge_chip
= {
138 .ack
= ks8695_irq_ack
,
139 .mask
= ks8695_irq_mask
,
140 .unmask
= ks8695_irq_unmask
,
141 .set_type
= ks8695_irq_set_type
,
144 void __init
ks8695_init_irq(void)
148 /* Disable all interrupts initially */
149 __raw_writel(0, KS8695_IRQ_VA
+ KS8695_INTMC
);
150 __raw_writel(0, KS8695_IRQ_VA
+ KS8695_INTEN
);
152 for (irq
= 0; irq
< NR_IRQS
; irq
++) {
154 /* Level-triggered interrupts */
155 case KS8695_IRQ_BUS_ERROR
:
156 case KS8695_IRQ_UART_MODEM_STATUS
:
157 case KS8695_IRQ_UART_LINE_STATUS
:
158 case KS8695_IRQ_UART_RX
:
159 case KS8695_IRQ_COMM_TX
:
160 case KS8695_IRQ_COMM_RX
:
161 set_irq_chip(irq
, &ks8695_irq_level_chip
);
162 set_irq_handler(irq
, handle_level_irq
);
165 /* Edge-triggered interrupts */
167 ks8695_irq_ack(irq
); /* clear pending bit */
168 set_irq_chip(irq
, &ks8695_irq_edge_chip
);
169 set_irq_handler(irq
, handle_edge_irq
);
172 set_irq_flags(irq
, IRQF_VALID
);