2 * Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
3 * Authors: Carsten Langgaard <carstenl@mips.com>
4 * Maciej W. Rozycki <macro@mips.com>
5 * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 * SAA9730 ethernet driver.
23 * Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
25 * Conversion to spinlocks.
26 * Error handling fixes.
29 #include <linux/init.h>
30 #include <linux/netdevice.h>
31 #include <linux/delay.h>
32 #include <linux/etherdevice.h>
33 #include <linux/module.h>
34 #include <linux/skbuff.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/types.h>
39 #include <asm/addrspace.h>
42 #include <asm/mips-boards/prom.h>
46 #ifdef LAN_SAA9730_DEBUG
47 int lan_saa9730_debug
= LAN_SAA9730_DEBUG
;
49 int lan_saa9730_debug
;
52 #define DRV_MODULE_NAME "saa9730"
54 static struct pci_device_id saa9730_pci_tbl
[] = {
55 { PCI_VENDOR_ID_PHILIPS
, PCI_DEVICE_ID_PHILIPS_SAA9730
,
56 PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0UL },
60 MODULE_DEVICE_TABLE(pci
, saa9730_pci_tbl
);
62 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
63 static unsigned int pci_irq_line
;
65 static void evm_saa9730_enable_lan_int(struct lan_saa9730_private
*lp
)
67 writel(readl(&lp
->evm_saa9730_regs
->InterruptBlock1
) | EVM_LAN_INT
,
68 &lp
->evm_saa9730_regs
->InterruptBlock1
);
69 writel(readl(&lp
->evm_saa9730_regs
->InterruptStatus1
) | EVM_LAN_INT
,
70 &lp
->evm_saa9730_regs
->InterruptStatus1
);
71 writel(readl(&lp
->evm_saa9730_regs
->InterruptEnable1
) | EVM_LAN_INT
|
72 EVM_MASTER_EN
, &lp
->evm_saa9730_regs
->InterruptEnable1
);
75 static void evm_saa9730_disable_lan_int(struct lan_saa9730_private
*lp
)
77 writel(readl(&lp
->evm_saa9730_regs
->InterruptBlock1
) & ~EVM_LAN_INT
,
78 &lp
->evm_saa9730_regs
->InterruptBlock1
);
79 writel(readl(&lp
->evm_saa9730_regs
->InterruptEnable1
) & ~EVM_LAN_INT
,
80 &lp
->evm_saa9730_regs
->InterruptEnable1
);
83 static void evm_saa9730_clear_lan_int(struct lan_saa9730_private
*lp
)
85 writel(EVM_LAN_INT
, &lp
->evm_saa9730_regs
->InterruptStatus1
);
88 static void evm_saa9730_block_lan_int(struct lan_saa9730_private
*lp
)
90 writel(readl(&lp
->evm_saa9730_regs
->InterruptBlock1
) & ~EVM_LAN_INT
,
91 &lp
->evm_saa9730_regs
->InterruptBlock1
);
94 static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private
*lp
)
96 writel(readl(&lp
->evm_saa9730_regs
->InterruptBlock1
) | EVM_LAN_INT
,
97 &lp
->evm_saa9730_regs
->InterruptBlock1
);
100 static void __attribute_used__
show_saa9730_regs(struct lan_saa9730_private
*lp
)
103 printk("TxmBufferA = %p\n", lp
->TxmBuffer
[0][0]);
104 printk("TxmBufferB = %p\n", lp
->TxmBuffer
[1][0]);
105 printk("RcvBufferA = %p\n", lp
->RcvBuffer
[0][0]);
106 printk("RcvBufferB = %p\n", lp
->RcvBuffer
[1][0]);
107 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
108 for (j
= 0; j
< LAN_SAA9730_TXM_Q_SIZE
; j
++) {
109 printk("TxmBuffer[%d][%d] = %x\n", i
, j
,
110 le32_to_cpu(*(unsigned int *)
111 lp
->TxmBuffer
[i
][j
]));
114 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
115 for (j
= 0; j
< LAN_SAA9730_RCV_Q_SIZE
; j
++) {
116 printk("RcvBuffer[%d][%d] = %x\n", i
, j
,
117 le32_to_cpu(*(unsigned int *)
118 lp
->RcvBuffer
[i
][j
]));
121 printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
122 readl(&lp
->evm_saa9730_regs
->InterruptBlock1
));
123 printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
124 readl(&lp
->evm_saa9730_regs
->InterruptStatus1
));
125 printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
126 readl(&lp
->evm_saa9730_regs
->InterruptEnable1
));
127 printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
128 readl(&lp
->lan_saa9730_regs
->Ok2Use
));
129 printk("lp->NextTxmBufferIndex = %x\n", lp
->NextTxmBufferIndex
);
130 printk("lp->NextTxmPacketIndex = %x\n", lp
->NextTxmPacketIndex
);
131 printk("lp->PendingTxmBufferIndex = %x\n",
132 lp
->PendingTxmBufferIndex
);
133 printk("lp->PendingTxmPacketIndex = %x\n",
134 lp
->PendingTxmPacketIndex
);
135 printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
136 readl(&lp
->lan_saa9730_regs
->LanDmaCtl
));
137 printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
138 readl(&lp
->lan_saa9730_regs
->DmaStatus
));
139 printk("lp->lan_saa9730_regs->CamCtl = %x\n",
140 readl(&lp
->lan_saa9730_regs
->CamCtl
));
141 printk("lp->lan_saa9730_regs->TxCtl = %x\n",
142 readl(&lp
->lan_saa9730_regs
->TxCtl
));
143 printk("lp->lan_saa9730_regs->TxStatus = %x\n",
144 readl(&lp
->lan_saa9730_regs
->TxStatus
));
145 printk("lp->lan_saa9730_regs->RxCtl = %x\n",
146 readl(&lp
->lan_saa9730_regs
->RxCtl
));
147 printk("lp->lan_saa9730_regs->RxStatus = %x\n",
148 readl(&lp
->lan_saa9730_regs
->RxStatus
));
149 for (i
= 0; i
< LAN_SAA9730_CAM_DWORDS
; i
++) {
150 writel(i
, &lp
->lan_saa9730_regs
->CamAddress
);
151 printk("lp->lan_saa9730_regs->CamData = %x\n",
152 readl(&lp
->lan_saa9730_regs
->CamData
));
154 printk("lp->stats.tx_packets = %lx\n", lp
->stats
.tx_packets
);
155 printk("lp->stats.tx_errors = %lx\n", lp
->stats
.tx_errors
);
156 printk("lp->stats.tx_aborted_errors = %lx\n",
157 lp
->stats
.tx_aborted_errors
);
158 printk("lp->stats.tx_window_errors = %lx\n",
159 lp
->stats
.tx_window_errors
);
160 printk("lp->stats.tx_carrier_errors = %lx\n",
161 lp
->stats
.tx_carrier_errors
);
162 printk("lp->stats.tx_fifo_errors = %lx\n",
163 lp
->stats
.tx_fifo_errors
);
164 printk("lp->stats.tx_heartbeat_errors = %lx\n",
165 lp
->stats
.tx_heartbeat_errors
);
166 printk("lp->stats.collisions = %lx\n", lp
->stats
.collisions
);
168 printk("lp->stats.rx_packets = %lx\n", lp
->stats
.rx_packets
);
169 printk("lp->stats.rx_errors = %lx\n", lp
->stats
.rx_errors
);
170 printk("lp->stats.rx_dropped = %lx\n", lp
->stats
.rx_dropped
);
171 printk("lp->stats.rx_crc_errors = %lx\n", lp
->stats
.rx_crc_errors
);
172 printk("lp->stats.rx_frame_errors = %lx\n",
173 lp
->stats
.rx_frame_errors
);
174 printk("lp->stats.rx_fifo_errors = %lx\n",
175 lp
->stats
.rx_fifo_errors
);
176 printk("lp->stats.rx_length_errors = %lx\n",
177 lp
->stats
.rx_length_errors
);
179 printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
180 readl(&lp
->lan_saa9730_regs
->DebugPCIMasterAddr
));
181 printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
182 readl(&lp
->lan_saa9730_regs
->DebugLanTxStateMachine
));
183 printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
184 readl(&lp
->lan_saa9730_regs
->DebugLanRxStateMachine
));
185 printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
186 readl(&lp
->lan_saa9730_regs
->DebugLanTxFifoPointers
));
187 printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
188 readl(&lp
->lan_saa9730_regs
->DebugLanRxFifoPointers
));
189 printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
190 readl(&lp
->lan_saa9730_regs
->DebugLanCtlStateMachine
));
193 static void lan_saa9730_buffer_init(struct lan_saa9730_private
*lp
)
197 /* Init RX buffers */
198 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
199 for (j
= 0; j
< LAN_SAA9730_RCV_Q_SIZE
; j
++) {
200 *(unsigned int *) lp
->RcvBuffer
[i
][j
] =
201 cpu_to_le32(RXSF_READY
<<
202 RX_STAT_CTL_OWNER_SHF
);
206 /* Init TX buffers */
207 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
208 for (j
= 0; j
< LAN_SAA9730_TXM_Q_SIZE
; j
++) {
209 *(unsigned int *) lp
->TxmBuffer
[i
][j
] =
210 cpu_to_le32(TXSF_EMPTY
<<
211 TX_STAT_CTL_OWNER_SHF
);
216 static void lan_saa9730_free_buffers(struct pci_dev
*pdev
,
217 struct lan_saa9730_private
*lp
)
219 pci_free_consistent(pdev
, lp
->buffer_size
, lp
->buffer_start
,
223 static int lan_saa9730_allocate_buffers(struct pci_dev
*pdev
,
224 struct lan_saa9730_private
*lp
)
227 unsigned int i
, j
, rxoffset
, txoffset
;
230 /* Initialize buffer space */
231 lp
->DmaRcvPackets
= LAN_SAA9730_RCV_Q_SIZE
;
232 lp
->DmaTxmPackets
= LAN_SAA9730_TXM_Q_SIZE
;
234 /* Initialize Rx Buffer Index */
235 lp
->NextRcvPacketIndex
= 0;
236 lp
->NextRcvBufferIndex
= 0;
238 /* Set current buffer index & next available packet index */
239 lp
->NextTxmPacketIndex
= 0;
240 lp
->NextTxmBufferIndex
= 0;
241 lp
->PendingTxmPacketIndex
= 0;
242 lp
->PendingTxmBufferIndex
= 0;
245 * Allocate all RX and TX packets in one chunk.
246 * The Rx and Tx packets must be PACKET_SIZE aligned.
248 lp
->buffer_size
= ((LAN_SAA9730_RCV_Q_SIZE
+ LAN_SAA9730_TXM_Q_SIZE
) *
249 LAN_SAA9730_PACKET_SIZE
* LAN_SAA9730_BUFFERS
) +
250 LAN_SAA9730_PACKET_SIZE
;
251 lp
->buffer_start
= pci_alloc_consistent(pdev
, lp
->buffer_size
,
253 if (!lp
->buffer_start
) {
258 Pa
= (void *)ALIGN((unsigned long)lp
->buffer_start
,
259 LAN_SAA9730_PACKET_SIZE
);
261 rxoffset
= Pa
- lp
->buffer_start
;
263 /* Init RX buffers */
264 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
265 for (j
= 0; j
< LAN_SAA9730_RCV_Q_SIZE
; j
++) {
266 *(unsigned int *) Pa
=
267 cpu_to_le32(RXSF_READY
<<
268 RX_STAT_CTL_OWNER_SHF
);
269 lp
->RcvBuffer
[i
][j
] = Pa
;
270 Pa
+= LAN_SAA9730_PACKET_SIZE
;
274 txoffset
= Pa
- lp
->buffer_start
;
276 /* Init TX buffers */
277 for (i
= 0; i
< LAN_SAA9730_BUFFERS
; i
++) {
278 for (j
= 0; j
< LAN_SAA9730_TXM_Q_SIZE
; j
++) {
279 *(unsigned int *) Pa
=
280 cpu_to_le32(TXSF_EMPTY
<<
281 TX_STAT_CTL_OWNER_SHF
);
282 lp
->TxmBuffer
[i
][j
] = Pa
;
283 Pa
+= LAN_SAA9730_PACKET_SIZE
;
288 * Set rx buffer A and rx buffer B to point to the first two buffer
291 writel(lp
->dma_addr
+ rxoffset
, &lp
->lan_saa9730_regs
->RxBuffA
);
292 writel(lp
->dma_addr
+ rxoffset
+
293 LAN_SAA9730_PACKET_SIZE
* LAN_SAA9730_RCV_Q_SIZE
,
294 &lp
->lan_saa9730_regs
->RxBuffB
);
297 * Set txm_buf_a and txm_buf_b to point to the first two buffer
300 writel(lp
->dma_addr
+ txoffset
,
301 &lp
->lan_saa9730_regs
->TxBuffA
);
302 writel(lp
->dma_addr
+ txoffset
+
303 LAN_SAA9730_PACKET_SIZE
* LAN_SAA9730_TXM_Q_SIZE
,
304 &lp
->lan_saa9730_regs
->TxBuffB
);
306 /* Set packet number */
307 writel((lp
->DmaRcvPackets
<< PK_COUNT_RX_A_SHF
) |
308 (lp
->DmaRcvPackets
<< PK_COUNT_RX_B_SHF
) |
309 (lp
->DmaTxmPackets
<< PK_COUNT_TX_A_SHF
) |
310 (lp
->DmaTxmPackets
<< PK_COUNT_TX_B_SHF
),
311 &lp
->lan_saa9730_regs
->PacketCount
);
319 static int lan_saa9730_cam_load(struct lan_saa9730_private
*lp
)
322 unsigned char *NetworkAddress
;
324 NetworkAddress
= (unsigned char *) &lp
->PhysicalAddress
[0][0];
326 for (i
= 0; i
< LAN_SAA9730_CAM_DWORDS
; i
++) {
327 /* First set address to where data is written */
328 writel(i
, &lp
->lan_saa9730_regs
->CamAddress
);
329 writel((NetworkAddress
[0] << 24) | (NetworkAddress
[1] << 16) |
330 (NetworkAddress
[2] << 8) | NetworkAddress
[3],
331 &lp
->lan_saa9730_regs
->CamData
);
337 static int lan_saa9730_cam_init(struct net_device
*dev
)
339 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
342 /* Copy MAC-address into all entries. */
343 for (i
= 0; i
< LAN_SAA9730_CAM_ENTRIES
; i
++) {
344 memcpy((unsigned char *) lp
->PhysicalAddress
[i
],
345 (unsigned char *) dev
->dev_addr
, 6);
351 static int lan_saa9730_mii_init(struct lan_saa9730_private
*lp
)
355 /* Check link status, spin here till station is not busy. */
357 while (readl(&lp
->lan_saa9730_regs
->StationMgmtCtl
) & MD_CA_BUSY
) {
360 printk("Error: lan_saa9730_mii_init: timeout\n");
363 mdelay(1); /* wait 1 ms. */
366 /* Now set the control and address register. */
367 writel(MD_CA_BUSY
| PHY_STATUS
| PHY_ADDRESS
<< MD_CA_PHY_SHF
,
368 &lp
->lan_saa9730_regs
->StationMgmtCtl
);
370 /* check link status, spin here till station is not busy */
372 while (readl(&lp
->lan_saa9730_regs
->StationMgmtCtl
) & MD_CA_BUSY
) {
375 printk("Error: lan_saa9730_mii_init: timeout\n");
378 mdelay(1); /* wait 1 ms. */
384 /* Check the link status. */
385 if (readl(&lp
->lan_saa9730_regs
->StationMgmtData
) &
386 PHY_STATUS_LINK_UP
) {
390 /* Link is down, reset the PHY first. */
392 /* set PHY address = 'CONTROL' */
393 writel(PHY_ADDRESS
<< MD_CA_PHY_SHF
| MD_CA_WR
| PHY_CONTROL
,
394 &lp
->lan_saa9730_regs
->StationMgmtCtl
);
399 /* set 'CONTROL' = force reset and renegotiate */
400 writel(PHY_CONTROL_RESET
| PHY_CONTROL_AUTO_NEG
|
401 PHY_CONTROL_RESTART_AUTO_NEG
,
402 &lp
->lan_saa9730_regs
->StationMgmtData
);
404 /* Wait for 50 ms. */
407 /* set 'BUSY' to start operation */
408 writel(MD_CA_BUSY
| PHY_ADDRESS
<< MD_CA_PHY_SHF
| MD_CA_WR
|
409 PHY_CONTROL
, &lp
->lan_saa9730_regs
->StationMgmtCtl
);
411 /* await completion */
413 while (readl(&lp
->lan_saa9730_regs
->StationMgmtCtl
) &
418 ("Error: lan_saa9730_mii_init: timeout\n");
421 mdelay(1); /* wait 1 ms. */
427 for (l
= 0; l
< 2; l
++) {
428 /* set PHY address = 'STATUS' */
429 writel(MD_CA_BUSY
| PHY_ADDRESS
<< MD_CA_PHY_SHF
|
431 &lp
->lan_saa9730_regs
->StationMgmtCtl
);
433 /* await completion */
435 while (readl(&lp
->lan_saa9730_regs
->StationMgmtCtl
) &
440 ("Error: lan_saa9730_mii_init: timeout\n");
443 mdelay(1); /* wait 1 ms. */
446 /* wait for 3 sec. */
449 /* check the link status */
450 if (readl(&lp
->lan_saa9730_regs
->StationMgmtData
) &
451 PHY_STATUS_LINK_UP
) {
461 static int lan_saa9730_control_init(struct lan_saa9730_private
*lp
)
463 /* Initialize DMA control register. */
464 writel((LANMB_ANY
<< DMA_CTL_MAX_XFER_SHF
) |
465 (LANEND_LITTLE
<< DMA_CTL_ENDIAN_SHF
) |
466 (LAN_SAA9730_RCV_Q_INT_THRESHOLD
<< DMA_CTL_RX_INT_COUNT_SHF
)
467 | DMA_CTL_RX_INT_TO_EN
| DMA_CTL_RX_INT_EN
|
468 DMA_CTL_MAC_RX_INT_EN
| DMA_CTL_MAC_TX_INT_EN
,
469 &lp
->lan_saa9730_regs
->LanDmaCtl
);
471 /* Initial MAC control register. */
472 writel((MACCM_MII
<< MAC_CONTROL_CONN_SHF
) | MAC_CONTROL_FULL_DUP
,
473 &lp
->lan_saa9730_regs
->MacCtl
);
475 /* Initialize CAM control register. */
476 writel(CAM_CONTROL_COMP_EN
| CAM_CONTROL_BROAD_ACC
,
477 &lp
->lan_saa9730_regs
->CamCtl
);
480 * Initialize CAM enable register, only turn on first entry, should
483 writel(0x0001, &lp
->lan_saa9730_regs
->CamEnable
);
485 /* Initialize Tx control register */
486 writel(TX_CTL_EN_COMP
, &lp
->lan_saa9730_regs
->TxCtl
);
488 /* Initialize Rcv control register */
489 writel(RX_CTL_STRIP_CRC
, &lp
->lan_saa9730_regs
->RxCtl
);
491 /* Reset DMA engine */
492 writel(DMA_TEST_SW_RESET
, &lp
->lan_saa9730_regs
->DmaTest
);
497 static int lan_saa9730_stop(struct lan_saa9730_private
*lp
)
502 writel(readl(&lp
->lan_saa9730_regs
->LanDmaCtl
) &
503 ~(DMA_CTL_EN_TX_DMA
| DMA_CTL_EN_RX_DMA
),
504 &lp
->lan_saa9730_regs
->LanDmaCtl
);
506 /* Set the SW Reset bits in DMA and MAC control registers */
507 writel(DMA_TEST_SW_RESET
, &lp
->lan_saa9730_regs
->DmaTest
);
508 writel(readl(&lp
->lan_saa9730_regs
->MacCtl
) | MAC_CONTROL_RESET
,
509 &lp
->lan_saa9730_regs
->MacCtl
);
512 * Wait for MAC reset to have finished. The reset bit is auto cleared
513 * when the reset is done.
516 while (readl(&lp
->lan_saa9730_regs
->MacCtl
) & MAC_CONTROL_RESET
) {
520 ("Error: lan_sa9730_stop: MAC reset timeout\n");
523 mdelay(1); /* wait 1 ms. */
529 static int lan_saa9730_dma_init(struct lan_saa9730_private
*lp
)
531 /* Stop lan controller. */
532 lan_saa9730_stop(lp
);
534 writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT
,
535 &lp
->lan_saa9730_regs
->Timeout
);
540 static int lan_saa9730_start(struct lan_saa9730_private
*lp
)
542 lan_saa9730_buffer_init(lp
);
544 /* Initialize Rx Buffer Index */
545 lp
->NextRcvPacketIndex
= 0;
546 lp
->NextRcvBufferIndex
= 0;
548 /* Set current buffer index & next available packet index */
549 lp
->NextTxmPacketIndex
= 0;
550 lp
->NextTxmBufferIndex
= 0;
551 lp
->PendingTxmPacketIndex
= 0;
552 lp
->PendingTxmBufferIndex
= 0;
554 writel(readl(&lp
->lan_saa9730_regs
->LanDmaCtl
) | DMA_CTL_EN_TX_DMA
|
555 DMA_CTL_EN_RX_DMA
, &lp
->lan_saa9730_regs
->LanDmaCtl
);
557 /* For Tx, turn on MAC then DMA */
558 writel(readl(&lp
->lan_saa9730_regs
->TxCtl
) | TX_CTL_TX_EN
,
559 &lp
->lan_saa9730_regs
->TxCtl
);
561 /* For Rx, turn on DMA then MAC */
562 writel(readl(&lp
->lan_saa9730_regs
->RxCtl
) | RX_CTL_RX_EN
,
563 &lp
->lan_saa9730_regs
->RxCtl
);
565 /* Set Ok2Use to let hardware own the buffers. */
566 writel(OK2USE_RX_A
| OK2USE_RX_B
, &lp
->lan_saa9730_regs
->Ok2Use
);
571 static int lan_saa9730_restart(struct lan_saa9730_private
*lp
)
573 lan_saa9730_stop(lp
);
574 lan_saa9730_start(lp
);
579 static int lan_saa9730_tx(struct net_device
*dev
)
581 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
582 unsigned int *pPacket
;
583 unsigned int tx_status
;
585 if (lan_saa9730_debug
> 5)
586 printk("lan_saa9730_tx interrupt\n");
588 /* Clear interrupt. */
589 writel(DMA_STATUS_MAC_TX_INT
, &lp
->lan_saa9730_regs
->DmaStatus
);
592 pPacket
= lp
->TxmBuffer
[lp
->PendingTxmBufferIndex
]
593 [lp
->PendingTxmPacketIndex
];
595 /* Get status of first packet transmitted. */
596 tx_status
= le32_to_cpu(*pPacket
);
598 /* Check ownership. */
599 if ((tx_status
& TX_STAT_CTL_OWNER_MSK
) !=
600 (TXSF_HWDONE
<< TX_STAT_CTL_OWNER_SHF
)) break;
602 /* Check for error. */
603 if (tx_status
& TX_STAT_CTL_ERROR_MSK
) {
604 if (lan_saa9730_debug
> 1)
605 printk("lan_saa9730_tx: tx error = %x\n",
608 lp
->stats
.tx_errors
++;
610 (TX_STATUS_EX_COLL
<< TX_STAT_CTL_STATUS_SHF
))
611 lp
->stats
.tx_aborted_errors
++;
613 (TX_STATUS_LATE_COLL
<< TX_STAT_CTL_STATUS_SHF
))
614 lp
->stats
.tx_window_errors
++;
616 (TX_STATUS_L_CARR
<< TX_STAT_CTL_STATUS_SHF
))
617 lp
->stats
.tx_carrier_errors
++;
619 (TX_STATUS_UNDER
<< TX_STAT_CTL_STATUS_SHF
))
620 lp
->stats
.tx_fifo_errors
++;
622 (TX_STATUS_SQ_ERR
<< TX_STAT_CTL_STATUS_SHF
))
623 lp
->stats
.tx_heartbeat_errors
++;
625 lp
->stats
.collisions
+=
626 tx_status
& TX_STATUS_TX_COLL_MSK
;
631 cpu_to_le32(TXSF_EMPTY
<< TX_STAT_CTL_OWNER_SHF
);
633 /* Update pending index pointer. */
634 lp
->PendingTxmPacketIndex
++;
635 if (lp
->PendingTxmPacketIndex
>= LAN_SAA9730_TXM_Q_SIZE
) {
636 lp
->PendingTxmPacketIndex
= 0;
637 lp
->PendingTxmBufferIndex
^= 1;
641 /* The tx buffer is no longer full. */
642 netif_wake_queue(dev
);
647 static int lan_saa9730_rx(struct net_device
*dev
)
649 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
651 struct sk_buff
*skb
= 0;
652 unsigned int rx_status
;
655 unsigned int *pPacket
;
656 unsigned char *pData
;
658 if (lan_saa9730_debug
> 5)
659 printk("lan_saa9730_rx interrupt\n");
661 /* Clear receive interrupts. */
662 writel(DMA_STATUS_MAC_RX_INT
| DMA_STATUS_RX_INT
|
663 DMA_STATUS_RX_TO_INT
, &lp
->lan_saa9730_regs
->DmaStatus
);
665 /* Address next packet */
666 BufferIndex
= lp
->NextRcvBufferIndex
;
667 PacketIndex
= lp
->NextRcvPacketIndex
;
668 pPacket
= lp
->RcvBuffer
[BufferIndex
][PacketIndex
];
669 rx_status
= le32_to_cpu(*pPacket
);
671 /* Process each packet. */
672 while ((rx_status
& RX_STAT_CTL_OWNER_MSK
) ==
673 (RXSF_HWDONE
<< RX_STAT_CTL_OWNER_SHF
)) {
674 /* Check the rx status. */
675 if (rx_status
& (RX_STATUS_GOOD
<< RX_STAT_CTL_STATUS_SHF
)) {
676 /* Received packet is good. */
677 len
= (rx_status
& RX_STAT_CTL_LENGTH_MSK
) >>
678 RX_STAT_CTL_LENGTH_SHF
;
680 pData
= (unsigned char *) pPacket
;
682 skb
= dev_alloc_skb(len
+ 2);
685 ("%s: Memory squeeze, deferring packet.\n",
687 lp
->stats
.rx_dropped
++;
689 lp
->stats
.rx_bytes
+= len
;
690 lp
->stats
.rx_packets
++;
691 skb_reserve(skb
, 2); /* 16 byte align */
692 skb_put(skb
, len
); /* make room */
693 skb_copy_to_linear_data(skb
,
694 (unsigned char *) pData
,
696 skb
->protocol
= eth_type_trans(skb
, dev
);
698 dev
->last_rx
= jiffies
;
701 /* We got an error packet. */
702 if (lan_saa9730_debug
> 2)
704 ("lan_saa9730_rx: We got an error packet = %x\n",
707 lp
->stats
.rx_errors
++;
709 (RX_STATUS_CRC_ERR
<< RX_STAT_CTL_STATUS_SHF
))
710 lp
->stats
.rx_crc_errors
++;
712 (RX_STATUS_ALIGN_ERR
<< RX_STAT_CTL_STATUS_SHF
))
713 lp
->stats
.rx_frame_errors
++;
715 (RX_STATUS_OVERFLOW
<< RX_STAT_CTL_STATUS_SHF
))
716 lp
->stats
.rx_fifo_errors
++;
718 (RX_STATUS_LONG_ERR
<< RX_STAT_CTL_STATUS_SHF
))
719 lp
->stats
.rx_length_errors
++;
722 /* Indicate we have processed the buffer. */
723 *pPacket
= cpu_to_le32(RXSF_READY
<< RX_STAT_CTL_OWNER_SHF
);
725 /* Make sure A or B is available to hardware as appropriate. */
726 writel(BufferIndex
? OK2USE_RX_B
: OK2USE_RX_A
,
727 &lp
->lan_saa9730_regs
->Ok2Use
);
729 /* Go to next packet in sequence. */
730 lp
->NextRcvPacketIndex
++;
731 if (lp
->NextRcvPacketIndex
>= LAN_SAA9730_RCV_Q_SIZE
) {
732 lp
->NextRcvPacketIndex
= 0;
733 lp
->NextRcvBufferIndex
^= 1;
736 /* Address next packet */
737 BufferIndex
= lp
->NextRcvBufferIndex
;
738 PacketIndex
= lp
->NextRcvPacketIndex
;
739 pPacket
= lp
->RcvBuffer
[BufferIndex
][PacketIndex
];
740 rx_status
= le32_to_cpu(*pPacket
);
746 static irqreturn_t
lan_saa9730_interrupt(const int irq
, void *dev_id
)
748 struct net_device
*dev
= dev_id
;
749 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
751 if (lan_saa9730_debug
> 5)
752 printk("lan_saa9730_interrupt\n");
754 /* Disable the EVM LAN interrupt. */
755 evm_saa9730_block_lan_int(lp
);
757 /* Clear the EVM LAN interrupt. */
758 evm_saa9730_clear_lan_int(lp
);
760 /* Service pending transmit interrupts. */
761 if (readl(&lp
->lan_saa9730_regs
->DmaStatus
) & DMA_STATUS_MAC_TX_INT
)
764 /* Service pending receive interrupts. */
765 if (readl(&lp
->lan_saa9730_regs
->DmaStatus
) &
766 (DMA_STATUS_MAC_RX_INT
| DMA_STATUS_RX_INT
|
767 DMA_STATUS_RX_TO_INT
)) lan_saa9730_rx(dev
);
769 /* Enable the EVM LAN interrupt. */
770 evm_saa9730_unblock_lan_int(lp
);
775 static int lan_saa9730_open(struct net_device
*dev
)
777 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
779 /* Associate IRQ with lan_saa9730_interrupt */
780 if (request_irq(dev
->irq
, &lan_saa9730_interrupt
, 0, "SAA9730 Eth",
782 printk("lan_saa9730_open: Can't get irq %d\n", dev
->irq
);
786 /* Enable the Lan interrupt in the event manager. */
787 evm_saa9730_enable_lan_int(lp
);
789 /* Start the LAN controller */
790 if (lan_saa9730_start(lp
))
793 netif_start_queue(dev
);
798 static int lan_saa9730_write(struct lan_saa9730_private
*lp
,
799 struct sk_buff
*skb
, int skblen
)
801 unsigned char *pbData
= skb
->data
;
802 unsigned int len
= skblen
;
803 unsigned char *pbPacketData
;
804 unsigned int tx_status
;
808 if (lan_saa9730_debug
> 5)
809 printk("lan_saa9730_write: skb=%p\n", skb
);
811 BufferIndex
= lp
->NextTxmBufferIndex
;
812 PacketIndex
= lp
->NextTxmPacketIndex
;
814 tx_status
= le32_to_cpu(*(unsigned int *)lp
->TxmBuffer
[BufferIndex
]
816 if ((tx_status
& TX_STAT_CTL_OWNER_MSK
) !=
817 (TXSF_EMPTY
<< TX_STAT_CTL_OWNER_SHF
)) {
818 if (lan_saa9730_debug
> 4)
820 ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
825 lp
->NextTxmPacketIndex
++;
826 if (lp
->NextTxmPacketIndex
>= LAN_SAA9730_TXM_Q_SIZE
) {
827 lp
->NextTxmPacketIndex
= 0;
828 lp
->NextTxmBufferIndex
^= 1;
831 pbPacketData
= lp
->TxmBuffer
[BufferIndex
][PacketIndex
];
835 memcpy(pbPacketData
, pbData
, len
);
837 /* Set transmit status for hardware */
838 *(unsigned int *)lp
->TxmBuffer
[BufferIndex
][PacketIndex
] =
839 cpu_to_le32((TXSF_READY
<< TX_STAT_CTL_OWNER_SHF
) |
840 (TX_STAT_CTL_INT_AFTER_TX
<<
841 TX_STAT_CTL_FRAME_SHF
) |
842 (len
<< TX_STAT_CTL_LENGTH_SHF
));
844 /* Make sure A or B is available to hardware as appropriate. */
845 writel(BufferIndex
? OK2USE_TX_B
: OK2USE_TX_A
,
846 &lp
->lan_saa9730_regs
->Ok2Use
);
851 static void lan_saa9730_tx_timeout(struct net_device
*dev
)
853 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
855 /* Transmitter timeout, serious problems */
856 lp
->stats
.tx_errors
++;
857 printk("%s: transmit timed out, reset\n", dev
->name
);
858 /*show_saa9730_regs(lp); */
859 lan_saa9730_restart(lp
);
861 dev
->trans_start
= jiffies
;
862 netif_wake_queue(dev
);
865 static int lan_saa9730_start_xmit(struct sk_buff
*skb
,
866 struct net_device
*dev
)
868 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
873 if (lan_saa9730_debug
> 4)
874 printk("Send packet: skb=%p\n", skb
);
878 spin_lock_irqsave(&lp
->lock
, flags
);
880 len
= (skblen
<= ETH_ZLEN
) ? ETH_ZLEN
: skblen
;
882 if (lan_saa9730_write(lp
, skb
, skblen
)) {
883 spin_unlock_irqrestore(&lp
->lock
, flags
);
884 printk("Error when writing packet to controller: skb=%p\n", skb
);
885 netif_stop_queue(dev
);
889 lp
->stats
.tx_bytes
+= len
;
890 lp
->stats
.tx_packets
++;
892 dev
->trans_start
= jiffies
;
893 netif_wake_queue(dev
);
896 spin_unlock_irqrestore(&lp
->lock
, flags
);
901 static int lan_saa9730_close(struct net_device
*dev
)
903 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
905 if (lan_saa9730_debug
> 1)
906 printk("lan_saa9730_close:\n");
908 netif_stop_queue(dev
);
910 /* Disable the Lan interrupt in the event manager. */
911 evm_saa9730_disable_lan_int(lp
);
913 /* Stop the controller */
914 if (lan_saa9730_stop(lp
))
917 free_irq(dev
->irq
, (void *) dev
);
922 static struct net_device_stats
*lan_saa9730_get_stats(struct net_device
925 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
930 static void lan_saa9730_set_multicast(struct net_device
*dev
)
932 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
934 /* Stop the controller */
935 lan_saa9730_stop(lp
);
937 if (dev
->flags
& IFF_PROMISC
) {
938 /* accept all packets */
939 writel(CAM_CONTROL_COMP_EN
| CAM_CONTROL_STATION_ACC
|
940 CAM_CONTROL_GROUP_ACC
| CAM_CONTROL_BROAD_ACC
,
941 &lp
->lan_saa9730_regs
->CamCtl
);
943 if (dev
->flags
& IFF_ALLMULTI
|| dev
->mc_count
) {
944 /* accept all multicast packets */
946 * Will handle the multicast stuff later. -carstenl
948 writel(CAM_CONTROL_COMP_EN
| CAM_CONTROL_GROUP_ACC
|
949 CAM_CONTROL_BROAD_ACC
,
950 &lp
->lan_saa9730_regs
->CamCtl
);
954 lan_saa9730_restart(lp
);
958 static void __devexit
saa9730_remove_one(struct pci_dev
*pdev
)
960 struct net_device
*dev
= pci_get_drvdata(pdev
);
961 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
964 unregister_netdev(dev
);
965 lan_saa9730_free_buffers(pdev
, lp
);
966 iounmap(lp
->lan_saa9730_regs
);
967 iounmap(lp
->evm_saa9730_regs
);
969 pci_release_regions(pdev
);
970 pci_disable_device(pdev
);
971 pci_set_drvdata(pdev
, NULL
);
976 static int lan_saa9730_init(struct net_device
*dev
, struct pci_dev
*pdev
,
977 unsigned long ioaddr
, int irq
)
979 struct lan_saa9730_private
*lp
= netdev_priv(dev
);
980 unsigned char ethernet_addr
[6];
983 if (get_ethernet_addr(ethernet_addr
)) {
988 memcpy(dev
->dev_addr
, ethernet_addr
, 6);
989 dev
->base_addr
= ioaddr
;
994 /* Set SAA9730 LAN base address. */
995 lp
->lan_saa9730_regs
= ioremap(ioaddr
+ SAA9730_LAN_REGS_ADDR
,
996 SAA9730_LAN_REGS_SIZE
);
997 if (!lp
->lan_saa9730_regs
) {
1002 /* Set SAA9730 EVM base address. */
1003 lp
->evm_saa9730_regs
= ioremap(ioaddr
+ SAA9730_EVM_REGS_ADDR
,
1004 SAA9730_EVM_REGS_SIZE
);
1005 if (!lp
->evm_saa9730_regs
) {
1007 goto out_iounmap_lan
;
1010 /* Allocate LAN RX/TX frame buffer space. */
1011 if ((ret
= lan_saa9730_allocate_buffers(pdev
, lp
)))
1014 /* Stop LAN controller. */
1015 if ((ret
= lan_saa9730_stop(lp
)))
1016 goto out_free_consistent
;
1018 /* Initialize CAM registers. */
1019 if ((ret
= lan_saa9730_cam_init(dev
)))
1020 goto out_free_consistent
;
1022 /* Initialize MII registers. */
1023 if ((ret
= lan_saa9730_mii_init(lp
)))
1024 goto out_free_consistent
;
1026 /* Initialize control registers. */
1027 if ((ret
= lan_saa9730_control_init(lp
)))
1028 goto out_free_consistent
;
1030 /* Load CAM registers. */
1031 if ((ret
= lan_saa9730_cam_load(lp
)))
1032 goto out_free_consistent
;
1034 /* Initialize DMA context registers. */
1035 if ((ret
= lan_saa9730_dma_init(lp
)))
1036 goto out_free_consistent
;
1038 spin_lock_init(&lp
->lock
);
1040 dev
->open
= lan_saa9730_open
;
1041 dev
->hard_start_xmit
= lan_saa9730_start_xmit
;
1042 dev
->stop
= lan_saa9730_close
;
1043 dev
->get_stats
= lan_saa9730_get_stats
;
1044 dev
->set_multicast_list
= lan_saa9730_set_multicast
;
1045 dev
->tx_timeout
= lan_saa9730_tx_timeout
;
1046 dev
->watchdog_timeo
= (HZ
>> 1);
1049 ret
= register_netdev (dev
);
1051 goto out_free_consistent
;
1055 out_free_consistent
:
1056 lan_saa9730_free_buffers(pdev
, lp
);
1058 iounmap(lp
->evm_saa9730_regs
);
1060 iounmap(lp
->lan_saa9730_regs
);
1066 static int __devinit
saa9730_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1068 struct net_device
*dev
= NULL
;
1069 unsigned long pci_ioaddr
;
1072 if (lan_saa9730_debug
> 1)
1073 printk("saa9730.c: PCI bios is present, checking for devices...\n");
1075 err
= pci_enable_device(pdev
);
1077 printk(KERN_ERR
"Cannot enable PCI device, aborting.\n");
1081 err
= pci_request_regions(pdev
, DRV_MODULE_NAME
);
1083 printk(KERN_ERR
"Cannot obtain PCI resources, aborting.\n");
1084 goto out_disable_pdev
;
1087 pci_irq_line
= pdev
->irq
;
1088 /* LAN base address in located at BAR 1. */
1090 pci_ioaddr
= pci_resource_start(pdev
, 1);
1091 pci_set_master(pdev
);
1093 printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
1094 pci_ioaddr
, pci_irq_line
);
1096 dev
= alloc_etherdev(sizeof(struct lan_saa9730_private
));
1098 goto out_disable_pdev
;
1100 err
= lan_saa9730_init(dev
, pdev
, pci_ioaddr
, pci_irq_line
);
1102 printk("LAN init failed");
1103 goto out_free_netdev
;
1106 pci_set_drvdata(pdev
, dev
);
1107 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1113 pci_disable_device(pdev
);
1115 pci_set_drvdata(pdev
, NULL
);
1120 static struct pci_driver saa9730_driver
= {
1121 .name
= DRV_MODULE_NAME
,
1122 .id_table
= saa9730_pci_tbl
,
1123 .probe
= saa9730_init_one
,
1124 .remove
= __devexit_p(saa9730_remove_one
),
1128 static int __init
saa9730_init(void)
1130 return pci_register_driver(&saa9730_driver
);
1133 static void __exit
saa9730_cleanup(void)
1135 pci_unregister_driver(&saa9730_driver
);
1138 module_init(saa9730_init
);
1139 module_exit(saa9730_cleanup
);
1141 MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
1142 MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
1143 MODULE_LICENSE("GPL");