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[PATCH] drivers/net/wireless/prism54/oid_mgt.c: kmalloc + memset conversion to kzalloc
[linux-2.6/s3c2410-cpufreq.git] / drivers / net / tc35815.c
blobb5e0dff672302acb42dccba68630e8ef4cda0f35
1 /*
2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
3 *
4 * Based on skelton.c by Donald Becker.
5 *
6 * This driver is a replacement of older and less maintained version.
7 * This is a header of the older version:
8 * -----<snip>-----
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: MontaVista Software, Inc.
11 * ahennessy@mvista.com
12 * Copyright (C) 2000-2001 Toshiba Corporation
13 * static const char *version =
14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
15 * -----<snip>-----
16 *
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
19 * for more details.
20 *
21 * (C) Copyright TOSHIBA CORPORATION 2004-2005
22 * All Rights Reserved.
23 */
24
25 #ifdef TC35815_NAPI
26 #define DRV_VERSION "1.36-NAPI"
27 #else
28 #define DRV_VERSION "1.36"
29 #endif
30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31 #define MODNAME "tc35815"
32
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/fcntl.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/in.h>
40 #include <linux/slab.h>
41 #include <linux/string.h>
42 #include <linux/spinlock.h>
43 #include <linux/errno.h>
44 #include <linux/init.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/delay.h>
49 #include <linux/pci.h>
50 #include <linux/mii.h>
51 #include <linux/ethtool.h>
52 #include <linux/platform_device.h>
53 #include <asm/io.h>
54 #include <asm/byteorder.h>
55
56 /* First, a few definitions that the brave might change. */
57
58 #define GATHER_TXINT /* On-Demand Tx Interrupt */
59 #define WORKAROUND_LOSTCAR
60 #define WORKAROUND_100HALF_PROMISC
61 /* #define TC35815_USE_PACKEDBUFFER */
62
63 typedef enum {
64 TC35815CF = 0,
65 TC35815_NWU,
66 TC35815_TX4939,
67 } board_t;
68
69 /* indexed by board_t, above */
70 static const struct {
71 const char *name;
72 } board_info[] __devinitdata = {
73 { "TOSHIBA TC35815CF 10/100BaseTX" },
74 { "TOSHIBA TC35815 with Wake on LAN" },
75 { "TOSHIBA TC35815/TX4939" },
76 };
77
78 static const struct pci_device_id tc35815_pci_tbl[] = {
79 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
80 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
81 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
82 {0,}
83 };
84 MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
85
86 /* see MODULE_PARM_DESC */
87 static struct tc35815_options {
88 int speed;
89 int duplex;
90 int doforce;
91 } options;
92
93 /*
94 * Registers
95 */
96 struct tc35815_regs {
97 volatile __u32 DMA_Ctl; /* 0x00 */
98 volatile __u32 TxFrmPtr;
99 volatile __u32 TxThrsh;
100 volatile __u32 TxPollCtr;
101 volatile __u32 BLFrmPtr;
102 volatile __u32 RxFragSize;
103 volatile __u32 Int_En;
104 volatile __u32 FDA_Bas;
105 volatile __u32 FDA_Lim; /* 0x20 */
106 volatile __u32 Int_Src;
107 volatile __u32 unused0[2];
108 volatile __u32 PauseCnt;
109 volatile __u32 RemPauCnt;
110 volatile __u32 TxCtlFrmStat;
111 volatile __u32 unused1;
112 volatile __u32 MAC_Ctl; /* 0x40 */
113 volatile __u32 CAM_Ctl;
114 volatile __u32 Tx_Ctl;
115 volatile __u32 Tx_Stat;
116 volatile __u32 Rx_Ctl;
117 volatile __u32 Rx_Stat;
118 volatile __u32 MD_Data;
119 volatile __u32 MD_CA;
120 volatile __u32 CAM_Adr; /* 0x60 */
121 volatile __u32 CAM_Data;
122 volatile __u32 CAM_Ena;
123 volatile __u32 PROM_Ctl;
124 volatile __u32 PROM_Data;
125 volatile __u32 Algn_Cnt;
126 volatile __u32 CRC_Cnt;
127 volatile __u32 Miss_Cnt;
128 };
129
130 /*
131 * Bit assignments
132 */
133 /* DMA_Ctl bit asign ------------------------------------------------------- */
134 #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
135 #define DMA_RxAlign_1 0x00400000
136 #define DMA_RxAlign_2 0x00800000
137 #define DMA_RxAlign_3 0x00c00000
138 #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
139 #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
140 #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
141 #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
142 #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
143 #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
144 #define DMA_TestMode 0x00002000 /* 1:Test Mode */
145 #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
146 #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
147
148 /* RxFragSize bit asign ---------------------------------------------------- */
149 #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
150 #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
151
152 /* MAC_Ctl bit asign ------------------------------------------------------- */
153 #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
154 #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
155 #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
156 #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
157 #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
158 #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
159 #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
160 #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
161 #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
162 #define MAC_Reset 0x00000004 /* 1:Software Reset */
163 #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
164 #define MAC_HaltReq 0x00000001 /* 1:Halt request */
165
166 /* PROM_Ctl bit asign ------------------------------------------------------ */
167 #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
168 #define PROM_Read 0x00004000 /*10:Read operation */
169 #define PROM_Write 0x00002000 /*01:Write operation */
170 #define PROM_Erase 0x00006000 /*11:Erase operation */
171 /*00:Enable or Disable Writting, */
172 /* as specified in PROM_Addr. */
173 #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
174 /*00xxxx: disable */
175
176 /* CAM_Ctl bit asign ------------------------------------------------------- */
177 #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
178 #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
179 /* accept other */
180 #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
181 #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
182 #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
183
184 /* CAM_Ena bit asign ------------------------------------------------------- */
185 #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
186 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
187 #define CAM_Ena_Bit(index) (1<<(index))
188 #define CAM_ENTRY_DESTINATION 0
189 #define CAM_ENTRY_SOURCE 1
190 #define CAM_ENTRY_MACCTL 20
191
192 /* Tx_Ctl bit asign -------------------------------------------------------- */
193 #define Tx_En 0x00000001 /* 1:Transmit enable */
194 #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
195 #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
196 #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
197 #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
198 #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
199 #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
200 #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
201 #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
202 #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
203 #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
204 #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
205
206 /* Tx_Stat bit asign ------------------------------------------------------- */
207 #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
208 #define Tx_ExColl 0x00000010 /* Excessive Collision */
209 #define Tx_TXDefer 0x00000020 /* Transmit Defered */
210 #define Tx_Paused 0x00000040 /* Transmit Paused */
211 #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
212 #define Tx_Under 0x00000100 /* Underrun */
213 #define Tx_Defer 0x00000200 /* Deferral */
214 #define Tx_NCarr 0x00000400 /* No Carrier */
215 #define Tx_10Stat 0x00000800 /* 10Mbps Status */
216 #define Tx_LateColl 0x00001000 /* Late Collision */
217 #define Tx_TxPar 0x00002000 /* Tx Parity Error */
218 #define Tx_Comp 0x00004000 /* Completion */
219 #define Tx_Halted 0x00008000 /* Tx Halted */
220 #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
221
222 /* Rx_Ctl bit asign -------------------------------------------------------- */
223 #define Rx_EnGood 0x00004000 /* 1:Enable Good */
224 #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
225 #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
226 #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
227 #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
228 #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
229 #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
230 #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
231 #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
232 #define Rx_LongEn 0x00000004 /* 1:Long Enable */
233 #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
234 #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
235
236 /* Rx_Stat bit asign ------------------------------------------------------- */
237 #define Rx_Halted 0x00008000 /* Rx Halted */
238 #define Rx_Good 0x00004000 /* Rx Good */
239 #define Rx_RxPar 0x00002000 /* Rx Parity Error */
240 /* 0x00001000 not use */
241 #define Rx_LongErr 0x00000800 /* Rx Long Error */
242 #define Rx_Over 0x00000400 /* Rx Overflow */
243 #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
244 #define Rx_Align 0x00000100 /* Rx Alignment Error */
245 #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
246 #define Rx_IntRx 0x00000040 /* Rx Interrupt */
247 #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
248
249 #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
250
251 /* Int_En bit asign -------------------------------------------------------- */
252 #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
253 #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
254 #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
255 #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
256 #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
257 #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
258 #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
259 #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
260 #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
261 #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
262 #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
263 #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
264 /* Exhausted Enable */
265
266 /* Int_Src bit asign ------------------------------------------------------- */
267 #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
268 #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
269 #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
270 #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
271 #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
272 #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
273 #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
274 #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
275 #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
276 #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
277 #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
278 #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
279 #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
280 #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
281 #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
282
283 /* MD_CA bit asign --------------------------------------------------------- */
284 #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
285 #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
286 #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
287
288
289 /*
290 * Descriptors
291 */
292
293 /* Frame descripter */
294 struct FDesc {
295 volatile __u32 FDNext;
296 volatile __u32 FDSystem;
297 volatile __u32 FDStat;
298 volatile __u32 FDCtl;
299 };
300
301 /* Buffer descripter */
302 struct BDesc {
303 volatile __u32 BuffData;
304 volatile __u32 BDCtl;
305 };
306
307 #define FD_ALIGN 16
308
309 /* Frame Descripter bit asign ---------------------------------------------- */
310 #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
311 #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
312 #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
313 #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
314 #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
315 #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
316 #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
317 #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
318 #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
319 #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
320 #define FD_BDCnt_SHIFT 16
321
322 /* Buffer Descripter bit asign --------------------------------------------- */
323 #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
324 #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
325 #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
326 #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
327 #define BD_RxBDID_SHIFT 16
328 #define BD_RxBDSeqN_SHIFT 24
329
330
331 /* Some useful constants. */
332 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
333
334 #ifdef NO_CHECK_CARRIER
335 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
336 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
337 Tx_En) /* maybe 0x7b01 */
338 #else
339 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
340 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
341 Tx_En) /* maybe 0x7b01 */
342 #endif
343 #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
344 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
345 #define INT_EN_CMD (Int_NRAbtEn | \
346 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
347 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
348 Int_STargAbtEn | \
349 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
350 #define DMA_CTL_CMD DMA_BURST_SIZE
351 #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
352
353 /* Tuning parameters */
354 #define DMA_BURST_SIZE 32
355 #define TX_THRESHOLD 1024
356 #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
357 #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
358
359 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
360 #ifdef TC35815_USE_PACKEDBUFFER
361 #define FD_PAGE_NUM 2
362 #define RX_BUF_NUM 8 /* >= 2 */
363 #define RX_FD_NUM 250 /* >= 32 */
364 #define TX_FD_NUM 128
365 #define RX_BUF_SIZE PAGE_SIZE
366 #else /* TC35815_USE_PACKEDBUFFER */
367 #define FD_PAGE_NUM 4
368 #define RX_BUF_NUM 128 /* < 256 */
369 #define RX_FD_NUM 256 /* >= 32 */
370 #define TX_FD_NUM 128
371 #if RX_CTL_CMD & Rx_LongEn
372 #define RX_BUF_SIZE PAGE_SIZE
373 #elif RX_CTL_CMD & Rx_StripCRC
374 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
375 #else
376 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
377 #endif
378 #endif /* TC35815_USE_PACKEDBUFFER */
379 #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
380 #define NAPI_WEIGHT 16
381
382 struct TxFD {
383 struct FDesc fd;
384 struct BDesc bd;
385 struct BDesc unused;
386 };
387
388 struct RxFD {
389 struct FDesc fd;
390 struct BDesc bd[0]; /* variable length */
391 };
392
393 struct FrFD {
394 struct FDesc fd;
395 struct BDesc bd[RX_BUF_NUM];
396 };
397
398
399 #define tc_readl(addr) readl(addr)
400 #define tc_writel(d, addr) writel(d, addr)
401
402 #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
403
404 /* Timer state engine. */
405 enum tc35815_timer_state {
406 arbwait = 0, /* Waiting for auto negotiation to complete. */
407 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
408 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
409 asleep = 3, /* Time inactive. */
410 lcheck = 4, /* Check link status. */
411 };
412
413 /* Information that need to be kept for each board. */
414 struct tc35815_local {
415 struct pci_dev *pci_dev;
416
417 struct net_device *dev;
418 struct napi_struct napi;
419
420 /* statistics */
421 struct net_device_stats stats;
422 struct {
423 int max_tx_qlen;
424 int tx_ints;
425 int rx_ints;
426 int tx_underrun;
427 } lstats;
428
429 /* Tx control lock. This protects the transmit buffer ring
430 * state along with the "tx full" state of the driver. This
431 * means all netif_queue flow control actions are protected
432 * by this lock as well.
433 */
434 spinlock_t lock;
435
436 int phy_addr;
437 int fullduplex;
438 unsigned short saved_lpa;
439 struct timer_list timer;
440 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
441 unsigned int timer_ticks; /* Number of clicks at each state */
442
443 /*
444 * Transmitting: Batch Mode.
445 * 1 BD in 1 TxFD.
446 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
447 * 1 circular FD for Free Buffer List.
448 * RX_BUF_NUM BD in Free Buffer FD.
449 * One Free Buffer BD has PAGE_SIZE data buffer.
450 * Or Non-Packing Mode.
451 * 1 circular FD for Free Buffer List.
452 * RX_BUF_NUM BD in Free Buffer FD.
453 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
454 */
455 void * fd_buf; /* for TxFD, RxFD, FrFD */
456 dma_addr_t fd_buf_dma;
457 struct TxFD *tfd_base;
458 unsigned int tfd_start;
459 unsigned int tfd_end;
460 struct RxFD *rfd_base;
461 struct RxFD *rfd_limit;
462 struct RxFD *rfd_cur;
463 struct FrFD *fbl_ptr;
464 #ifdef TC35815_USE_PACKEDBUFFER
465 unsigned char fbl_curid;
466 void * data_buf[RX_BUF_NUM]; /* packing */
467 dma_addr_t data_buf_dma[RX_BUF_NUM];
468 struct {
469 struct sk_buff *skb;
470 dma_addr_t skb_dma;
471 } tx_skbs[TX_FD_NUM];
472 #else
473 unsigned int fbl_count;
474 struct {
475 struct sk_buff *skb;
476 dma_addr_t skb_dma;
477 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
478 #endif
479 struct mii_if_info mii;
480 unsigned short mii_id[2];
481 u32 msg_enable;
482 board_t boardtype;
483 };
484
485 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
486 {
487 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
488 }
489 #ifdef DEBUG
490 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
491 {
492 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
493 }
494 #endif
495 #ifdef TC35815_USE_PACKEDBUFFER
496 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
497 {
498 int i;
499 for (i = 0; i < RX_BUF_NUM; i++) {
500 if (bus >= lp->data_buf_dma[i] &&
501 bus < lp->data_buf_dma[i] + PAGE_SIZE)
502 return (void *)((u8 *)lp->data_buf[i] +
503 (bus - lp->data_buf_dma[i]));
504 }
505 return NULL;
506 }
507
508 #define TC35815_DMA_SYNC_ONDEMAND
509 static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
510 {
511 #ifdef TC35815_DMA_SYNC_ONDEMAND
512 void *buf;
513 /* pci_map + pci_dma_sync will be more effective than
514 * pci_alloc_consistent on some archs. */
515 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
516 return NULL;
517 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
518 PCI_DMA_FROMDEVICE);
519 if (pci_dma_mapping_error(*dma_handle)) {
520 free_page((unsigned long)buf);
521 return NULL;
522 }
523 return buf;
524 #else
525 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
526 #endif
527 }
528
529 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
530 {
531 #ifdef TC35815_DMA_SYNC_ONDEMAND
532 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
533 free_page((unsigned long)buf);
534 #else
535 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
536 #endif
537 }
538 #else /* TC35815_USE_PACKEDBUFFER */
539 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
540 struct pci_dev *hwdev,
541 dma_addr_t *dma_handle)
542 {
543 struct sk_buff *skb;
544 skb = dev_alloc_skb(RX_BUF_SIZE);
545 if (!skb)
546 return NULL;
547 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
548 PCI_DMA_FROMDEVICE);
549 if (pci_dma_mapping_error(*dma_handle)) {
550 dev_kfree_skb_any(skb);
551 return NULL;
552 }
553 skb_reserve(skb, 2); /* make IP header 4byte aligned */
554 return skb;
555 }
556
557 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
558 {
559 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
560 PCI_DMA_FROMDEVICE);
561 dev_kfree_skb_any(skb);
562 }
563 #endif /* TC35815_USE_PACKEDBUFFER */
564
565 /* Index to functions, as function prototypes. */
566
567 static int tc35815_open(struct net_device *dev);
568 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
569 static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
570 #ifdef TC35815_NAPI
571 static int tc35815_rx(struct net_device *dev, int limit);
572 static int tc35815_poll(struct napi_struct *napi, int budget);
573 #else
574 static void tc35815_rx(struct net_device *dev);
575 #endif
576 static void tc35815_txdone(struct net_device *dev);
577 static int tc35815_close(struct net_device *dev);
578 static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
579 static void tc35815_set_multicast_list(struct net_device *dev);
580 static void tc35815_tx_timeout(struct net_device *dev);
581 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
582 #ifdef CONFIG_NET_POLL_CONTROLLER
583 static void tc35815_poll_controller(struct net_device *dev);
584 #endif
585 static const struct ethtool_ops tc35815_ethtool_ops;
586
587 /* Example routines you must write ;->. */
588 static void tc35815_chip_reset(struct net_device *dev);
589 static void tc35815_chip_init(struct net_device *dev);
590 static void tc35815_find_phy(struct net_device *dev);
591 static void tc35815_phy_chip_init(struct net_device *dev);
592
593 #ifdef DEBUG
594 static void panic_queues(struct net_device *dev);
595 #endif
596
597 static void tc35815_timer(unsigned long data);
598 static void tc35815_start_auto_negotiation(struct net_device *dev,
599 struct ethtool_cmd *ep);
600 static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
601 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
602 int val);
603
604 #ifdef CONFIG_CPU_TX49XX
605 /*
606 * Find a platform_device providing a MAC address. The platform code
607 * should provide a "tc35815-mac" device with a MAC address in its
608 * platform_data.
609 */
610 static int __devinit tc35815_mac_match(struct device *dev, void *data)
611 {
612 struct platform_device *plat_dev = to_platform_device(dev);
613 struct pci_dev *pci_dev = data;
614 unsigned int id = (pci_dev->bus->number << 8) | pci_dev->devfn;
615 return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
616 }
617
618 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
619 {
620 struct tc35815_local *lp = dev->priv;
621 struct device *pd = bus_find_device(&platform_bus_type, NULL,
622 lp->pci_dev, tc35815_mac_match);
623 if (pd) {
624 if (pd->platform_data)
625 memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
626 put_device(pd);
627 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
628 }
629 return -ENODEV;
630 }
631 #else
632 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
633 {
634 return -ENODEV;
635 }
636 #endif
637
638 static int __devinit tc35815_init_dev_addr (struct net_device *dev)
639 {
640 struct tc35815_regs __iomem *tr =
641 (struct tc35815_regs __iomem *)dev->base_addr;
642 int i;
643
644 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
645 ;
646 for (i = 0; i < 6; i += 2) {
647 unsigned short data;
648 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
649 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
650 ;
651 data = tc_readl(&tr->PROM_Data);
652 dev->dev_addr[i] = data & 0xff;
653 dev->dev_addr[i+1] = data >> 8;
654 }
655 if (!is_valid_ether_addr(dev->dev_addr))
656 return tc35815_read_plat_dev_addr(dev);
657 return 0;
658 }
659
660 static int __devinit tc35815_init_one (struct pci_dev *pdev,
661 const struct pci_device_id *ent)
662 {
663 void __iomem *ioaddr = NULL;
664 struct net_device *dev;
665 struct tc35815_local *lp;
666 int rc;
667 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
668
669 static int printed_version;
670 if (!printed_version++) {
671 printk(version);
672 dev_printk(KERN_DEBUG, &pdev->dev,
673 "speed:%d duplex:%d doforce:%d\n",
674 options.speed, options.duplex, options.doforce);
675 }
676
677 if (!pdev->irq) {
678 dev_warn(&pdev->dev, "no IRQ assigned.\n");
679 return -ENODEV;
680 }
681
682 /* dev zeroed in alloc_etherdev */
683 dev = alloc_etherdev (sizeof (*lp));
684 if (dev == NULL) {
685 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
686 return -ENOMEM;
687 }
688 SET_MODULE_OWNER(dev);
689 SET_NETDEV_DEV(dev, &pdev->dev);
690 lp = dev->priv;
691 lp->dev = dev;
692
693 /* enable device (incl. PCI PM wakeup), and bus-mastering */
694 rc = pci_enable_device (pdev);
695 if (rc)
696 goto err_out;
697
698 mmio_start = pci_resource_start (pdev, 1);
699 mmio_end = pci_resource_end (pdev, 1);
700 mmio_flags = pci_resource_flags (pdev, 1);
701 mmio_len = pci_resource_len (pdev, 1);
702
703 /* set this immediately, we need to know before
704 * we talk to the chip directly */
705
706 /* make sure PCI base addr 1 is MMIO */
707 if (!(mmio_flags & IORESOURCE_MEM)) {
708 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
709 rc = -ENODEV;
710 goto err_out;
711 }
712
713 /* check for weird/broken PCI region reporting */
714 if ((mmio_len < sizeof(struct tc35815_regs))) {
715 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
716 rc = -ENODEV;
717 goto err_out;
718 }
719
720 rc = pci_request_regions (pdev, MODNAME);
721 if (rc)
722 goto err_out;
723
724 pci_set_master (pdev);
725
726 /* ioremap MMIO region */
727 ioaddr = ioremap (mmio_start, mmio_len);
728 if (ioaddr == NULL) {
729 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
730 rc = -EIO;
731 goto err_out_free_res;
732 }
733
734 /* Initialize the device structure. */
735 dev->open = tc35815_open;
736 dev->hard_start_xmit = tc35815_send_packet;
737 dev->stop = tc35815_close;
738 dev->get_stats = tc35815_get_stats;
739 dev->set_multicast_list = tc35815_set_multicast_list;
740 dev->do_ioctl = tc35815_ioctl;
741 dev->ethtool_ops = &tc35815_ethtool_ops;
742 dev->tx_timeout = tc35815_tx_timeout;
743 dev->watchdog_timeo = TC35815_TX_TIMEOUT;
744 #ifdef TC35815_NAPI
745 netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
746 #endif
747 #ifdef CONFIG_NET_POLL_CONTROLLER
748 dev->poll_controller = tc35815_poll_controller;
749 #endif
750
751 dev->irq = pdev->irq;
752 dev->base_addr = (unsigned long) ioaddr;
753
754 spin_lock_init(&lp->lock);
755 lp->pci_dev = pdev;
756 lp->boardtype = ent->driver_data;
757
758 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
759 pci_set_drvdata(pdev, dev);
760
761 /* Soft reset the chip. */
762 tc35815_chip_reset(dev);
763
764 /* Retrieve the ethernet address. */
765 if (tc35815_init_dev_addr(dev)) {
766 dev_warn(&pdev->dev, "not valid ether addr\n");
767 random_ether_addr(dev->dev_addr);
768 }
769
770 rc = register_netdev (dev);
771 if (rc)
772 goto err_out_unmap;
773
774 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
775 printk(KERN_INFO "%s: %s at 0x%lx, "
776 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
777 "IRQ %d\n",
778 dev->name,
779 board_info[ent->driver_data].name,
780 dev->base_addr,
781 dev->dev_addr[0], dev->dev_addr[1],
782 dev->dev_addr[2], dev->dev_addr[3],
783 dev->dev_addr[4], dev->dev_addr[5],
784 dev->irq);
785
786 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
787 lp->mii.dev = dev;
788 lp->mii.mdio_read = tc_mdio_read;
789 lp->mii.mdio_write = tc_mdio_write;
790 lp->mii.phy_id_mask = 0x1f;
791 lp->mii.reg_num_mask = 0x1f;
792 tc35815_find_phy(dev);
793 lp->mii.phy_id = lp->phy_addr;
794 lp->mii.full_duplex = 0;
795 lp->mii.force_media = 0;
796
797 return 0;
798
799 err_out_unmap:
800 iounmap(ioaddr);
801 err_out_free_res:
802 pci_release_regions (pdev);
803 err_out:
804 free_netdev (dev);
805 return rc;
806 }
807
808
809 static void __devexit tc35815_remove_one (struct pci_dev *pdev)
810 {
811 struct net_device *dev = pci_get_drvdata (pdev);
812 unsigned long mmio_addr;
813
814 mmio_addr = dev->base_addr;
815
816 unregister_netdev (dev);
817
818 if (mmio_addr) {
819 iounmap ((void __iomem *)mmio_addr);
820 pci_release_regions (pdev);
821 }
822
823 free_netdev (dev);
824
825 pci_set_drvdata (pdev, NULL);
826 }
827
828 static int
829 tc35815_init_queues(struct net_device *dev)
830 {
831 struct tc35815_local *lp = dev->priv;
832 int i;
833 unsigned long fd_addr;
834
835 if (!lp->fd_buf) {
836 BUG_ON(sizeof(struct FDesc) +
837 sizeof(struct BDesc) * RX_BUF_NUM +
838 sizeof(struct FDesc) * RX_FD_NUM +
839 sizeof(struct TxFD) * TX_FD_NUM >
840 PAGE_SIZE * FD_PAGE_NUM);
841
842 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
843 return -ENOMEM;
844 for (i = 0; i < RX_BUF_NUM; i++) {
845 #ifdef TC35815_USE_PACKEDBUFFER
846 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
847 while (--i >= 0) {
848 free_rxbuf_page(lp->pci_dev,
849 lp->data_buf[i],
850 lp->data_buf_dma[i]);
851 lp->data_buf[i] = NULL;
852 }
853 pci_free_consistent(lp->pci_dev,
854 PAGE_SIZE * FD_PAGE_NUM,
855 lp->fd_buf,
856 lp->fd_buf_dma);
857 lp->fd_buf = NULL;
858 return -ENOMEM;
859 }
860 #else
861 lp->rx_skbs[i].skb =
862 alloc_rxbuf_skb(dev, lp->pci_dev,
863 &lp->rx_skbs[i].skb_dma);
864 if (!lp->rx_skbs[i].skb) {
865 while (--i >= 0) {
866 free_rxbuf_skb(lp->pci_dev,
867 lp->rx_skbs[i].skb,
868 lp->rx_skbs[i].skb_dma);
869 lp->rx_skbs[i].skb = NULL;
870 }
871 pci_free_consistent(lp->pci_dev,
872 PAGE_SIZE * FD_PAGE_NUM,
873 lp->fd_buf,
874 lp->fd_buf_dma);
875 lp->fd_buf = NULL;
876 return -ENOMEM;
877 }
878 #endif
879 }
880 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
881 dev->name, lp->fd_buf);
882 #ifdef TC35815_USE_PACKEDBUFFER
883 printk(" DataBuf");
884 for (i = 0; i < RX_BUF_NUM; i++)
885 printk(" %p", lp->data_buf[i]);
886 #endif
887 printk("\n");
888 } else {
889 for (i = 0; i < FD_PAGE_NUM; i++) {
890 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
891 }
892 }
893 fd_addr = (unsigned long)lp->fd_buf;
894
895 /* Free Descriptors (for Receive) */
896 lp->rfd_base = (struct RxFD *)fd_addr;
897 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
898 for (i = 0; i < RX_FD_NUM; i++) {
899 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
900 }
901 lp->rfd_cur = lp->rfd_base;
902 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
903
904 /* Transmit Descriptors */
905 lp->tfd_base = (struct TxFD *)fd_addr;
906 fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
907 for (i = 0; i < TX_FD_NUM; i++) {
908 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
909 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
910 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
911 }
912 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
913 lp->tfd_start = 0;
914 lp->tfd_end = 0;
915
916 /* Buffer List (for Receive) */
917 lp->fbl_ptr = (struct FrFD *)fd_addr;
918 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
919 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
920 #ifndef TC35815_USE_PACKEDBUFFER
921 /*
922 * move all allocated skbs to head of rx_skbs[] array.
923 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
924 * tc35815_rx() had failed.
925 */
926 lp->fbl_count = 0;
927 for (i = 0; i < RX_BUF_NUM; i++) {
928 if (lp->rx_skbs[i].skb) {
929 if (i != lp->fbl_count) {
930 lp->rx_skbs[lp->fbl_count].skb =
931 lp->rx_skbs[i].skb;
932 lp->rx_skbs[lp->fbl_count].skb_dma =
933 lp->rx_skbs[i].skb_dma;
934 }
935 lp->fbl_count++;
936 }
937 }
938 #endif
939 for (i = 0; i < RX_BUF_NUM; i++) {
940 #ifdef TC35815_USE_PACKEDBUFFER
941 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
942 #else
943 if (i >= lp->fbl_count) {
944 lp->fbl_ptr->bd[i].BuffData = 0;
945 lp->fbl_ptr->bd[i].BDCtl = 0;
946 continue;
947 }
948 lp->fbl_ptr->bd[i].BuffData =
949 cpu_to_le32(lp->rx_skbs[i].skb_dma);
950 #endif
951 /* BDID is index of FrFD.bd[] */
952 lp->fbl_ptr->bd[i].BDCtl =
953 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
954 RX_BUF_SIZE);
955 }
956 #ifdef TC35815_USE_PACKEDBUFFER
957 lp->fbl_curid = 0;
958 #endif
959
960 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
961 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
962 return 0;
963 }
964
965 static void
966 tc35815_clear_queues(struct net_device *dev)
967 {
968 struct tc35815_local *lp = dev->priv;
969 int i;
970
971 for (i = 0; i < TX_FD_NUM; i++) {
972 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
973 struct sk_buff *skb =
974 fdsystem != 0xffffffff ?
975 lp->tx_skbs[fdsystem].skb : NULL;
976 #ifdef DEBUG
977 if (lp->tx_skbs[i].skb != skb) {
978 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
979 panic_queues(dev);
980 }
981 #else
982 BUG_ON(lp->tx_skbs[i].skb != skb);
983 #endif
984 if (skb) {
985 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
986 lp->tx_skbs[i].skb = NULL;
987 lp->tx_skbs[i].skb_dma = 0;
988 dev_kfree_skb_any(skb);
989 }
990 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
991 }
992
993 tc35815_init_queues(dev);
994 }
995
996 static void
997 tc35815_free_queues(struct net_device *dev)
998 {
999 struct tc35815_local *lp = dev->priv;
1000 int i;
1001
1002 if (lp->tfd_base) {
1003 for (i = 0; i < TX_FD_NUM; i++) {
1004 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1005 struct sk_buff *skb =
1006 fdsystem != 0xffffffff ?
1007 lp->tx_skbs[fdsystem].skb : NULL;
1008 #ifdef DEBUG
1009 if (lp->tx_skbs[i].skb != skb) {
1010 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1011 panic_queues(dev);
1012 }
1013 #else
1014 BUG_ON(lp->tx_skbs[i].skb != skb);
1015 #endif
1016 if (skb) {
1017 dev_kfree_skb(skb);
1018 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1019 lp->tx_skbs[i].skb = NULL;
1020 lp->tx_skbs[i].skb_dma = 0;
1021 }
1022 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1023 }
1024 }
1025
1026 lp->rfd_base = NULL;
1027 lp->rfd_limit = NULL;
1028 lp->rfd_cur = NULL;
1029 lp->fbl_ptr = NULL;
1030
1031 for (i = 0; i < RX_BUF_NUM; i++) {
1032 #ifdef TC35815_USE_PACKEDBUFFER
1033 if (lp->data_buf[i]) {
1034 free_rxbuf_page(lp->pci_dev,
1035 lp->data_buf[i], lp->data_buf_dma[i]);
1036 lp->data_buf[i] = NULL;
1037 }
1038 #else
1039 if (lp->rx_skbs[i].skb) {
1040 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1041 lp->rx_skbs[i].skb_dma);
1042 lp->rx_skbs[i].skb = NULL;
1043 }
1044 #endif
1045 }
1046 if (lp->fd_buf) {
1047 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1048 lp->fd_buf, lp->fd_buf_dma);
1049 lp->fd_buf = NULL;
1050 }
1051 }
1052
1053 static void
1054 dump_txfd(struct TxFD *fd)
1055 {
1056 printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1057 le32_to_cpu(fd->fd.FDNext),
1058 le32_to_cpu(fd->fd.FDSystem),
1059 le32_to_cpu(fd->fd.FDStat),
1060 le32_to_cpu(fd->fd.FDCtl));
1061 printk("BD: ");
1062 printk(" %08x %08x",
1063 le32_to_cpu(fd->bd.BuffData),
1064 le32_to_cpu(fd->bd.BDCtl));
1065 printk("\n");
1066 }
1067
1068 static int
1069 dump_rxfd(struct RxFD *fd)
1070 {
1071 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1072 if (bd_count > 8)
1073 bd_count = 8;
1074 printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1075 le32_to_cpu(fd->fd.FDNext),
1076 le32_to_cpu(fd->fd.FDSystem),
1077 le32_to_cpu(fd->fd.FDStat),
1078 le32_to_cpu(fd->fd.FDCtl));
1079 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1080 return 0;
1081 printk("BD: ");
1082 for (i = 0; i < bd_count; i++)
1083 printk(" %08x %08x",
1084 le32_to_cpu(fd->bd[i].BuffData),
1085 le32_to_cpu(fd->bd[i].BDCtl));
1086 printk("\n");
1087 return bd_count;
1088 }
1089
1090 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1091 static void
1092 dump_frfd(struct FrFD *fd)
1093 {
1094 int i;
1095 printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1096 le32_to_cpu(fd->fd.FDNext),
1097 le32_to_cpu(fd->fd.FDSystem),
1098 le32_to_cpu(fd->fd.FDStat),
1099 le32_to_cpu(fd->fd.FDCtl));
1100 printk("BD: ");
1101 for (i = 0; i < RX_BUF_NUM; i++)
1102 printk(" %08x %08x",
1103 le32_to_cpu(fd->bd[i].BuffData),
1104 le32_to_cpu(fd->bd[i].BDCtl));
1105 printk("\n");
1106 }
1107 #endif
1108
1109 #ifdef DEBUG
1110 static void
1111 panic_queues(struct net_device *dev)
1112 {
1113 struct tc35815_local *lp = dev->priv;
1114 int i;
1115
1116 printk("TxFD base %p, start %u, end %u\n",
1117 lp->tfd_base, lp->tfd_start, lp->tfd_end);
1118 printk("RxFD base %p limit %p cur %p\n",
1119 lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1120 printk("FrFD %p\n", lp->fbl_ptr);
1121 for (i = 0; i < TX_FD_NUM; i++)
1122 dump_txfd(&lp->tfd_base[i]);
1123 for (i = 0; i < RX_FD_NUM; i++) {
1124 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1125 i += (bd_count + 1) / 2; /* skip BDs */
1126 }
1127 dump_frfd(lp->fbl_ptr);
1128 panic("%s: Illegal queue state.", dev->name);
1129 }
1130 #endif
1131
1132 static void print_eth(char *add)
1133 {
1134 int i;
1135
1136 printk("print_eth(%p)\n", add);
1137 for (i = 0; i < 6; i++)
1138 printk(" %2.2X", (unsigned char) add[i + 6]);
1139 printk(" =>");
1140 for (i = 0; i < 6; i++)
1141 printk(" %2.2X", (unsigned char) add[i]);
1142 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
1143 }
1144
1145 static int tc35815_tx_full(struct net_device *dev)
1146 {
1147 struct tc35815_local *lp = dev->priv;
1148 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1149 }
1150
1151 static void tc35815_restart(struct net_device *dev)
1152 {
1153 struct tc35815_local *lp = dev->priv;
1154 int pid = lp->phy_addr;
1155 int do_phy_reset = 1;
1156 del_timer(&lp->timer); /* Kill if running */
1157
1158 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1159 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1160 do_phy_reset = 0;
1161 }
1162 if (do_phy_reset) {
1163 int timeout;
1164 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
1165 timeout = 100;
1166 while (--timeout) {
1167 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
1168 break;
1169 udelay(1);
1170 }
1171 if (!timeout)
1172 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1173 }
1174
1175 tc35815_chip_reset(dev);
1176 tc35815_clear_queues(dev);
1177 tc35815_chip_init(dev);
1178 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1179 tc35815_set_multicast_list(dev);
1180 }
1181
1182 static void tc35815_tx_timeout(struct net_device *dev)
1183 {
1184 struct tc35815_local *lp = dev->priv;
1185 struct tc35815_regs __iomem *tr =
1186 (struct tc35815_regs __iomem *)dev->base_addr;
1187
1188 printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1189 dev->name, tc_readl(&tr->Tx_Stat));
1190
1191 /* Try to restart the adaptor. */
1192 spin_lock_irq(&lp->lock);
1193 tc35815_restart(dev);
1194 spin_unlock_irq(&lp->lock);
1195
1196 lp->stats.tx_errors++;
1197
1198 /* If we have space available to accept new transmit
1199 * requests, wake up the queueing layer. This would
1200 * be the case if the chipset_init() call above just
1201 * flushes out the tx queue and empties it.
1202 *
1203 * If instead, the tx queue is retained then the
1204 * netif_wake_queue() call should be placed in the
1205 * TX completion interrupt handler of the driver instead
1206 * of here.
1207 */
1208 if (!tc35815_tx_full(dev))
1209 netif_wake_queue(dev);
1210 }
1211
1212 /*
1213 * Open/initialize the board. This is called (in the current kernel)
1214 * sometime after booting when the 'ifconfig' program is run.
1215 *
1216 * This routine should set everything up anew at each open, even
1217 * registers that "should" only need to be set once at boot, so that
1218 * there is non-reboot way to recover if something goes wrong.
1219 */
1220 static int
1221 tc35815_open(struct net_device *dev)
1222 {
1223 struct tc35815_local *lp = dev->priv;
1224
1225 /*
1226 * This is used if the interrupt line can turned off (shared).
1227 * See 3c503.c for an example of selecting the IRQ at config-time.
1228 */
1229 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1230 return -EAGAIN;
1231 }
1232
1233 del_timer(&lp->timer); /* Kill if running */
1234 tc35815_chip_reset(dev);
1235
1236 if (tc35815_init_queues(dev) != 0) {
1237 free_irq(dev->irq, dev);
1238 return -EAGAIN;
1239 }
1240
1241 #ifdef TC35815_NAPI
1242 napi_enable(&lp->napi);
1243 #endif
1244
1245 /* Reset the hardware here. Don't forget to set the station address. */
1246 spin_lock_irq(&lp->lock);
1247 tc35815_chip_init(dev);
1248 spin_unlock_irq(&lp->lock);
1249
1250 /* We are now ready to accept transmit requeusts from
1251 * the queueing layer of the networking.
1252 */
1253 netif_start_queue(dev);
1254
1255 return 0;
1256 }
1257
1258 /* This will only be invoked if your driver is _not_ in XOFF state.
1259 * What this means is that you need not check it, and that this
1260 * invariant will hold if you make sure that the netif_*_queue()
1261 * calls are done at the proper times.
1262 */
1263 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1264 {
1265 struct tc35815_local *lp = dev->priv;
1266 struct TxFD *txfd;
1267 unsigned long flags;
1268
1269 /* If some error occurs while trying to transmit this
1270 * packet, you should return '1' from this function.
1271 * In such a case you _may not_ do anything to the
1272 * SKB, it is still owned by the network queueing
1273 * layer when an error is returned. This means you
1274 * may not modify any SKB fields, you may not free
1275 * the SKB, etc.
1276 */
1277
1278 /* This is the most common case for modern hardware.
1279 * The spinlock protects this code from the TX complete
1280 * hardware interrupt handler. Queue flow control is
1281 * thus managed under this lock as well.
1282 */
1283 spin_lock_irqsave(&lp->lock, flags);
1284
1285 /* failsafe... (handle txdone now if half of FDs are used) */
1286 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1287 TX_FD_NUM / 2)
1288 tc35815_txdone(dev);
1289
1290 if (netif_msg_pktdata(lp))
1291 print_eth(skb->data);
1292 #ifdef DEBUG
1293 if (lp->tx_skbs[lp->tfd_start].skb) {
1294 printk("%s: tx_skbs conflict.\n", dev->name);
1295 panic_queues(dev);
1296 }
1297 #else
1298 BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1299 #endif
1300 lp->tx_skbs[lp->tfd_start].skb = skb;
1301 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1302
1303 /*add to ring */
1304 txfd = &lp->tfd_base[lp->tfd_start];
1305 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1306 txfd->bd.BDCtl = cpu_to_le32(skb->len);
1307 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1308 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1309
1310 if (lp->tfd_start == lp->tfd_end) {
1311 struct tc35815_regs __iomem *tr =
1312 (struct tc35815_regs __iomem *)dev->base_addr;
1313 /* Start DMA Transmitter. */
1314 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1315 #ifdef GATHER_TXINT
1316 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1317 #endif
1318 if (netif_msg_tx_queued(lp)) {
1319 printk("%s: starting TxFD.\n", dev->name);
1320 dump_txfd(txfd);
1321 }
1322 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1323 } else {
1324 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1325 if (netif_msg_tx_queued(lp)) {
1326 printk("%s: queueing TxFD.\n", dev->name);
1327 dump_txfd(txfd);
1328 }
1329 }
1330 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1331
1332 dev->trans_start = jiffies;
1333
1334 /* If we just used up the very last entry in the
1335 * TX ring on this device, tell the queueing
1336 * layer to send no more.
1337 */
1338 if (tc35815_tx_full(dev)) {
1339 if (netif_msg_tx_queued(lp))
1340 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1341 netif_stop_queue(dev);
1342 }
1343
1344 /* When the TX completion hw interrupt arrives, this
1345 * is when the transmit statistics are updated.
1346 */
1347
1348 spin_unlock_irqrestore(&lp->lock, flags);
1349 return 0;
1350 }
1351
1352 #define FATAL_ERROR_INT \
1353 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1354 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1355 {
1356 static int count;
1357 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1358 dev->name, status);
1359 if (status & Int_IntPCI)
1360 printk(" IntPCI");
1361 if (status & Int_DmParErr)
1362 printk(" DmParErr");
1363 if (status & Int_IntNRAbt)
1364 printk(" IntNRAbt");
1365 printk("\n");
1366 if (count++ > 100)
1367 panic("%s: Too many fatal errors.", dev->name);
1368 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1369 /* Try to restart the adaptor. */
1370 tc35815_restart(dev);
1371 }
1372
1373 #ifdef TC35815_NAPI
1374 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1375 #else
1376 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1377 #endif
1378 {
1379 struct tc35815_local *lp = dev->priv;
1380 struct tc35815_regs __iomem *tr =
1381 (struct tc35815_regs __iomem *)dev->base_addr;
1382 int ret = -1;
1383
1384 /* Fatal errors... */
1385 if (status & FATAL_ERROR_INT) {
1386 tc35815_fatal_error_interrupt(dev, status);
1387 return 0;
1388 }
1389 /* recoverable errors */
1390 if (status & Int_IntFDAEx) {
1391 /* disable FDAEx int. (until we make rooms...) */
1392 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1393 printk(KERN_WARNING
1394 "%s: Free Descriptor Area Exhausted (%#x).\n",
1395 dev->name, status);
1396 lp->stats.rx_dropped++;
1397 ret = 0;
1398 }
1399 if (status & Int_IntBLEx) {
1400 /* disable BLEx int. (until we make rooms...) */
1401 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1402 printk(KERN_WARNING
1403 "%s: Buffer List Exhausted (%#x).\n",
1404 dev->name, status);
1405 lp->stats.rx_dropped++;
1406 ret = 0;
1407 }
1408 if (status & Int_IntExBD) {
1409 printk(KERN_WARNING
1410 "%s: Excessive Buffer Descriptiors (%#x).\n",
1411 dev->name, status);
1412 lp->stats.rx_length_errors++;
1413 ret = 0;
1414 }
1415
1416 /* normal notification */
1417 if (status & Int_IntMacRx) {
1418 /* Got a packet(s). */
1419 #ifdef TC35815_NAPI
1420 ret = tc35815_rx(dev, limit);
1421 #else
1422 tc35815_rx(dev);
1423 ret = 0;
1424 #endif
1425 lp->lstats.rx_ints++;
1426 }
1427 if (status & Int_IntMacTx) {
1428 /* Transmit complete. */
1429 lp->lstats.tx_ints++;
1430 tc35815_txdone(dev);
1431 netif_wake_queue(dev);
1432 ret = 0;
1433 }
1434 return ret;
1435 }
1436
1437 /*
1438 * The typical workload of the driver:
1439 * Handle the network interface interrupts.
1440 */
1441 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1442 {
1443 struct net_device *dev = dev_id;
1444 struct tc35815_local *lp = netdev_priv(dev);
1445 struct tc35815_regs __iomem *tr =
1446 (struct tc35815_regs __iomem *)dev->base_addr;
1447 #ifdef TC35815_NAPI
1448 u32 dmactl = tc_readl(&tr->DMA_Ctl);
1449
1450 if (!(dmactl & DMA_IntMask)) {
1451 /* disable interrupts */
1452 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1453 if (netif_rx_schedule_prep(dev, &lp->napi))
1454 __netif_rx_schedule(dev, &lp->napi);
1455 else {
1456 printk(KERN_ERR "%s: interrupt taken in poll\n",
1457 dev->name);
1458 BUG();
1459 }
1460 (void)tc_readl(&tr->Int_Src); /* flush */
1461 return IRQ_HANDLED;
1462 }
1463 return IRQ_NONE;
1464 #else
1465 struct tc35815_local *lp = dev->priv;
1466 int handled;
1467 u32 status;
1468
1469 spin_lock(&lp->lock);
1470 status = tc_readl(&tr->Int_Src);
1471 tc_writel(status, &tr->Int_Src); /* write to clear */
1472 handled = tc35815_do_interrupt(dev, status);
1473 (void)tc_readl(&tr->Int_Src); /* flush */
1474 spin_unlock(&lp->lock);
1475 return IRQ_RETVAL(handled >= 0);
1476 #endif /* TC35815_NAPI */
1477 }
1478
1479 #ifdef CONFIG_NET_POLL_CONTROLLER
1480 static void tc35815_poll_controller(struct net_device *dev)
1481 {
1482 disable_irq(dev->irq);
1483 tc35815_interrupt(dev->irq, dev);
1484 enable_irq(dev->irq);
1485 }
1486 #endif
1487
1488 /* We have a good packet(s), get it/them out of the buffers. */
1489 #ifdef TC35815_NAPI
1490 static int
1491 tc35815_rx(struct net_device *dev, int limit)
1492 #else
1493 static void
1494 tc35815_rx(struct net_device *dev)
1495 #endif
1496 {
1497 struct tc35815_local *lp = dev->priv;
1498 unsigned int fdctl;
1499 int i;
1500 int buf_free_count = 0;
1501 int fd_free_count = 0;
1502 #ifdef TC35815_NAPI
1503 int received = 0;
1504 #endif
1505
1506 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1507 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1508 int pkt_len = fdctl & FD_FDLength_MASK;
1509 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1510 #ifdef DEBUG
1511 struct RxFD *next_rfd;
1512 #endif
1513 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1514 pkt_len -= 4;
1515 #endif
1516
1517 if (netif_msg_rx_status(lp))
1518 dump_rxfd(lp->rfd_cur);
1519 if (status & Rx_Good) {
1520 struct sk_buff *skb;
1521 unsigned char *data;
1522 int cur_bd;
1523 #ifdef TC35815_USE_PACKEDBUFFER
1524 int offset;
1525 #endif
1526
1527 #ifdef TC35815_NAPI
1528 if (--limit < 0)
1529 break;
1530 #endif
1531 #ifdef TC35815_USE_PACKEDBUFFER
1532 BUG_ON(bd_count > 2);
1533 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1534 if (skb == NULL) {
1535 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1536 dev->name);
1537 lp->stats.rx_dropped++;
1538 break;
1539 }
1540 skb_reserve(skb, 2); /* 16 bit alignment */
1541
1542 data = skb_put(skb, pkt_len);
1543
1544 /* copy from receive buffer */
1545 cur_bd = 0;
1546 offset = 0;
1547 while (offset < pkt_len && cur_bd < bd_count) {
1548 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1549 BD_BuffLength_MASK;
1550 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1551 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1552 if (offset + len > pkt_len)
1553 len = pkt_len - offset;
1554 #ifdef TC35815_DMA_SYNC_ONDEMAND
1555 pci_dma_sync_single_for_cpu(lp->pci_dev,
1556 dma, len,
1557 PCI_DMA_FROMDEVICE);
1558 #endif
1559 memcpy(data + offset, rxbuf, len);
1560 #ifdef TC35815_DMA_SYNC_ONDEMAND
1561 pci_dma_sync_single_for_device(lp->pci_dev,
1562 dma, len,
1563 PCI_DMA_FROMDEVICE);
1564 #endif
1565 offset += len;
1566 cur_bd++;
1567 }
1568 #else /* TC35815_USE_PACKEDBUFFER */
1569 BUG_ON(bd_count > 1);
1570 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1571 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1572 #ifdef DEBUG
1573 if (cur_bd >= RX_BUF_NUM) {
1574 printk("%s: invalid BDID.\n", dev->name);
1575 panic_queues(dev);
1576 }
1577 BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1578 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1579 if (!lp->rx_skbs[cur_bd].skb) {
1580 printk("%s: NULL skb.\n", dev->name);
1581 panic_queues(dev);
1582 }
1583 #else
1584 BUG_ON(cur_bd >= RX_BUF_NUM);
1585 #endif
1586 skb = lp->rx_skbs[cur_bd].skb;
1587 prefetch(skb->data);
1588 lp->rx_skbs[cur_bd].skb = NULL;
1589 lp->fbl_count--;
1590 pci_unmap_single(lp->pci_dev,
1591 lp->rx_skbs[cur_bd].skb_dma,
1592 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1593 if (!HAVE_DMA_RXALIGN(lp))
1594 memmove(skb->data, skb->data - 2, pkt_len);
1595 data = skb_put(skb, pkt_len);
1596 #endif /* TC35815_USE_PACKEDBUFFER */
1597 if (netif_msg_pktdata(lp))
1598 print_eth(data);
1599 skb->protocol = eth_type_trans(skb, dev);
1600 #ifdef TC35815_NAPI
1601 netif_receive_skb(skb);
1602 received++;
1603 #else
1604 netif_rx(skb);
1605 #endif
1606 dev->last_rx = jiffies;
1607 lp->stats.rx_packets++;
1608 lp->stats.rx_bytes += pkt_len;
1609 } else {
1610 lp->stats.rx_errors++;
1611 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1612 dev->name, status & Rx_Stat_Mask);
1613 /* WORKAROUND: LongErr and CRCErr means Overflow. */
1614 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1615 status &= ~(Rx_LongErr|Rx_CRCErr);
1616 status |= Rx_Over;
1617 }
1618 if (status & Rx_LongErr) lp->stats.rx_length_errors++;
1619 if (status & Rx_Over) lp->stats.rx_fifo_errors++;
1620 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
1621 if (status & Rx_Align) lp->stats.rx_frame_errors++;
1622 }
1623
1624 if (bd_count > 0) {
1625 /* put Free Buffer back to controller */
1626 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1627 unsigned char id =
1628 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1629 #ifdef DEBUG
1630 if (id >= RX_BUF_NUM) {
1631 printk("%s: invalid BDID.\n", dev->name);
1632 panic_queues(dev);
1633 }
1634 #else
1635 BUG_ON(id >= RX_BUF_NUM);
1636 #endif
1637 /* free old buffers */
1638 #ifdef TC35815_USE_PACKEDBUFFER
1639 while (lp->fbl_curid != id)
1640 #else
1641 while (lp->fbl_count < RX_BUF_NUM)
1642 #endif
1643 {
1644 #ifdef TC35815_USE_PACKEDBUFFER
1645 unsigned char curid = lp->fbl_curid;
1646 #else
1647 unsigned char curid =
1648 (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1649 #endif
1650 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1651 #ifdef DEBUG
1652 bdctl = le32_to_cpu(bd->BDCtl);
1653 if (bdctl & BD_CownsBD) {
1654 printk("%s: Freeing invalid BD.\n",
1655 dev->name);
1656 panic_queues(dev);
1657 }
1658 #endif
1659 /* pass BD to controler */
1660 #ifndef TC35815_USE_PACKEDBUFFER
1661 if (!lp->rx_skbs[curid].skb) {
1662 lp->rx_skbs[curid].skb =
1663 alloc_rxbuf_skb(dev,
1664 lp->pci_dev,
1665 &lp->rx_skbs[curid].skb_dma);
1666 if (!lp->rx_skbs[curid].skb)
1667 break; /* try on next reception */
1668 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1669 }
1670 #endif /* TC35815_USE_PACKEDBUFFER */
1671 /* Note: BDLength was modified by chip. */
1672 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1673 (curid << BD_RxBDID_SHIFT) |
1674 RX_BUF_SIZE);
1675 #ifdef TC35815_USE_PACKEDBUFFER
1676 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1677 if (netif_msg_rx_status(lp)) {
1678 printk("%s: Entering new FBD %d\n",
1679 dev->name, lp->fbl_curid);
1680 dump_frfd(lp->fbl_ptr);
1681 }
1682 #else
1683 lp->fbl_count++;
1684 #endif
1685 buf_free_count++;
1686 }
1687 }
1688
1689 /* put RxFD back to controller */
1690 #ifdef DEBUG
1691 next_rfd = fd_bus_to_virt(lp,
1692 le32_to_cpu(lp->rfd_cur->fd.FDNext));
1693 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1694 printk("%s: RxFD FDNext invalid.\n", dev->name);
1695 panic_queues(dev);
1696 }
1697 #endif
1698 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1699 /* pass FD to controler */
1700 #ifdef DEBUG
1701 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1702 #else
1703 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1704 #endif
1705 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1706 lp->rfd_cur++;
1707 fd_free_count++;
1708 }
1709 if (lp->rfd_cur > lp->rfd_limit)
1710 lp->rfd_cur = lp->rfd_base;
1711 #ifdef DEBUG
1712 if (lp->rfd_cur != next_rfd)
1713 printk("rfd_cur = %p, next_rfd %p\n",
1714 lp->rfd_cur, next_rfd);
1715 #endif
1716 }
1717
1718 /* re-enable BL/FDA Exhaust interrupts. */
1719 if (fd_free_count) {
1720 struct tc35815_regs __iomem *tr =
1721 (struct tc35815_regs __iomem *)dev->base_addr;
1722 u32 en, en_old = tc_readl(&tr->Int_En);
1723 en = en_old | Int_FDAExEn;
1724 if (buf_free_count)
1725 en |= Int_BLExEn;
1726 if (en != en_old)
1727 tc_writel(en, &tr->Int_En);
1728 }
1729 #ifdef TC35815_NAPI
1730 return received;
1731 #endif
1732 }
1733
1734 #ifdef TC35815_NAPI
1735 static int tc35815_poll(struct napi_struct *napi, int budget)
1736 {
1737 struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1738 struct net_device *dev = lp->dev;
1739 struct tc35815_regs __iomem *tr =
1740 (struct tc35815_regs __iomem *)dev->base_addr;
1741 int received = 0, handled;
1742 u32 status;
1743
1744 spin_lock(&lp->lock);
1745 status = tc_readl(&tr->Int_Src);
1746 do {
1747 tc_writel(status, &tr->Int_Src); /* write to clear */
1748
1749 handled = tc35815_do_interrupt(dev, status, limit);
1750 if (handled >= 0) {
1751 received += handled;
1752 if (received >= budget)
1753 break;
1754 }
1755 status = tc_readl(&tr->Int_Src);
1756 } while (status);
1757 spin_unlock(&lp->lock);
1758
1759 if (received < budget) {
1760 netif_rx_complete(dev, napi);
1761 /* enable interrupts */
1762 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1763 }
1764 return received;
1765 }
1766 #endif
1767
1768 #ifdef NO_CHECK_CARRIER
1769 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1770 #else
1771 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1772 #endif
1773
1774 static void
1775 tc35815_check_tx_stat(struct net_device *dev, int status)
1776 {
1777 struct tc35815_local *lp = dev->priv;
1778 const char *msg = NULL;
1779
1780 /* count collisions */
1781 if (status & Tx_ExColl)
1782 lp->stats.collisions += 16;
1783 if (status & Tx_TxColl_MASK)
1784 lp->stats.collisions += status & Tx_TxColl_MASK;
1785
1786 #ifndef NO_CHECK_CARRIER
1787 /* TX4939 does not have NCarr */
1788 if (lp->boardtype == TC35815_TX4939)
1789 status &= ~Tx_NCarr;
1790 #ifdef WORKAROUND_LOSTCAR
1791 /* WORKAROUND: ignore LostCrS in full duplex operation */
1792 if ((lp->timer_state != asleep && lp->timer_state != lcheck)
1793 || lp->fullduplex)
1794 status &= ~Tx_NCarr;
1795 #endif
1796 #endif
1797
1798 if (!(status & TX_STA_ERR)) {
1799 /* no error. */
1800 lp->stats.tx_packets++;
1801 return;
1802 }
1803
1804 lp->stats.tx_errors++;
1805 if (status & Tx_ExColl) {
1806 lp->stats.tx_aborted_errors++;
1807 msg = "Excessive Collision.";
1808 }
1809 if (status & Tx_Under) {
1810 lp->stats.tx_fifo_errors++;
1811 msg = "Tx FIFO Underrun.";
1812 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1813 lp->lstats.tx_underrun++;
1814 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1815 struct tc35815_regs __iomem *tr =
1816 (struct tc35815_regs __iomem *)dev->base_addr;
1817 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1818 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1819 }
1820 }
1821 }
1822 if (status & Tx_Defer) {
1823 lp->stats.tx_fifo_errors++;
1824 msg = "Excessive Deferral.";
1825 }
1826 #ifndef NO_CHECK_CARRIER
1827 if (status & Tx_NCarr) {
1828 lp->stats.tx_carrier_errors++;
1829 msg = "Lost Carrier Sense.";
1830 }
1831 #endif
1832 if (status & Tx_LateColl) {
1833 lp->stats.tx_aborted_errors++;
1834 msg = "Late Collision.";
1835 }
1836 if (status & Tx_TxPar) {
1837 lp->stats.tx_fifo_errors++;
1838 msg = "Transmit Parity Error.";
1839 }
1840 if (status & Tx_SQErr) {
1841 lp->stats.tx_heartbeat_errors++;
1842 msg = "Signal Quality Error.";
1843 }
1844 if (msg && netif_msg_tx_err(lp))
1845 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1846 }
1847
1848 /* This handles TX complete events posted by the device
1849 * via interrupts.
1850 */
1851 static void
1852 tc35815_txdone(struct net_device *dev)
1853 {
1854 struct tc35815_local *lp = dev->priv;
1855 struct TxFD *txfd;
1856 unsigned int fdctl;
1857
1858 txfd = &lp->tfd_base[lp->tfd_end];
1859 while (lp->tfd_start != lp->tfd_end &&
1860 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1861 int status = le32_to_cpu(txfd->fd.FDStat);
1862 struct sk_buff *skb;
1863 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
1864 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
1865
1866 if (netif_msg_tx_done(lp)) {
1867 printk("%s: complete TxFD.\n", dev->name);
1868 dump_txfd(txfd);
1869 }
1870 tc35815_check_tx_stat(dev, status);
1871
1872 skb = fdsystem != 0xffffffff ?
1873 lp->tx_skbs[fdsystem].skb : NULL;
1874 #ifdef DEBUG
1875 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
1876 printk("%s: tx_skbs mismatch.\n", dev->name);
1877 panic_queues(dev);
1878 }
1879 #else
1880 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1881 #endif
1882 if (skb) {
1883 lp->stats.tx_bytes += skb->len;
1884 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1885 lp->tx_skbs[lp->tfd_end].skb = NULL;
1886 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
1887 #ifdef TC35815_NAPI
1888 dev_kfree_skb_any(skb);
1889 #else
1890 dev_kfree_skb_irq(skb);
1891 #endif
1892 }
1893 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
1894
1895 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1896 txfd = &lp->tfd_base[lp->tfd_end];
1897 #ifdef DEBUG
1898 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
1899 printk("%s: TxFD FDNext invalid.\n", dev->name);
1900 panic_queues(dev);
1901 }
1902 #endif
1903 if (fdnext & FD_Next_EOL) {
1904 /* DMA Transmitter has been stopping... */
1905 if (lp->tfd_end != lp->tfd_start) {
1906 struct tc35815_regs __iomem *tr =
1907 (struct tc35815_regs __iomem *)dev->base_addr;
1908 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1909 struct TxFD* txhead = &lp->tfd_base[head];
1910 int qlen = (lp->tfd_start + TX_FD_NUM
1911 - lp->tfd_end) % TX_FD_NUM;
1912
1913 #ifdef DEBUG
1914 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1915 printk("%s: TxFD FDCtl invalid.\n", dev->name);
1916 panic_queues(dev);
1917 }
1918 #endif
1919 /* log max queue length */
1920 if (lp->lstats.max_tx_qlen < qlen)
1921 lp->lstats.max_tx_qlen = qlen;
1922
1923
1924 /* start DMA Transmitter again */
1925 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1926 #ifdef GATHER_TXINT
1927 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1928 #endif
1929 if (netif_msg_tx_queued(lp)) {
1930 printk("%s: start TxFD on queue.\n",
1931 dev->name);
1932 dump_txfd(txfd);
1933 }
1934 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1935 }
1936 break;
1937 }
1938 }
1939
1940 /* If we had stopped the queue due to a "tx full"
1941 * condition, and space has now been made available,
1942 * wake up the queue.
1943 */
1944 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
1945 netif_wake_queue(dev);
1946 }
1947
1948 /* The inverse routine to tc35815_open(). */
1949 static int
1950 tc35815_close(struct net_device *dev)
1951 {
1952 struct tc35815_local *lp = dev->priv;
1953
1954 netif_stop_queue(dev);
1955 #ifdef TC35815_NAPI
1956 napi_disable(&lp->napi);
1957 #endif
1958
1959 /* Flush the Tx and disable Rx here. */
1960
1961 del_timer(&lp->timer); /* Kill if running */
1962 tc35815_chip_reset(dev);
1963 free_irq(dev->irq, dev);
1964
1965 tc35815_free_queues(dev);
1966
1967 return 0;
1968
1969 }
1970
1971 /*
1972 * Get the current statistics.
1973 * This may be called with the card open or closed.
1974 */
1975 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1976 {
1977 struct tc35815_local *lp = dev->priv;
1978 struct tc35815_regs __iomem *tr =
1979 (struct tc35815_regs __iomem *)dev->base_addr;
1980 if (netif_running(dev)) {
1981 /* Update the statistics from the device registers. */
1982 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1983 }
1984
1985 return &lp->stats;
1986 }
1987
1988 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1989 {
1990 struct tc35815_local *lp = dev->priv;
1991 struct tc35815_regs __iomem *tr =
1992 (struct tc35815_regs __iomem *)dev->base_addr;
1993 int cam_index = index * 6;
1994 u32 cam_data;
1995 u32 saved_addr;
1996 saved_addr = tc_readl(&tr->CAM_Adr);
1997
1998 if (netif_msg_hw(lp)) {
1999 int i;
2000 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
2001 for (i = 0; i < 6; i++)
2002 printk(" %02x", addr[i]);
2003 printk("\n");
2004 }
2005 if (index & 1) {
2006 /* read modify write */
2007 tc_writel(cam_index - 2, &tr->CAM_Adr);
2008 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2009 cam_data |= addr[0] << 8 | addr[1];
2010 tc_writel(cam_data, &tr->CAM_Data);
2011 /* write whole word */
2012 tc_writel(cam_index + 2, &tr->CAM_Adr);
2013 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2014 tc_writel(cam_data, &tr->CAM_Data);
2015 } else {
2016 /* write whole word */
2017 tc_writel(cam_index, &tr->CAM_Adr);
2018 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2019 tc_writel(cam_data, &tr->CAM_Data);
2020 /* read modify write */
2021 tc_writel(cam_index + 4, &tr->CAM_Adr);
2022 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2023 cam_data |= addr[4] << 24 | (addr[5] << 16);
2024 tc_writel(cam_data, &tr->CAM_Data);
2025 }
2026
2027 tc_writel(saved_addr, &tr->CAM_Adr);
2028 }
2029
2030
2031 /*
2032 * Set or clear the multicast filter for this adaptor.
2033 * num_addrs == -1 Promiscuous mode, receive all packets
2034 * num_addrs == 0 Normal mode, clear multicast list
2035 * num_addrs > 0 Multicast mode, receive normal and MC packets,
2036 * and do best-effort filtering.
2037 */
2038 static void
2039 tc35815_set_multicast_list(struct net_device *dev)
2040 {
2041 struct tc35815_regs __iomem *tr =
2042 (struct tc35815_regs __iomem *)dev->base_addr;
2043
2044 if (dev->flags&IFF_PROMISC)
2045 {
2046 #ifdef WORKAROUND_100HALF_PROMISC
2047 /* With some (all?) 100MHalf HUB, controller will hang
2048 * if we enabled promiscuous mode before linkup... */
2049 struct tc35815_local *lp = dev->priv;
2050 int pid = lp->phy_addr;
2051 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
2052 return;
2053 #endif
2054 /* Enable promiscuous mode */
2055 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2056 }
2057 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2058 {
2059 /* CAM 0, 1, 20 are reserved. */
2060 /* Disable promiscuous mode, use normal mode. */
2061 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2062 }
2063 else if(dev->mc_count)
2064 {
2065 struct dev_mc_list* cur_addr = dev->mc_list;
2066 int i;
2067 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2068
2069 tc_writel(0, &tr->CAM_Ctl);
2070 /* Walk the address list, and load the filter */
2071 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2072 if (!cur_addr)
2073 break;
2074 /* entry 0,1 is reserved. */
2075 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2076 ena_bits |= CAM_Ena_Bit(i + 2);
2077 }
2078 tc_writel(ena_bits, &tr->CAM_Ena);
2079 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2080 }
2081 else {
2082 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2083 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2084 }
2085 }
2086
2087 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2088 {
2089 struct tc35815_local *lp = dev->priv;
2090 strcpy(info->driver, MODNAME);
2091 strcpy(info->version, DRV_VERSION);
2092 strcpy(info->bus_info, pci_name(lp->pci_dev));
2093 }
2094
2095 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2096 {
2097 struct tc35815_local *lp = dev->priv;
2098 spin_lock_irq(&lp->lock);
2099 mii_ethtool_gset(&lp->mii, cmd);
2100 spin_unlock_irq(&lp->lock);
2101 return 0;
2102 }
2103
2104 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2105 {
2106 struct tc35815_local *lp = dev->priv;
2107 int rc;
2108 #if 1 /* use our negotiation method... */
2109 /* Verify the settings we care about. */
2110 if (cmd->autoneg != AUTONEG_ENABLE &&
2111 cmd->autoneg != AUTONEG_DISABLE)
2112 return -EINVAL;
2113 if (cmd->autoneg == AUTONEG_DISABLE &&
2114 ((cmd->speed != SPEED_100 &&
2115 cmd->speed != SPEED_10) ||
2116 (cmd->duplex != DUPLEX_HALF &&
2117 cmd->duplex != DUPLEX_FULL)))
2118 return -EINVAL;
2119
2120 /* Ok, do it to it. */
2121 spin_lock_irq(&lp->lock);
2122 del_timer(&lp->timer);
2123 tc35815_start_auto_negotiation(dev, cmd);
2124 spin_unlock_irq(&lp->lock);
2125 rc = 0;
2126 #else
2127 spin_lock_irq(&lp->lock);
2128 rc = mii_ethtool_sset(&lp->mii, cmd);
2129 spin_unlock_irq(&lp->lock);
2130 #endif
2131 return rc;
2132 }
2133
2134 static int tc35815_nway_reset(struct net_device *dev)
2135 {
2136 struct tc35815_local *lp = dev->priv;
2137 int rc;
2138 spin_lock_irq(&lp->lock);
2139 rc = mii_nway_restart(&lp->mii);
2140 spin_unlock_irq(&lp->lock);
2141 return rc;
2142 }
2143
2144 static u32 tc35815_get_link(struct net_device *dev)
2145 {
2146 struct tc35815_local *lp = dev->priv;
2147 int rc;
2148 spin_lock_irq(&lp->lock);
2149 rc = mii_link_ok(&lp->mii);
2150 spin_unlock_irq(&lp->lock);
2151 return rc;
2152 }
2153
2154 static u32 tc35815_get_msglevel(struct net_device *dev)
2155 {
2156 struct tc35815_local *lp = dev->priv;
2157 return lp->msg_enable;
2158 }
2159
2160 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2161 {
2162 struct tc35815_local *lp = dev->priv;
2163 lp->msg_enable = datum;
2164 }
2165
2166 static int tc35815_get_stats_count(struct net_device *dev)
2167 {
2168 struct tc35815_local *lp = dev->priv;
2169 return sizeof(lp->lstats) / sizeof(int);
2170 }
2171
2172 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2173 {
2174 struct tc35815_local *lp = dev->priv;
2175 data[0] = lp->lstats.max_tx_qlen;
2176 data[1] = lp->lstats.tx_ints;
2177 data[2] = lp->lstats.rx_ints;
2178 data[3] = lp->lstats.tx_underrun;
2179 }
2180
2181 static struct {
2182 const char str[ETH_GSTRING_LEN];
2183 } ethtool_stats_keys[] = {
2184 { "max_tx_qlen" },
2185 { "tx_ints" },
2186 { "rx_ints" },
2187 { "tx_underrun" },
2188 };
2189
2190 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2191 {
2192 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2193 }
2194
2195 static const struct ethtool_ops tc35815_ethtool_ops = {
2196 .get_drvinfo = tc35815_get_drvinfo,
2197 .get_settings = tc35815_get_settings,
2198 .set_settings = tc35815_set_settings,
2199 .nway_reset = tc35815_nway_reset,
2200 .get_link = tc35815_get_link,
2201 .get_msglevel = tc35815_get_msglevel,
2202 .set_msglevel = tc35815_set_msglevel,
2203 .get_strings = tc35815_get_strings,
2204 .get_stats_count = tc35815_get_stats_count,
2205 .get_ethtool_stats = tc35815_get_ethtool_stats,
2206 };
2207
2208 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2209 {
2210 struct tc35815_local *lp = dev->priv;
2211 int rc;
2212
2213 if (!netif_running(dev))
2214 return -EINVAL;
2215
2216 spin_lock_irq(&lp->lock);
2217 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
2218 spin_unlock_irq(&lp->lock);
2219
2220 return rc;
2221 }
2222
2223 static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2224 {
2225 struct tc35815_regs __iomem *tr =
2226 (struct tc35815_regs __iomem *)dev->base_addr;
2227 u32 data;
2228 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
2229 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2230 ;
2231 data = tc_readl(&tr->MD_Data);
2232 return data & 0xffff;
2233 }
2234
2235 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2236 int val)
2237 {
2238 struct tc35815_regs __iomem *tr =
2239 (struct tc35815_regs __iomem *)dev->base_addr;
2240 tc_writel(val, &tr->MD_Data);
2241 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2242 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2243 ;
2244 }
2245
2246 /* Auto negotiation. The scheme is very simple. We have a timer routine
2247 * that keeps watching the auto negotiation process as it progresses.
2248 * The DP83840 is first told to start doing it's thing, we set up the time
2249 * and place the timer state machine in it's initial state.
2250 *
2251 * Here the timer peeks at the DP83840 status registers at each click to see
2252 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2253 * will time out at some point and just tell us what (didn't) happen. For
2254 * complete coverage we only allow so many of the ticks at this level to run,
2255 * when this has expired we print a warning message and try another strategy.
2256 * This "other" strategy is to force the interface into various speed/duplex
2257 * configurations and we stop when we see a link-up condition before the
2258 * maximum number of "peek" ticks have occurred.
2259 *
2260 * Once a valid link status has been detected we configure the BigMAC and
2261 * the rest of the Happy Meal to speak the most efficient protocol we could
2262 * get a clean link for. The priority for link configurations, highest first
2263 * is:
2264 * 100 Base-T Full Duplex
2265 * 100 Base-T Half Duplex
2266 * 10 Base-T Full Duplex
2267 * 10 Base-T Half Duplex
2268 *
2269 * We start a new timer now, after a successful auto negotiation status has
2270 * been detected. This timer just waits for the link-up bit to get set in
2271 * the BMCR of the DP83840. When this occurs we print a kernel log message
2272 * describing the link type in use and the fact that it is up.
2273 *
2274 * If a fatal error of some sort is signalled and detected in the interrupt
2275 * service routine, and the chip is reset, or the link is ifconfig'd down
2276 * and then back up, this entire process repeats itself all over again.
2277 */
2278 /* Note: Above comments are come from sunhme driver. */
2279
2280 static int tc35815_try_next_permutation(struct net_device *dev)
2281 {
2282 struct tc35815_local *lp = dev->priv;
2283 int pid = lp->phy_addr;
2284 unsigned short bmcr;
2285
2286 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2287
2288 /* Downgrade from full to half duplex. Only possible via ethtool. */
2289 if (bmcr & BMCR_FULLDPLX) {
2290 bmcr &= ~BMCR_FULLDPLX;
2291 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2292 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2293 return 0;
2294 }
2295
2296 /* Downgrade from 100 to 10. */
2297 if (bmcr & BMCR_SPEED100) {
2298 bmcr &= ~BMCR_SPEED100;
2299 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2300 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2301 return 0;
2302 }
2303
2304 /* We've tried everything. */
2305 return -1;
2306 }
2307
2308 static void
2309 tc35815_display_link_mode(struct net_device *dev)
2310 {
2311 struct tc35815_local *lp = dev->priv;
2312 int pid = lp->phy_addr;
2313 unsigned short lpa, bmcr;
2314 char *speed = "", *duplex = "";
2315
2316 lpa = tc_mdio_read(dev, pid, MII_LPA);
2317 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2318 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2319 speed = "100Mb/s";
2320 else
2321 speed = "10Mb/s";
2322 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2323 duplex = "Full Duplex";
2324 else
2325 duplex = "Half Duplex";
2326
2327 if (netif_msg_link(lp))
2328 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2329 dev->name, speed, duplex);
2330 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2331 dev->name,
2332 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2333 }
2334
2335 static void tc35815_display_forced_link_mode(struct net_device *dev)
2336 {
2337 struct tc35815_local *lp = dev->priv;
2338 int pid = lp->phy_addr;
2339 unsigned short bmcr;
2340 char *speed = "", *duplex = "";
2341
2342 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2343 if (bmcr & BMCR_SPEED100)
2344 speed = "100Mb/s";
2345 else
2346 speed = "10Mb/s";
2347 if (bmcr & BMCR_FULLDPLX)
2348 duplex = "Full Duplex.\n";
2349 else
2350 duplex = "Half Duplex.\n";
2351
2352 if (netif_msg_link(lp))
2353 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2354 dev->name, speed, duplex);
2355 }
2356
2357 static void tc35815_set_link_modes(struct net_device *dev)
2358 {
2359 struct tc35815_local *lp = dev->priv;
2360 struct tc35815_regs __iomem *tr =
2361 (struct tc35815_regs __iomem *)dev->base_addr;
2362 int pid = lp->phy_addr;
2363 unsigned short bmcr, lpa;
2364 int speed;
2365
2366 if (lp->timer_state == arbwait) {
2367 lpa = tc_mdio_read(dev, pid, MII_LPA);
2368 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2369 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2370 dev->name,
2371 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2372 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2373 LPA_100HALF | LPA_100FULL))) {
2374 /* fall back to 10HALF */
2375 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2376 dev->name, lpa);
2377 lpa = LPA_10HALF;
2378 }
2379 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2380 lp->fullduplex = 1;
2381 else
2382 lp->fullduplex = 0;
2383 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2384 speed = 100;
2385 else
2386 speed = 10;
2387 } else {
2388 /* Forcing a link mode. */
2389 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2390 if (bmcr & BMCR_FULLDPLX)
2391 lp->fullduplex = 1;
2392 else
2393 lp->fullduplex = 0;
2394 if (bmcr & BMCR_SPEED100)
2395 speed = 100;
2396 else
2397 speed = 10;
2398 }
2399
2400 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2401 if (lp->fullduplex) {
2402 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2403 } else {
2404 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2405 }
2406 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2407
2408 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2409
2410 #ifndef NO_CHECK_CARRIER
2411 /* TX4939 does not have EnLCarr */
2412 if (lp->boardtype != TC35815_TX4939) {
2413 #ifdef WORKAROUND_LOSTCAR
2414 /* WORKAROUND: enable LostCrS only if half duplex operation */
2415 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2416 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2417 #endif
2418 }
2419 #endif
2420 lp->mii.full_duplex = lp->fullduplex;
2421 }
2422
2423 static void tc35815_timer(unsigned long data)
2424 {
2425 struct net_device *dev = (struct net_device *)data;
2426 struct tc35815_local *lp = dev->priv;
2427 int pid = lp->phy_addr;
2428 unsigned short bmsr, bmcr, lpa;
2429 int restart_timer = 0;
2430
2431 spin_lock_irq(&lp->lock);
2432
2433 lp->timer_ticks++;
2434 switch (lp->timer_state) {
2435 case arbwait:
2436 /*
2437 * Only allow for 5 ticks, thats 10 seconds and much too
2438 * long to wait for arbitration to complete.
2439 */
2440 /* TC35815 need more times... */
2441 if (lp->timer_ticks >= 10) {
2442 /* Enter force mode. */
2443 if (!options.doforce) {
2444 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2445 " cable probblem?\n", dev->name);
2446 /* Try to restart the adaptor. */
2447 tc35815_restart(dev);
2448 goto out;
2449 }
2450 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2451 " trying force link mode\n", dev->name);
2452 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2453 tc_mdio_read(dev, pid, MII_BMCR),
2454 tc_mdio_read(dev, pid, MII_BMSR));
2455 bmcr = BMCR_SPEED100;
2456 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2457
2458 /*
2459 * OK, seems we need do disable the transceiver
2460 * for the first tick to make sure we get an
2461 * accurate link state at the second tick.
2462 */
2463
2464 lp->timer_state = ltrywait;
2465 lp->timer_ticks = 0;
2466 restart_timer = 1;
2467 } else {
2468 /* Anything interesting happen? */
2469 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2470 if (bmsr & BMSR_ANEGCOMPLETE) {
2471 /* Just what we've been waiting for... */
2472 tc35815_set_link_modes(dev);
2473
2474 /*
2475 * Success, at least so far, advance our state
2476 * engine.
2477 */
2478 lp->timer_state = lupwait;
2479 restart_timer = 1;
2480 } else {
2481 restart_timer = 1;
2482 }
2483 }
2484 break;
2485
2486 case lupwait:
2487 /*
2488 * Auto negotiation was successful and we are awaiting a
2489 * link up status. I have decided to let this timer run
2490 * forever until some sort of error is signalled, reporting
2491 * a message to the user at 10 second intervals.
2492 */
2493 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2494 if (bmsr & BMSR_LSTATUS) {
2495 /*
2496 * Wheee, it's up, display the link mode in use and put
2497 * the timer to sleep.
2498 */
2499 tc35815_display_link_mode(dev);
2500 netif_carrier_on(dev);
2501 #ifdef WORKAROUND_100HALF_PROMISC
2502 /* delayed promiscuous enabling */
2503 if (dev->flags & IFF_PROMISC)
2504 tc35815_set_multicast_list(dev);
2505 #endif
2506 #if 1
2507 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2508 lp->timer_state = lcheck;
2509 restart_timer = 1;
2510 #else
2511 lp->timer_state = asleep;
2512 restart_timer = 0;
2513 #endif
2514 } else {
2515 if (lp->timer_ticks >= 10) {
2516 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2517 "not completely up.\n", dev->name);
2518 lp->timer_ticks = 0;
2519 restart_timer = 1;
2520 } else {
2521 restart_timer = 1;
2522 }
2523 }
2524 break;
2525
2526 case ltrywait:
2527 /*
2528 * Making the timeout here too long can make it take
2529 * annoyingly long to attempt all of the link mode
2530 * permutations, but then again this is essentially
2531 * error recovery code for the most part.
2532 */
2533 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2534 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2535 if (lp->timer_ticks == 1) {
2536 /*
2537 * Re-enable transceiver, we'll re-enable the
2538 * transceiver next tick, then check link state
2539 * on the following tick.
2540 */
2541 restart_timer = 1;
2542 break;
2543 }
2544 if (lp->timer_ticks == 2) {
2545 restart_timer = 1;
2546 break;
2547 }
2548 if (bmsr & BMSR_LSTATUS) {
2549 /* Force mode selection success. */
2550 tc35815_display_forced_link_mode(dev);
2551 netif_carrier_on(dev);
2552 tc35815_set_link_modes(dev);
2553 #ifdef WORKAROUND_100HALF_PROMISC
2554 /* delayed promiscuous enabling */
2555 if (dev->flags & IFF_PROMISC)
2556 tc35815_set_multicast_list(dev);
2557 #endif
2558 #if 1
2559 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2560 lp->timer_state = lcheck;
2561 restart_timer = 1;
2562 #else
2563 lp->timer_state = asleep;
2564 restart_timer = 0;
2565 #endif
2566 } else {
2567 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2568 int ret;
2569
2570 ret = tc35815_try_next_permutation(dev);
2571 if (ret == -1) {
2572 /*
2573 * Aieee, tried them all, reset the
2574 * chip and try all over again.
2575 */
2576 printk(KERN_NOTICE "%s: Link down, "
2577 "cable problem?\n",
2578 dev->name);
2579
2580 /* Try to restart the adaptor. */
2581 tc35815_restart(dev);
2582 goto out;
2583 }
2584 lp->timer_ticks = 0;
2585 restart_timer = 1;
2586 } else {
2587 restart_timer = 1;
2588 }
2589 }
2590 break;
2591
2592 case lcheck:
2593 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2594 lpa = tc_mdio_read(dev, pid, MII_LPA);
2595 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2596 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2597 bmcr);
2598 } else if ((lp->saved_lpa ^ lpa) &
2599 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2600 printk(KERN_NOTICE "%s: link status changed"
2601 " (BMCR %x LPA %x->%x)\n", dev->name,
2602 bmcr, lp->saved_lpa, lpa);
2603 } else {
2604 /* go on */
2605 restart_timer = 1;
2606 break;
2607 }
2608 /* Try to restart the adaptor. */
2609 tc35815_restart(dev);
2610 goto out;
2611
2612 case asleep:
2613 default:
2614 /* Can't happens.... */
2615 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2616 "one anyways!\n", dev->name);
2617 restart_timer = 0;
2618 lp->timer_ticks = 0;
2619 lp->timer_state = asleep; /* foo on you */
2620 break;
2621 }
2622
2623 if (restart_timer) {
2624 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2625 add_timer(&lp->timer);
2626 }
2627 out:
2628 spin_unlock_irq(&lp->lock);
2629 }
2630
2631 static void tc35815_start_auto_negotiation(struct net_device *dev,
2632 struct ethtool_cmd *ep)
2633 {
2634 struct tc35815_local *lp = dev->priv;
2635 int pid = lp->phy_addr;
2636 unsigned short bmsr, bmcr, advertize;
2637 int timeout;
2638
2639 netif_carrier_off(dev);
2640 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2641 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2642 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2643
2644 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2645 if (options.speed || options.duplex) {
2646 /* Advertise only specified configuration. */
2647 advertize &= ~(ADVERTISE_10HALF |
2648 ADVERTISE_10FULL |
2649 ADVERTISE_100HALF |
2650 ADVERTISE_100FULL);
2651 if (options.speed != 10) {
2652 if (options.duplex != 1)
2653 advertize |= ADVERTISE_100FULL;
2654 if (options.duplex != 2)
2655 advertize |= ADVERTISE_100HALF;
2656 }
2657 if (options.speed != 100) {
2658 if (options.duplex != 1)
2659 advertize |= ADVERTISE_10FULL;
2660 if (options.duplex != 2)
2661 advertize |= ADVERTISE_10HALF;
2662 }
2663 if (options.speed == 100)
2664 bmcr |= BMCR_SPEED100;
2665 else if (options.speed == 10)
2666 bmcr &= ~BMCR_SPEED100;
2667 if (options.duplex == 2)
2668 bmcr |= BMCR_FULLDPLX;
2669 else if (options.duplex == 1)
2670 bmcr &= ~BMCR_FULLDPLX;
2671 } else {
2672 /* Advertise everything we can support. */
2673 if (bmsr & BMSR_10HALF)
2674 advertize |= ADVERTISE_10HALF;
2675 else
2676 advertize &= ~ADVERTISE_10HALF;
2677 if (bmsr & BMSR_10FULL)
2678 advertize |= ADVERTISE_10FULL;
2679 else
2680 advertize &= ~ADVERTISE_10FULL;
2681 if (bmsr & BMSR_100HALF)
2682 advertize |= ADVERTISE_100HALF;
2683 else
2684 advertize &= ~ADVERTISE_100HALF;
2685 if (bmsr & BMSR_100FULL)
2686 advertize |= ADVERTISE_100FULL;
2687 else
2688 advertize &= ~ADVERTISE_100FULL;
2689 }
2690
2691 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2692
2693 /* Enable Auto-Negotiation, this is usually on already... */
2694 bmcr |= BMCR_ANENABLE;
2695 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2696
2697 /* Restart it to make sure it is going. */
2698 bmcr |= BMCR_ANRESTART;
2699 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2700 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2701
2702 /* BMCR_ANRESTART self clears when the process has begun. */
2703 timeout = 64; /* More than enough. */
2704 while (--timeout) {
2705 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2706 if (!(bmcr & BMCR_ANRESTART))
2707 break; /* got it. */
2708 udelay(10);
2709 }
2710 if (!timeout) {
2711 printk(KERN_ERR "%s: TC35815 would not start auto "
2712 "negotiation BMCR=0x%04x\n",
2713 dev->name, bmcr);
2714 printk(KERN_NOTICE "%s: Performing force link "
2715 "detection.\n", dev->name);
2716 goto force_link;
2717 } else {
2718 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2719 lp->timer_state = arbwait;
2720 }
2721 } else {
2722 force_link:
2723 /* Force the link up, trying first a particular mode.
2724 * Either we are here at the request of ethtool or
2725 * because the Happy Meal would not start to autoneg.
2726 */
2727
2728 /* Disable auto-negotiation in BMCR, enable the duplex and
2729 * speed setting, init the timer state machine, and fire it off.
2730 */
2731 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2732 bmcr = BMCR_SPEED100;
2733 } else {
2734 if (ep->speed == SPEED_100)
2735 bmcr = BMCR_SPEED100;
2736 else
2737 bmcr = 0;
2738 if (ep->duplex == DUPLEX_FULL)
2739 bmcr |= BMCR_FULLDPLX;
2740 }
2741 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2742
2743 /* OK, seems we need do disable the transceiver for the first
2744 * tick to make sure we get an accurate link state at the
2745 * second tick.
2746 */
2747 lp->timer_state = ltrywait;
2748 }
2749
2750 del_timer(&lp->timer);
2751 lp->timer_ticks = 0;
2752 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2753 add_timer(&lp->timer);
2754 }
2755
2756 static void tc35815_find_phy(struct net_device *dev)
2757 {
2758 struct tc35815_local *lp = dev->priv;
2759 int pid = lp->phy_addr;
2760 unsigned short id0;
2761
2762 /* find MII phy */
2763 for (pid = 31; pid >= 0; pid--) {
2764 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2765 if (id0 != 0xffff && id0 != 0x0000 &&
2766 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2767 ) {
2768 lp->phy_addr = pid;
2769 break;
2770 }
2771 }
2772 if (pid < 0) {
2773 printk(KERN_ERR "%s: No MII Phy found.\n",
2774 dev->name);
2775 lp->phy_addr = pid = 0;
2776 }
2777
2778 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2779 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2780 if (netif_msg_hw(lp))
2781 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2782 pid, lp->mii_id[0], lp->mii_id[1]);
2783 }
2784
2785 static void tc35815_phy_chip_init(struct net_device *dev)
2786 {
2787 struct tc35815_local *lp = dev->priv;
2788 int pid = lp->phy_addr;
2789 unsigned short bmcr;
2790 struct ethtool_cmd ecmd, *ep;
2791
2792 /* dis-isolate if needed. */
2793 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2794 if (bmcr & BMCR_ISOLATE) {
2795 int count = 32;
2796 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2797 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2798 while (--count) {
2799 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2800 break;
2801 udelay(20);
2802 }
2803 printk(" %s.\n", count ? "done" : "failed");
2804 }
2805
2806 if (options.speed && options.duplex) {
2807 ecmd.autoneg = AUTONEG_DISABLE;
2808 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2809 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2810 ep = &ecmd;
2811 } else {
2812 ep = NULL;
2813 }
2814 tc35815_start_auto_negotiation(dev, ep);
2815 }
2816
2817 static void tc35815_chip_reset(struct net_device *dev)
2818 {
2819 struct tc35815_regs __iomem *tr =
2820 (struct tc35815_regs __iomem *)dev->base_addr;
2821 int i;
2822 /* reset the controller */
2823 tc_writel(MAC_Reset, &tr->MAC_Ctl);
2824 udelay(4); /* 3200ns */
2825 i = 0;
2826 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2827 if (i++ > 100) {
2828 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2829 break;
2830 }
2831 mdelay(1);
2832 }
2833 tc_writel(0, &tr->MAC_Ctl);
2834
2835 /* initialize registers to default value */
2836 tc_writel(0, &tr->DMA_Ctl);
2837 tc_writel(0, &tr->TxThrsh);
2838 tc_writel(0, &tr->TxPollCtr);
2839 tc_writel(0, &tr->RxFragSize);
2840 tc_writel(0, &tr->Int_En);
2841 tc_writel(0, &tr->FDA_Bas);
2842 tc_writel(0, &tr->FDA_Lim);
2843 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
2844 tc_writel(0, &tr->CAM_Ctl);
2845 tc_writel(0, &tr->Tx_Ctl);
2846 tc_writel(0, &tr->Rx_Ctl);
2847 tc_writel(0, &tr->CAM_Ena);
2848 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
2849
2850 /* initialize internal SRAM */
2851 tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2852 for (i = 0; i < 0x1000; i += 4) {
2853 tc_writel(i, &tr->CAM_Adr);
2854 tc_writel(0, &tr->CAM_Data);
2855 }
2856 tc_writel(0, &tr->DMA_Ctl);
2857 }
2858
2859 static void tc35815_chip_init(struct net_device *dev)
2860 {
2861 struct tc35815_local *lp = dev->priv;
2862 struct tc35815_regs __iomem *tr =
2863 (struct tc35815_regs __iomem *)dev->base_addr;
2864 unsigned long txctl = TX_CTL_CMD;
2865
2866 tc35815_phy_chip_init(dev);
2867
2868 /* load station address to CAM */
2869 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2870
2871 /* Enable CAM (broadcast and unicast) */
2872 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2873 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2874
2875 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2876 if (HAVE_DMA_RXALIGN(lp))
2877 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2878 else
2879 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2880 #ifdef TC35815_USE_PACKEDBUFFER
2881 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
2882 #else
2883 tc_writel(ETH_ZLEN, &tr->RxFragSize);
2884 #endif
2885 tc_writel(0, &tr->TxPollCtr); /* Batch mode */
2886 tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2887 tc_writel(INT_EN_CMD, &tr->Int_En);
2888
2889 /* set queues */
2890 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2891 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2892 &tr->FDA_Lim);
2893 /*
2894 * Activation method:
2895 * First, enable the MAC Transmitter and the DMA Receive circuits.
2896 * Then enable the DMA Transmitter and the MAC Receive circuits.
2897 */
2898 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
2899 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
2900
2901 /* start MAC transmitter */
2902 #ifndef NO_CHECK_CARRIER
2903 /* TX4939 does not have EnLCarr */
2904 if (lp->boardtype == TC35815_TX4939)
2905 txctl &= ~Tx_EnLCarr;
2906 #ifdef WORKAROUND_LOSTCAR
2907 /* WORKAROUND: ignore LostCrS in full duplex operation */
2908 if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
2909 lp->fullduplex)
2910 txctl &= ~Tx_EnLCarr;
2911 #endif
2912 #endif /* !NO_CHECK_CARRIER */
2913 #ifdef GATHER_TXINT
2914 txctl &= ~Tx_EnComp; /* disable global tx completion int. */
2915 #endif
2916 tc_writel(txctl, &tr->Tx_Ctl);
2917 }
2918
2919 #ifdef CONFIG_PM
2920 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2921 {
2922 struct net_device *dev = pci_get_drvdata(pdev);
2923 struct tc35815_local *lp = dev->priv;
2924 unsigned long flags;
2925
2926 pci_save_state(pdev);
2927 if (!netif_running(dev))
2928 return 0;
2929 netif_device_detach(dev);
2930 spin_lock_irqsave(&lp->lock, flags);
2931 del_timer(&lp->timer); /* Kill if running */
2932 tc35815_chip_reset(dev);
2933 spin_unlock_irqrestore(&lp->lock, flags);
2934 pci_set_power_state(pdev, PCI_D3hot);
2935 return 0;
2936 }
2937
2938 static int tc35815_resume(struct pci_dev *pdev)
2939 {
2940 struct net_device *dev = pci_get_drvdata(pdev);
2941 struct tc35815_local *lp = dev->priv;
2942 unsigned long flags;
2943
2944 pci_restore_state(pdev);
2945 if (!netif_running(dev))
2946 return 0;
2947 pci_set_power_state(pdev, PCI_D0);
2948 spin_lock_irqsave(&lp->lock, flags);
2949 tc35815_restart(dev);
2950 spin_unlock_irqrestore(&lp->lock, flags);
2951 netif_device_attach(dev);
2952 return 0;
2953 }
2954 #endif /* CONFIG_PM */
2955
2956 static struct pci_driver tc35815_pci_driver = {
2957 .name = MODNAME,
2958 .id_table = tc35815_pci_tbl,
2959 .probe = tc35815_init_one,
2960 .remove = __devexit_p(tc35815_remove_one),
2961 #ifdef CONFIG_PM
2962 .suspend = tc35815_suspend,
2963 .resume = tc35815_resume,
2964 #endif
2965 };
2966
2967 module_param_named(speed, options.speed, int, 0);
2968 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2969 module_param_named(duplex, options.duplex, int, 0);
2970 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2971 module_param_named(doforce, options.doforce, int, 0);
2972 MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2973
2974 static int __init tc35815_init_module(void)
2975 {
2976 return pci_register_driver(&tc35815_pci_driver);
2977 }
2978
2979 static void __exit tc35815_cleanup_module(void)
2980 {
2981 pci_unregister_driver(&tc35815_pci_driver);
2982 }
2983
2984 module_init(tc35815_init_module);
2985 module_exit(tc35815_cleanup_module);
2986
2987 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2988 MODULE_LICENSE("GPL");
cpufreq for S3C2410