atiixp: SB700 contains more than one IDE channel
[linux-2.6/s3c2410-cpufreq.git] / drivers / ide / pci / atiixp.c
blob679eb92b89209fb2f88b5f94962a2f21e87b7c47
1 /*
2 * linux/drivers/ide/pci/atiixp.c Version 0.02 Jun 16 2007
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
6 */
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/ioport.h>
12 #include <linux/pci.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
18 #include <asm/io.h>
20 #define ATIIXP_IDE_PIO_TIMING 0x40
21 #define ATIIXP_IDE_MDMA_TIMING 0x44
22 #define ATIIXP_IDE_PIO_CONTROL 0x48
23 #define ATIIXP_IDE_PIO_MODE 0x4a
24 #define ATIIXP_IDE_UDMA_CONTROL 0x54
25 #define ATIIXP_IDE_UDMA_MODE 0x56
27 typedef struct {
28 u8 command_width;
29 u8 recover_width;
30 } atiixp_ide_timing;
32 static atiixp_ide_timing pio_timing[] = {
33 { 0x05, 0x0d },
34 { 0x04, 0x07 },
35 { 0x03, 0x04 },
36 { 0x02, 0x02 },
37 { 0x02, 0x00 },
40 static atiixp_ide_timing mdma_timing[] = {
41 { 0x07, 0x07 },
42 { 0x02, 0x01 },
43 { 0x02, 0x00 },
46 static int save_mdma_mode[4];
48 static DEFINE_SPINLOCK(atiixp_lock);
50 /**
51 * atiixp_dma_2_pio - return the PIO mode matching DMA
52 * @xfer_rate: transfer speed
54 * Returns the nearest equivalent PIO timing for the PIO or DMA
55 * mode requested by the controller.
58 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
59 switch(xfer_rate) {
60 case XFER_UDMA_6:
61 case XFER_UDMA_5:
62 case XFER_UDMA_4:
63 case XFER_UDMA_3:
64 case XFER_UDMA_2:
65 case XFER_UDMA_1:
66 case XFER_UDMA_0:
67 case XFER_MW_DMA_2:
68 case XFER_PIO_4:
69 return 4;
70 case XFER_MW_DMA_1:
71 case XFER_PIO_3:
72 return 3;
73 case XFER_SW_DMA_2:
74 case XFER_PIO_2:
75 return 2;
76 case XFER_MW_DMA_0:
77 case XFER_SW_DMA_1:
78 case XFER_SW_DMA_0:
79 case XFER_PIO_1:
80 case XFER_PIO_0:
81 case XFER_PIO_SLOW:
82 default:
83 return 0;
87 static void atiixp_dma_host_on(ide_drive_t *drive)
89 struct pci_dev *dev = drive->hwif->pci_dev;
90 unsigned long flags;
91 u16 tmp16;
93 spin_lock_irqsave(&atiixp_lock, flags);
95 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
96 if (save_mdma_mode[drive->dn])
97 tmp16 &= ~(1 << drive->dn);
98 else
99 tmp16 |= (1 << drive->dn);
100 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
102 spin_unlock_irqrestore(&atiixp_lock, flags);
104 ide_dma_host_on(drive);
107 static void atiixp_dma_host_off(ide_drive_t *drive)
109 struct pci_dev *dev = drive->hwif->pci_dev;
110 unsigned long flags;
111 u16 tmp16;
113 spin_lock_irqsave(&atiixp_lock, flags);
115 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
116 tmp16 &= ~(1 << drive->dn);
117 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
119 spin_unlock_irqrestore(&atiixp_lock, flags);
121 ide_dma_host_off(drive);
125 * atiixp_tune_pio - tune a drive attached to a ATIIXP
126 * @drive: drive to tune
127 * @pio: desired PIO mode
129 * Set the interface PIO mode.
132 static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
134 struct pci_dev *dev = drive->hwif->pci_dev;
135 unsigned long flags;
136 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
137 u32 pio_timing_data;
138 u16 pio_mode_data;
140 spin_lock_irqsave(&atiixp_lock, flags);
142 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
143 pio_mode_data &= ~(0x07 << (drive->dn * 4));
144 pio_mode_data |= (pio << (drive->dn * 4));
145 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
147 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
148 pio_timing_data &= ~(0xff << timing_shift);
149 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
150 (pio_timing[pio].command_width << (timing_shift + 4));
151 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
153 spin_unlock_irqrestore(&atiixp_lock, flags);
156 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
158 pio = ide_get_best_pio_mode(drive, pio, 4);
159 atiixp_tune_pio(drive, pio);
160 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
164 * atiixp_tune_chipset - tune a ATIIXP interface
165 * @drive: IDE drive to tune
166 * @xferspeed: speed to configure
168 * Set a ATIIXP interface channel to the desired speeds. This involves
169 * requires the right timing data into the ATIIXP configuration space
170 * then setting the drive parameters appropriately
173 static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
175 struct pci_dev *dev = drive->hwif->pci_dev;
176 unsigned long flags;
177 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
178 u32 tmp32;
179 u16 tmp16;
180 u8 speed, pio;
182 speed = ide_rate_filter(drive, xferspeed);
184 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
185 atiixp_tune_pio(drive, speed - XFER_PIO_0);
186 return ide_config_drive_speed(drive, speed);
189 spin_lock_irqsave(&atiixp_lock, flags);
191 save_mdma_mode[drive->dn] = 0;
192 if (speed >= XFER_UDMA_0) {
193 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
194 tmp16 &= ~(0x07 << (drive->dn * 4));
195 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
196 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
197 } else {
198 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
199 save_mdma_mode[drive->dn] = speed;
200 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
201 tmp32 &= ~(0xff << timing_shift);
202 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
203 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
204 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
208 spin_unlock_irqrestore(&atiixp_lock, flags);
210 if (speed >= XFER_SW_DMA_0)
211 pio = atiixp_dma_2_pio(speed);
212 else
213 pio = speed - XFER_PIO_0;
215 atiixp_tune_pio(drive, pio);
217 return ide_config_drive_speed(drive, speed);
221 * atiixp_dma_check - set up an IDE device
222 * @drive: IDE drive to configure
224 * Set up the ATIIXP interface for the best available speed on this
225 * interface, preferring DMA to PIO.
228 static int atiixp_dma_check(ide_drive_t *drive)
230 drive->init_speed = 0;
232 if (ide_tune_dma(drive))
233 return 0;
235 if (ide_use_fast_pio(drive))
236 atiixp_tuneproc(drive, 255);
238 return -1;
242 * init_hwif_atiixp - fill in the hwif for the ATIIXP
243 * @hwif: IDE interface
245 * Set up the ide_hwif_t for the ATIIXP interface according to the
246 * capabilities of the hardware.
249 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
251 u8 udma_mode = 0;
252 u8 ch = hwif->channel;
253 struct pci_dev *pdev = hwif->pci_dev;
255 if (!hwif->irq)
256 hwif->irq = ch ? 15 : 14;
258 hwif->autodma = 0;
259 hwif->tuneproc = &atiixp_tuneproc;
260 hwif->speedproc = &atiixp_speedproc;
261 hwif->drives[0].autotune = 1;
262 hwif->drives[1].autotune = 1;
264 if (!hwif->dma_base)
265 return;
267 hwif->atapi_dma = 1;
268 hwif->ultra_mask = 0x3f;
269 hwif->mwdma_mask = 0x06;
270 hwif->swdma_mask = 0x04;
272 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
274 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
275 hwif->cbl = ATA_CBL_PATA80;
276 else
277 hwif->cbl = ATA_CBL_PATA40;
279 hwif->dma_host_on = &atiixp_dma_host_on;
280 hwif->dma_host_off = &atiixp_dma_host_off;
281 hwif->ide_dma_check = &atiixp_dma_check;
282 if (!noautodma)
283 hwif->autodma = 1;
285 hwif->drives[1].autodma = hwif->autodma;
286 hwif->drives[0].autodma = hwif->autodma;
290 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
291 { /* 0 */
292 .name = "ATIIXP",
293 .init_hwif = init_hwif_atiixp,
294 .autodma = AUTODMA,
295 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
296 .bootable = ON_BOARD,
297 .pio_mask = ATA_PIO4,
298 },{ /* 1 */
299 .name = "SB600_PATA",
300 .init_hwif = init_hwif_atiixp,
301 .autodma = AUTODMA,
302 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
303 .bootable = ON_BOARD,
304 .host_flags = IDE_HFLAG_SINGLE,
305 .pio_mask = ATA_PIO4,
310 * atiixp_init_one - called when a ATIIXP is found
311 * @dev: the atiixp device
312 * @id: the matching pci id
314 * Called when the PCI registration layer (or the IDE initialization)
315 * finds a device matching our IDE device tables.
318 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
320 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
323 static struct pci_device_id atiixp_pci_tbl[] = {
324 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
325 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
326 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
327 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
328 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
329 { 0, },
331 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
333 static struct pci_driver driver = {
334 .name = "ATIIXP_IDE",
335 .id_table = atiixp_pci_tbl,
336 .probe = atiixp_init_one,
339 static int __init atiixp_ide_init(void)
341 return ide_pci_register_driver(&driver);
344 module_init(atiixp_ide_init);
346 MODULE_AUTHOR("HUI YU");
347 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
348 MODULE_LICENSE("GPL");