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PCI: Use newly defined PCI channel offline routine
[linux-2.6/pdupreez.git] / drivers / net / e1000 / e1000_main.c
blob8424a8e4cbb01109db622cde41fde22108998a5b
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.15-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 #define COPYBREAK_DEFAULT 256
217 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218 module_param(copybreak, uint, 0644);
219 MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
222 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225 static void e1000_io_resume(struct pci_dev *pdev);
226
227 static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231 };
232
233 static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
238 #ifdef CONFIG_PM
239 /* Power Managment Hooks */
240 .suspend = e1000_suspend,
241 .resume = e1000_resume,
242 #endif
243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
245 };
246
247 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249 MODULE_LICENSE("GPL");
250 MODULE_VERSION(DRV_VERSION);
251
252 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253 module_param(debug, int, 0);
254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256 /**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263 static int __init
264 e1000_init_module(void)
265 {
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
272 ret = pci_register_driver(&e1000_driver);
273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
280 return ret;
281 }
282
283 module_init(e1000_init_module);
284
285 /**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292 static void __exit
293 e1000_exit_module(void)
294 {
295 pci_unregister_driver(&e1000_driver);
296 }
297
298 module_exit(e1000_exit_module);
299
300 static int e1000_request_irq(struct e1000_adapter *adapter)
301 {
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
305 flags = IRQF_SHARED;
306 #ifdef CONFIG_PCI_MSI
307 if (adapter->hw.mac_type >= e1000_82571) {
308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
315 if (adapter->have_msi) {
316 flags &= ~IRQF_SHARED;
317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
323 #endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 #ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341 #endif
342 }
343
344 /**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
349 static void
350 e1000_irq_disable(struct e1000_adapter *adapter)
351 {
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356 }
357
358 /**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
363 static void
364 e1000_irq_enable(struct e1000_adapter *adapter)
365 {
366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370 }
371
372 static void
373 e1000_update_mng_vlan(struct e1000_adapter *adapter)
374 {
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
378 if (adapter->vlgrp) {
379 if (!adapter->vlgrp->vlan_devices[vid]) {
380 if (adapter->hw.mng_cookie.status &
381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
389 !adapter->vlgrp->vlan_devices[old_vid])
390 e1000_vlan_rx_kill_vid(netdev, old_vid);
391 } else
392 adapter->mng_vlan_id = vid;
393 }
394 }
395
396 /**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
403 * of the f/w this means that the network i/f is closed.
404 *
405 **/
406
407 static void
408 e1000_release_hw_control(struct e1000_adapter *adapter)
409 {
410 uint32_t ctrl_ext;
411 uint32_t swsm;
412 uint32_t extcnf;
413
414 /* Let firmware taken over control of h/w */
415 switch (adapter->hw.mac_type) {
416 case e1000_82571:
417 case e1000_82572:
418 case e1000_80003es2lan:
419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 case e1000_82573:
424 swsm = E1000_READ_REG(&adapter->hw, SWSM);
425 E1000_WRITE_REG(&adapter->hw, SWSM,
426 swsm & ~E1000_SWSM_DRV_LOAD);
427 case e1000_ich8lan:
428 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
429 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
430 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
431 break;
432 default:
433 break;
434 }
435 }
436
437 /**
438 * e1000_get_hw_control - get control of the h/w from f/w
439 * @adapter: address of board private structure
440 *
441 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
442 * For ASF and Pass Through versions of f/w this means that
443 * the driver is loaded. For AMT version (only with 82573)
444 * of the f/w this means that the network i/f is open.
445 *
446 **/
447
448 static void
449 e1000_get_hw_control(struct e1000_adapter *adapter)
450 {
451 uint32_t ctrl_ext;
452 uint32_t swsm;
453 uint32_t extcnf;
454
455 /* Let firmware know the driver has taken over */
456 switch (adapter->hw.mac_type) {
457 case e1000_82571:
458 case e1000_82572:
459 case e1000_80003es2lan:
460 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
461 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
462 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
463 break;
464 case e1000_82573:
465 swsm = E1000_READ_REG(&adapter->hw, SWSM);
466 E1000_WRITE_REG(&adapter->hw, SWSM,
467 swsm | E1000_SWSM_DRV_LOAD);
468 break;
469 case e1000_ich8lan:
470 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
471 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
472 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
473 break;
474 default:
475 break;
476 }
477 }
478
479 static void
480 e1000_init_manageability(struct e1000_adapter *adapter)
481 {
482 if (adapter->en_mng_pt) {
483 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
484
485 /* disable hardware interception of ARP */
486 manc &= ~(E1000_MANC_ARP_EN);
487
488 /* enable receiving management packets to the host */
489 /* this will probably generate destination unreachable messages
490 * from the host OS, but the packets will be handled on SMBUS */
491 if (adapter->hw.has_manc2h) {
492 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
493
494 manc |= E1000_MANC_EN_MNG2HOST;
495 #define E1000_MNG2HOST_PORT_623 (1 << 5)
496 #define E1000_MNG2HOST_PORT_664 (1 << 6)
497 manc2h |= E1000_MNG2HOST_PORT_623;
498 manc2h |= E1000_MNG2HOST_PORT_664;
499 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
500 }
501
502 E1000_WRITE_REG(&adapter->hw, MANC, manc);
503 }
504 }
505
506 static void
507 e1000_release_manageability(struct e1000_adapter *adapter)
508 {
509 if (adapter->en_mng_pt) {
510 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
511
512 /* re-enable hardware interception of ARP */
513 manc |= E1000_MANC_ARP_EN;
514
515 if (adapter->hw.has_manc2h)
516 manc &= ~E1000_MANC_EN_MNG2HOST;
517
518 /* don't explicitly have to mess with MANC2H since
519 * MANC has an enable disable that gates MANC2H */
520
521 E1000_WRITE_REG(&adapter->hw, MANC, manc);
522 }
523 }
524
525 int
526 e1000_up(struct e1000_adapter *adapter)
527 {
528 struct net_device *netdev = adapter->netdev;
529 int i;
530
531 /* hardware has been reset, we need to reload some things */
532
533 e1000_set_multi(netdev);
534
535 e1000_restore_vlan(adapter);
536 e1000_init_manageability(adapter);
537
538 e1000_configure_tx(adapter);
539 e1000_setup_rctl(adapter);
540 e1000_configure_rx(adapter);
541 /* call E1000_DESC_UNUSED which always leaves
542 * at least 1 descriptor unused to make sure
543 * next_to_use != next_to_clean */
544 for (i = 0; i < adapter->num_rx_queues; i++) {
545 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
546 adapter->alloc_rx_buf(adapter, ring,
547 E1000_DESC_UNUSED(ring));
548 }
549
550 adapter->tx_queue_len = netdev->tx_queue_len;
551
552 #ifdef CONFIG_E1000_NAPI
553 netif_poll_enable(netdev);
554 #endif
555 e1000_irq_enable(adapter);
556
557 clear_bit(__E1000_DOWN, &adapter->flags);
558
559 /* fire a link change interrupt to start the watchdog */
560 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
561 return 0;
562 }
563
564 /**
565 * e1000_power_up_phy - restore link in case the phy was powered down
566 * @adapter: address of board private structure
567 *
568 * The phy may be powered down to save power and turn off link when the
569 * driver is unloaded and wake on lan is not enabled (among others)
570 * *** this routine MUST be followed by a call to e1000_reset ***
571 *
572 **/
573
574 void e1000_power_up_phy(struct e1000_adapter *adapter)
575 {
576 uint16_t mii_reg = 0;
577
578 /* Just clear the power down bit to wake the phy back up */
579 if (adapter->hw.media_type == e1000_media_type_copper) {
580 /* according to the manual, the phy will retain its
581 * settings across a power-down/up cycle */
582 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
583 mii_reg &= ~MII_CR_POWER_DOWN;
584 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
585 }
586 }
587
588 static void e1000_power_down_phy(struct e1000_adapter *adapter)
589 {
590 /* Power down the PHY so no link is implied when interface is down *
591 * The PHY cannot be powered down if any of the following is TRUE *
592 * (a) WoL is enabled
593 * (b) AMT is active
594 * (c) SoL/IDER session is active */
595 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
596 adapter->hw.media_type == e1000_media_type_copper) {
597 uint16_t mii_reg = 0;
598
599 switch (adapter->hw.mac_type) {
600 case e1000_82540:
601 case e1000_82545:
602 case e1000_82545_rev_3:
603 case e1000_82546:
604 case e1000_82546_rev_3:
605 case e1000_82541:
606 case e1000_82541_rev_2:
607 case e1000_82547:
608 case e1000_82547_rev_2:
609 if (E1000_READ_REG(&adapter->hw, MANC) &
610 E1000_MANC_SMBUS_EN)
611 goto out;
612 break;
613 case e1000_82571:
614 case e1000_82572:
615 case e1000_82573:
616 case e1000_80003es2lan:
617 case e1000_ich8lan:
618 if (e1000_check_mng_mode(&adapter->hw) ||
619 e1000_check_phy_reset_block(&adapter->hw))
620 goto out;
621 break;
622 default:
623 goto out;
624 }
625 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
626 mii_reg |= MII_CR_POWER_DOWN;
627 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
628 mdelay(1);
629 }
630 out:
631 return;
632 }
633
634 void
635 e1000_down(struct e1000_adapter *adapter)
636 {
637 struct net_device *netdev = adapter->netdev;
638
639 /* signal that we're down so the interrupt handler does not
640 * reschedule our watchdog timer */
641 set_bit(__E1000_DOWN, &adapter->flags);
642
643 e1000_irq_disable(adapter);
644
645 del_timer_sync(&adapter->tx_fifo_stall_timer);
646 del_timer_sync(&adapter->watchdog_timer);
647 del_timer_sync(&adapter->phy_info_timer);
648
649 #ifdef CONFIG_E1000_NAPI
650 netif_poll_disable(netdev);
651 #endif
652 netdev->tx_queue_len = adapter->tx_queue_len;
653 adapter->link_speed = 0;
654 adapter->link_duplex = 0;
655 netif_carrier_off(netdev);
656 netif_stop_queue(netdev);
657
658 e1000_reset(adapter);
659 e1000_clean_all_tx_rings(adapter);
660 e1000_clean_all_rx_rings(adapter);
661 }
662
663 void
664 e1000_reinit_locked(struct e1000_adapter *adapter)
665 {
666 WARN_ON(in_interrupt());
667 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
668 msleep(1);
669 e1000_down(adapter);
670 e1000_up(adapter);
671 clear_bit(__E1000_RESETTING, &adapter->flags);
672 }
673
674 void
675 e1000_reset(struct e1000_adapter *adapter)
676 {
677 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
678 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
679 boolean_t legacy_pba_adjust = FALSE;
680
681 /* Repartition Pba for greater than 9k mtu
682 * To take effect CTRL.RST is required.
683 */
684
685 switch (adapter->hw.mac_type) {
686 case e1000_82542_rev2_0:
687 case e1000_82542_rev2_1:
688 case e1000_82543:
689 case e1000_82544:
690 case e1000_82540:
691 case e1000_82541:
692 case e1000_82541_rev_2:
693 legacy_pba_adjust = TRUE;
694 pba = E1000_PBA_48K;
695 break;
696 case e1000_82545:
697 case e1000_82545_rev_3:
698 case e1000_82546:
699 case e1000_82546_rev_3:
700 pba = E1000_PBA_48K;
701 break;
702 case e1000_82547:
703 case e1000_82547_rev_2:
704 legacy_pba_adjust = TRUE;
705 pba = E1000_PBA_30K;
706 break;
707 case e1000_82571:
708 case e1000_82572:
709 case e1000_80003es2lan:
710 pba = E1000_PBA_38K;
711 break;
712 case e1000_82573:
713 pba = E1000_PBA_20K;
714 break;
715 case e1000_ich8lan:
716 pba = E1000_PBA_8K;
717 case e1000_undefined:
718 case e1000_num_macs:
719 break;
720 }
721
722 if (legacy_pba_adjust == TRUE) {
723 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
724 pba -= 8; /* allocate more FIFO for Tx */
725
726 if (adapter->hw.mac_type == e1000_82547) {
727 adapter->tx_fifo_head = 0;
728 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
729 adapter->tx_fifo_size =
730 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
731 atomic_set(&adapter->tx_fifo_stall, 0);
732 }
733 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
734 /* adjust PBA for jumbo frames */
735 E1000_WRITE_REG(&adapter->hw, PBA, pba);
736
737 /* To maintain wire speed transmits, the Tx FIFO should be
738 * large enough to accomodate two full transmit packets,
739 * rounded up to the next 1KB and expressed in KB. Likewise,
740 * the Rx FIFO should be large enough to accomodate at least
741 * one full receive packet and is similarly rounded up and
742 * expressed in KB. */
743 pba = E1000_READ_REG(&adapter->hw, PBA);
744 /* upper 16 bits has Tx packet buffer allocation size in KB */
745 tx_space = pba >> 16;
746 /* lower 16 bits has Rx packet buffer allocation size in KB */
747 pba &= 0xffff;
748 /* don't include ethernet FCS because hardware appends/strips */
749 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
750 VLAN_TAG_SIZE;
751 min_tx_space = min_rx_space;
752 min_tx_space *= 2;
753 E1000_ROUNDUP(min_tx_space, 1024);
754 min_tx_space >>= 10;
755 E1000_ROUNDUP(min_rx_space, 1024);
756 min_rx_space >>= 10;
757
758 /* If current Tx allocation is less than the min Tx FIFO size,
759 * and the min Tx FIFO size is less than the current Rx FIFO
760 * allocation, take space away from current Rx allocation */
761 if (tx_space < min_tx_space &&
762 ((min_tx_space - tx_space) < pba)) {
763 pba = pba - (min_tx_space - tx_space);
764
765 /* PCI/PCIx hardware has PBA alignment constraints */
766 switch (adapter->hw.mac_type) {
767 case e1000_82545 ... e1000_82546_rev_3:
768 pba &= ~(E1000_PBA_8K - 1);
769 break;
770 default:
771 break;
772 }
773
774 /* if short on rx space, rx wins and must trump tx
775 * adjustment or use Early Receive if available */
776 if (pba < min_rx_space) {
777 switch (adapter->hw.mac_type) {
778 case e1000_82573:
779 /* ERT enabled in e1000_configure_rx */
780 break;
781 default:
782 pba = min_rx_space;
783 break;
784 }
785 }
786 }
787 }
788
789 E1000_WRITE_REG(&adapter->hw, PBA, pba);
790
791 /* flow control settings */
792 /* Set the FC high water mark to 90% of the FIFO size.
793 * Required to clear last 3 LSB */
794 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
795 /* We can't use 90% on small FIFOs because the remainder
796 * would be less than 1 full frame. In this case, we size
797 * it to allow at least a full frame above the high water
798 * mark. */
799 if (pba < E1000_PBA_16K)
800 fc_high_water_mark = (pba * 1024) - 1600;
801
802 adapter->hw.fc_high_water = fc_high_water_mark;
803 adapter->hw.fc_low_water = fc_high_water_mark - 8;
804 if (adapter->hw.mac_type == e1000_80003es2lan)
805 adapter->hw.fc_pause_time = 0xFFFF;
806 else
807 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
808 adapter->hw.fc_send_xon = 1;
809 adapter->hw.fc = adapter->hw.original_fc;
810
811 /* Allow time for pending master requests to run */
812 e1000_reset_hw(&adapter->hw);
813 if (adapter->hw.mac_type >= e1000_82544)
814 E1000_WRITE_REG(&adapter->hw, WUC, 0);
815
816 if (e1000_init_hw(&adapter->hw))
817 DPRINTK(PROBE, ERR, "Hardware Error\n");
818 e1000_update_mng_vlan(adapter);
819
820 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
821 if (adapter->hw.mac_type >= e1000_82544 &&
822 adapter->hw.mac_type <= e1000_82547_rev_2 &&
823 adapter->hw.autoneg == 1 &&
824 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
825 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
826 /* clear phy power management bit if we are in gig only mode,
827 * which if enabled will attempt negotiation to 100Mb, which
828 * can cause a loss of link at power off or driver unload */
829 ctrl &= ~E1000_CTRL_SWDPIN3;
830 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
831 }
832
833 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
834 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
835
836 e1000_reset_adaptive(&adapter->hw);
837 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
838
839 if (!adapter->smart_power_down &&
840 (adapter->hw.mac_type == e1000_82571 ||
841 adapter->hw.mac_type == e1000_82572)) {
842 uint16_t phy_data = 0;
843 /* speed up time to link by disabling smart power down, ignore
844 * the return value of this function because there is nothing
845 * different we would do if it failed */
846 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
847 &phy_data);
848 phy_data &= ~IGP02E1000_PM_SPD;
849 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
850 phy_data);
851 }
852
853 e1000_release_manageability(adapter);
854 }
855
856 /**
857 * e1000_probe - Device Initialization Routine
858 * @pdev: PCI device information struct
859 * @ent: entry in e1000_pci_tbl
860 *
861 * Returns 0 on success, negative on failure
862 *
863 * e1000_probe initializes an adapter identified by a pci_dev structure.
864 * The OS initialization, configuring of the adapter private structure,
865 * and a hardware reset occur.
866 **/
867
868 static int __devinit
869 e1000_probe(struct pci_dev *pdev,
870 const struct pci_device_id *ent)
871 {
872 struct net_device *netdev;
873 struct e1000_adapter *adapter;
874 unsigned long mmio_start, mmio_len;
875 unsigned long flash_start, flash_len;
876
877 static int cards_found = 0;
878 static int global_quad_port_a = 0; /* global ksp3 port a indication */
879 int i, err, pci_using_dac;
880 uint16_t eeprom_data = 0;
881 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
882 if ((err = pci_enable_device(pdev)))
883 return err;
884
885 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
886 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
887 pci_using_dac = 1;
888 } else {
889 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
890 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
891 E1000_ERR("No usable DMA configuration, aborting\n");
892 goto err_dma;
893 }
894 pci_using_dac = 0;
895 }
896
897 if ((err = pci_request_regions(pdev, e1000_driver_name)))
898 goto err_pci_reg;
899
900 pci_set_master(pdev);
901
902 err = -ENOMEM;
903 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
904 if (!netdev)
905 goto err_alloc_etherdev;
906
907 SET_MODULE_OWNER(netdev);
908 SET_NETDEV_DEV(netdev, &pdev->dev);
909
910 pci_set_drvdata(pdev, netdev);
911 adapter = netdev_priv(netdev);
912 adapter->netdev = netdev;
913 adapter->pdev = pdev;
914 adapter->hw.back = adapter;
915 adapter->msg_enable = (1 << debug) - 1;
916
917 mmio_start = pci_resource_start(pdev, BAR_0);
918 mmio_len = pci_resource_len(pdev, BAR_0);
919
920 err = -EIO;
921 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
922 if (!adapter->hw.hw_addr)
923 goto err_ioremap;
924
925 for (i = BAR_1; i <= BAR_5; i++) {
926 if (pci_resource_len(pdev, i) == 0)
927 continue;
928 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
929 adapter->hw.io_base = pci_resource_start(pdev, i);
930 break;
931 }
932 }
933
934 netdev->open = &e1000_open;
935 netdev->stop = &e1000_close;
936 netdev->hard_start_xmit = &e1000_xmit_frame;
937 netdev->get_stats = &e1000_get_stats;
938 netdev->set_multicast_list = &e1000_set_multi;
939 netdev->set_mac_address = &e1000_set_mac;
940 netdev->change_mtu = &e1000_change_mtu;
941 netdev->do_ioctl = &e1000_ioctl;
942 e1000_set_ethtool_ops(netdev);
943 netdev->tx_timeout = &e1000_tx_timeout;
944 netdev->watchdog_timeo = 5 * HZ;
945 #ifdef CONFIG_E1000_NAPI
946 netdev->poll = &e1000_clean;
947 netdev->weight = 64;
948 #endif
949 netdev->vlan_rx_register = e1000_vlan_rx_register;
950 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
951 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
952 #ifdef CONFIG_NET_POLL_CONTROLLER
953 netdev->poll_controller = e1000_netpoll;
954 #endif
955 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
956
957 netdev->mem_start = mmio_start;
958 netdev->mem_end = mmio_start + mmio_len;
959 netdev->base_addr = adapter->hw.io_base;
960
961 adapter->bd_number = cards_found;
962
963 /* setup the private structure */
964
965 if ((err = e1000_sw_init(adapter)))
966 goto err_sw_init;
967
968 err = -EIO;
969 /* Flash BAR mapping must happen after e1000_sw_init
970 * because it depends on mac_type */
971 if ((adapter->hw.mac_type == e1000_ich8lan) &&
972 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
973 flash_start = pci_resource_start(pdev, 1);
974 flash_len = pci_resource_len(pdev, 1);
975 adapter->hw.flash_address = ioremap(flash_start, flash_len);
976 if (!adapter->hw.flash_address)
977 goto err_flashmap;
978 }
979
980 if (e1000_check_phy_reset_block(&adapter->hw))
981 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
982
983 if (adapter->hw.mac_type >= e1000_82543) {
984 netdev->features = NETIF_F_SG |
985 NETIF_F_HW_CSUM |
986 NETIF_F_HW_VLAN_TX |
987 NETIF_F_HW_VLAN_RX |
988 NETIF_F_HW_VLAN_FILTER;
989 if (adapter->hw.mac_type == e1000_ich8lan)
990 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
991 }
992
993 #ifdef NETIF_F_TSO
994 if ((adapter->hw.mac_type >= e1000_82544) &&
995 (adapter->hw.mac_type != e1000_82547))
996 netdev->features |= NETIF_F_TSO;
997
998 #ifdef NETIF_F_TSO6
999 if (adapter->hw.mac_type > e1000_82547_rev_2)
1000 netdev->features |= NETIF_F_TSO6;
1001 #endif
1002 #endif
1003 if (pci_using_dac)
1004 netdev->features |= NETIF_F_HIGHDMA;
1005
1006 netdev->features |= NETIF_F_LLTX;
1007
1008 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1009
1010 /* initialize eeprom parameters */
1011
1012 if (e1000_init_eeprom_params(&adapter->hw)) {
1013 E1000_ERR("EEPROM initialization failed\n");
1014 goto err_eeprom;
1015 }
1016
1017 /* before reading the EEPROM, reset the controller to
1018 * put the device in a known good starting state */
1019
1020 e1000_reset_hw(&adapter->hw);
1021
1022 /* make sure the EEPROM is good */
1023
1024 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1025 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1026 goto err_eeprom;
1027 }
1028
1029 /* copy the MAC address out of the EEPROM */
1030
1031 if (e1000_read_mac_addr(&adapter->hw))
1032 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1033 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1034 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1035
1036 if (!is_valid_ether_addr(netdev->perm_addr)) {
1037 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1038 goto err_eeprom;
1039 }
1040
1041 e1000_get_bus_info(&adapter->hw);
1042
1043 init_timer(&adapter->tx_fifo_stall_timer);
1044 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1045 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1046
1047 init_timer(&adapter->watchdog_timer);
1048 adapter->watchdog_timer.function = &e1000_watchdog;
1049 adapter->watchdog_timer.data = (unsigned long) adapter;
1050
1051 init_timer(&adapter->phy_info_timer);
1052 adapter->phy_info_timer.function = &e1000_update_phy_info;
1053 adapter->phy_info_timer.data = (unsigned long) adapter;
1054
1055 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1056
1057 e1000_check_options(adapter);
1058
1059 /* Initial Wake on LAN setting
1060 * If APM wake is enabled in the EEPROM,
1061 * enable the ACPI Magic Packet filter
1062 */
1063
1064 switch (adapter->hw.mac_type) {
1065 case e1000_82542_rev2_0:
1066 case e1000_82542_rev2_1:
1067 case e1000_82543:
1068 break;
1069 case e1000_82544:
1070 e1000_read_eeprom(&adapter->hw,
1071 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1072 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1073 break;
1074 case e1000_ich8lan:
1075 e1000_read_eeprom(&adapter->hw,
1076 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1077 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1078 break;
1079 case e1000_82546:
1080 case e1000_82546_rev_3:
1081 case e1000_82571:
1082 case e1000_80003es2lan:
1083 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1084 e1000_read_eeprom(&adapter->hw,
1085 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1086 break;
1087 }
1088 /* Fall Through */
1089 default:
1090 e1000_read_eeprom(&adapter->hw,
1091 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1092 break;
1093 }
1094 if (eeprom_data & eeprom_apme_mask)
1095 adapter->eeprom_wol |= E1000_WUFC_MAG;
1096
1097 /* now that we have the eeprom settings, apply the special cases
1098 * where the eeprom may be wrong or the board simply won't support
1099 * wake on lan on a particular port */
1100 switch (pdev->device) {
1101 case E1000_DEV_ID_82546GB_PCIE:
1102 adapter->eeprom_wol = 0;
1103 break;
1104 case E1000_DEV_ID_82546EB_FIBER:
1105 case E1000_DEV_ID_82546GB_FIBER:
1106 case E1000_DEV_ID_82571EB_FIBER:
1107 /* Wake events only supported on port A for dual fiber
1108 * regardless of eeprom setting */
1109 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1110 adapter->eeprom_wol = 0;
1111 break;
1112 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1113 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1114 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1115 /* if quad port adapter, disable WoL on all but port A */
1116 if (global_quad_port_a != 0)
1117 adapter->eeprom_wol = 0;
1118 else
1119 adapter->quad_port_a = 1;
1120 /* Reset for multiple quad port adapters */
1121 if (++global_quad_port_a == 4)
1122 global_quad_port_a = 0;
1123 break;
1124 }
1125
1126 /* initialize the wol settings based on the eeprom settings */
1127 adapter->wol = adapter->eeprom_wol;
1128
1129 /* print bus type/speed/width info */
1130 {
1131 struct e1000_hw *hw = &adapter->hw;
1132 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1133 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1134 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1135 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1136 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1137 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1138 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1139 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1140 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1141 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1142 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1143 "32-bit"));
1144 }
1145
1146 for (i = 0; i < 6; i++)
1147 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1148
1149 /* reset the hardware with the new settings */
1150 e1000_reset(adapter);
1151
1152 /* If the controller is 82573 and f/w is AMT, do not set
1153 * DRV_LOAD until the interface is up. For all other cases,
1154 * let the f/w know that the h/w is now under the control
1155 * of the driver. */
1156 if (adapter->hw.mac_type != e1000_82573 ||
1157 !e1000_check_mng_mode(&adapter->hw))
1158 e1000_get_hw_control(adapter);
1159
1160 strcpy(netdev->name, "eth%d");
1161 if ((err = register_netdev(netdev)))
1162 goto err_register;
1163
1164 /* tell the stack to leave us alone until e1000_open() is called */
1165 netif_carrier_off(netdev);
1166 netif_stop_queue(netdev);
1167
1168 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1169
1170 cards_found++;
1171 return 0;
1172
1173 err_register:
1174 e1000_release_hw_control(adapter);
1175 err_eeprom:
1176 if (!e1000_check_phy_reset_block(&adapter->hw))
1177 e1000_phy_hw_reset(&adapter->hw);
1178
1179 if (adapter->hw.flash_address)
1180 iounmap(adapter->hw.flash_address);
1181 err_flashmap:
1182 #ifdef CONFIG_E1000_NAPI
1183 for (i = 0; i < adapter->num_rx_queues; i++)
1184 dev_put(&adapter->polling_netdev[i]);
1185 #endif
1186
1187 kfree(adapter->tx_ring);
1188 kfree(adapter->rx_ring);
1189 #ifdef CONFIG_E1000_NAPI
1190 kfree(adapter->polling_netdev);
1191 #endif
1192 err_sw_init:
1193 iounmap(adapter->hw.hw_addr);
1194 err_ioremap:
1195 free_netdev(netdev);
1196 err_alloc_etherdev:
1197 pci_release_regions(pdev);
1198 err_pci_reg:
1199 err_dma:
1200 pci_disable_device(pdev);
1201 return err;
1202 }
1203
1204 /**
1205 * e1000_remove - Device Removal Routine
1206 * @pdev: PCI device information struct
1207 *
1208 * e1000_remove is called by the PCI subsystem to alert the driver
1209 * that it should release a PCI device. The could be caused by a
1210 * Hot-Plug event, or because the driver is going to be removed from
1211 * memory.
1212 **/
1213
1214 static void __devexit
1215 e1000_remove(struct pci_dev *pdev)
1216 {
1217 struct net_device *netdev = pci_get_drvdata(pdev);
1218 struct e1000_adapter *adapter = netdev_priv(netdev);
1219 #ifdef CONFIG_E1000_NAPI
1220 int i;
1221 #endif
1222
1223 flush_scheduled_work();
1224
1225 e1000_release_manageability(adapter);
1226
1227 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1228 * would have already happened in close and is redundant. */
1229 e1000_release_hw_control(adapter);
1230
1231 unregister_netdev(netdev);
1232 #ifdef CONFIG_E1000_NAPI
1233 for (i = 0; i < adapter->num_rx_queues; i++)
1234 dev_put(&adapter->polling_netdev[i]);
1235 #endif
1236
1237 if (!e1000_check_phy_reset_block(&adapter->hw))
1238 e1000_phy_hw_reset(&adapter->hw);
1239
1240 kfree(adapter->tx_ring);
1241 kfree(adapter->rx_ring);
1242 #ifdef CONFIG_E1000_NAPI
1243 kfree(adapter->polling_netdev);
1244 #endif
1245
1246 iounmap(adapter->hw.hw_addr);
1247 if (adapter->hw.flash_address)
1248 iounmap(adapter->hw.flash_address);
1249 pci_release_regions(pdev);
1250
1251 free_netdev(netdev);
1252
1253 pci_disable_device(pdev);
1254 }
1255
1256 /**
1257 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1258 * @adapter: board private structure to initialize
1259 *
1260 * e1000_sw_init initializes the Adapter private data structure.
1261 * Fields are initialized based on PCI device information and
1262 * OS network device settings (MTU size).
1263 **/
1264
1265 static int __devinit
1266 e1000_sw_init(struct e1000_adapter *adapter)
1267 {
1268 struct e1000_hw *hw = &adapter->hw;
1269 struct net_device *netdev = adapter->netdev;
1270 struct pci_dev *pdev = adapter->pdev;
1271 #ifdef CONFIG_E1000_NAPI
1272 int i;
1273 #endif
1274
1275 /* PCI config space info */
1276
1277 hw->vendor_id = pdev->vendor;
1278 hw->device_id = pdev->device;
1279 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1280 hw->subsystem_id = pdev->subsystem_device;
1281
1282 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1283
1284 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1285
1286 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1287 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1288 hw->max_frame_size = netdev->mtu +
1289 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1290 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1291
1292 /* identify the MAC */
1293
1294 if (e1000_set_mac_type(hw)) {
1295 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1296 return -EIO;
1297 }
1298
1299 switch (hw->mac_type) {
1300 default:
1301 break;
1302 case e1000_82541:
1303 case e1000_82547:
1304 case e1000_82541_rev_2:
1305 case e1000_82547_rev_2:
1306 hw->phy_init_script = 1;
1307 break;
1308 }
1309
1310 e1000_set_media_type(hw);
1311
1312 hw->wait_autoneg_complete = FALSE;
1313 hw->tbi_compatibility_en = TRUE;
1314 hw->adaptive_ifs = TRUE;
1315
1316 /* Copper options */
1317
1318 if (hw->media_type == e1000_media_type_copper) {
1319 hw->mdix = AUTO_ALL_MODES;
1320 hw->disable_polarity_correction = FALSE;
1321 hw->master_slave = E1000_MASTER_SLAVE;
1322 }
1323
1324 adapter->num_tx_queues = 1;
1325 adapter->num_rx_queues = 1;
1326
1327 if (e1000_alloc_queues(adapter)) {
1328 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1329 return -ENOMEM;
1330 }
1331
1332 #ifdef CONFIG_E1000_NAPI
1333 for (i = 0; i < adapter->num_rx_queues; i++) {
1334 adapter->polling_netdev[i].priv = adapter;
1335 adapter->polling_netdev[i].poll = &e1000_clean;
1336 adapter->polling_netdev[i].weight = 64;
1337 dev_hold(&adapter->polling_netdev[i]);
1338 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1339 }
1340 spin_lock_init(&adapter->tx_queue_lock);
1341 #endif
1342
1343 atomic_set(&adapter->irq_sem, 1);
1344 spin_lock_init(&adapter->stats_lock);
1345
1346 set_bit(__E1000_DOWN, &adapter->flags);
1347
1348 return 0;
1349 }
1350
1351 /**
1352 * e1000_alloc_queues - Allocate memory for all rings
1353 * @adapter: board private structure to initialize
1354 *
1355 * We allocate one ring per queue at run-time since we don't know the
1356 * number of queues at compile-time. The polling_netdev array is
1357 * intended for Multiqueue, but should work fine with a single queue.
1358 **/
1359
1360 static int __devinit
1361 e1000_alloc_queues(struct e1000_adapter *adapter)
1362 {
1363 int size;
1364
1365 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1366 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1367 if (!adapter->tx_ring)
1368 return -ENOMEM;
1369 memset(adapter->tx_ring, 0, size);
1370
1371 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1372 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1373 if (!adapter->rx_ring) {
1374 kfree(adapter->tx_ring);
1375 return -ENOMEM;
1376 }
1377 memset(adapter->rx_ring, 0, size);
1378
1379 #ifdef CONFIG_E1000_NAPI
1380 size = sizeof(struct net_device) * adapter->num_rx_queues;
1381 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1382 if (!adapter->polling_netdev) {
1383 kfree(adapter->tx_ring);
1384 kfree(adapter->rx_ring);
1385 return -ENOMEM;
1386 }
1387 memset(adapter->polling_netdev, 0, size);
1388 #endif
1389
1390 return E1000_SUCCESS;
1391 }
1392
1393 /**
1394 * e1000_open - Called when a network interface is made active
1395 * @netdev: network interface device structure
1396 *
1397 * Returns 0 on success, negative value on failure
1398 *
1399 * The open entry point is called when a network interface is made
1400 * active by the system (IFF_UP). At this point all resources needed
1401 * for transmit and receive operations are allocated, the interrupt
1402 * handler is registered with the OS, the watchdog timer is started,
1403 * and the stack is notified that the interface is ready.
1404 **/
1405
1406 static int
1407 e1000_open(struct net_device *netdev)
1408 {
1409 struct e1000_adapter *adapter = netdev_priv(netdev);
1410 int err;
1411
1412 /* disallow open during test */
1413 if (test_bit(__E1000_TESTING, &adapter->flags))
1414 return -EBUSY;
1415
1416 /* allocate transmit descriptors */
1417 if ((err = e1000_setup_all_tx_resources(adapter)))
1418 goto err_setup_tx;
1419
1420 /* allocate receive descriptors */
1421 if ((err = e1000_setup_all_rx_resources(adapter)))
1422 goto err_setup_rx;
1423
1424 err = e1000_request_irq(adapter);
1425 if (err)
1426 goto err_req_irq;
1427
1428 e1000_power_up_phy(adapter);
1429
1430 if ((err = e1000_up(adapter)))
1431 goto err_up;
1432 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1433 if ((adapter->hw.mng_cookie.status &
1434 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1435 e1000_update_mng_vlan(adapter);
1436 }
1437
1438 /* If AMT is enabled, let the firmware know that the network
1439 * interface is now open */
1440 if (adapter->hw.mac_type == e1000_82573 &&
1441 e1000_check_mng_mode(&adapter->hw))
1442 e1000_get_hw_control(adapter);
1443
1444 return E1000_SUCCESS;
1445
1446 err_up:
1447 e1000_power_down_phy(adapter);
1448 e1000_free_irq(adapter);
1449 err_req_irq:
1450 e1000_free_all_rx_resources(adapter);
1451 err_setup_rx:
1452 e1000_free_all_tx_resources(adapter);
1453 err_setup_tx:
1454 e1000_reset(adapter);
1455
1456 return err;
1457 }
1458
1459 /**
1460 * e1000_close - Disables a network interface
1461 * @netdev: network interface device structure
1462 *
1463 * Returns 0, this is not allowed to fail
1464 *
1465 * The close entry point is called when an interface is de-activated
1466 * by the OS. The hardware is still under the drivers control, but
1467 * needs to be disabled. A global MAC reset is issued to stop the
1468 * hardware, and all transmit and receive resources are freed.
1469 **/
1470
1471 static int
1472 e1000_close(struct net_device *netdev)
1473 {
1474 struct e1000_adapter *adapter = netdev_priv(netdev);
1475
1476 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1477 e1000_down(adapter);
1478 e1000_power_down_phy(adapter);
1479 e1000_free_irq(adapter);
1480
1481 e1000_free_all_tx_resources(adapter);
1482 e1000_free_all_rx_resources(adapter);
1483
1484 /* kill manageability vlan ID if supported, but not if a vlan with
1485 * the same ID is registered on the host OS (let 8021q kill it) */
1486 if ((adapter->hw.mng_cookie.status &
1487 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1488 !(adapter->vlgrp &&
1489 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1490 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1491 }
1492
1493 /* If AMT is enabled, let the firmware know that the network
1494 * interface is now closed */
1495 if (adapter->hw.mac_type == e1000_82573 &&
1496 e1000_check_mng_mode(&adapter->hw))
1497 e1000_release_hw_control(adapter);
1498
1499 return 0;
1500 }
1501
1502 /**
1503 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1504 * @adapter: address of board private structure
1505 * @start: address of beginning of memory
1506 * @len: length of memory
1507 **/
1508 static boolean_t
1509 e1000_check_64k_bound(struct e1000_adapter *adapter,
1510 void *start, unsigned long len)
1511 {
1512 unsigned long begin = (unsigned long) start;
1513 unsigned long end = begin + len;
1514
1515 /* First rev 82545 and 82546 need to not allow any memory
1516 * write location to cross 64k boundary due to errata 23 */
1517 if (adapter->hw.mac_type == e1000_82545 ||
1518 adapter->hw.mac_type == e1000_82546) {
1519 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1520 }
1521
1522 return TRUE;
1523 }
1524
1525 /**
1526 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1527 * @adapter: board private structure
1528 * @txdr: tx descriptor ring (for a specific queue) to setup
1529 *
1530 * Return 0 on success, negative on failure
1531 **/
1532
1533 static int
1534 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1535 struct e1000_tx_ring *txdr)
1536 {
1537 struct pci_dev *pdev = adapter->pdev;
1538 int size;
1539
1540 size = sizeof(struct e1000_buffer) * txdr->count;
1541 txdr->buffer_info = vmalloc(size);
1542 if (!txdr->buffer_info) {
1543 DPRINTK(PROBE, ERR,
1544 "Unable to allocate memory for the transmit descriptor ring\n");
1545 return -ENOMEM;
1546 }
1547 memset(txdr->buffer_info, 0, size);
1548
1549 /* round up to nearest 4K */
1550
1551 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1552 E1000_ROUNDUP(txdr->size, 4096);
1553
1554 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1555 if (!txdr->desc) {
1556 setup_tx_desc_die:
1557 vfree(txdr->buffer_info);
1558 DPRINTK(PROBE, ERR,
1559 "Unable to allocate memory for the transmit descriptor ring\n");
1560 return -ENOMEM;
1561 }
1562
1563 /* Fix for errata 23, can't cross 64kB boundary */
1564 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1565 void *olddesc = txdr->desc;
1566 dma_addr_t olddma = txdr->dma;
1567 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1568 "at %p\n", txdr->size, txdr->desc);
1569 /* Try again, without freeing the previous */
1570 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1571 /* Failed allocation, critical failure */
1572 if (!txdr->desc) {
1573 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1574 goto setup_tx_desc_die;
1575 }
1576
1577 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1578 /* give up */
1579 pci_free_consistent(pdev, txdr->size, txdr->desc,
1580 txdr->dma);
1581 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1582 DPRINTK(PROBE, ERR,
1583 "Unable to allocate aligned memory "
1584 "for the transmit descriptor ring\n");
1585 vfree(txdr->buffer_info);
1586 return -ENOMEM;
1587 } else {
1588 /* Free old allocation, new allocation was successful */
1589 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1590 }
1591 }
1592 memset(txdr->desc, 0, txdr->size);
1593
1594 txdr->next_to_use = 0;
1595 txdr->next_to_clean = 0;
1596 spin_lock_init(&txdr->tx_lock);
1597
1598 return 0;
1599 }
1600
1601 /**
1602 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1603 * (Descriptors) for all queues
1604 * @adapter: board private structure
1605 *
1606 * Return 0 on success, negative on failure
1607 **/
1608
1609 int
1610 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1611 {
1612 int i, err = 0;
1613
1614 for (i = 0; i < adapter->num_tx_queues; i++) {
1615 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1616 if (err) {
1617 DPRINTK(PROBE, ERR,
1618 "Allocation for Tx Queue %u failed\n", i);
1619 for (i-- ; i >= 0; i--)
1620 e1000_free_tx_resources(adapter,
1621 &adapter->tx_ring[i]);
1622 break;
1623 }
1624 }
1625
1626 return err;
1627 }
1628
1629 /**
1630 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1631 * @adapter: board private structure
1632 *
1633 * Configure the Tx unit of the MAC after a reset.
1634 **/
1635
1636 static void
1637 e1000_configure_tx(struct e1000_adapter *adapter)
1638 {
1639 uint64_t tdba;
1640 struct e1000_hw *hw = &adapter->hw;
1641 uint32_t tdlen, tctl, tipg, tarc;
1642 uint32_t ipgr1, ipgr2;
1643
1644 /* Setup the HW Tx Head and Tail descriptor pointers */
1645
1646 switch (adapter->num_tx_queues) {
1647 case 1:
1648 default:
1649 tdba = adapter->tx_ring[0].dma;
1650 tdlen = adapter->tx_ring[0].count *
1651 sizeof(struct e1000_tx_desc);
1652 E1000_WRITE_REG(hw, TDLEN, tdlen);
1653 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1654 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1655 E1000_WRITE_REG(hw, TDT, 0);
1656 E1000_WRITE_REG(hw, TDH, 0);
1657 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1658 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1659 break;
1660 }
1661
1662 /* Set the default values for the Tx Inter Packet Gap timer */
1663 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1664 (hw->media_type == e1000_media_type_fiber ||
1665 hw->media_type == e1000_media_type_internal_serdes))
1666 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1667 else
1668 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1669
1670 switch (hw->mac_type) {
1671 case e1000_82542_rev2_0:
1672 case e1000_82542_rev2_1:
1673 tipg = DEFAULT_82542_TIPG_IPGT;
1674 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1675 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1676 break;
1677 case e1000_80003es2lan:
1678 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1679 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1680 break;
1681 default:
1682 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1683 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1684 break;
1685 }
1686 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1687 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1688 E1000_WRITE_REG(hw, TIPG, tipg);
1689
1690 /* Set the Tx Interrupt Delay register */
1691
1692 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1693 if (hw->mac_type >= e1000_82540)
1694 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1695
1696 /* Program the Transmit Control Register */
1697
1698 tctl = E1000_READ_REG(hw, TCTL);
1699 tctl &= ~E1000_TCTL_CT;
1700 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1701 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1702
1703 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1704 tarc = E1000_READ_REG(hw, TARC0);
1705 /* set the speed mode bit, we'll clear it if we're not at
1706 * gigabit link later */
1707 tarc |= (1 << 21);
1708 E1000_WRITE_REG(hw, TARC0, tarc);
1709 } else if (hw->mac_type == e1000_80003es2lan) {
1710 tarc = E1000_READ_REG(hw, TARC0);
1711 tarc |= 1;
1712 E1000_WRITE_REG(hw, TARC0, tarc);
1713 tarc = E1000_READ_REG(hw, TARC1);
1714 tarc |= 1;
1715 E1000_WRITE_REG(hw, TARC1, tarc);
1716 }
1717
1718 e1000_config_collision_dist(hw);
1719
1720 /* Setup Transmit Descriptor Settings for eop descriptor */
1721 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1722
1723 /* only set IDE if we are delaying interrupts using the timers */
1724 if (adapter->tx_int_delay)
1725 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1726
1727 if (hw->mac_type < e1000_82543)
1728 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1729 else
1730 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1731
1732 /* Cache if we're 82544 running in PCI-X because we'll
1733 * need this to apply a workaround later in the send path. */
1734 if (hw->mac_type == e1000_82544 &&
1735 hw->bus_type == e1000_bus_type_pcix)
1736 adapter->pcix_82544 = 1;
1737
1738 E1000_WRITE_REG(hw, TCTL, tctl);
1739
1740 }
1741
1742 /**
1743 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1744 * @adapter: board private structure
1745 * @rxdr: rx descriptor ring (for a specific queue) to setup
1746 *
1747 * Returns 0 on success, negative on failure
1748 **/
1749
1750 static int
1751 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1752 struct e1000_rx_ring *rxdr)
1753 {
1754 struct pci_dev *pdev = adapter->pdev;
1755 int size, desc_len;
1756
1757 size = sizeof(struct e1000_buffer) * rxdr->count;
1758 rxdr->buffer_info = vmalloc(size);
1759 if (!rxdr->buffer_info) {
1760 DPRINTK(PROBE, ERR,
1761 "Unable to allocate memory for the receive descriptor ring\n");
1762 return -ENOMEM;
1763 }
1764 memset(rxdr->buffer_info, 0, size);
1765
1766 size = sizeof(struct e1000_ps_page) * rxdr->count;
1767 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1768 if (!rxdr->ps_page) {
1769 vfree(rxdr->buffer_info);
1770 DPRINTK(PROBE, ERR,
1771 "Unable to allocate memory for the receive descriptor ring\n");
1772 return -ENOMEM;
1773 }
1774 memset(rxdr->ps_page, 0, size);
1775
1776 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1777 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1778 if (!rxdr->ps_page_dma) {
1779 vfree(rxdr->buffer_info);
1780 kfree(rxdr->ps_page);
1781 DPRINTK(PROBE, ERR,
1782 "Unable to allocate memory for the receive descriptor ring\n");
1783 return -ENOMEM;
1784 }
1785 memset(rxdr->ps_page_dma, 0, size);
1786
1787 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1788 desc_len = sizeof(struct e1000_rx_desc);
1789 else
1790 desc_len = sizeof(union e1000_rx_desc_packet_split);
1791
1792 /* Round up to nearest 4K */
1793
1794 rxdr->size = rxdr->count * desc_len;
1795 E1000_ROUNDUP(rxdr->size, 4096);
1796
1797 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1798
1799 if (!rxdr->desc) {
1800 DPRINTK(PROBE, ERR,
1801 "Unable to allocate memory for the receive descriptor ring\n");
1802 setup_rx_desc_die:
1803 vfree(rxdr->buffer_info);
1804 kfree(rxdr->ps_page);
1805 kfree(rxdr->ps_page_dma);
1806 return -ENOMEM;
1807 }
1808
1809 /* Fix for errata 23, can't cross 64kB boundary */
1810 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1811 void *olddesc = rxdr->desc;
1812 dma_addr_t olddma = rxdr->dma;
1813 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1814 "at %p\n", rxdr->size, rxdr->desc);
1815 /* Try again, without freeing the previous */
1816 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1817 /* Failed allocation, critical failure */
1818 if (!rxdr->desc) {
1819 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1820 DPRINTK(PROBE, ERR,
1821 "Unable to allocate memory "
1822 "for the receive descriptor ring\n");
1823 goto setup_rx_desc_die;
1824 }
1825
1826 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1827 /* give up */
1828 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1829 rxdr->dma);
1830 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1831 DPRINTK(PROBE, ERR,
1832 "Unable to allocate aligned memory "
1833 "for the receive descriptor ring\n");
1834 goto setup_rx_desc_die;
1835 } else {
1836 /* Free old allocation, new allocation was successful */
1837 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1838 }
1839 }
1840 memset(rxdr->desc, 0, rxdr->size);
1841
1842 rxdr->next_to_clean = 0;
1843 rxdr->next_to_use = 0;
1844
1845 return 0;
1846 }
1847
1848 /**
1849 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1850 * (Descriptors) for all queues
1851 * @adapter: board private structure
1852 *
1853 * Return 0 on success, negative on failure
1854 **/
1855
1856 int
1857 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1858 {
1859 int i, err = 0;
1860
1861 for (i = 0; i < adapter->num_rx_queues; i++) {
1862 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1863 if (err) {
1864 DPRINTK(PROBE, ERR,
1865 "Allocation for Rx Queue %u failed\n", i);
1866 for (i-- ; i >= 0; i--)
1867 e1000_free_rx_resources(adapter,
1868 &adapter->rx_ring[i]);
1869 break;
1870 }
1871 }
1872
1873 return err;
1874 }
1875
1876 /**
1877 * e1000_setup_rctl - configure the receive control registers
1878 * @adapter: Board private structure
1879 **/
1880 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1881 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1882 static void
1883 e1000_setup_rctl(struct e1000_adapter *adapter)
1884 {
1885 uint32_t rctl, rfctl;
1886 uint32_t psrctl = 0;
1887 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1888 uint32_t pages = 0;
1889 #endif
1890
1891 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1892
1893 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1894
1895 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1896 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1897 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1898
1899 if (adapter->hw.tbi_compatibility_on == 1)
1900 rctl |= E1000_RCTL_SBP;
1901 else
1902 rctl &= ~E1000_RCTL_SBP;
1903
1904 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1905 rctl &= ~E1000_RCTL_LPE;
1906 else
1907 rctl |= E1000_RCTL_LPE;
1908
1909 /* Setup buffer sizes */
1910 rctl &= ~E1000_RCTL_SZ_4096;
1911 rctl |= E1000_RCTL_BSEX;
1912 switch (adapter->rx_buffer_len) {
1913 case E1000_RXBUFFER_256:
1914 rctl |= E1000_RCTL_SZ_256;
1915 rctl &= ~E1000_RCTL_BSEX;
1916 break;
1917 case E1000_RXBUFFER_512:
1918 rctl |= E1000_RCTL_SZ_512;
1919 rctl &= ~E1000_RCTL_BSEX;
1920 break;
1921 case E1000_RXBUFFER_1024:
1922 rctl |= E1000_RCTL_SZ_1024;
1923 rctl &= ~E1000_RCTL_BSEX;
1924 break;
1925 case E1000_RXBUFFER_2048:
1926 default:
1927 rctl |= E1000_RCTL_SZ_2048;
1928 rctl &= ~E1000_RCTL_BSEX;
1929 break;
1930 case E1000_RXBUFFER_4096:
1931 rctl |= E1000_RCTL_SZ_4096;
1932 break;
1933 case E1000_RXBUFFER_8192:
1934 rctl |= E1000_RCTL_SZ_8192;
1935 break;
1936 case E1000_RXBUFFER_16384:
1937 rctl |= E1000_RCTL_SZ_16384;
1938 break;
1939 }
1940
1941 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1942 /* 82571 and greater support packet-split where the protocol
1943 * header is placed in skb->data and the packet data is
1944 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1945 * In the case of a non-split, skb->data is linearly filled,
1946 * followed by the page buffers. Therefore, skb->data is
1947 * sized to hold the largest protocol header.
1948 */
1949 /* allocations using alloc_page take too long for regular MTU
1950 * so only enable packet split for jumbo frames */
1951 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1952 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1953 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1954 adapter->rx_ps_pages = pages;
1955 else
1956 adapter->rx_ps_pages = 0;
1957 #endif
1958 if (adapter->rx_ps_pages) {
1959 /* Configure extra packet-split registers */
1960 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1961 rfctl |= E1000_RFCTL_EXTEN;
1962 /* disable packet split support for IPv6 extension headers,
1963 * because some malformed IPv6 headers can hang the RX */
1964 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1965 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1966
1967 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1968
1969 rctl |= E1000_RCTL_DTYP_PS;
1970
1971 psrctl |= adapter->rx_ps_bsize0 >>
1972 E1000_PSRCTL_BSIZE0_SHIFT;
1973
1974 switch (adapter->rx_ps_pages) {
1975 case 3:
1976 psrctl |= PAGE_SIZE <<
1977 E1000_PSRCTL_BSIZE3_SHIFT;
1978 case 2:
1979 psrctl |= PAGE_SIZE <<
1980 E1000_PSRCTL_BSIZE2_SHIFT;
1981 case 1:
1982 psrctl |= PAGE_SIZE >>
1983 E1000_PSRCTL_BSIZE1_SHIFT;
1984 break;
1985 }
1986
1987 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1988 }
1989
1990 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1991 }
1992
1993 /**
1994 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1995 * @adapter: board private structure
1996 *
1997 * Configure the Rx unit of the MAC after a reset.
1998 **/
1999
2000 static void
2001 e1000_configure_rx(struct e1000_adapter *adapter)
2002 {
2003 uint64_t rdba;
2004 struct e1000_hw *hw = &adapter->hw;
2005 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2006
2007 if (adapter->rx_ps_pages) {
2008 /* this is a 32 byte descriptor */
2009 rdlen = adapter->rx_ring[0].count *
2010 sizeof(union e1000_rx_desc_packet_split);
2011 adapter->clean_rx = e1000_clean_rx_irq_ps;
2012 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2013 } else {
2014 rdlen = adapter->rx_ring[0].count *
2015 sizeof(struct e1000_rx_desc);
2016 adapter->clean_rx = e1000_clean_rx_irq;
2017 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2018 }
2019
2020 /* disable receives while setting up the descriptors */
2021 rctl = E1000_READ_REG(hw, RCTL);
2022 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2023
2024 /* set the Receive Delay Timer Register */
2025 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2026
2027 if (hw->mac_type >= e1000_82540) {
2028 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2029 if (adapter->itr_setting != 0)
2030 E1000_WRITE_REG(hw, ITR,
2031 1000000000 / (adapter->itr * 256));
2032 }
2033
2034 if (hw->mac_type >= e1000_82571) {
2035 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2036 /* Reset delay timers after every interrupt */
2037 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2038 #ifdef CONFIG_E1000_NAPI
2039 /* Auto-Mask interrupts upon ICR access */
2040 ctrl_ext |= E1000_CTRL_EXT_IAME;
2041 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2042 #endif
2043 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2044 E1000_WRITE_FLUSH(hw);
2045 }
2046
2047 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2048 * the Base and Length of the Rx Descriptor Ring */
2049 switch (adapter->num_rx_queues) {
2050 case 1:
2051 default:
2052 rdba = adapter->rx_ring[0].dma;
2053 E1000_WRITE_REG(hw, RDLEN, rdlen);
2054 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2055 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2056 E1000_WRITE_REG(hw, RDT, 0);
2057 E1000_WRITE_REG(hw, RDH, 0);
2058 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2059 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2060 break;
2061 }
2062
2063 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2064 if (hw->mac_type >= e1000_82543) {
2065 rxcsum = E1000_READ_REG(hw, RXCSUM);
2066 if (adapter->rx_csum == TRUE) {
2067 rxcsum |= E1000_RXCSUM_TUOFL;
2068
2069 /* Enable 82571 IPv4 payload checksum for UDP fragments
2070 * Must be used in conjunction with packet-split. */
2071 if ((hw->mac_type >= e1000_82571) &&
2072 (adapter->rx_ps_pages)) {
2073 rxcsum |= E1000_RXCSUM_IPPCSE;
2074 }
2075 } else {
2076 rxcsum &= ~E1000_RXCSUM_TUOFL;
2077 /* don't need to clear IPPCSE as it defaults to 0 */
2078 }
2079 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2080 }
2081
2082 /* enable early receives on 82573, only takes effect if using > 2048
2083 * byte total frame size. for example only for jumbo frames */
2084 #define E1000_ERT_2048 0x100
2085 if (hw->mac_type == e1000_82573)
2086 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2087
2088 /* Enable Receives */
2089 E1000_WRITE_REG(hw, RCTL, rctl);
2090 }
2091
2092 /**
2093 * e1000_free_tx_resources - Free Tx Resources per Queue
2094 * @adapter: board private structure
2095 * @tx_ring: Tx descriptor ring for a specific queue
2096 *
2097 * Free all transmit software resources
2098 **/
2099
2100 static void
2101 e1000_free_tx_resources(struct e1000_adapter *adapter,
2102 struct e1000_tx_ring *tx_ring)
2103 {
2104 struct pci_dev *pdev = adapter->pdev;
2105
2106 e1000_clean_tx_ring(adapter, tx_ring);
2107
2108 vfree(tx_ring->buffer_info);
2109 tx_ring->buffer_info = NULL;
2110
2111 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2112
2113 tx_ring->desc = NULL;
2114 }
2115
2116 /**
2117 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2118 * @adapter: board private structure
2119 *
2120 * Free all transmit software resources
2121 **/
2122
2123 void
2124 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2125 {
2126 int i;
2127
2128 for (i = 0; i < adapter->num_tx_queues; i++)
2129 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2130 }
2131
2132 static void
2133 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2134 struct e1000_buffer *buffer_info)
2135 {
2136 if (buffer_info->dma) {
2137 pci_unmap_page(adapter->pdev,
2138 buffer_info->dma,
2139 buffer_info->length,
2140 PCI_DMA_TODEVICE);
2141 buffer_info->dma = 0;
2142 }
2143 if (buffer_info->skb) {
2144 dev_kfree_skb_any(buffer_info->skb);
2145 buffer_info->skb = NULL;
2146 }
2147 /* buffer_info must be completely set up in the transmit path */
2148 }
2149
2150 /**
2151 * e1000_clean_tx_ring - Free Tx Buffers
2152 * @adapter: board private structure
2153 * @tx_ring: ring to be cleaned
2154 **/
2155
2156 static void
2157 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2158 struct e1000_tx_ring *tx_ring)
2159 {
2160 struct e1000_buffer *buffer_info;
2161 unsigned long size;
2162 unsigned int i;
2163
2164 /* Free all the Tx ring sk_buffs */
2165
2166 for (i = 0; i < tx_ring->count; i++) {
2167 buffer_info = &tx_ring->buffer_info[i];
2168 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2169 }
2170
2171 size = sizeof(struct e1000_buffer) * tx_ring->count;
2172 memset(tx_ring->buffer_info, 0, size);
2173
2174 /* Zero out the descriptor ring */
2175
2176 memset(tx_ring->desc, 0, tx_ring->size);
2177
2178 tx_ring->next_to_use = 0;
2179 tx_ring->next_to_clean = 0;
2180 tx_ring->last_tx_tso = 0;
2181
2182 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2183 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2184 }
2185
2186 /**
2187 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2188 * @adapter: board private structure
2189 **/
2190
2191 static void
2192 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2193 {
2194 int i;
2195
2196 for (i = 0; i < adapter->num_tx_queues; i++)
2197 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2198 }
2199
2200 /**
2201 * e1000_free_rx_resources - Free Rx Resources
2202 * @adapter: board private structure
2203 * @rx_ring: ring to clean the resources from
2204 *
2205 * Free all receive software resources
2206 **/
2207
2208 static void
2209 e1000_free_rx_resources(struct e1000_adapter *adapter,
2210 struct e1000_rx_ring *rx_ring)
2211 {
2212 struct pci_dev *pdev = adapter->pdev;
2213
2214 e1000_clean_rx_ring(adapter, rx_ring);
2215
2216 vfree(rx_ring->buffer_info);
2217 rx_ring->buffer_info = NULL;
2218 kfree(rx_ring->ps_page);
2219 rx_ring->ps_page = NULL;
2220 kfree(rx_ring->ps_page_dma);
2221 rx_ring->ps_page_dma = NULL;
2222
2223 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2224
2225 rx_ring->desc = NULL;
2226 }
2227
2228 /**
2229 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2230 * @adapter: board private structure
2231 *
2232 * Free all receive software resources
2233 **/
2234
2235 void
2236 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2237 {
2238 int i;
2239
2240 for (i = 0; i < adapter->num_rx_queues; i++)
2241 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2242 }
2243
2244 /**
2245 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2246 * @adapter: board private structure
2247 * @rx_ring: ring to free buffers from
2248 **/
2249
2250 static void
2251 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2252 struct e1000_rx_ring *rx_ring)
2253 {
2254 struct e1000_buffer *buffer_info;
2255 struct e1000_ps_page *ps_page;
2256 struct e1000_ps_page_dma *ps_page_dma;
2257 struct pci_dev *pdev = adapter->pdev;
2258 unsigned long size;
2259 unsigned int i, j;
2260
2261 /* Free all the Rx ring sk_buffs */
2262 for (i = 0; i < rx_ring->count; i++) {
2263 buffer_info = &rx_ring->buffer_info[i];
2264 if (buffer_info->skb) {
2265 pci_unmap_single(pdev,
2266 buffer_info->dma,
2267 buffer_info->length,
2268 PCI_DMA_FROMDEVICE);
2269
2270 dev_kfree_skb(buffer_info->skb);
2271 buffer_info->skb = NULL;
2272 }
2273 ps_page = &rx_ring->ps_page[i];
2274 ps_page_dma = &rx_ring->ps_page_dma[i];
2275 for (j = 0; j < adapter->rx_ps_pages; j++) {
2276 if (!ps_page->ps_page[j]) break;
2277 pci_unmap_page(pdev,
2278 ps_page_dma->ps_page_dma[j],
2279 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2280 ps_page_dma->ps_page_dma[j] = 0;
2281 put_page(ps_page->ps_page[j]);
2282 ps_page->ps_page[j] = NULL;
2283 }
2284 }
2285
2286 size = sizeof(struct e1000_buffer) * rx_ring->count;
2287 memset(rx_ring->buffer_info, 0, size);
2288 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2289 memset(rx_ring->ps_page, 0, size);
2290 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2291 memset(rx_ring->ps_page_dma, 0, size);
2292
2293 /* Zero out the descriptor ring */
2294
2295 memset(rx_ring->desc, 0, rx_ring->size);
2296
2297 rx_ring->next_to_clean = 0;
2298 rx_ring->next_to_use = 0;
2299
2300 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2301 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2302 }
2303
2304 /**
2305 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2306 * @adapter: board private structure
2307 **/
2308
2309 static void
2310 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2311 {
2312 int i;
2313
2314 for (i = 0; i < adapter->num_rx_queues; i++)
2315 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2316 }
2317
2318 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2319 * and memory write and invalidate disabled for certain operations
2320 */
2321 static void
2322 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2323 {
2324 struct net_device *netdev = adapter->netdev;
2325 uint32_t rctl;
2326
2327 e1000_pci_clear_mwi(&adapter->hw);
2328
2329 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2330 rctl |= E1000_RCTL_RST;
2331 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2332 E1000_WRITE_FLUSH(&adapter->hw);
2333 mdelay(5);
2334
2335 if (netif_running(netdev))
2336 e1000_clean_all_rx_rings(adapter);
2337 }
2338
2339 static void
2340 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2341 {
2342 struct net_device *netdev = adapter->netdev;
2343 uint32_t rctl;
2344
2345 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2346 rctl &= ~E1000_RCTL_RST;
2347 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2348 E1000_WRITE_FLUSH(&adapter->hw);
2349 mdelay(5);
2350
2351 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2352 e1000_pci_set_mwi(&adapter->hw);
2353
2354 if (netif_running(netdev)) {
2355 /* No need to loop, because 82542 supports only 1 queue */
2356 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2357 e1000_configure_rx(adapter);
2358 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2359 }
2360 }
2361
2362 /**
2363 * e1000_set_mac - Change the Ethernet Address of the NIC
2364 * @netdev: network interface device structure
2365 * @p: pointer to an address structure
2366 *
2367 * Returns 0 on success, negative on failure
2368 **/
2369
2370 static int
2371 e1000_set_mac(struct net_device *netdev, void *p)
2372 {
2373 struct e1000_adapter *adapter = netdev_priv(netdev);
2374 struct sockaddr *addr = p;
2375
2376 if (!is_valid_ether_addr(addr->sa_data))
2377 return -EADDRNOTAVAIL;
2378
2379 /* 82542 2.0 needs to be in reset to write receive address registers */
2380
2381 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2382 e1000_enter_82542_rst(adapter);
2383
2384 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2385 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2386
2387 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2388
2389 /* With 82571 controllers, LAA may be overwritten (with the default)
2390 * due to controller reset from the other port. */
2391 if (adapter->hw.mac_type == e1000_82571) {
2392 /* activate the work around */
2393 adapter->hw.laa_is_present = 1;
2394
2395 /* Hold a copy of the LAA in RAR[14] This is done so that
2396 * between the time RAR[0] gets clobbered and the time it
2397 * gets fixed (in e1000_watchdog), the actual LAA is in one
2398 * of the RARs and no incoming packets directed to this port
2399 * are dropped. Eventaully the LAA will be in RAR[0] and
2400 * RAR[14] */
2401 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2402 E1000_RAR_ENTRIES - 1);
2403 }
2404
2405 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2406 e1000_leave_82542_rst(adapter);
2407
2408 return 0;
2409 }
2410
2411 /**
2412 * e1000_set_multi - Multicast and Promiscuous mode set
2413 * @netdev: network interface device structure
2414 *
2415 * The set_multi entry point is called whenever the multicast address
2416 * list or the network interface flags are updated. This routine is
2417 * responsible for configuring the hardware for proper multicast,
2418 * promiscuous mode, and all-multi behavior.
2419 **/
2420
2421 static void
2422 e1000_set_multi(struct net_device *netdev)
2423 {
2424 struct e1000_adapter *adapter = netdev_priv(netdev);
2425 struct e1000_hw *hw = &adapter->hw;
2426 struct dev_mc_list *mc_ptr;
2427 uint32_t rctl;
2428 uint32_t hash_value;
2429 int i, rar_entries = E1000_RAR_ENTRIES;
2430 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2431 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2432 E1000_NUM_MTA_REGISTERS;
2433
2434 if (adapter->hw.mac_type == e1000_ich8lan)
2435 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2436
2437 /* reserve RAR[14] for LAA over-write work-around */
2438 if (adapter->hw.mac_type == e1000_82571)
2439 rar_entries--;
2440
2441 /* Check for Promiscuous and All Multicast modes */
2442
2443 rctl = E1000_READ_REG(hw, RCTL);
2444
2445 if (netdev->flags & IFF_PROMISC) {
2446 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2447 } else if (netdev->flags & IFF_ALLMULTI) {
2448 rctl |= E1000_RCTL_MPE;
2449 rctl &= ~E1000_RCTL_UPE;
2450 } else {
2451 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2452 }
2453
2454 E1000_WRITE_REG(hw, RCTL, rctl);
2455
2456 /* 82542 2.0 needs to be in reset to write receive address registers */
2457
2458 if (hw->mac_type == e1000_82542_rev2_0)
2459 e1000_enter_82542_rst(adapter);
2460
2461 /* load the first 14 multicast address into the exact filters 1-14
2462 * RAR 0 is used for the station MAC adddress
2463 * if there are not 14 addresses, go ahead and clear the filters
2464 * -- with 82571 controllers only 0-13 entries are filled here
2465 */
2466 mc_ptr = netdev->mc_list;
2467
2468 for (i = 1; i < rar_entries; i++) {
2469 if (mc_ptr) {
2470 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2471 mc_ptr = mc_ptr->next;
2472 } else {
2473 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2474 E1000_WRITE_FLUSH(hw);
2475 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2476 E1000_WRITE_FLUSH(hw);
2477 }
2478 }
2479
2480 /* clear the old settings from the multicast hash table */
2481
2482 for (i = 0; i < mta_reg_count; i++) {
2483 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2484 E1000_WRITE_FLUSH(hw);
2485 }
2486
2487 /* load any remaining addresses into the hash table */
2488
2489 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2490 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2491 e1000_mta_set(hw, hash_value);
2492 }
2493
2494 if (hw->mac_type == e1000_82542_rev2_0)
2495 e1000_leave_82542_rst(adapter);
2496 }
2497
2498 /* Need to wait a few seconds after link up to get diagnostic information from
2499 * the phy */
2500
2501 static void
2502 e1000_update_phy_info(unsigned long data)
2503 {
2504 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2505 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2506 }
2507
2508 /**
2509 * e1000_82547_tx_fifo_stall - Timer Call-back
2510 * @data: pointer to adapter cast into an unsigned long
2511 **/
2512
2513 static void
2514 e1000_82547_tx_fifo_stall(unsigned long data)
2515 {
2516 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2517 struct net_device *netdev = adapter->netdev;
2518 uint32_t tctl;
2519
2520 if (atomic_read(&adapter->tx_fifo_stall)) {
2521 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2522 E1000_READ_REG(&adapter->hw, TDH)) &&
2523 (E1000_READ_REG(&adapter->hw, TDFT) ==
2524 E1000_READ_REG(&adapter->hw, TDFH)) &&
2525 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2526 E1000_READ_REG(&adapter->hw, TDFHS))) {
2527 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2528 E1000_WRITE_REG(&adapter->hw, TCTL,
2529 tctl & ~E1000_TCTL_EN);
2530 E1000_WRITE_REG(&adapter->hw, TDFT,
2531 adapter->tx_head_addr);
2532 E1000_WRITE_REG(&adapter->hw, TDFH,
2533 adapter->tx_head_addr);
2534 E1000_WRITE_REG(&adapter->hw, TDFTS,
2535 adapter->tx_head_addr);
2536 E1000_WRITE_REG(&adapter->hw, TDFHS,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2539 E1000_WRITE_FLUSH(&adapter->hw);
2540
2541 adapter->tx_fifo_head = 0;
2542 atomic_set(&adapter->tx_fifo_stall, 0);
2543 netif_wake_queue(netdev);
2544 } else {
2545 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2546 }
2547 }
2548 }
2549
2550 /**
2551 * e1000_watchdog - Timer Call-back
2552 * @data: pointer to adapter cast into an unsigned long
2553 **/
2554 static void
2555 e1000_watchdog(unsigned long data)
2556 {
2557 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2558 struct net_device *netdev = adapter->netdev;
2559 struct e1000_tx_ring *txdr = adapter->tx_ring;
2560 uint32_t link, tctl;
2561 int32_t ret_val;
2562
2563 ret_val = e1000_check_for_link(&adapter->hw);
2564 if ((ret_val == E1000_ERR_PHY) &&
2565 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2566 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2567 /* See e1000_kumeran_lock_loss_workaround() */
2568 DPRINTK(LINK, INFO,
2569 "Gigabit has been disabled, downgrading speed\n");
2570 }
2571
2572 if (adapter->hw.mac_type == e1000_82573) {
2573 e1000_enable_tx_pkt_filtering(&adapter->hw);
2574 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2575 e1000_update_mng_vlan(adapter);
2576 }
2577
2578 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2579 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2580 link = !adapter->hw.serdes_link_down;
2581 else
2582 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2583
2584 if (link) {
2585 if (!netif_carrier_ok(netdev)) {
2586 boolean_t txb2b = 1;
2587 e1000_get_speed_and_duplex(&adapter->hw,
2588 &adapter->link_speed,
2589 &adapter->link_duplex);
2590
2591 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2592 adapter->link_speed,
2593 adapter->link_duplex == FULL_DUPLEX ?
2594 "Full Duplex" : "Half Duplex");
2595
2596 /* tweak tx_queue_len according to speed/duplex
2597 * and adjust the timeout factor */
2598 netdev->tx_queue_len = adapter->tx_queue_len;
2599 adapter->tx_timeout_factor = 1;
2600 switch (adapter->link_speed) {
2601 case SPEED_10:
2602 txb2b = 0;
2603 netdev->tx_queue_len = 10;
2604 adapter->tx_timeout_factor = 8;
2605 break;
2606 case SPEED_100:
2607 txb2b = 0;
2608 netdev->tx_queue_len = 100;
2609 /* maybe add some timeout factor ? */
2610 break;
2611 }
2612
2613 if ((adapter->hw.mac_type == e1000_82571 ||
2614 adapter->hw.mac_type == e1000_82572) &&
2615 txb2b == 0) {
2616 uint32_t tarc0;
2617 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2618 tarc0 &= ~(1 << 21);
2619 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2620 }
2621
2622 #ifdef NETIF_F_TSO
2623 /* disable TSO for pcie and 10/100 speeds, to avoid
2624 * some hardware issues */
2625 if (!adapter->tso_force &&
2626 adapter->hw.bus_type == e1000_bus_type_pci_express){
2627 switch (adapter->link_speed) {
2628 case SPEED_10:
2629 case SPEED_100:
2630 DPRINTK(PROBE,INFO,
2631 "10/100 speed: disabling TSO\n");
2632 netdev->features &= ~NETIF_F_TSO;
2633 #ifdef NETIF_F_TSO6
2634 netdev->features &= ~NETIF_F_TSO6;
2635 #endif
2636 break;
2637 case SPEED_1000:
2638 netdev->features |= NETIF_F_TSO;
2639 #ifdef NETIF_F_TSO6
2640 netdev->features |= NETIF_F_TSO6;
2641 #endif
2642 break;
2643 default:
2644 /* oops */
2645 break;
2646 }
2647 }
2648 #endif
2649
2650 /* enable transmits in the hardware, need to do this
2651 * after setting TARC0 */
2652 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2653 tctl |= E1000_TCTL_EN;
2654 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2655
2656 netif_carrier_on(netdev);
2657 netif_wake_queue(netdev);
2658 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2659 adapter->smartspeed = 0;
2660 } else {
2661 /* make sure the receive unit is started */
2662 if (adapter->hw.rx_needs_kicking) {
2663 struct e1000_hw *hw = &adapter->hw;
2664 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2665 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2666 }
2667 }
2668 } else {
2669 if (netif_carrier_ok(netdev)) {
2670 adapter->link_speed = 0;
2671 adapter->link_duplex = 0;
2672 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2673 netif_carrier_off(netdev);
2674 netif_stop_queue(netdev);
2675 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2676
2677 /* 80003ES2LAN workaround--
2678 * For packet buffer work-around on link down event;
2679 * disable receives in the ISR and
2680 * reset device here in the watchdog
2681 */
2682 if (adapter->hw.mac_type == e1000_80003es2lan)
2683 /* reset device */
2684 schedule_work(&adapter->reset_task);
2685 }
2686
2687 e1000_smartspeed(adapter);
2688 }
2689
2690 e1000_update_stats(adapter);
2691
2692 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2693 adapter->tpt_old = adapter->stats.tpt;
2694 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2695 adapter->colc_old = adapter->stats.colc;
2696
2697 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2698 adapter->gorcl_old = adapter->stats.gorcl;
2699 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2700 adapter->gotcl_old = adapter->stats.gotcl;
2701
2702 e1000_update_adaptive(&adapter->hw);
2703
2704 if (!netif_carrier_ok(netdev)) {
2705 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2706 /* We've lost link, so the controller stops DMA,
2707 * but we've got queued Tx work that's never going
2708 * to get done, so reset controller to flush Tx.
2709 * (Do the reset outside of interrupt context). */
2710 adapter->tx_timeout_count++;
2711 schedule_work(&adapter->reset_task);
2712 }
2713 }
2714
2715 /* Cause software interrupt to ensure rx ring is cleaned */
2716 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2717
2718 /* Force detection of hung controller every watchdog period */
2719 adapter->detect_tx_hung = TRUE;
2720
2721 /* With 82571 controllers, LAA may be overwritten due to controller
2722 * reset from the other port. Set the appropriate LAA in RAR[0] */
2723 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2724 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2725
2726 /* Reset the timer */
2727 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2728 }
2729
2730 enum latency_range {
2731 lowest_latency = 0,
2732 low_latency = 1,
2733 bulk_latency = 2,
2734 latency_invalid = 255
2735 };
2736
2737 /**
2738 * e1000_update_itr - update the dynamic ITR value based on statistics
2739 * Stores a new ITR value based on packets and byte
2740 * counts during the last interrupt. The advantage of per interrupt
2741 * computation is faster updates and more accurate ITR for the current
2742 * traffic pattern. Constants in this function were computed
2743 * based on theoretical maximum wire speed and thresholds were set based
2744 * on testing data as well as attempting to minimize response time
2745 * while increasing bulk throughput.
2746 * this functionality is controlled by the InterruptThrottleRate module
2747 * parameter (see e1000_param.c)
2748 * @adapter: pointer to adapter
2749 * @itr_setting: current adapter->itr
2750 * @packets: the number of packets during this measurement interval
2751 * @bytes: the number of bytes during this measurement interval
2752 **/
2753 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2754 uint16_t itr_setting,
2755 int packets,
2756 int bytes)
2757 {
2758 unsigned int retval = itr_setting;
2759 struct e1000_hw *hw = &adapter->hw;
2760
2761 if (unlikely(hw->mac_type < e1000_82540))
2762 goto update_itr_done;
2763
2764 if (packets == 0)
2765 goto update_itr_done;
2766
2767 switch (itr_setting) {
2768 case lowest_latency:
2769 /* jumbo frames get bulk treatment*/
2770 if (bytes/packets > 8000)
2771 retval = bulk_latency;
2772 else if ((packets < 5) && (bytes > 512))
2773 retval = low_latency;
2774 break;
2775 case low_latency: /* 50 usec aka 20000 ints/s */
2776 if (bytes > 10000) {
2777 /* jumbo frames need bulk latency setting */
2778 if (bytes/packets > 8000)
2779 retval = bulk_latency;
2780 else if ((packets < 10) || ((bytes/packets) > 1200))
2781 retval = bulk_latency;
2782 else if ((packets > 35))
2783 retval = lowest_latency;
2784 } else if (bytes/packets > 2000)
2785 retval = bulk_latency;
2786 else if (packets <= 2 && bytes < 512)
2787 retval = lowest_latency;
2788 break;
2789 case bulk_latency: /* 250 usec aka 4000 ints/s */
2790 if (bytes > 25000) {
2791 if (packets > 35)
2792 retval = low_latency;
2793 } else if (bytes < 6000) {
2794 retval = low_latency;
2795 }
2796 break;
2797 }
2798
2799 update_itr_done:
2800 return retval;
2801 }
2802
2803 static void e1000_set_itr(struct e1000_adapter *adapter)
2804 {
2805 struct e1000_hw *hw = &adapter->hw;
2806 uint16_t current_itr;
2807 uint32_t new_itr = adapter->itr;
2808
2809 if (unlikely(hw->mac_type < e1000_82540))
2810 return;
2811
2812 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2813 if (unlikely(adapter->link_speed != SPEED_1000)) {
2814 current_itr = 0;
2815 new_itr = 4000;
2816 goto set_itr_now;
2817 }
2818
2819 adapter->tx_itr = e1000_update_itr(adapter,
2820 adapter->tx_itr,
2821 adapter->total_tx_packets,
2822 adapter->total_tx_bytes);
2823 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2824 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2825 adapter->tx_itr = low_latency;
2826
2827 adapter->rx_itr = e1000_update_itr(adapter,
2828 adapter->rx_itr,
2829 adapter->total_rx_packets,
2830 adapter->total_rx_bytes);
2831 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2832 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2833 adapter->rx_itr = low_latency;
2834
2835 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2836
2837 switch (current_itr) {
2838 /* counts and packets in update_itr are dependent on these numbers */
2839 case lowest_latency:
2840 new_itr = 70000;
2841 break;
2842 case low_latency:
2843 new_itr = 20000; /* aka hwitr = ~200 */
2844 break;
2845 case bulk_latency:
2846 new_itr = 4000;
2847 break;
2848 default:
2849 break;
2850 }
2851
2852 set_itr_now:
2853 if (new_itr != adapter->itr) {
2854 /* this attempts to bias the interrupt rate towards Bulk
2855 * by adding intermediate steps when interrupt rate is
2856 * increasing */
2857 new_itr = new_itr > adapter->itr ?
2858 min(adapter->itr + (new_itr >> 2), new_itr) :
2859 new_itr;
2860 adapter->itr = new_itr;
2861 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2862 }
2863
2864 return;
2865 }
2866
2867 #define E1000_TX_FLAGS_CSUM 0x00000001
2868 #define E1000_TX_FLAGS_VLAN 0x00000002
2869 #define E1000_TX_FLAGS_TSO 0x00000004
2870 #define E1000_TX_FLAGS_IPV4 0x00000008
2871 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2872 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2873
2874 static int
2875 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2876 struct sk_buff *skb)
2877 {
2878 #ifdef NETIF_F_TSO
2879 struct e1000_context_desc *context_desc;
2880 struct e1000_buffer *buffer_info;
2881 unsigned int i;
2882 uint32_t cmd_length = 0;
2883 uint16_t ipcse = 0, tucse, mss;
2884 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2885 int err;
2886
2887 if (skb_is_gso(skb)) {
2888 if (skb_header_cloned(skb)) {
2889 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2890 if (err)
2891 return err;
2892 }
2893
2894 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2895 mss = skb_shinfo(skb)->gso_size;
2896 if (skb->protocol == htons(ETH_P_IP)) {
2897 skb->nh.iph->tot_len = 0;
2898 skb->nh.iph->check = 0;
2899 skb->h.th->check =
2900 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2901 skb->nh.iph->daddr,
2902 0,
2903 IPPROTO_TCP,
2904 0);
2905 cmd_length = E1000_TXD_CMD_IP;
2906 ipcse = skb->h.raw - skb->data - 1;
2907 #ifdef NETIF_F_TSO6
2908 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2909 skb->nh.ipv6h->payload_len = 0;
2910 skb->h.th->check =
2911 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2912 &skb->nh.ipv6h->daddr,
2913 0,
2914 IPPROTO_TCP,
2915 0);
2916 ipcse = 0;
2917 #endif
2918 }
2919 ipcss = skb->nh.raw - skb->data;
2920 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2921 tucss = skb->h.raw - skb->data;
2922 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2923 tucse = 0;
2924
2925 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2926 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2927
2928 i = tx_ring->next_to_use;
2929 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2930 buffer_info = &tx_ring->buffer_info[i];
2931
2932 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2933 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2934 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2935 context_desc->upper_setup.tcp_fields.tucss = tucss;
2936 context_desc->upper_setup.tcp_fields.tucso = tucso;
2937 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2938 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2939 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2940 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2941
2942 buffer_info->time_stamp = jiffies;
2943 buffer_info->next_to_watch = i;
2944
2945 if (++i == tx_ring->count) i = 0;
2946 tx_ring->next_to_use = i;
2947
2948 return TRUE;
2949 }
2950 #endif
2951
2952 return FALSE;
2953 }
2954
2955 static boolean_t
2956 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2957 struct sk_buff *skb)
2958 {
2959 struct e1000_context_desc *context_desc;
2960 struct e1000_buffer *buffer_info;
2961 unsigned int i;
2962 uint8_t css;
2963
2964 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2965 css = skb->h.raw - skb->data;
2966
2967 i = tx_ring->next_to_use;
2968 buffer_info = &tx_ring->buffer_info[i];
2969 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2970
2971 context_desc->upper_setup.tcp_fields.tucss = css;
2972 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
2973 context_desc->upper_setup.tcp_fields.tucse = 0;
2974 context_desc->tcp_seg_setup.data = 0;
2975 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2976
2977 buffer_info->time_stamp = jiffies;
2978 buffer_info->next_to_watch = i;
2979
2980 if (unlikely(++i == tx_ring->count)) i = 0;
2981 tx_ring->next_to_use = i;
2982
2983 return TRUE;
2984 }
2985
2986 return FALSE;
2987 }
2988
2989 #define E1000_MAX_TXD_PWR 12
2990 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2991
2992 static int
2993 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2994 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2995 unsigned int nr_frags, unsigned int mss)
2996 {
2997 struct e1000_buffer *buffer_info;
2998 unsigned int len = skb->len;
2999 unsigned int offset = 0, size, count = 0, i;
3000 unsigned int f;
3001 len -= skb->data_len;
3002
3003 i = tx_ring->next_to_use;
3004
3005 while (len) {
3006 buffer_info = &tx_ring->buffer_info[i];
3007 size = min(len, max_per_txd);
3008 #ifdef NETIF_F_TSO
3009 /* Workaround for Controller erratum --
3010 * descriptor for non-tso packet in a linear SKB that follows a
3011 * tso gets written back prematurely before the data is fully
3012 * DMA'd to the controller */
3013 if (!skb->data_len && tx_ring->last_tx_tso &&
3014 !skb_is_gso(skb)) {
3015 tx_ring->last_tx_tso = 0;
3016 size -= 4;
3017 }
3018
3019 /* Workaround for premature desc write-backs
3020 * in TSO mode. Append 4-byte sentinel desc */
3021 if (unlikely(mss && !nr_frags && size == len && size > 8))
3022 size -= 4;
3023 #endif
3024 /* work-around for errata 10 and it applies
3025 * to all controllers in PCI-X mode
3026 * The fix is to make sure that the first descriptor of a
3027 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3028 */
3029 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3030 (size > 2015) && count == 0))
3031 size = 2015;
3032
3033 /* Workaround for potential 82544 hang in PCI-X. Avoid
3034 * terminating buffers within evenly-aligned dwords. */
3035 if (unlikely(adapter->pcix_82544 &&
3036 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3037 size > 4))
3038 size -= 4;
3039
3040 buffer_info->length = size;
3041 buffer_info->dma =
3042 pci_map_single(adapter->pdev,
3043 skb->data + offset,
3044 size,
3045 PCI_DMA_TODEVICE);
3046 buffer_info->time_stamp = jiffies;
3047 buffer_info->next_to_watch = i;
3048
3049 len -= size;
3050 offset += size;
3051 count++;
3052 if (unlikely(++i == tx_ring->count)) i = 0;
3053 }
3054
3055 for (f = 0; f < nr_frags; f++) {
3056 struct skb_frag_struct *frag;
3057
3058 frag = &skb_shinfo(skb)->frags[f];
3059 len = frag->size;
3060 offset = frag->page_offset;
3061
3062 while (len) {
3063 buffer_info = &tx_ring->buffer_info[i];
3064 size = min(len, max_per_txd);
3065 #ifdef NETIF_F_TSO
3066 /* Workaround for premature desc write-backs
3067 * in TSO mode. Append 4-byte sentinel desc */
3068 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3069 size -= 4;
3070 #endif
3071 /* Workaround for potential 82544 hang in PCI-X.
3072 * Avoid terminating buffers within evenly-aligned
3073 * dwords. */
3074 if (unlikely(adapter->pcix_82544 &&
3075 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3076 size > 4))
3077 size -= 4;
3078
3079 buffer_info->length = size;
3080 buffer_info->dma =
3081 pci_map_page(adapter->pdev,
3082 frag->page,
3083 offset,
3084 size,
3085 PCI_DMA_TODEVICE);
3086 buffer_info->time_stamp = jiffies;
3087 buffer_info->next_to_watch = i;
3088
3089 len -= size;
3090 offset += size;
3091 count++;
3092 if (unlikely(++i == tx_ring->count)) i = 0;
3093 }
3094 }
3095
3096 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3097 tx_ring->buffer_info[i].skb = skb;
3098 tx_ring->buffer_info[first].next_to_watch = i;
3099
3100 return count;
3101 }
3102
3103 static void
3104 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3105 int tx_flags, int count)
3106 {
3107 struct e1000_tx_desc *tx_desc = NULL;
3108 struct e1000_buffer *buffer_info;
3109 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3110 unsigned int i;
3111
3112 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3113 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3114 E1000_TXD_CMD_TSE;
3115 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3116
3117 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3118 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3119 }
3120
3121 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3122 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3123 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3124 }
3125
3126 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3127 txd_lower |= E1000_TXD_CMD_VLE;
3128 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3129 }
3130
3131 i = tx_ring->next_to_use;
3132
3133 while (count--) {
3134 buffer_info = &tx_ring->buffer_info[i];
3135 tx_desc = E1000_TX_DESC(*tx_ring, i);
3136 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3137 tx_desc->lower.data =
3138 cpu_to_le32(txd_lower | buffer_info->length);
3139 tx_desc->upper.data = cpu_to_le32(txd_upper);
3140 if (unlikely(++i == tx_ring->count)) i = 0;
3141 }
3142
3143 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3144
3145 /* Force memory writes to complete before letting h/w
3146 * know there are new descriptors to fetch. (Only
3147 * applicable for weak-ordered memory model archs,
3148 * such as IA-64). */
3149 wmb();
3150
3151 tx_ring->next_to_use = i;
3152 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3153 /* we need this if more than one processor can write to our tail
3154 * at a time, it syncronizes IO on IA64/Altix systems */
3155 mmiowb();
3156 }
3157
3158 /**
3159 * 82547 workaround to avoid controller hang in half-duplex environment.
3160 * The workaround is to avoid queuing a large packet that would span
3161 * the internal Tx FIFO ring boundary by notifying the stack to resend
3162 * the packet at a later time. This gives the Tx FIFO an opportunity to
3163 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3164 * to the beginning of the Tx FIFO.
3165 **/
3166
3167 #define E1000_FIFO_HDR 0x10
3168 #define E1000_82547_PAD_LEN 0x3E0
3169
3170 static int
3171 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3172 {
3173 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3174 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3175
3176 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3177
3178 if (adapter->link_duplex != HALF_DUPLEX)
3179 goto no_fifo_stall_required;
3180
3181 if (atomic_read(&adapter->tx_fifo_stall))
3182 return 1;
3183
3184 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3185 atomic_set(&adapter->tx_fifo_stall, 1);
3186 return 1;
3187 }
3188
3189 no_fifo_stall_required:
3190 adapter->tx_fifo_head += skb_fifo_len;
3191 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3192 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3193 return 0;
3194 }
3195
3196 #define MINIMUM_DHCP_PACKET_SIZE 282
3197 static int
3198 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3199 {
3200 struct e1000_hw *hw = &adapter->hw;
3201 uint16_t length, offset;
3202 if (vlan_tx_tag_present(skb)) {
3203 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3204 ( adapter->hw.mng_cookie.status &
3205 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3206 return 0;
3207 }
3208 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3209 struct ethhdr *eth = (struct ethhdr *) skb->data;
3210 if ((htons(ETH_P_IP) == eth->h_proto)) {
3211 const struct iphdr *ip =
3212 (struct iphdr *)((uint8_t *)skb->data+14);
3213 if (IPPROTO_UDP == ip->protocol) {
3214 struct udphdr *udp =
3215 (struct udphdr *)((uint8_t *)ip +
3216 (ip->ihl << 2));
3217 if (ntohs(udp->dest) == 67) {
3218 offset = (uint8_t *)udp + 8 - skb->data;
3219 length = skb->len - offset;
3220
3221 return e1000_mng_write_dhcp_info(hw,
3222 (uint8_t *)udp + 8,
3223 length);
3224 }
3225 }
3226 }
3227 }
3228 return 0;
3229 }
3230
3231 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3232 {
3233 struct e1000_adapter *adapter = netdev_priv(netdev);
3234 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3235
3236 netif_stop_queue(netdev);
3237 /* Herbert's original patch had:
3238 * smp_mb__after_netif_stop_queue();
3239 * but since that doesn't exist yet, just open code it. */
3240 smp_mb();
3241
3242 /* We need to check again in a case another CPU has just
3243 * made room available. */
3244 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3245 return -EBUSY;
3246
3247 /* A reprieve! */
3248 netif_start_queue(netdev);
3249 ++adapter->restart_queue;
3250 return 0;
3251 }
3252
3253 static int e1000_maybe_stop_tx(struct net_device *netdev,
3254 struct e1000_tx_ring *tx_ring, int size)
3255 {
3256 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3257 return 0;
3258 return __e1000_maybe_stop_tx(netdev, size);
3259 }
3260
3261 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3262 static int
3263 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3264 {
3265 struct e1000_adapter *adapter = netdev_priv(netdev);
3266 struct e1000_tx_ring *tx_ring;
3267 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3268 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3269 unsigned int tx_flags = 0;
3270 unsigned int len = skb->len;
3271 unsigned long flags;
3272 unsigned int nr_frags = 0;
3273 unsigned int mss = 0;
3274 int count = 0;
3275 int tso;
3276 unsigned int f;
3277 len -= skb->data_len;
3278
3279 /* This goes back to the question of how to logically map a tx queue
3280 * to a flow. Right now, performance is impacted slightly negatively
3281 * if using multiple tx queues. If the stack breaks away from a
3282 * single qdisc implementation, we can look at this again. */
3283 tx_ring = adapter->tx_ring;
3284
3285 if (unlikely(skb->len <= 0)) {
3286 dev_kfree_skb_any(skb);
3287 return NETDEV_TX_OK;
3288 }
3289
3290 /* 82571 and newer doesn't need the workaround that limited descriptor
3291 * length to 4kB */
3292 if (adapter->hw.mac_type >= e1000_82571)
3293 max_per_txd = 8192;
3294
3295 #ifdef NETIF_F_TSO
3296 mss = skb_shinfo(skb)->gso_size;
3297 /* The controller does a simple calculation to
3298 * make sure there is enough room in the FIFO before
3299 * initiating the DMA for each buffer. The calc is:
3300 * 4 = ceil(buffer len/mss). To make sure we don't
3301 * overrun the FIFO, adjust the max buffer len if mss
3302 * drops. */
3303 if (mss) {
3304 uint8_t hdr_len;
3305 max_per_txd = min(mss << 2, max_per_txd);
3306 max_txd_pwr = fls(max_per_txd) - 1;
3307
3308 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3309 * points to just header, pull a few bytes of payload from
3310 * frags into skb->data */
3311 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3312 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3313 switch (adapter->hw.mac_type) {
3314 unsigned int pull_size;
3315 case e1000_82544:
3316 /* Make sure we have room to chop off 4 bytes,
3317 * and that the end alignment will work out to
3318 * this hardware's requirements
3319 * NOTE: this is a TSO only workaround
3320 * if end byte alignment not correct move us
3321 * into the next dword */
3322 if ((unsigned long)(skb->tail - 1) & 4)
3323 break;
3324 /* fall through */
3325 case e1000_82571:
3326 case e1000_82572:
3327 case e1000_82573:
3328 case e1000_ich8lan:
3329 pull_size = min((unsigned int)4, skb->data_len);
3330 if (!__pskb_pull_tail(skb, pull_size)) {
3331 DPRINTK(DRV, ERR,
3332 "__pskb_pull_tail failed.\n");
3333 dev_kfree_skb_any(skb);
3334 return NETDEV_TX_OK;
3335 }
3336 len = skb->len - skb->data_len;
3337 break;
3338 default:
3339 /* do nothing */
3340 break;
3341 }
3342 }
3343 }
3344
3345 /* reserve a descriptor for the offload context */
3346 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3347 count++;
3348 count++;
3349 #else
3350 if (skb->ip_summed == CHECKSUM_PARTIAL)
3351 count++;
3352 #endif
3353
3354 #ifdef NETIF_F_TSO
3355 /* Controller Erratum workaround */
3356 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3357 count++;
3358 #endif
3359
3360 count += TXD_USE_COUNT(len, max_txd_pwr);
3361
3362 if (adapter->pcix_82544)
3363 count++;
3364
3365 /* work-around for errata 10 and it applies to all controllers
3366 * in PCI-X mode, so add one more descriptor to the count
3367 */
3368 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3369 (len > 2015)))
3370 count++;
3371
3372 nr_frags = skb_shinfo(skb)->nr_frags;
3373 for (f = 0; f < nr_frags; f++)
3374 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3375 max_txd_pwr);
3376 if (adapter->pcix_82544)
3377 count += nr_frags;
3378
3379
3380 if (adapter->hw.tx_pkt_filtering &&
3381 (adapter->hw.mac_type == e1000_82573))
3382 e1000_transfer_dhcp_info(adapter, skb);
3383
3384 local_irq_save(flags);
3385 if (!spin_trylock(&tx_ring->tx_lock)) {
3386 /* Collision - tell upper layer to requeue */
3387 local_irq_restore(flags);
3388 return NETDEV_TX_LOCKED;
3389 }
3390
3391 /* need: count + 2 desc gap to keep tail from touching
3392 * head, otherwise try next time */
3393 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3394 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3395 return NETDEV_TX_BUSY;
3396 }
3397
3398 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3399 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3400 netif_stop_queue(netdev);
3401 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3402 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3403 return NETDEV_TX_BUSY;
3404 }
3405 }
3406
3407 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3408 tx_flags |= E1000_TX_FLAGS_VLAN;
3409 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3410 }
3411
3412 first = tx_ring->next_to_use;
3413
3414 tso = e1000_tso(adapter, tx_ring, skb);
3415 if (tso < 0) {
3416 dev_kfree_skb_any(skb);
3417 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3418 return NETDEV_TX_OK;
3419 }
3420
3421 if (likely(tso)) {
3422 tx_ring->last_tx_tso = 1;
3423 tx_flags |= E1000_TX_FLAGS_TSO;
3424 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3425 tx_flags |= E1000_TX_FLAGS_CSUM;
3426
3427 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3428 * 82571 hardware supports TSO capabilities for IPv6 as well...
3429 * no longer assume, we must. */
3430 if (likely(skb->protocol == htons(ETH_P_IP)))
3431 tx_flags |= E1000_TX_FLAGS_IPV4;
3432
3433 e1000_tx_queue(adapter, tx_ring, tx_flags,
3434 e1000_tx_map(adapter, tx_ring, skb, first,
3435 max_per_txd, nr_frags, mss));
3436
3437 netdev->trans_start = jiffies;
3438
3439 /* Make sure there is space in the ring for the next send. */
3440 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3441
3442 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3443 return NETDEV_TX_OK;
3444 }
3445
3446 /**
3447 * e1000_tx_timeout - Respond to a Tx Hang
3448 * @netdev: network interface device structure
3449 **/
3450
3451 static void
3452 e1000_tx_timeout(struct net_device *netdev)
3453 {
3454 struct e1000_adapter *adapter = netdev_priv(netdev);
3455
3456 /* Do the reset outside of interrupt context */
3457 adapter->tx_timeout_count++;
3458 schedule_work(&adapter->reset_task);
3459 }
3460
3461 static void
3462 e1000_reset_task(struct work_struct *work)
3463 {
3464 struct e1000_adapter *adapter =
3465 container_of(work, struct e1000_adapter, reset_task);
3466
3467 e1000_reinit_locked(adapter);
3468 }
3469
3470 /**
3471 * e1000_get_stats - Get System Network Statistics
3472 * @netdev: network interface device structure
3473 *
3474 * Returns the address of the device statistics structure.
3475 * The statistics are actually updated from the timer callback.
3476 **/
3477
3478 static struct net_device_stats *
3479 e1000_get_stats(struct net_device *netdev)
3480 {
3481 struct e1000_adapter *adapter = netdev_priv(netdev);
3482
3483 /* only return the current stats */
3484 return &adapter->net_stats;
3485 }
3486
3487 /**
3488 * e1000_change_mtu - Change the Maximum Transfer Unit
3489 * @netdev: network interface device structure
3490 * @new_mtu: new value for maximum frame size
3491 *
3492 * Returns 0 on success, negative on failure
3493 **/
3494
3495 static int
3496 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3497 {
3498 struct e1000_adapter *adapter = netdev_priv(netdev);
3499 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3500 uint16_t eeprom_data = 0;
3501
3502 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3503 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3504 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3505 return -EINVAL;
3506 }
3507
3508 /* Adapter-specific max frame size limits. */
3509 switch (adapter->hw.mac_type) {
3510 case e1000_undefined ... e1000_82542_rev2_1:
3511 case e1000_ich8lan:
3512 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3513 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3514 return -EINVAL;
3515 }
3516 break;
3517 case e1000_82573:
3518 /* Jumbo Frames not supported if:
3519 * - this is not an 82573L device
3520 * - ASPM is enabled in any way (0x1A bits 3:2) */
3521 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3522 &eeprom_data);
3523 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3524 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3525 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3526 DPRINTK(PROBE, ERR,
3527 "Jumbo Frames not supported.\n");
3528 return -EINVAL;
3529 }
3530 break;
3531 }
3532 /* ERT will be enabled later to enable wire speed receives */
3533
3534 /* fall through to get support */
3535 case e1000_82571:
3536 case e1000_82572:
3537 case e1000_80003es2lan:
3538 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3539 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3540 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3541 return -EINVAL;
3542 }
3543 break;
3544 default:
3545 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3546 break;
3547 }
3548
3549 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3550 * means we reserve 2 more, this pushes us to allocate from the next
3551 * larger slab size
3552 * i.e. RXBUFFER_2048 --> size-4096 slab */
3553
3554 if (max_frame <= E1000_RXBUFFER_256)
3555 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3556 else if (max_frame <= E1000_RXBUFFER_512)
3557 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3558 else if (max_frame <= E1000_RXBUFFER_1024)
3559 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3560 else if (max_frame <= E1000_RXBUFFER_2048)
3561 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3562 else if (max_frame <= E1000_RXBUFFER_4096)
3563 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3564 else if (max_frame <= E1000_RXBUFFER_8192)
3565 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3566 else if (max_frame <= E1000_RXBUFFER_16384)
3567 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3568
3569 /* adjust allocation if LPE protects us, and we aren't using SBP */
3570 if (!adapter->hw.tbi_compatibility_on &&
3571 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3572 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3573 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3574
3575 netdev->mtu = new_mtu;
3576 adapter->hw.max_frame_size = max_frame;
3577
3578 if (netif_running(netdev))
3579 e1000_reinit_locked(adapter);
3580
3581 return 0;
3582 }
3583
3584 /**
3585 * e1000_update_stats - Update the board statistics counters
3586 * @adapter: board private structure
3587 **/
3588
3589 void
3590 e1000_update_stats(struct e1000_adapter *adapter)
3591 {
3592 struct e1000_hw *hw = &adapter->hw;
3593 struct pci_dev *pdev = adapter->pdev;
3594 unsigned long flags;
3595 uint16_t phy_tmp;
3596
3597 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3598
3599 /*
3600 * Prevent stats update while adapter is being reset, or if the pci
3601 * connection is down.
3602 */
3603 if (adapter->link_speed == 0)
3604 return;
3605 if (pci_channel_offline(pdev))
3606 return;
3607
3608 spin_lock_irqsave(&adapter->stats_lock, flags);
3609
3610 /* these counters are modified from e1000_adjust_tbi_stats,
3611 * called from the interrupt context, so they must only
3612 * be written while holding adapter->stats_lock
3613 */
3614
3615 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3616 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3617 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3618 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3619 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3620 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3621 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3622
3623 if (adapter->hw.mac_type != e1000_ich8lan) {
3624 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3625 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3626 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3627 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3628 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3629 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3630 }
3631
3632 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3633 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3634 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3635 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3636 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3637 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3638 adapter->stats.dc += E1000_READ_REG(hw, DC);
3639 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3640 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3641 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3642 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3643 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3644 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3645 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3646 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3647 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3648 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3649 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3650 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3651 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3652 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3653 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3654 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3655 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3656 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3657 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3658
3659 if (adapter->hw.mac_type != e1000_ich8lan) {
3660 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3661 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3662 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3663 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3664 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3665 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3666 }
3667
3668 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3669 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3670
3671 /* used for adaptive IFS */
3672
3673 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3674 adapter->stats.tpt += hw->tx_packet_delta;
3675 hw->collision_delta = E1000_READ_REG(hw, COLC);
3676 adapter->stats.colc += hw->collision_delta;
3677
3678 if (hw->mac_type >= e1000_82543) {
3679 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3680 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3681 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3682 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3683 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3684 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3685 }
3686 if (hw->mac_type > e1000_82547_rev_2) {
3687 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3688 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3689
3690 if (adapter->hw.mac_type != e1000_ich8lan) {
3691 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3692 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3693 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3694 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3695 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3696 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3697 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3698 }
3699 }
3700
3701 /* Fill out the OS statistics structure */
3702 adapter->net_stats.rx_packets = adapter->stats.gprc;
3703 adapter->net_stats.tx_packets = adapter->stats.gptc;
3704 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3705 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3706 adapter->net_stats.multicast = adapter->stats.mprc;
3707 adapter->net_stats.collisions = adapter->stats.colc;
3708
3709 /* Rx Errors */
3710
3711 /* RLEC on some newer hardware can be incorrect so build
3712 * our own version based on RUC and ROC */
3713 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3714 adapter->stats.crcerrs + adapter->stats.algnerrc +
3715 adapter->stats.ruc + adapter->stats.roc +
3716 adapter->stats.cexterr;
3717 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3718 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3719 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3720 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3721 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3722
3723 /* Tx Errors */
3724 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3725 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3726 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3727 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3728 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3729 if (adapter->hw.bad_tx_carr_stats_fd &&
3730 adapter->link_duplex == FULL_DUPLEX) {
3731 adapter->net_stats.tx_carrier_errors = 0;
3732 adapter->stats.tncrs = 0;
3733 }
3734
3735 /* Tx Dropped needs to be maintained elsewhere */
3736
3737 /* Phy Stats */
3738 if (hw->media_type == e1000_media_type_copper) {
3739 if ((adapter->link_speed == SPEED_1000) &&
3740 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3741 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3742 adapter->phy_stats.idle_errors += phy_tmp;
3743 }
3744
3745 if ((hw->mac_type <= e1000_82546) &&
3746 (hw->phy_type == e1000_phy_m88) &&
3747 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3748 adapter->phy_stats.receive_errors += phy_tmp;
3749 }
3750
3751 /* Management Stats */
3752 if (adapter->hw.has_smbus) {
3753 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3754 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3755 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3756 }
3757
3758 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3759 }
3760 #ifdef CONFIG_PCI_MSI
3761
3762 /**
3763 * e1000_intr_msi - Interrupt Handler
3764 * @irq: interrupt number
3765 * @data: pointer to a network interface device structure
3766 **/
3767
3768 static
3769 irqreturn_t e1000_intr_msi(int irq, void *data)
3770 {
3771 struct net_device *netdev = data;
3772 struct e1000_adapter *adapter = netdev_priv(netdev);
3773 struct e1000_hw *hw = &adapter->hw;
3774 #ifndef CONFIG_E1000_NAPI
3775 int i;
3776 #endif
3777
3778 /* this code avoids the read of ICR but has to get 1000 interrupts
3779 * at every link change event before it will notice the change */
3780 if (++adapter->detect_link >= 1000) {
3781 uint32_t icr = E1000_READ_REG(hw, ICR);
3782 #ifdef CONFIG_E1000_NAPI
3783 /* read ICR disables interrupts using IAM, so keep up with our
3784 * enable/disable accounting */
3785 atomic_inc(&adapter->irq_sem);
3786 #endif
3787 adapter->detect_link = 0;
3788 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3789 (icr & E1000_ICR_INT_ASSERTED)) {
3790 hw->get_link_status = 1;
3791 /* 80003ES2LAN workaround--
3792 * For packet buffer work-around on link down event;
3793 * disable receives here in the ISR and
3794 * reset adapter in watchdog
3795 */
3796 if (netif_carrier_ok(netdev) &&
3797 (adapter->hw.mac_type == e1000_80003es2lan)) {
3798 /* disable receives */
3799 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3800 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3801 }
3802 /* guard against interrupt when we're going down */
3803 if (!test_bit(__E1000_DOWN, &adapter->flags))
3804 mod_timer(&adapter->watchdog_timer,
3805 jiffies + 1);
3806 }
3807 } else {
3808 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3809 E1000_ICR_LSC)));
3810 /* bummer we have to flush here, but things break otherwise as
3811 * some event appears to be lost or delayed and throughput
3812 * drops. In almost all tests this flush is un-necessary */
3813 E1000_WRITE_FLUSH(hw);
3814 #ifdef CONFIG_E1000_NAPI
3815 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3816 * masked. No need for the IMC write, but it does mean we
3817 * should account for it ASAP. */
3818 atomic_inc(&adapter->irq_sem);
3819 #endif
3820 }
3821
3822 #ifdef CONFIG_E1000_NAPI
3823 if (likely(netif_rx_schedule_prep(netdev))) {
3824 adapter->total_tx_bytes = 0;
3825 adapter->total_tx_packets = 0;
3826 adapter->total_rx_bytes = 0;
3827 adapter->total_rx_packets = 0;
3828 __netif_rx_schedule(netdev);
3829 } else
3830 e1000_irq_enable(adapter);
3831 #else
3832 adapter->total_tx_bytes = 0;
3833 adapter->total_rx_bytes = 0;
3834 adapter->total_tx_packets = 0;
3835 adapter->total_rx_packets = 0;
3836
3837 for (i = 0; i < E1000_MAX_INTR; i++)
3838 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3839 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3840 break;
3841
3842 if (likely(adapter->itr_setting & 3))
3843 e1000_set_itr(adapter);
3844 #endif
3845
3846 return IRQ_HANDLED;
3847 }
3848 #endif
3849
3850 /**
3851 * e1000_intr - Interrupt Handler
3852 * @irq: interrupt number
3853 * @data: pointer to a network interface device structure
3854 **/
3855
3856 static irqreturn_t
3857 e1000_intr(int irq, void *data)
3858 {
3859 struct net_device *netdev = data;
3860 struct e1000_adapter *adapter = netdev_priv(netdev);
3861 struct e1000_hw *hw = &adapter->hw;
3862 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3863 #ifndef CONFIG_E1000_NAPI
3864 int i;
3865 #endif
3866 if (unlikely(!icr))
3867 return IRQ_NONE; /* Not our interrupt */
3868
3869 #ifdef CONFIG_E1000_NAPI
3870 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3871 * not set, then the adapter didn't send an interrupt */
3872 if (unlikely(hw->mac_type >= e1000_82571 &&
3873 !(icr & E1000_ICR_INT_ASSERTED)))
3874 return IRQ_NONE;
3875
3876 /* Interrupt Auto-Mask...upon reading ICR,
3877 * interrupts are masked. No need for the
3878 * IMC write, but it does mean we should
3879 * account for it ASAP. */
3880 if (likely(hw->mac_type >= e1000_82571))
3881 atomic_inc(&adapter->irq_sem);
3882 #endif
3883
3884 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3885 hw->get_link_status = 1;
3886 /* 80003ES2LAN workaround--
3887 * For packet buffer work-around on link down event;
3888 * disable receives here in the ISR and
3889 * reset adapter in watchdog
3890 */
3891 if (netif_carrier_ok(netdev) &&
3892 (adapter->hw.mac_type == e1000_80003es2lan)) {
3893 /* disable receives */
3894 rctl = E1000_READ_REG(hw, RCTL);
3895 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3896 }
3897 /* guard against interrupt when we're going down */
3898 if (!test_bit(__E1000_DOWN, &adapter->flags))
3899 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3900 }
3901
3902 #ifdef CONFIG_E1000_NAPI
3903 if (unlikely(hw->mac_type < e1000_82571)) {
3904 /* disable interrupts, without the synchronize_irq bit */
3905 atomic_inc(&adapter->irq_sem);
3906 E1000_WRITE_REG(hw, IMC, ~0);
3907 E1000_WRITE_FLUSH(hw);
3908 }
3909 if (likely(netif_rx_schedule_prep(netdev))) {
3910 adapter->total_tx_bytes = 0;
3911 adapter->total_tx_packets = 0;
3912 adapter->total_rx_bytes = 0;
3913 adapter->total_rx_packets = 0;
3914 __netif_rx_schedule(netdev);
3915 } else
3916 /* this really should not happen! if it does it is basically a
3917 * bug, but not a hard error, so enable ints and continue */
3918 e1000_irq_enable(adapter);
3919 #else
3920 /* Writing IMC and IMS is needed for 82547.
3921 * Due to Hub Link bus being occupied, an interrupt
3922 * de-assertion message is not able to be sent.
3923 * When an interrupt assertion message is generated later,
3924 * two messages are re-ordered and sent out.
3925 * That causes APIC to think 82547 is in de-assertion
3926 * state, while 82547 is in assertion state, resulting
3927 * in dead lock. Writing IMC forces 82547 into
3928 * de-assertion state.
3929 */
3930 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3931 atomic_inc(&adapter->irq_sem);
3932 E1000_WRITE_REG(hw, IMC, ~0);
3933 }
3934
3935 adapter->total_tx_bytes = 0;
3936 adapter->total_rx_bytes = 0;
3937 adapter->total_tx_packets = 0;
3938 adapter->total_rx_packets = 0;
3939
3940 for (i = 0; i < E1000_MAX_INTR; i++)
3941 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3942 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3943 break;
3944
3945 if (likely(adapter->itr_setting & 3))
3946 e1000_set_itr(adapter);
3947
3948 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3949 e1000_irq_enable(adapter);
3950
3951 #endif
3952 return IRQ_HANDLED;
3953 }
3954
3955 #ifdef CONFIG_E1000_NAPI
3956 /**
3957 * e1000_clean - NAPI Rx polling callback
3958 * @adapter: board private structure
3959 **/
3960
3961 static int
3962 e1000_clean(struct net_device *poll_dev, int *budget)
3963 {
3964 struct e1000_adapter *adapter;
3965 int work_to_do = min(*budget, poll_dev->quota);
3966 int tx_cleaned = 0, work_done = 0;
3967
3968 /* Must NOT use netdev_priv macro here. */
3969 adapter = poll_dev->priv;
3970
3971 /* Keep link state information with original netdev */
3972 if (!netif_carrier_ok(poll_dev))
3973 goto quit_polling;
3974
3975 /* e1000_clean is called per-cpu. This lock protects
3976 * tx_ring[0] from being cleaned by multiple cpus
3977 * simultaneously. A failure obtaining the lock means
3978 * tx_ring[0] is currently being cleaned anyway. */
3979 if (spin_trylock(&adapter->tx_queue_lock)) {
3980 tx_cleaned = e1000_clean_tx_irq(adapter,
3981 &adapter->tx_ring[0]);
3982 spin_unlock(&adapter->tx_queue_lock);
3983 }
3984
3985 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3986 &work_done, work_to_do);
3987
3988 *budget -= work_done;
3989 poll_dev->quota -= work_done;
3990
3991 /* If no Tx and not enough Rx work done, exit the polling mode */
3992 if ((!tx_cleaned && (work_done == 0)) ||
3993 !netif_running(poll_dev)) {
3994 quit_polling:
3995 if (likely(adapter->itr_setting & 3))
3996 e1000_set_itr(adapter);
3997 netif_rx_complete(poll_dev);
3998 e1000_irq_enable(adapter);
3999 return 0;
4000 }
4001
4002 return 1;
4003 }
4004
4005 #endif
4006 /**
4007 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4008 * @adapter: board private structure
4009 **/
4010
4011 static boolean_t
4012 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4013 struct e1000_tx_ring *tx_ring)
4014 {
4015 struct net_device *netdev = adapter->netdev;
4016 struct e1000_tx_desc *tx_desc, *eop_desc;
4017 struct e1000_buffer *buffer_info;
4018 unsigned int i, eop;
4019 #ifdef CONFIG_E1000_NAPI
4020 unsigned int count = 0;
4021 #endif
4022 boolean_t cleaned = FALSE;
4023 unsigned int total_tx_bytes=0, total_tx_packets=0;
4024
4025 i = tx_ring->next_to_clean;
4026 eop = tx_ring->buffer_info[i].next_to_watch;
4027 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4028
4029 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4030 for (cleaned = FALSE; !cleaned; ) {
4031 tx_desc = E1000_TX_DESC(*tx_ring, i);
4032 buffer_info = &tx_ring->buffer_info[i];
4033 cleaned = (i == eop);
4034
4035 if (cleaned) {
4036 struct sk_buff *skb = buffer_info->skb;
4037 unsigned int segs = skb_shinfo(skb)->gso_segs;
4038 total_tx_packets += segs;
4039 total_tx_packets++;
4040 total_tx_bytes += skb->len;
4041 }
4042 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4043 tx_desc->upper.data = 0;
4044
4045 if (unlikely(++i == tx_ring->count)) i = 0;
4046 }
4047
4048 eop = tx_ring->buffer_info[i].next_to_watch;
4049 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4050 #ifdef CONFIG_E1000_NAPI
4051 #define E1000_TX_WEIGHT 64
4052 /* weight of a sort for tx, to avoid endless transmit cleanup */
4053 if (count++ == E1000_TX_WEIGHT) break;
4054 #endif
4055 }
4056
4057 tx_ring->next_to_clean = i;
4058
4059 #define TX_WAKE_THRESHOLD 32
4060 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4061 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4062 /* Make sure that anybody stopping the queue after this
4063 * sees the new next_to_clean.
4064 */
4065 smp_mb();
4066 if (netif_queue_stopped(netdev)) {
4067 netif_wake_queue(netdev);
4068 ++adapter->restart_queue;
4069 }
4070 }
4071
4072 if (adapter->detect_tx_hung) {
4073 /* Detect a transmit hang in hardware, this serializes the
4074 * check with the clearing of time_stamp and movement of i */
4075 adapter->detect_tx_hung = FALSE;
4076 if (tx_ring->buffer_info[eop].dma &&
4077 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4078 (adapter->tx_timeout_factor * HZ))
4079 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4080 E1000_STATUS_TXOFF)) {
4081
4082 /* detected Tx unit hang */
4083 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4084 " Tx Queue <%lu>\n"
4085 " TDH <%x>\n"
4086 " TDT <%x>\n"
4087 " next_to_use <%x>\n"
4088 " next_to_clean <%x>\n"
4089 "buffer_info[next_to_clean]\n"
4090 " time_stamp <%lx>\n"
4091 " next_to_watch <%x>\n"
4092 " jiffies <%lx>\n"
4093 " next_to_watch.status <%x>\n",
4094 (unsigned long)((tx_ring - adapter->tx_ring) /
4095 sizeof(struct e1000_tx_ring)),
4096 readl(adapter->hw.hw_addr + tx_ring->tdh),
4097 readl(adapter->hw.hw_addr + tx_ring->tdt),
4098 tx_ring->next_to_use,
4099 tx_ring->next_to_clean,
4100 tx_ring->buffer_info[eop].time_stamp,
4101 eop,
4102 jiffies,
4103 eop_desc->upper.fields.status);
4104 netif_stop_queue(netdev);
4105 }
4106 }
4107 adapter->total_tx_bytes += total_tx_bytes;
4108 adapter->total_tx_packets += total_tx_packets;
4109 return cleaned;
4110 }
4111
4112 /**
4113 * e1000_rx_checksum - Receive Checksum Offload for 82543
4114 * @adapter: board private structure
4115 * @status_err: receive descriptor status and error fields
4116 * @csum: receive descriptor csum field
4117 * @sk_buff: socket buffer with received data
4118 **/
4119
4120 static void
4121 e1000_rx_checksum(struct e1000_adapter *adapter,
4122 uint32_t status_err, uint32_t csum,
4123 struct sk_buff *skb)
4124 {
4125 uint16_t status = (uint16_t)status_err;
4126 uint8_t errors = (uint8_t)(status_err >> 24);
4127 skb->ip_summed = CHECKSUM_NONE;
4128
4129 /* 82543 or newer only */
4130 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4131 /* Ignore Checksum bit is set */
4132 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4133 /* TCP/UDP checksum error bit is set */
4134 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4135 /* let the stack verify checksum errors */
4136 adapter->hw_csum_err++;
4137 return;
4138 }
4139 /* TCP/UDP Checksum has not been calculated */
4140 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4141 if (!(status & E1000_RXD_STAT_TCPCS))
4142 return;
4143 } else {
4144 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4145 return;
4146 }
4147 /* It must be a TCP or UDP packet with a valid checksum */
4148 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4149 /* TCP checksum is good */
4150 skb->ip_summed = CHECKSUM_UNNECESSARY;
4151 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4152 /* IP fragment with UDP payload */
4153 /* Hardware complements the payload checksum, so we undo it
4154 * and then put the value in host order for further stack use.
4155 */
4156 csum = ntohl(csum ^ 0xFFFF);
4157 skb->csum = csum;
4158 skb->ip_summed = CHECKSUM_COMPLETE;
4159 }
4160 adapter->hw_csum_good++;
4161 }
4162
4163 /**
4164 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4165 * @adapter: board private structure
4166 **/
4167
4168 static boolean_t
4169 #ifdef CONFIG_E1000_NAPI
4170 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4171 struct e1000_rx_ring *rx_ring,
4172 int *work_done, int work_to_do)
4173 #else
4174 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4175 struct e1000_rx_ring *rx_ring)
4176 #endif
4177 {
4178 struct net_device *netdev = adapter->netdev;
4179 struct pci_dev *pdev = adapter->pdev;
4180 struct e1000_rx_desc *rx_desc, *next_rxd;
4181 struct e1000_buffer *buffer_info, *next_buffer;
4182 unsigned long flags;
4183 uint32_t length;
4184 uint8_t last_byte;
4185 unsigned int i;
4186 int cleaned_count = 0;
4187 boolean_t cleaned = FALSE;
4188 unsigned int total_rx_bytes=0, total_rx_packets=0;
4189
4190 i = rx_ring->next_to_clean;
4191 rx_desc = E1000_RX_DESC(*rx_ring, i);
4192 buffer_info = &rx_ring->buffer_info[i];
4193
4194 while (rx_desc->status & E1000_RXD_STAT_DD) {
4195 struct sk_buff *skb;
4196 u8 status;
4197
4198 #ifdef CONFIG_E1000_NAPI
4199 if (*work_done >= work_to_do)
4200 break;
4201 (*work_done)++;
4202 #endif
4203 status = rx_desc->status;
4204 skb = buffer_info->skb;
4205 buffer_info->skb = NULL;
4206
4207 prefetch(skb->data - NET_IP_ALIGN);
4208
4209 if (++i == rx_ring->count) i = 0;
4210 next_rxd = E1000_RX_DESC(*rx_ring, i);
4211 prefetch(next_rxd);
4212
4213 next_buffer = &rx_ring->buffer_info[i];
4214
4215 cleaned = TRUE;
4216 cleaned_count++;
4217 pci_unmap_single(pdev,
4218 buffer_info->dma,
4219 buffer_info->length,
4220 PCI_DMA_FROMDEVICE);
4221
4222 length = le16_to_cpu(rx_desc->length);
4223
4224 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4225 /* All receives must fit into a single buffer */
4226 E1000_DBG("%s: Receive packet consumed multiple"
4227 " buffers\n", netdev->name);
4228 /* recycle */
4229 buffer_info->skb = skb;
4230 goto next_desc;
4231 }
4232
4233 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4234 last_byte = *(skb->data + length - 1);
4235 if (TBI_ACCEPT(&adapter->hw, status,
4236 rx_desc->errors, length, last_byte)) {
4237 spin_lock_irqsave(&adapter->stats_lock, flags);
4238 e1000_tbi_adjust_stats(&adapter->hw,
4239 &adapter->stats,
4240 length, skb->data);
4241 spin_unlock_irqrestore(&adapter->stats_lock,
4242 flags);
4243 length--;
4244 } else {
4245 /* recycle */
4246 buffer_info->skb = skb;
4247 goto next_desc;
4248 }
4249 }
4250
4251 /* adjust length to remove Ethernet CRC, this must be
4252 * done after the TBI_ACCEPT workaround above */
4253 length -= 4;
4254
4255 /* probably a little skewed due to removing CRC */
4256 total_rx_bytes += length;
4257 total_rx_packets++;
4258
4259 /* code added for copybreak, this should improve
4260 * performance for small packets with large amounts
4261 * of reassembly being done in the stack */
4262 if (length < copybreak) {
4263 struct sk_buff *new_skb =
4264 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4265 if (new_skb) {
4266 skb_reserve(new_skb, NET_IP_ALIGN);
4267 memcpy(new_skb->data - NET_IP_ALIGN,
4268 skb->data - NET_IP_ALIGN,
4269 length + NET_IP_ALIGN);
4270 /* save the skb in buffer_info as good */
4271 buffer_info->skb = skb;
4272 skb = new_skb;
4273 }
4274 /* else just continue with the old one */
4275 }
4276 /* end copybreak code */
4277 skb_put(skb, length);
4278
4279 /* Receive Checksum Offload */
4280 e1000_rx_checksum(adapter,
4281 (uint32_t)(status) |
4282 ((uint32_t)(rx_desc->errors) << 24),
4283 le16_to_cpu(rx_desc->csum), skb);
4284
4285 skb->protocol = eth_type_trans(skb, netdev);
4286 #ifdef CONFIG_E1000_NAPI
4287 if (unlikely(adapter->vlgrp &&
4288 (status & E1000_RXD_STAT_VP))) {
4289 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4290 le16_to_cpu(rx_desc->special) &
4291 E1000_RXD_SPC_VLAN_MASK);
4292 } else {
4293 netif_receive_skb(skb);
4294 }
4295 #else /* CONFIG_E1000_NAPI */
4296 if (unlikely(adapter->vlgrp &&
4297 (status & E1000_RXD_STAT_VP))) {
4298 vlan_hwaccel_rx(skb, adapter->vlgrp,
4299 le16_to_cpu(rx_desc->special) &
4300 E1000_RXD_SPC_VLAN_MASK);
4301 } else {
4302 netif_rx(skb);
4303 }
4304 #endif /* CONFIG_E1000_NAPI */
4305 netdev->last_rx = jiffies;
4306
4307 next_desc:
4308 rx_desc->status = 0;
4309
4310 /* return some buffers to hardware, one at a time is too slow */
4311 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4312 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4313 cleaned_count = 0;
4314 }
4315
4316 /* use prefetched values */
4317 rx_desc = next_rxd;
4318 buffer_info = next_buffer;
4319 }
4320 rx_ring->next_to_clean = i;
4321
4322 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4323 if (cleaned_count)
4324 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4325
4326 adapter->total_rx_packets += total_rx_packets;
4327 adapter->total_rx_bytes += total_rx_bytes;
4328 return cleaned;
4329 }
4330
4331 /**
4332 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4333 * @adapter: board private structure
4334 **/
4335
4336 static boolean_t
4337 #ifdef CONFIG_E1000_NAPI
4338 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4339 struct e1000_rx_ring *rx_ring,
4340 int *work_done, int work_to_do)
4341 #else
4342 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4343 struct e1000_rx_ring *rx_ring)
4344 #endif
4345 {
4346 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4347 struct net_device *netdev = adapter->netdev;
4348 struct pci_dev *pdev = adapter->pdev;
4349 struct e1000_buffer *buffer_info, *next_buffer;
4350 struct e1000_ps_page *ps_page;
4351 struct e1000_ps_page_dma *ps_page_dma;
4352 struct sk_buff *skb;
4353 unsigned int i, j;
4354 uint32_t length, staterr;
4355 int cleaned_count = 0;
4356 boolean_t cleaned = FALSE;
4357 unsigned int total_rx_bytes=0, total_rx_packets=0;
4358
4359 i = rx_ring->next_to_clean;
4360 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4361 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4362 buffer_info = &rx_ring->buffer_info[i];
4363
4364 while (staterr & E1000_RXD_STAT_DD) {
4365 ps_page = &rx_ring->ps_page[i];
4366 ps_page_dma = &rx_ring->ps_page_dma[i];
4367 #ifdef CONFIG_E1000_NAPI
4368 if (unlikely(*work_done >= work_to_do))
4369 break;
4370 (*work_done)++;
4371 #endif
4372 skb = buffer_info->skb;
4373
4374 /* in the packet split case this is header only */
4375 prefetch(skb->data - NET_IP_ALIGN);
4376
4377 if (++i == rx_ring->count) i = 0;
4378 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4379 prefetch(next_rxd);
4380
4381 next_buffer = &rx_ring->buffer_info[i];
4382
4383 cleaned = TRUE;
4384 cleaned_count++;
4385 pci_unmap_single(pdev, buffer_info->dma,
4386 buffer_info->length,
4387 PCI_DMA_FROMDEVICE);
4388
4389 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4390 E1000_DBG("%s: Packet Split buffers didn't pick up"
4391 " the full packet\n", netdev->name);
4392 dev_kfree_skb_irq(skb);
4393 goto next_desc;
4394 }
4395
4396 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4397 dev_kfree_skb_irq(skb);
4398 goto next_desc;
4399 }
4400
4401 length = le16_to_cpu(rx_desc->wb.middle.length0);
4402
4403 if (unlikely(!length)) {
4404 E1000_DBG("%s: Last part of the packet spanning"
4405 " multiple descriptors\n", netdev->name);
4406 dev_kfree_skb_irq(skb);
4407 goto next_desc;
4408 }
4409
4410 /* Good Receive */
4411 skb_put(skb, length);
4412
4413 {
4414 /* this looks ugly, but it seems compiler issues make it
4415 more efficient than reusing j */
4416 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4417
4418 /* page alloc/put takes too long and effects small packet
4419 * throughput, so unsplit small packets and save the alloc/put*/
4420 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4421 u8 *vaddr;
4422 /* there is no documentation about how to call
4423 * kmap_atomic, so we can't hold the mapping
4424 * very long */
4425 pci_dma_sync_single_for_cpu(pdev,
4426 ps_page_dma->ps_page_dma[0],
4427 PAGE_SIZE,
4428 PCI_DMA_FROMDEVICE);
4429 vaddr = kmap_atomic(ps_page->ps_page[0],
4430 KM_SKB_DATA_SOFTIRQ);
4431 memcpy(skb->tail, vaddr, l1);
4432 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4433 pci_dma_sync_single_for_device(pdev,
4434 ps_page_dma->ps_page_dma[0],
4435 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4436 /* remove the CRC */
4437 l1 -= 4;
4438 skb_put(skb, l1);
4439 goto copydone;
4440 } /* if */
4441 }
4442
4443 for (j = 0; j < adapter->rx_ps_pages; j++) {
4444 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4445 break;
4446 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4447 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4448 ps_page_dma->ps_page_dma[j] = 0;
4449 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4450 length);
4451 ps_page->ps_page[j] = NULL;
4452 skb->len += length;
4453 skb->data_len += length;
4454 skb->truesize += length;
4455 }
4456
4457 /* strip the ethernet crc, problem is we're using pages now so
4458 * this whole operation can get a little cpu intensive */
4459 pskb_trim(skb, skb->len - 4);
4460
4461 copydone:
4462 total_rx_bytes += skb->len;
4463 total_rx_packets++;
4464
4465 e1000_rx_checksum(adapter, staterr,
4466 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4467 skb->protocol = eth_type_trans(skb, netdev);
4468
4469 if (likely(rx_desc->wb.upper.header_status &
4470 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4471 adapter->rx_hdr_split++;
4472 #ifdef CONFIG_E1000_NAPI
4473 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4474 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4475 le16_to_cpu(rx_desc->wb.middle.vlan) &
4476 E1000_RXD_SPC_VLAN_MASK);
4477 } else {
4478 netif_receive_skb(skb);
4479 }
4480 #else /* CONFIG_E1000_NAPI */
4481 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4482 vlan_hwaccel_rx(skb, adapter->vlgrp,
4483 le16_to_cpu(rx_desc->wb.middle.vlan) &
4484 E1000_RXD_SPC_VLAN_MASK);
4485 } else {
4486 netif_rx(skb);
4487 }
4488 #endif /* CONFIG_E1000_NAPI */
4489 netdev->last_rx = jiffies;
4490
4491 next_desc:
4492 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4493 buffer_info->skb = NULL;
4494
4495 /* return some buffers to hardware, one at a time is too slow */
4496 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4497 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4498 cleaned_count = 0;
4499 }
4500
4501 /* use prefetched values */
4502 rx_desc = next_rxd;
4503 buffer_info = next_buffer;
4504
4505 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4506 }
4507 rx_ring->next_to_clean = i;
4508
4509 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4510 if (cleaned_count)
4511 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4512
4513 adapter->total_rx_packets += total_rx_packets;
4514 adapter->total_rx_bytes += total_rx_bytes;
4515 return cleaned;
4516 }
4517
4518 /**
4519 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4520 * @adapter: address of board private structure
4521 **/
4522
4523 static void
4524 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4525 struct e1000_rx_ring *rx_ring,
4526 int cleaned_count)
4527 {
4528 struct net_device *netdev = adapter->netdev;
4529 struct pci_dev *pdev = adapter->pdev;
4530 struct e1000_rx_desc *rx_desc;
4531 struct e1000_buffer *buffer_info;
4532 struct sk_buff *skb;
4533 unsigned int i;
4534 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4535
4536 i = rx_ring->next_to_use;
4537 buffer_info = &rx_ring->buffer_info[i];
4538
4539 while (cleaned_count--) {
4540 skb = buffer_info->skb;
4541 if (skb) {
4542 skb_trim(skb, 0);
4543 goto map_skb;
4544 }
4545
4546 skb = netdev_alloc_skb(netdev, bufsz);
4547 if (unlikely(!skb)) {
4548 /* Better luck next round */
4549 adapter->alloc_rx_buff_failed++;
4550 break;
4551 }
4552
4553 /* Fix for errata 23, can't cross 64kB boundary */
4554 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4555 struct sk_buff *oldskb = skb;
4556 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4557 "at %p\n", bufsz, skb->data);
4558 /* Try again, without freeing the previous */
4559 skb = netdev_alloc_skb(netdev, bufsz);
4560 /* Failed allocation, critical failure */
4561 if (!skb) {
4562 dev_kfree_skb(oldskb);
4563 break;
4564 }
4565
4566 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4567 /* give up */
4568 dev_kfree_skb(skb);
4569 dev_kfree_skb(oldskb);
4570 break; /* while !buffer_info->skb */
4571 }
4572
4573 /* Use new allocation */
4574 dev_kfree_skb(oldskb);
4575 }
4576 /* Make buffer alignment 2 beyond a 16 byte boundary
4577 * this will result in a 16 byte aligned IP header after
4578 * the 14 byte MAC header is removed
4579 */
4580 skb_reserve(skb, NET_IP_ALIGN);
4581
4582 buffer_info->skb = skb;
4583 buffer_info->length = adapter->rx_buffer_len;
4584 map_skb:
4585 buffer_info->dma = pci_map_single(pdev,
4586 skb->data,
4587 adapter->rx_buffer_len,
4588 PCI_DMA_FROMDEVICE);
4589
4590 /* Fix for errata 23, can't cross 64kB boundary */
4591 if (!e1000_check_64k_bound(adapter,
4592 (void *)(unsigned long)buffer_info->dma,
4593 adapter->rx_buffer_len)) {
4594 DPRINTK(RX_ERR, ERR,
4595 "dma align check failed: %u bytes at %p\n",
4596 adapter->rx_buffer_len,
4597 (void *)(unsigned long)buffer_info->dma);
4598 dev_kfree_skb(skb);
4599 buffer_info->skb = NULL;
4600
4601 pci_unmap_single(pdev, buffer_info->dma,
4602 adapter->rx_buffer_len,
4603 PCI_DMA_FROMDEVICE);
4604
4605 break; /* while !buffer_info->skb */
4606 }
4607 rx_desc = E1000_RX_DESC(*rx_ring, i);
4608 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4609
4610 if (unlikely(++i == rx_ring->count))
4611 i = 0;
4612 buffer_info = &rx_ring->buffer_info[i];
4613 }
4614
4615 if (likely(rx_ring->next_to_use != i)) {
4616 rx_ring->next_to_use = i;
4617 if (unlikely(i-- == 0))
4618 i = (rx_ring->count - 1);
4619
4620 /* Force memory writes to complete before letting h/w
4621 * know there are new descriptors to fetch. (Only
4622 * applicable for weak-ordered memory model archs,
4623 * such as IA-64). */
4624 wmb();
4625 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4626 }
4627 }
4628
4629 /**
4630 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4631 * @adapter: address of board private structure
4632 **/
4633
4634 static void
4635 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4636 struct e1000_rx_ring *rx_ring,
4637 int cleaned_count)
4638 {
4639 struct net_device *netdev = adapter->netdev;
4640 struct pci_dev *pdev = adapter->pdev;
4641 union e1000_rx_desc_packet_split *rx_desc;
4642 struct e1000_buffer *buffer_info;
4643 struct e1000_ps_page *ps_page;
4644 struct e1000_ps_page_dma *ps_page_dma;
4645 struct sk_buff *skb;
4646 unsigned int i, j;
4647
4648 i = rx_ring->next_to_use;
4649 buffer_info = &rx_ring->buffer_info[i];
4650 ps_page = &rx_ring->ps_page[i];
4651 ps_page_dma = &rx_ring->ps_page_dma[i];
4652
4653 while (cleaned_count--) {
4654 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4655
4656 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4657 if (j < adapter->rx_ps_pages) {
4658 if (likely(!ps_page->ps_page[j])) {
4659 ps_page->ps_page[j] =
4660 alloc_page(GFP_ATOMIC);
4661 if (unlikely(!ps_page->ps_page[j])) {
4662 adapter->alloc_rx_buff_failed++;
4663 goto no_buffers;
4664 }
4665 ps_page_dma->ps_page_dma[j] =
4666 pci_map_page(pdev,
4667 ps_page->ps_page[j],
4668 0, PAGE_SIZE,
4669 PCI_DMA_FROMDEVICE);
4670 }
4671 /* Refresh the desc even if buffer_addrs didn't
4672 * change because each write-back erases
4673 * this info.
4674 */
4675 rx_desc->read.buffer_addr[j+1] =
4676 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4677 } else
4678 rx_desc->read.buffer_addr[j+1] = ~0;
4679 }
4680
4681 skb = netdev_alloc_skb(netdev,
4682 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4683
4684 if (unlikely(!skb)) {
4685 adapter->alloc_rx_buff_failed++;
4686 break;
4687 }
4688
4689 /* Make buffer alignment 2 beyond a 16 byte boundary
4690 * this will result in a 16 byte aligned IP header after
4691 * the 14 byte MAC header is removed
4692 */
4693 skb_reserve(skb, NET_IP_ALIGN);
4694
4695 buffer_info->skb = skb;
4696 buffer_info->length = adapter->rx_ps_bsize0;
4697 buffer_info->dma = pci_map_single(pdev, skb->data,
4698 adapter->rx_ps_bsize0,
4699 PCI_DMA_FROMDEVICE);
4700
4701 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4702
4703 if (unlikely(++i == rx_ring->count)) i = 0;
4704 buffer_info = &rx_ring->buffer_info[i];
4705 ps_page = &rx_ring->ps_page[i];
4706 ps_page_dma = &rx_ring->ps_page_dma[i];
4707 }
4708
4709 no_buffers:
4710 if (likely(rx_ring->next_to_use != i)) {
4711 rx_ring->next_to_use = i;
4712 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4713
4714 /* Force memory writes to complete before letting h/w
4715 * know there are new descriptors to fetch. (Only
4716 * applicable for weak-ordered memory model archs,
4717 * such as IA-64). */
4718 wmb();
4719 /* Hardware increments by 16 bytes, but packet split
4720 * descriptors are 32 bytes...so we increment tail
4721 * twice as much.
4722 */
4723 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4724 }
4725 }
4726
4727 /**
4728 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4729 * @adapter:
4730 **/
4731
4732 static void
4733 e1000_smartspeed(struct e1000_adapter *adapter)
4734 {
4735 uint16_t phy_status;
4736 uint16_t phy_ctrl;
4737
4738 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4739 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4740 return;
4741
4742 if (adapter->smartspeed == 0) {
4743 /* If Master/Slave config fault is asserted twice,
4744 * we assume back-to-back */
4745 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4746 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4747 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4748 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4749 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4750 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4751 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4752 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4753 phy_ctrl);
4754 adapter->smartspeed++;
4755 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4756 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4757 &phy_ctrl)) {
4758 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4759 MII_CR_RESTART_AUTO_NEG);
4760 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4761 phy_ctrl);
4762 }
4763 }
4764 return;
4765 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4766 /* If still no link, perhaps using 2/3 pair cable */
4767 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4768 phy_ctrl |= CR_1000T_MS_ENABLE;
4769 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4770 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4771 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4772 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4773 MII_CR_RESTART_AUTO_NEG);
4774 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4775 }
4776 }
4777 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4778 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4779 adapter->smartspeed = 0;
4780 }
4781
4782 /**
4783 * e1000_ioctl -
4784 * @netdev:
4785 * @ifreq:
4786 * @cmd:
4787 **/
4788
4789 static int
4790 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4791 {
4792 switch (cmd) {
4793 case SIOCGMIIPHY:
4794 case SIOCGMIIREG:
4795 case SIOCSMIIREG:
4796 return e1000_mii_ioctl(netdev, ifr, cmd);
4797 default:
4798 return -EOPNOTSUPP;
4799 }
4800 }
4801
4802 /**
4803 * e1000_mii_ioctl -
4804 * @netdev:
4805 * @ifreq:
4806 * @cmd:
4807 **/
4808
4809 static int
4810 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4811 {
4812 struct e1000_adapter *adapter = netdev_priv(netdev);
4813 struct mii_ioctl_data *data = if_mii(ifr);
4814 int retval;
4815 uint16_t mii_reg;
4816 uint16_t spddplx;
4817 unsigned long flags;
4818
4819 if (adapter->hw.media_type != e1000_media_type_copper)
4820 return -EOPNOTSUPP;
4821
4822 switch (cmd) {
4823 case SIOCGMIIPHY:
4824 data->phy_id = adapter->hw.phy_addr;
4825 break;
4826 case SIOCGMIIREG:
4827 if (!capable(CAP_NET_ADMIN))
4828 return -EPERM;
4829 spin_lock_irqsave(&adapter->stats_lock, flags);
4830 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4831 &data->val_out)) {
4832 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4833 return -EIO;
4834 }
4835 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4836 break;
4837 case SIOCSMIIREG:
4838 if (!capable(CAP_NET_ADMIN))
4839 return -EPERM;
4840 if (data->reg_num & ~(0x1F))
4841 return -EFAULT;
4842 mii_reg = data->val_in;
4843 spin_lock_irqsave(&adapter->stats_lock, flags);
4844 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4845 mii_reg)) {
4846 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4847 return -EIO;
4848 }
4849 if (adapter->hw.media_type == e1000_media_type_copper) {
4850 switch (data->reg_num) {
4851 case PHY_CTRL:
4852 if (mii_reg & MII_CR_POWER_DOWN)
4853 break;
4854 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4855 adapter->hw.autoneg = 1;
4856 adapter->hw.autoneg_advertised = 0x2F;
4857 } else {
4858 if (mii_reg & 0x40)
4859 spddplx = SPEED_1000;
4860 else if (mii_reg & 0x2000)
4861 spddplx = SPEED_100;
4862 else
4863 spddplx = SPEED_10;
4864 spddplx += (mii_reg & 0x100)
4865 ? DUPLEX_FULL :
4866 DUPLEX_HALF;
4867 retval = e1000_set_spd_dplx(adapter,
4868 spddplx);
4869 if (retval) {
4870 spin_unlock_irqrestore(
4871 &adapter->stats_lock,
4872 flags);
4873 return retval;
4874 }
4875 }
4876 if (netif_running(adapter->netdev))
4877 e1000_reinit_locked(adapter);
4878 else
4879 e1000_reset(adapter);
4880 break;
4881 case M88E1000_PHY_SPEC_CTRL:
4882 case M88E1000_EXT_PHY_SPEC_CTRL:
4883 if (e1000_phy_reset(&adapter->hw)) {
4884 spin_unlock_irqrestore(
4885 &adapter->stats_lock, flags);
4886 return -EIO;
4887 }
4888 break;
4889 }
4890 } else {
4891 switch (data->reg_num) {
4892 case PHY_CTRL:
4893 if (mii_reg & MII_CR_POWER_DOWN)
4894 break;
4895 if (netif_running(adapter->netdev))
4896 e1000_reinit_locked(adapter);
4897 else
4898 e1000_reset(adapter);
4899 break;
4900 }
4901 }
4902 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4903 break;
4904 default:
4905 return -EOPNOTSUPP;
4906 }
4907 return E1000_SUCCESS;
4908 }
4909
4910 void
4911 e1000_pci_set_mwi(struct e1000_hw *hw)
4912 {
4913 struct e1000_adapter *adapter = hw->back;
4914 int ret_val = pci_set_mwi(adapter->pdev);
4915
4916 if (ret_val)
4917 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4918 }
4919
4920 void
4921 e1000_pci_clear_mwi(struct e1000_hw *hw)
4922 {
4923 struct e1000_adapter *adapter = hw->back;
4924
4925 pci_clear_mwi(adapter->pdev);
4926 }
4927
4928 void
4929 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4930 {
4931 struct e1000_adapter *adapter = hw->back;
4932
4933 pci_read_config_word(adapter->pdev, reg, value);
4934 }
4935
4936 void
4937 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4938 {
4939 struct e1000_adapter *adapter = hw->back;
4940
4941 pci_write_config_word(adapter->pdev, reg, *value);
4942 }
4943
4944 int32_t
4945 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4946 {
4947 struct e1000_adapter *adapter = hw->back;
4948 uint16_t cap_offset;
4949
4950 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4951 if (!cap_offset)
4952 return -E1000_ERR_CONFIG;
4953
4954 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4955
4956 return E1000_SUCCESS;
4957 }
4958
4959 void
4960 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4961 {
4962 outl(value, port);
4963 }
4964
4965 static void
4966 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4967 {
4968 struct e1000_adapter *adapter = netdev_priv(netdev);
4969 uint32_t ctrl, rctl;
4970
4971 e1000_irq_disable(adapter);
4972 adapter->vlgrp = grp;
4973
4974 if (grp) {
4975 /* enable VLAN tag insert/strip */
4976 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4977 ctrl |= E1000_CTRL_VME;
4978 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4979
4980 if (adapter->hw.mac_type != e1000_ich8lan) {
4981 /* enable VLAN receive filtering */
4982 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4983 rctl |= E1000_RCTL_VFE;
4984 rctl &= ~E1000_RCTL_CFIEN;
4985 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4986 e1000_update_mng_vlan(adapter);
4987 }
4988 } else {
4989 /* disable VLAN tag insert/strip */
4990 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4991 ctrl &= ~E1000_CTRL_VME;
4992 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4993
4994 if (adapter->hw.mac_type != e1000_ich8lan) {
4995 /* disable VLAN filtering */
4996 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4997 rctl &= ~E1000_RCTL_VFE;
4998 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4999 if (adapter->mng_vlan_id !=
5000 (uint16_t)E1000_MNG_VLAN_NONE) {
5001 e1000_vlan_rx_kill_vid(netdev,
5002 adapter->mng_vlan_id);
5003 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5004 }
5005 }
5006 }
5007
5008 e1000_irq_enable(adapter);
5009 }
5010
5011 static void
5012 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5013 {
5014 struct e1000_adapter *adapter = netdev_priv(netdev);
5015 uint32_t vfta, index;
5016
5017 if ((adapter->hw.mng_cookie.status &
5018 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5019 (vid == adapter->mng_vlan_id))
5020 return;
5021 /* add VID to filter table */
5022 index = (vid >> 5) & 0x7F;
5023 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5024 vfta |= (1 << (vid & 0x1F));
5025 e1000_write_vfta(&adapter->hw, index, vfta);
5026 }
5027
5028 static void
5029 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5030 {
5031 struct e1000_adapter *adapter = netdev_priv(netdev);
5032 uint32_t vfta, index;
5033
5034 e1000_irq_disable(adapter);
5035
5036 if (adapter->vlgrp)
5037 adapter->vlgrp->vlan_devices[vid] = NULL;
5038
5039 e1000_irq_enable(adapter);
5040
5041 if ((adapter->hw.mng_cookie.status &
5042 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5043 (vid == adapter->mng_vlan_id)) {
5044 /* release control to f/w */
5045 e1000_release_hw_control(adapter);
5046 return;
5047 }
5048
5049 /* remove VID from filter table */
5050 index = (vid >> 5) & 0x7F;
5051 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5052 vfta &= ~(1 << (vid & 0x1F));
5053 e1000_write_vfta(&adapter->hw, index, vfta);
5054 }
5055
5056 static void
5057 e1000_restore_vlan(struct e1000_adapter *adapter)
5058 {
5059 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5060
5061 if (adapter->vlgrp) {
5062 uint16_t vid;
5063 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5064 if (!adapter->vlgrp->vlan_devices[vid])
5065 continue;
5066 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5067 }
5068 }
5069 }
5070
5071 int
5072 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5073 {
5074 adapter->hw.autoneg = 0;
5075
5076 /* Fiber NICs only allow 1000 gbps Full duplex */
5077 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5078 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5079 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5080 return -EINVAL;
5081 }
5082
5083 switch (spddplx) {
5084 case SPEED_10 + DUPLEX_HALF:
5085 adapter->hw.forced_speed_duplex = e1000_10_half;
5086 break;
5087 case SPEED_10 + DUPLEX_FULL:
5088 adapter->hw.forced_speed_duplex = e1000_10_full;
5089 break;
5090 case SPEED_100 + DUPLEX_HALF:
5091 adapter->hw.forced_speed_duplex = e1000_100_half;
5092 break;
5093 case SPEED_100 + DUPLEX_FULL:
5094 adapter->hw.forced_speed_duplex = e1000_100_full;
5095 break;
5096 case SPEED_1000 + DUPLEX_FULL:
5097 adapter->hw.autoneg = 1;
5098 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5099 break;
5100 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5101 default:
5102 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5103 return -EINVAL;
5104 }
5105 return 0;
5106 }
5107
5108 #ifdef CONFIG_PM
5109 /* Save/restore 16 or 64 dwords of PCI config space depending on which
5110 * bus we're on (PCI(X) vs. PCI-E)
5111 */
5112 #define PCIE_CONFIG_SPACE_LEN 256
5113 #define PCI_CONFIG_SPACE_LEN 64
5114 static int
5115 e1000_pci_save_state(struct e1000_adapter *adapter)
5116 {
5117 struct pci_dev *dev = adapter->pdev;
5118 int size;
5119 int i;
5120
5121 if (adapter->hw.mac_type >= e1000_82571)
5122 size = PCIE_CONFIG_SPACE_LEN;
5123 else
5124 size = PCI_CONFIG_SPACE_LEN;
5125
5126 WARN_ON(adapter->config_space != NULL);
5127
5128 adapter->config_space = kmalloc(size, GFP_KERNEL);
5129 if (!adapter->config_space) {
5130 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
5131 return -ENOMEM;
5132 }
5133 for (i = 0; i < (size / 4); i++)
5134 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
5135 return 0;
5136 }
5137
5138 static void
5139 e1000_pci_restore_state(struct e1000_adapter *adapter)
5140 {
5141 struct pci_dev *dev = adapter->pdev;
5142 int size;
5143 int i;
5144
5145 if (adapter->config_space == NULL)
5146 return;
5147
5148 if (adapter->hw.mac_type >= e1000_82571)
5149 size = PCIE_CONFIG_SPACE_LEN;
5150 else
5151 size = PCI_CONFIG_SPACE_LEN;
5152 for (i = 0; i < (size / 4); i++)
5153 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
5154 kfree(adapter->config_space);
5155 adapter->config_space = NULL;
5156 return;
5157 }
5158 #endif /* CONFIG_PM */
5159
5160 static int
5161 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5162 {
5163 struct net_device *netdev = pci_get_drvdata(pdev);
5164 struct e1000_adapter *adapter = netdev_priv(netdev);
5165 uint32_t ctrl, ctrl_ext, rctl, status;
5166 uint32_t wufc = adapter->wol;
5167 #ifdef CONFIG_PM
5168 int retval = 0;
5169 #endif
5170
5171 netif_device_detach(netdev);
5172
5173 if (netif_running(netdev)) {
5174 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5175 e1000_down(adapter);
5176 }
5177
5178 #ifdef CONFIG_PM
5179 /* Implement our own version of pci_save_state(pdev) because pci-
5180 * express adapters have 256-byte config spaces. */
5181 retval = e1000_pci_save_state(adapter);
5182 if (retval)
5183 return retval;
5184 #endif
5185
5186 status = E1000_READ_REG(&adapter->hw, STATUS);
5187 if (status & E1000_STATUS_LU)
5188 wufc &= ~E1000_WUFC_LNKC;
5189
5190 if (wufc) {
5191 e1000_setup_rctl(adapter);
5192 e1000_set_multi(netdev);
5193
5194 /* turn on all-multi mode if wake on multicast is enabled */
5195 if (wufc & E1000_WUFC_MC) {
5196 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5197 rctl |= E1000_RCTL_MPE;
5198 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5199 }
5200
5201 if (adapter->hw.mac_type >= e1000_82540) {
5202 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5203 /* advertise wake from D3Cold */
5204 #define E1000_CTRL_ADVD3WUC 0x00100000
5205 /* phy power management enable */
5206 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5207 ctrl |= E1000_CTRL_ADVD3WUC |
5208 E1000_CTRL_EN_PHY_PWR_MGMT;
5209 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5210 }
5211
5212 if (adapter->hw.media_type == e1000_media_type_fiber ||
5213 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5214 /* keep the laser running in D3 */
5215 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5216 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5217 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5218 }
5219
5220 /* Allow time for pending master requests to run */
5221 e1000_disable_pciex_master(&adapter->hw);
5222
5223 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5224 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5225 pci_enable_wake(pdev, PCI_D3hot, 1);
5226 pci_enable_wake(pdev, PCI_D3cold, 1);
5227 } else {
5228 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5229 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5230 pci_enable_wake(pdev, PCI_D3hot, 0);
5231 pci_enable_wake(pdev, PCI_D3cold, 0);
5232 }
5233
5234 e1000_release_manageability(adapter);
5235
5236 /* make sure adapter isn't asleep if manageability is enabled */
5237 if (adapter->en_mng_pt) {
5238 pci_enable_wake(pdev, PCI_D3hot, 1);
5239 pci_enable_wake(pdev, PCI_D3cold, 1);
5240 }
5241
5242 if (adapter->hw.phy_type == e1000_phy_igp_3)
5243 e1000_phy_powerdown_workaround(&adapter->hw);
5244
5245 if (netif_running(netdev))
5246 e1000_free_irq(adapter);
5247
5248 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5249 * would have already happened in close and is redundant. */
5250 e1000_release_hw_control(adapter);
5251
5252 pci_disable_device(pdev);
5253
5254 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5255
5256 return 0;
5257 }
5258
5259 #ifdef CONFIG_PM
5260 static int
5261 e1000_resume(struct pci_dev *pdev)
5262 {
5263 struct net_device *netdev = pci_get_drvdata(pdev);
5264 struct e1000_adapter *adapter = netdev_priv(netdev);
5265 uint32_t err;
5266
5267 pci_set_power_state(pdev, PCI_D0);
5268 e1000_pci_restore_state(adapter);
5269 if ((err = pci_enable_device(pdev))) {
5270 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5271 return err;
5272 }
5273 pci_set_master(pdev);
5274
5275 pci_enable_wake(pdev, PCI_D3hot, 0);
5276 pci_enable_wake(pdev, PCI_D3cold, 0);
5277
5278 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5279 return err;
5280
5281 e1000_power_up_phy(adapter);
5282 e1000_reset(adapter);
5283 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5284
5285 e1000_init_manageability(adapter);
5286
5287 if (netif_running(netdev))
5288 e1000_up(adapter);
5289
5290 netif_device_attach(netdev);
5291
5292 /* If the controller is 82573 and f/w is AMT, do not set
5293 * DRV_LOAD until the interface is up. For all other cases,
5294 * let the f/w know that the h/w is now under the control
5295 * of the driver. */
5296 if (adapter->hw.mac_type != e1000_82573 ||
5297 !e1000_check_mng_mode(&adapter->hw))
5298 e1000_get_hw_control(adapter);
5299
5300 return 0;
5301 }
5302 #endif
5303
5304 static void e1000_shutdown(struct pci_dev *pdev)
5305 {
5306 e1000_suspend(pdev, PMSG_SUSPEND);
5307 }
5308
5309 #ifdef CONFIG_NET_POLL_CONTROLLER
5310 /*
5311 * Polling 'interrupt' - used by things like netconsole to send skbs
5312 * without having to re-enable interrupts. It's not called while
5313 * the interrupt routine is executing.
5314 */
5315 static void
5316 e1000_netpoll(struct net_device *netdev)
5317 {
5318 struct e1000_adapter *adapter = netdev_priv(netdev);
5319
5320 disable_irq(adapter->pdev->irq);
5321 e1000_intr(adapter->pdev->irq, netdev);
5322 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5323 #ifndef CONFIG_E1000_NAPI
5324 adapter->clean_rx(adapter, adapter->rx_ring);
5325 #endif
5326 enable_irq(adapter->pdev->irq);
5327 }
5328 #endif
5329
5330 /**
5331 * e1000_io_error_detected - called when PCI error is detected
5332 * @pdev: Pointer to PCI device
5333 * @state: The current pci conneection state
5334 *
5335 * This function is called after a PCI bus error affecting
5336 * this device has been detected.
5337 */
5338 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5339 {
5340 struct net_device *netdev = pci_get_drvdata(pdev);
5341 struct e1000_adapter *adapter = netdev->priv;
5342
5343 netif_device_detach(netdev);
5344
5345 if (netif_running(netdev))
5346 e1000_down(adapter);
5347 pci_disable_device(pdev);
5348
5349 /* Request a slot slot reset. */
5350 return PCI_ERS_RESULT_NEED_RESET;
5351 }
5352
5353 /**
5354 * e1000_io_slot_reset - called after the pci bus has been reset.
5355 * @pdev: Pointer to PCI device
5356 *
5357 * Restart the card from scratch, as if from a cold-boot. Implementation
5358 * resembles the first-half of the e1000_resume routine.
5359 */
5360 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5361 {
5362 struct net_device *netdev = pci_get_drvdata(pdev);
5363 struct e1000_adapter *adapter = netdev->priv;
5364
5365 if (pci_enable_device(pdev)) {
5366 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5367 return PCI_ERS_RESULT_DISCONNECT;
5368 }
5369 pci_set_master(pdev);
5370
5371 pci_enable_wake(pdev, PCI_D3hot, 0);
5372 pci_enable_wake(pdev, PCI_D3cold, 0);
5373
5374 e1000_reset(adapter);
5375 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5376
5377 return PCI_ERS_RESULT_RECOVERED;
5378 }
5379
5380 /**
5381 * e1000_io_resume - called when traffic can start flowing again.
5382 * @pdev: Pointer to PCI device
5383 *
5384 * This callback is called when the error recovery driver tells us that
5385 * its OK to resume normal operation. Implementation resembles the
5386 * second-half of the e1000_resume routine.
5387 */
5388 static void e1000_io_resume(struct pci_dev *pdev)
5389 {
5390 struct net_device *netdev = pci_get_drvdata(pdev);
5391 struct e1000_adapter *adapter = netdev->priv;
5392
5393 e1000_init_manageability(adapter);
5394
5395 if (netif_running(netdev)) {
5396 if (e1000_up(adapter)) {
5397 printk("e1000: can't bring device back up after reset\n");
5398 return;
5399 }
5400 }
5401
5402 netif_device_attach(netdev);
5403
5404 /* If the controller is 82573 and f/w is AMT, do not set
5405 * DRV_LOAD until the interface is up. For all other cases,
5406 * let the f/w know that the h/w is now under the control
5407 * of the driver. */
5408 if (adapter->hw.mac_type != e1000_82573 ||
5409 !e1000_check_mng_mode(&adapter->hw))
5410 e1000_get_hw_control(adapter);
5411
5412 }
5413
5414 /* e1000_main.c */
Linux branches of Pieter du Preez