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[PATCH] forcedeth: TSO fix for large buffers
[linux-2.6/openmoko-kernel/knife-kernel.git] / sound / isa / ad1848 / ad1848_lib.c
blobb78530d7ea90c984309908a5c36b8fd36e6178ed
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of AD1848/AD1847/CS4248
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #define SNDRV_MAIN_OBJECT_FILE
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/slab.h>
28 #include <linux/ioport.h>
29 #include <sound/core.h>
30 #include <sound/ad1848.h>
31 #include <sound/control.h>
32 #include <sound/pcm_params.h>
33
34 #include <asm/io.h>
35 #include <asm/dma.h>
36
37 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
38 MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
39 MODULE_LICENSE("GPL");
40
41 #if 0
42 #define SNDRV_DEBUG_MCE
43 #endif
44
45 /*
46 * Some variables
47 */
48
49 static unsigned char freq_bits[14] = {
50 /* 5510 */ 0x00 | AD1848_XTAL2,
51 /* 6620 */ 0x0E | AD1848_XTAL2,
52 /* 8000 */ 0x00 | AD1848_XTAL1,
53 /* 9600 */ 0x0E | AD1848_XTAL1,
54 /* 11025 */ 0x02 | AD1848_XTAL2,
55 /* 16000 */ 0x02 | AD1848_XTAL1,
56 /* 18900 */ 0x04 | AD1848_XTAL2,
57 /* 22050 */ 0x06 | AD1848_XTAL2,
58 /* 27042 */ 0x04 | AD1848_XTAL1,
59 /* 32000 */ 0x06 | AD1848_XTAL1,
60 /* 33075 */ 0x0C | AD1848_XTAL2,
61 /* 37800 */ 0x08 | AD1848_XTAL2,
62 /* 44100 */ 0x0A | AD1848_XTAL2,
63 /* 48000 */ 0x0C | AD1848_XTAL1
64 };
65
66 static unsigned int rates[14] = {
67 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
68 27042, 32000, 33075, 37800, 44100, 48000
69 };
70
71 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
72 .count = 14,
73 .list = rates,
74 .mask = 0,
75 };
76
77 static unsigned char snd_ad1848_original_image[16] =
78 {
79 0x00, /* 00 - lic */
80 0x00, /* 01 - ric */
81 0x9f, /* 02 - la1ic */
82 0x9f, /* 03 - ra1ic */
83 0x9f, /* 04 - la2ic */
84 0x9f, /* 05 - ra2ic */
85 0xbf, /* 06 - loc */
86 0xbf, /* 07 - roc */
87 0x20, /* 08 - dfr */
88 AD1848_AUTOCALIB, /* 09 - ic */
89 0x00, /* 0a - pc */
90 0x00, /* 0b - ti */
91 0x00, /* 0c - mi */
92 0x00, /* 0d - lbc */
93 0x00, /* 0e - dru */
94 0x00, /* 0f - drl */
95 };
96
97 /*
98 * Basic I/O functions
99 */
100
101 void snd_ad1848_out(struct snd_ad1848 *chip,
102 unsigned char reg,
103 unsigned char value)
104 {
105 int timeout;
106
107 for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
108 udelay(100);
109 #ifdef CONFIG_SND_DEBUG
110 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
111 snd_printk(KERN_WARNING "auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
112 #endif
113 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
114 outb(chip->image[reg] = value, AD1848P(chip, REG));
115 mb();
116 #if 0
117 printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
118 #endif
119 }
120
121 static void snd_ad1848_dout(struct snd_ad1848 *chip,
122 unsigned char reg, unsigned char value)
123 {
124 int timeout;
125
126 for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
127 udelay(100);
128 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
129 outb(value, AD1848P(chip, REG));
130 mb();
131 }
132
133 static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
134 {
135 int timeout;
136
137 for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
138 udelay(100);
139 #ifdef CONFIG_SND_DEBUG
140 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
141 snd_printk(KERN_WARNING "auto calibration time out - reg = 0x%x\n", reg);
142 #endif
143 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
144 mb();
145 return inb(AD1848P(chip, REG));
146 }
147
148 #if 0
149
150 static void snd_ad1848_debug(struct snd_ad1848 *chip)
151 {
152 printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
153 printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
154 printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
155 printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
156 printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
157 printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
158 printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
159 printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
160 printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
161 printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
162 printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
163 printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
164 printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
165 printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
166 printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
167 printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
168 printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
169 printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
170 }
171
172 #endif
173
174 /*
175 * AD1848 detection / MCE routines
176 */
177
178 static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
179 {
180 unsigned long flags;
181 int timeout;
182
183 for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
184 udelay(100);
185 #ifdef CONFIG_SND_DEBUG
186 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
187 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
188 #endif
189 spin_lock_irqsave(&chip->reg_lock, flags);
190 chip->mce_bit |= AD1848_MCE;
191 timeout = inb(AD1848P(chip, REGSEL));
192 if (timeout == 0x80)
193 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
194 if (!(timeout & AD1848_MCE))
195 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
196 spin_unlock_irqrestore(&chip->reg_lock, flags);
197 }
198
199 static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
200 {
201 unsigned long flags;
202 int timeout;
203 signed long time;
204
205 spin_lock_irqsave(&chip->reg_lock, flags);
206 for (timeout = 5; timeout > 0; timeout--)
207 inb(AD1848P(chip, REGSEL));
208 /* end of cleanup sequence */
209 for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
210 udelay(100);
211 #if 0
212 printk("(1) timeout = %i\n", timeout);
213 #endif
214 #ifdef CONFIG_SND_DEBUG
215 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
216 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
217 #endif
218 chip->mce_bit &= ~AD1848_MCE;
219 timeout = inb(AD1848P(chip, REGSEL));
220 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
221 if (timeout == 0x80)
222 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
223 if ((timeout & AD1848_MCE) == 0) {
224 spin_unlock_irqrestore(&chip->reg_lock, flags);
225 return;
226 }
227 /* calibration process */
228
229 for (timeout = 500; timeout > 0 && (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0; timeout--);
230 if ((snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0) {
231 snd_printd("mce_down - auto calibration time out (1)\n");
232 spin_unlock_irqrestore(&chip->reg_lock, flags);
233 return;
234 }
235 #if 0
236 printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
237 #endif
238 time = HZ / 4;
239 while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
240 spin_unlock_irqrestore(&chip->reg_lock, flags);
241 if (time <= 0) {
242 snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
243 return;
244 }
245 time = schedule_timeout_interruptible(time);
246 spin_lock_irqsave(&chip->reg_lock, flags);
247 }
248 #if 0
249 printk("(3) jiffies = %li\n", jiffies);
250 #endif
251 time = HZ / 10;
252 while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
253 spin_unlock_irqrestore(&chip->reg_lock, flags);
254 if (time <= 0) {
255 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
256 return;
257 }
258 time = schedule_timeout_interruptible(time);
259 spin_lock_irqsave(&chip->reg_lock, flags);
260 }
261 spin_unlock_irqrestore(&chip->reg_lock, flags);
262 #if 0
263 printk("(4) jiffies = %li\n", jiffies);
264 snd_printk("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
265 #endif
266 }
267
268 static unsigned int snd_ad1848_get_count(unsigned char format,
269 unsigned int size)
270 {
271 switch (format & 0xe0) {
272 case AD1848_LINEAR_16:
273 size >>= 1;
274 break;
275 }
276 if (format & AD1848_STEREO)
277 size >>= 1;
278 return size;
279 }
280
281 static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
282 int channel, int cmd)
283 {
284 int result = 0;
285
286 #if 0
287 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
288 #endif
289 spin_lock(&chip->reg_lock);
290 if (cmd == SNDRV_PCM_TRIGGER_START) {
291 if (chip->image[AD1848_IFACE_CTRL] & what) {
292 spin_unlock(&chip->reg_lock);
293 return 0;
294 }
295 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
296 chip->mode |= AD1848_MODE_RUNNING;
297 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
298 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
299 spin_unlock(&chip->reg_lock);
300 return 0;
301 }
302 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
303 chip->mode &= ~AD1848_MODE_RUNNING;
304 } else {
305 result = -EINVAL;
306 }
307 spin_unlock(&chip->reg_lock);
308 return result;
309 }
310
311 /*
312 * CODEC I/O
313 */
314
315 static unsigned char snd_ad1848_get_rate(unsigned int rate)
316 {
317 int i;
318
319 for (i = 0; i < 14; i++)
320 if (rate == rates[i])
321 return freq_bits[i];
322 snd_BUG();
323 return freq_bits[13];
324 }
325
326 static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
327 unsigned int cmd, void *arg)
328 {
329 return snd_pcm_lib_ioctl(substream, cmd, arg);
330 }
331
332 static unsigned char snd_ad1848_get_format(int format, int channels)
333 {
334 unsigned char rformat;
335
336 rformat = AD1848_LINEAR_8;
337 switch (format) {
338 case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
339 case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
340 case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
341 }
342 if (channels > 1)
343 rformat |= AD1848_STEREO;
344 #if 0
345 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
346 #endif
347 return rformat;
348 }
349
350 static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
351 {
352 unsigned long flags;
353
354 mute = mute ? 1 : 0;
355 spin_lock_irqsave(&chip->reg_lock, flags);
356 if (chip->calibrate_mute == mute) {
357 spin_unlock_irqrestore(&chip->reg_lock, flags);
358 return;
359 }
360 if (!mute) {
361 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
362 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
363 }
364 snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
365 snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
366 snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
367 snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
368 snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
369 snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
370 chip->calibrate_mute = mute;
371 spin_unlock_irqrestore(&chip->reg_lock, flags);
372 }
373
374 static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
375 {
376 if (hw_params == NULL) {
377 chip->image[AD1848_DATA_FORMAT] = 0x20;
378 } else {
379 chip->image[AD1848_DATA_FORMAT] =
380 snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
381 snd_ad1848_get_rate(params_rate(hw_params));
382 }
383 // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
384 }
385
386 static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
387 {
388 unsigned long flags;
389
390 down(&chip->open_mutex);
391 if (chip->mode & AD1848_MODE_OPEN) {
392 up(&chip->open_mutex);
393 return -EAGAIN;
394 }
395 snd_ad1848_mce_down(chip);
396
397 #ifdef SNDRV_DEBUG_MCE
398 snd_printk("open: (1)\n");
399 #endif
400 snd_ad1848_mce_up(chip);
401 spin_lock_irqsave(&chip->reg_lock, flags);
402 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
403 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
404 AD1848_CALIB_MODE);
405 chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
406 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
407 spin_unlock_irqrestore(&chip->reg_lock, flags);
408 snd_ad1848_mce_down(chip);
409
410 #ifdef SNDRV_DEBUG_MCE
411 snd_printk("open: (2)\n");
412 #endif
413
414 snd_ad1848_set_data_format(chip, NULL);
415
416 snd_ad1848_mce_up(chip);
417 spin_lock_irqsave(&chip->reg_lock, flags);
418 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
419 spin_unlock_irqrestore(&chip->reg_lock, flags);
420 snd_ad1848_mce_down(chip);
421
422 #ifdef SNDRV_DEBUG_MCE
423 snd_printk("open: (3)\n");
424 #endif
425
426 /* ok. now enable and ack CODEC IRQ */
427 spin_lock_irqsave(&chip->reg_lock, flags);
428 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
429 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
430 chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
431 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
432 spin_unlock_irqrestore(&chip->reg_lock, flags);
433
434 chip->mode = mode;
435 up(&chip->open_mutex);
436
437 return 0;
438 }
439
440 static void snd_ad1848_close(struct snd_ad1848 *chip)
441 {
442 unsigned long flags;
443
444 down(&chip->open_mutex);
445 if (!chip->mode) {
446 up(&chip->open_mutex);
447 return;
448 }
449 /* disable IRQ */
450 spin_lock_irqsave(&chip->reg_lock, flags);
451 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
452 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
453 chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
454 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
455 spin_unlock_irqrestore(&chip->reg_lock, flags);
456
457 /* now disable capture & playback */
458
459 snd_ad1848_mce_up(chip);
460 spin_lock_irqsave(&chip->reg_lock, flags);
461 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
462 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
463 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
464 spin_unlock_irqrestore(&chip->reg_lock, flags);
465 snd_ad1848_mce_down(chip);
466
467 /* clear IRQ again */
468 spin_lock_irqsave(&chip->reg_lock, flags);
469 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
470 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
471 spin_unlock_irqrestore(&chip->reg_lock, flags);
472
473 chip->mode = 0;
474 up(&chip->open_mutex);
475 }
476
477 /*
478 * ok.. exported functions..
479 */
480
481 static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
482 int cmd)
483 {
484 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
485 return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
486 }
487
488 static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
489 int cmd)
490 {
491 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
492 return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
493 }
494
495 static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
496 struct snd_pcm_hw_params *hw_params)
497 {
498 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
499 unsigned long flags;
500 int err;
501
502 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
503 return err;
504 snd_ad1848_calibrate_mute(chip, 1);
505 snd_ad1848_set_data_format(chip, hw_params);
506 snd_ad1848_mce_up(chip);
507 spin_lock_irqsave(&chip->reg_lock, flags);
508 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
509 spin_unlock_irqrestore(&chip->reg_lock, flags);
510 snd_ad1848_mce_down(chip);
511 snd_ad1848_calibrate_mute(chip, 0);
512 return 0;
513 }
514
515 static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
516 {
517 return snd_pcm_lib_free_pages(substream);
518 }
519
520 static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
521 {
522 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
523 struct snd_pcm_runtime *runtime = substream->runtime;
524 unsigned long flags;
525 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
526 unsigned int count = snd_pcm_lib_period_bytes(substream);
527
528 chip->dma_size = size;
529 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
530 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
531 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
532 spin_lock_irqsave(&chip->reg_lock, flags);
533 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
534 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
535 spin_unlock_irqrestore(&chip->reg_lock, flags);
536 return 0;
537 }
538
539 static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
540 struct snd_pcm_hw_params *hw_params)
541 {
542 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
543 unsigned long flags;
544 int err;
545
546 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
547 return err;
548 snd_ad1848_calibrate_mute(chip, 1);
549 snd_ad1848_set_data_format(chip, hw_params);
550 snd_ad1848_mce_up(chip);
551 spin_lock_irqsave(&chip->reg_lock, flags);
552 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
553 spin_unlock_irqrestore(&chip->reg_lock, flags);
554 snd_ad1848_mce_down(chip);
555 snd_ad1848_calibrate_mute(chip, 0);
556 return 0;
557 }
558
559 static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
560 {
561 return snd_pcm_lib_free_pages(substream);
562 }
563
564 static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
565 {
566 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
567 struct snd_pcm_runtime *runtime = substream->runtime;
568 unsigned long flags;
569 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
570 unsigned int count = snd_pcm_lib_period_bytes(substream);
571
572 chip->dma_size = size;
573 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
574 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
575 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
576 spin_lock_irqsave(&chip->reg_lock, flags);
577 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
578 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
579 spin_unlock_irqrestore(&chip->reg_lock, flags);
580 return 0;
581 }
582
583 static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id, struct pt_regs *regs)
584 {
585 struct snd_ad1848 *chip = dev_id;
586
587 if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
588 (chip->mode & AD1848_MODE_RUNNING))
589 snd_pcm_period_elapsed(chip->playback_substream);
590 if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
591 (chip->mode & AD1848_MODE_RUNNING))
592 snd_pcm_period_elapsed(chip->capture_substream);
593 outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
594 return IRQ_HANDLED;
595 }
596
597 static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
598 {
599 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
600 size_t ptr;
601
602 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
603 return 0;
604 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
605 return bytes_to_frames(substream->runtime, ptr);
606 }
607
608 static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
609 {
610 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
611 size_t ptr;
612
613 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
614 return 0;
615 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
616 return bytes_to_frames(substream->runtime, ptr);
617 }
618
619 /*
620
621 */
622
623 static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
624
625 int tmp;
626
627 if (!chip->thinkpad_flag) return;
628
629 outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
630 tmp = inb(AD1848_THINKPAD_CTL_PORT2);
631
632 if (on)
633 /* turn it on */
634 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
635 else
636 /* turn it off */
637 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
638
639 outb(tmp, AD1848_THINKPAD_CTL_PORT2);
640
641 }
642
643 #ifdef CONFIG_PM
644 static void snd_ad1848_suspend(struct snd_ad1848 *chip)
645 {
646 snd_pcm_suspend_all(chip->pcm);
647 if (chip->thinkpad_flag)
648 snd_ad1848_thinkpad_twiddle(chip, 0);
649 }
650
651 static void snd_ad1848_resume(struct snd_ad1848 *chip)
652 {
653 int i;
654
655 if (chip->thinkpad_flag)
656 snd_ad1848_thinkpad_twiddle(chip, 1);
657
658 /* clear any pendings IRQ */
659 inb(AD1848P(chip, STATUS));
660 outb(0, AD1848P(chip, STATUS));
661 mb();
662
663 snd_ad1848_mce_down(chip);
664 for (i = 0; i < 16; i++)
665 snd_ad1848_out(chip, i, chip->image[i]);
666 snd_ad1848_mce_up(chip);
667 snd_ad1848_mce_down(chip);
668 }
669 #endif /* CONFIG_PM */
670
671 static int snd_ad1848_probe(struct snd_ad1848 * chip)
672 {
673 unsigned long flags;
674 int i, id, rev, ad1847;
675 unsigned char *ptr;
676
677 #if 0
678 snd_ad1848_debug(chip);
679 #endif
680 id = ad1847 = 0;
681 for (i = 0; i < 1000; i++) {
682 mb();
683 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
684 udelay(500);
685 else {
686 spin_lock_irqsave(&chip->reg_lock, flags);
687 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
688 snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
689 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
690 rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
691 if (rev == 0x65) {
692 spin_unlock_irqrestore(&chip->reg_lock, flags);
693 id = 1;
694 ad1847 = 1;
695 break;
696 }
697 if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
698 spin_unlock_irqrestore(&chip->reg_lock, flags);
699 id = 1;
700 break;
701 }
702 spin_unlock_irqrestore(&chip->reg_lock, flags);
703 }
704 }
705 if (id != 1)
706 return -ENODEV; /* no valid device found */
707 if (chip->hardware == AD1848_HW_DETECT) {
708 if (ad1847) {
709 chip->hardware = AD1848_HW_AD1847;
710 } else {
711 chip->hardware = AD1848_HW_AD1848;
712 rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
713 if (rev & 0x80) {
714 chip->hardware = AD1848_HW_CS4248;
715 } else if ((rev & 0x0f) == 0x0a) {
716 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
717 for (i = 0; i < 16; ++i) {
718 if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
719 chip->hardware = AD1848_HW_CMI8330;
720 break;
721 }
722 }
723 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
724 }
725 }
726 }
727 spin_lock_irqsave(&chip->reg_lock, flags);
728 inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
729 outb(0, AD1848P(chip, STATUS));
730 mb();
731 spin_unlock_irqrestore(&chip->reg_lock, flags);
732
733 chip->image[AD1848_MISC_INFO] = 0x00;
734 chip->image[AD1848_IFACE_CTRL] =
735 (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
736 ptr = (unsigned char *) &chip->image;
737 snd_ad1848_mce_down(chip);
738 spin_lock_irqsave(&chip->reg_lock, flags);
739 for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
740 snd_ad1848_out(chip, i, *ptr++);
741 spin_unlock_irqrestore(&chip->reg_lock, flags);
742 snd_ad1848_mce_up(chip);
743 snd_ad1848_mce_down(chip);
744 return 0; /* all things are ok.. */
745 }
746
747 /*
748
749 */
750
751 static struct snd_pcm_hardware snd_ad1848_playback =
752 {
753 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
754 SNDRV_PCM_INFO_MMAP_VALID),
755 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
756 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
757 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
758 .rate_min = 5510,
759 .rate_max = 48000,
760 .channels_min = 1,
761 .channels_max = 2,
762 .buffer_bytes_max = (128*1024),
763 .period_bytes_min = 64,
764 .period_bytes_max = (128*1024),
765 .periods_min = 1,
766 .periods_max = 1024,
767 .fifo_size = 0,
768 };
769
770 static struct snd_pcm_hardware snd_ad1848_capture =
771 {
772 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
773 SNDRV_PCM_INFO_MMAP_VALID),
774 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
775 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
776 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
777 .rate_min = 5510,
778 .rate_max = 48000,
779 .channels_min = 1,
780 .channels_max = 2,
781 .buffer_bytes_max = (128*1024),
782 .period_bytes_min = 64,
783 .period_bytes_max = (128*1024),
784 .periods_min = 1,
785 .periods_max = 1024,
786 .fifo_size = 0,
787 };
788
789 /*
790
791 */
792
793 static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
794 {
795 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
796 struct snd_pcm_runtime *runtime = substream->runtime;
797 int err;
798
799 if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
800 return err;
801 chip->playback_substream = substream;
802 runtime->hw = snd_ad1848_playback;
803 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
804 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
805 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
806 return 0;
807 }
808
809 static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
810 {
811 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
812 struct snd_pcm_runtime *runtime = substream->runtime;
813 int err;
814
815 if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
816 return err;
817 chip->capture_substream = substream;
818 runtime->hw = snd_ad1848_capture;
819 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
820 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
821 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
822 return 0;
823 }
824
825 static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
826 {
827 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
828
829 chip->mode &= ~AD1848_MODE_PLAY;
830 chip->playback_substream = NULL;
831 snd_ad1848_close(chip);
832 return 0;
833 }
834
835 static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
836 {
837 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
838
839 chip->mode &= ~AD1848_MODE_CAPTURE;
840 chip->capture_substream = NULL;
841 snd_ad1848_close(chip);
842 return 0;
843 }
844
845 static int snd_ad1848_free(struct snd_ad1848 *chip)
846 {
847 release_and_free_resource(chip->res_port);
848 if (chip->irq >= 0)
849 free_irq(chip->irq, (void *) chip);
850 if (chip->dma >= 0) {
851 snd_dma_disable(chip->dma);
852 free_dma(chip->dma);
853 }
854 kfree(chip);
855 return 0;
856 }
857
858 static int snd_ad1848_dev_free(struct snd_device *device)
859 {
860 struct snd_ad1848 *chip = device->device_data;
861 return snd_ad1848_free(chip);
862 }
863
864 static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
865 {
866 switch (chip->hardware) {
867 case AD1848_HW_AD1847: return "AD1847";
868 case AD1848_HW_AD1848: return "AD1848";
869 case AD1848_HW_CS4248: return "CS4248";
870 case AD1848_HW_CMI8330: return "CMI8330/C3D";
871 default: return "???";
872 }
873 }
874
875 int snd_ad1848_create(struct snd_card *card,
876 unsigned long port,
877 int irq, int dma,
878 unsigned short hardware,
879 struct snd_ad1848 ** rchip)
880 {
881 static struct snd_device_ops ops = {
882 .dev_free = snd_ad1848_dev_free,
883 };
884 struct snd_ad1848 *chip;
885 int err;
886
887 *rchip = NULL;
888 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
889 if (chip == NULL)
890 return -ENOMEM;
891 spin_lock_init(&chip->reg_lock);
892 init_MUTEX(&chip->open_mutex);
893 chip->card = card;
894 chip->port = port;
895 chip->irq = -1;
896 chip->dma = -1;
897 chip->hardware = hardware;
898 memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
899
900 if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
901 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
902 snd_ad1848_free(chip);
903 return -EBUSY;
904 }
905 if (request_irq(irq, snd_ad1848_interrupt, SA_INTERRUPT, "AD1848", (void *) chip)) {
906 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
907 snd_ad1848_free(chip);
908 return -EBUSY;
909 }
910 chip->irq = irq;
911 if (request_dma(dma, "AD1848")) {
912 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
913 snd_ad1848_free(chip);
914 return -EBUSY;
915 }
916 chip->dma = dma;
917
918 if (hardware == AD1848_HW_THINKPAD) {
919 chip->thinkpad_flag = 1;
920 chip->hardware = AD1848_HW_DETECT; /* reset */
921 snd_ad1848_thinkpad_twiddle(chip, 1);
922 }
923
924 if (snd_ad1848_probe(chip) < 0) {
925 snd_ad1848_free(chip);
926 return -ENODEV;
927 }
928
929 /* Register device */
930 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
931 snd_ad1848_free(chip);
932 return err;
933 }
934
935 #ifdef CONFIG_PM
936 chip->suspend = snd_ad1848_suspend;
937 chip->resume = snd_ad1848_resume;
938 #endif
939
940 *rchip = chip;
941 return 0;
942 }
943
944 static struct snd_pcm_ops snd_ad1848_playback_ops = {
945 .open = snd_ad1848_playback_open,
946 .close = snd_ad1848_playback_close,
947 .ioctl = snd_ad1848_ioctl,
948 .hw_params = snd_ad1848_playback_hw_params,
949 .hw_free = snd_ad1848_playback_hw_free,
950 .prepare = snd_ad1848_playback_prepare,
951 .trigger = snd_ad1848_playback_trigger,
952 .pointer = snd_ad1848_playback_pointer,
953 };
954
955 static struct snd_pcm_ops snd_ad1848_capture_ops = {
956 .open = snd_ad1848_capture_open,
957 .close = snd_ad1848_capture_close,
958 .ioctl = snd_ad1848_ioctl,
959 .hw_params = snd_ad1848_capture_hw_params,
960 .hw_free = snd_ad1848_capture_hw_free,
961 .prepare = snd_ad1848_capture_prepare,
962 .trigger = snd_ad1848_capture_trigger,
963 .pointer = snd_ad1848_capture_pointer,
964 };
965
966 int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
967 {
968 struct snd_pcm *pcm;
969 int err;
970
971 if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
972 return err;
973
974 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
975 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
976
977 pcm->private_data = chip;
978 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
979 strcpy(pcm->name, snd_ad1848_chip_id(chip));
980
981 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
982 snd_dma_isa_data(),
983 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
984
985 chip->pcm = pcm;
986 if (rpcm)
987 *rpcm = pcm;
988 return 0;
989 }
990
991 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
992 {
993 return direction == SNDRV_PCM_STREAM_PLAYBACK ?
994 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
995 }
996
997 /*
998 * MIXER part
999 */
1000
1001 static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1002 {
1003 static char *texts[4] = {
1004 "Line", "Aux", "Mic", "Mix"
1005 };
1006
1007 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1008 uinfo->count = 2;
1009 uinfo->value.enumerated.items = 4;
1010 if (uinfo->value.enumerated.item > 3)
1011 uinfo->value.enumerated.item = 3;
1012 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1013 return 0;
1014 }
1015
1016 static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1017 {
1018 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1019 unsigned long flags;
1020
1021 spin_lock_irqsave(&chip->reg_lock, flags);
1022 ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1023 ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1024 spin_unlock_irqrestore(&chip->reg_lock, flags);
1025 return 0;
1026 }
1027
1028 static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1029 {
1030 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1031 unsigned long flags;
1032 unsigned short left, right;
1033 int change;
1034
1035 if (ucontrol->value.enumerated.item[0] > 3 ||
1036 ucontrol->value.enumerated.item[1] > 3)
1037 return -EINVAL;
1038 left = ucontrol->value.enumerated.item[0] << 6;
1039 right = ucontrol->value.enumerated.item[1] << 6;
1040 spin_lock_irqsave(&chip->reg_lock, flags);
1041 left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1042 right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1043 change = left != chip->image[AD1848_LEFT_INPUT] ||
1044 right != chip->image[AD1848_RIGHT_INPUT];
1045 snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1046 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1047 spin_unlock_irqrestore(&chip->reg_lock, flags);
1048 return change;
1049 }
1050
1051 static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1052 {
1053 int mask = (kcontrol->private_value >> 16) & 0xff;
1054
1055 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1056 uinfo->count = 1;
1057 uinfo->value.integer.min = 0;
1058 uinfo->value.integer.max = mask;
1059 return 0;
1060 }
1061
1062 static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1063 {
1064 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1065 unsigned long flags;
1066 int reg = kcontrol->private_value & 0xff;
1067 int shift = (kcontrol->private_value >> 8) & 0xff;
1068 int mask = (kcontrol->private_value >> 16) & 0xff;
1069 int invert = (kcontrol->private_value >> 24) & 0xff;
1070
1071 spin_lock_irqsave(&chip->reg_lock, flags);
1072 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1073 spin_unlock_irqrestore(&chip->reg_lock, flags);
1074 if (invert)
1075 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1076 return 0;
1077 }
1078
1079 static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1080 {
1081 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1082 unsigned long flags;
1083 int reg = kcontrol->private_value & 0xff;
1084 int shift = (kcontrol->private_value >> 8) & 0xff;
1085 int mask = (kcontrol->private_value >> 16) & 0xff;
1086 int invert = (kcontrol->private_value >> 24) & 0xff;
1087 int change;
1088 unsigned short val;
1089
1090 val = (ucontrol->value.integer.value[0] & mask);
1091 if (invert)
1092 val = mask - val;
1093 val <<= shift;
1094 spin_lock_irqsave(&chip->reg_lock, flags);
1095 val = (chip->image[reg] & ~(mask << shift)) | val;
1096 change = val != chip->image[reg];
1097 snd_ad1848_out(chip, reg, val);
1098 spin_unlock_irqrestore(&chip->reg_lock, flags);
1099 return change;
1100 }
1101
1102 static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1103 {
1104 int mask = (kcontrol->private_value >> 24) & 0xff;
1105
1106 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1107 uinfo->count = 2;
1108 uinfo->value.integer.min = 0;
1109 uinfo->value.integer.max = mask;
1110 return 0;
1111 }
1112
1113 static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1114 {
1115 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1116 unsigned long flags;
1117 int left_reg = kcontrol->private_value & 0xff;
1118 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1119 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1120 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1121 int mask = (kcontrol->private_value >> 24) & 0xff;
1122 int invert = (kcontrol->private_value >> 22) & 1;
1123
1124 spin_lock_irqsave(&chip->reg_lock, flags);
1125 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1126 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1127 spin_unlock_irqrestore(&chip->reg_lock, flags);
1128 if (invert) {
1129 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1130 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1131 }
1132 return 0;
1133 }
1134
1135 static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1136 {
1137 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1138 unsigned long flags;
1139 int left_reg = kcontrol->private_value & 0xff;
1140 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1141 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1142 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1143 int mask = (kcontrol->private_value >> 24) & 0xff;
1144 int invert = (kcontrol->private_value >> 22) & 1;
1145 int change;
1146 unsigned short val1, val2;
1147
1148 val1 = ucontrol->value.integer.value[0] & mask;
1149 val2 = ucontrol->value.integer.value[1] & mask;
1150 if (invert) {
1151 val1 = mask - val1;
1152 val2 = mask - val2;
1153 }
1154 val1 <<= shift_left;
1155 val2 <<= shift_right;
1156 spin_lock_irqsave(&chip->reg_lock, flags);
1157 if (left_reg != right_reg) {
1158 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1159 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1160 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1161 snd_ad1848_out(chip, left_reg, val1);
1162 snd_ad1848_out(chip, right_reg, val2);
1163 } else {
1164 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1165 change = val1 != chip->image[left_reg];
1166 snd_ad1848_out(chip, left_reg, val1);
1167 }
1168 spin_unlock_irqrestore(&chip->reg_lock, flags);
1169 return change;
1170 }
1171
1172 /*
1173 */
1174 int snd_ad1848_add_ctl(struct snd_ad1848 *chip, const char *name, int index, int type, unsigned long value)
1175 {
1176 static struct snd_kcontrol_new newctls[] = {
1177 [AD1848_MIX_SINGLE] = {
1178 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1179 .info = snd_ad1848_info_single,
1180 .get = snd_ad1848_get_single,
1181 .put = snd_ad1848_put_single,
1182 },
1183 [AD1848_MIX_DOUBLE] = {
1184 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1185 .info = snd_ad1848_info_double,
1186 .get = snd_ad1848_get_double,
1187 .put = snd_ad1848_put_double,
1188 },
1189 [AD1848_MIX_CAPTURE] = {
1190 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1191 .info = snd_ad1848_info_mux,
1192 .get = snd_ad1848_get_mux,
1193 .put = snd_ad1848_put_mux,
1194 },
1195 };
1196 struct snd_kcontrol *ctl;
1197 int err;
1198
1199 ctl = snd_ctl_new1(&newctls[type], chip);
1200 if (! ctl)
1201 return -ENOMEM;
1202 strlcpy(ctl->id.name, name, sizeof(ctl->id.name));
1203 ctl->id.index = index;
1204 ctl->private_value = value;
1205 if ((err = snd_ctl_add(chip->card, ctl)) < 0) {
1206 snd_ctl_free_one(ctl);
1207 return err;
1208 }
1209 return 0;
1210 }
1211
1212
1213 static struct ad1848_mix_elem snd_ad1848_controls[] = {
1214 AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
1215 AD1848_DOUBLE("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1),
1216 AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1217 AD1848_DOUBLE("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1218 AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1219 AD1848_DOUBLE("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1220 AD1848_DOUBLE("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0),
1221 {
1222 .name = "Capture Source",
1223 .type = AD1848_MIX_CAPTURE,
1224 },
1225 AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
1226 AD1848_SINGLE("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0)
1227 };
1228
1229 int snd_ad1848_mixer(struct snd_ad1848 *chip)
1230 {
1231 struct snd_card *card;
1232 struct snd_pcm *pcm;
1233 unsigned int idx;
1234 int err;
1235
1236 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1237
1238 pcm = chip->pcm;
1239 card = chip->card;
1240
1241 strcpy(card->mixername, pcm->name);
1242
1243 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
1244 if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
1245 return err;
1246
1247 return 0;
1248 }
1249
1250 EXPORT_SYMBOL(snd_ad1848_out);
1251 EXPORT_SYMBOL(snd_ad1848_create);
1252 EXPORT_SYMBOL(snd_ad1848_pcm);
1253 EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
1254 EXPORT_SYMBOL(snd_ad1848_mixer);
1255 EXPORT_SYMBOL(snd_ad1848_add_ctl);
1256
1257 /*
1258 * INIT part
1259 */
1260
1261 static int __init alsa_ad1848_init(void)
1262 {
1263 return 0;
1264 }
1265
1266 static void __exit alsa_ad1848_exit(void)
1267 {
1268 }
1269
1270 module_init(alsa_ad1848_init)
1271 module_exit(alsa_ad1848_exit)
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