[PATCH] non lazy "sleazy" fpu implementation
[linux-2.6/openmoko-kernel/knife-kernel.git] / include / asm-x86_64 / smp.h
blob498fbc1fc179b20d1d247b95bd44c55dc0cda4ea
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 extern int disable_apic;
12 #include <asm/fixmap.h>
13 #include <asm/mpspec.h>
14 #include <asm/io_apic.h>
15 #include <asm/apic.h>
16 #include <asm/thread_info.h>
18 #ifdef CONFIG_SMP
20 #include <asm/pda.h>
22 struct pt_regs;
24 extern cpumask_t cpu_present_mask;
25 extern cpumask_t cpu_possible_map;
26 extern cpumask_t cpu_online_map;
27 extern cpumask_t cpu_callout_map;
28 extern cpumask_t cpu_initialized;
31 * Private routines/data
34 extern void smp_alloc_memory(void);
35 extern volatile unsigned long smp_invalidate_needed;
36 extern void lock_ipi_call_lock(void);
37 extern void unlock_ipi_call_lock(void);
38 extern int smp_num_siblings;
39 extern void smp_send_reschedule(int cpu);
40 void smp_stop_cpu(void);
41 extern int smp_call_function_single(int cpuid, void (*func) (void *info),
42 void *info, int retry, int wait);
44 extern cpumask_t cpu_sibling_map[NR_CPUS];
45 extern cpumask_t cpu_core_map[NR_CPUS];
46 extern u8 cpu_llc_id[NR_CPUS];
48 #define SMP_TRAMPOLINE_BASE 0x6000
51 * On x86 all CPUs are mapped 1:1 to the APIC space.
52 * This simplifies scheduling and IPI sending and
53 * compresses data structures.
56 static inline int num_booting_cpus(void)
58 return cpus_weight(cpu_callout_map);
61 #define raw_smp_processor_id() read_pda(cpunumber)
63 static inline int hard_smp_processor_id(void)
65 /* we don't want to mark this access volatile - bad code generation */
66 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
69 extern int safe_smp_processor_id(void);
70 extern int __cpu_disable(void);
71 extern void __cpu_die(unsigned int cpu);
72 extern void prefill_possible_map(void);
73 extern unsigned num_processors;
74 extern unsigned disabled_cpus;
76 #define NO_PROC_ID 0xFF /* No processor magic marker */
78 #endif
81 * Some lowlevel functions might want to know about
82 * the real APIC ID <-> CPU # mapping.
84 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
85 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
86 extern u8 bios_cpu_apicid[];
88 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
90 return cpus_addr(cpumask)[0];
93 static inline int cpu_present_to_apicid(int mps_cpu)
95 if (mps_cpu < NR_CPUS)
96 return (int)bios_cpu_apicid[mps_cpu];
97 else
98 return BAD_APICID;
101 #ifndef CONFIG_SMP
102 #define stack_smp_processor_id() 0
103 #define safe_smp_processor_id() 0
104 #define cpu_logical_map(x) (x)
105 #else
106 #include <asm/thread_info.h>
107 #define stack_smp_processor_id() \
108 ({ \
109 struct thread_info *ti; \
110 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
111 ti->cpu; \
113 #endif
115 static __inline int logical_smp_processor_id(void)
117 /* we don't want to mark this access volatile - bad code generation */
118 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
121 #ifdef CONFIG_SMP
122 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
123 #else
124 #define cpu_physical_id(cpu) boot_cpu_id
125 static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
126 void *info, int retry, int wait)
128 /* Disable interrupts here? */
129 func(info);
130 return 0;
132 #endif /* !CONFIG_SMP */
133 #endif