drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/libata.h>
  32 #include <linux/list.h>
  33 #include <linux/kref.h>
  34 #include <scsi/scsi.h>
  35 #include <scsi/scsi_cmnd.h>
  36
  37 /*
  38  * Literals
  39  */
  40 #define IPR_DRIVER_VERSION "2.3.1"
  41 #define IPR_DRIVER_DATE "(January 23, 2007)"
  42
  43 /*
  44  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  45  *      ops per device for devices not running tagged command queuing.
  46  *      This can be adjusted at runtime through sysfs device attributes.
  47  */
  48 #define IPR_MAX_CMD_PER_LUN                             6
  49 #define IPR_MAX_CMD_PER_ATA_LUN                 1
  50
  51 /*
  52  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  53  *      ops the mid-layer can send to the adapter.
  54  */
  55 #define IPR_NUM_BASE_CMD_BLKS                           100
  56
  57 #define PCI_DEVICE_ID_IBM_OBSIDIAN_E    0x0339
  58
  59 #define IPR_SUBS_DEV_ID_2780    0x0264
  60 #define IPR_SUBS_DEV_ID_5702    0x0266
  61 #define IPR_SUBS_DEV_ID_5703    0x0278
  62 #define IPR_SUBS_DEV_ID_572E  0x028D
  63 #define IPR_SUBS_DEV_ID_573E  0x02D3
  64 #define IPR_SUBS_DEV_ID_573D  0x02D4
  65 #define IPR_SUBS_DEV_ID_571A    0x02C0
  66 #define IPR_SUBS_DEV_ID_571B    0x02BE
  67 #define IPR_SUBS_DEV_ID_571E  0x02BF
  68 #define IPR_SUBS_DEV_ID_571F    0x02D5
  69 #define IPR_SUBS_DEV_ID_572A    0x02C1
  70 #define IPR_SUBS_DEV_ID_572B    0x02C2
  71 #define IPR_SUBS_DEV_ID_572F    0x02C3
  72 #define IPR_SUBS_DEV_ID_575B    0x030D
  73 #define IPR_SUBS_DEV_ID_575C    0x0338
  74 #define IPR_SUBS_DEV_ID_57B7    0x0360
  75 #define IPR_SUBS_DEV_ID_57B8    0x02C2
  76
  77 #define IPR_NAME                                "ipr"
  78
  79 /*
  80  * Return codes
  81  */
  82 #define IPR_RC_JOB_CONTINUE             1
  83 #define IPR_RC_JOB_RETURN               2
  84
  85 /*
  86  * IOASCs
  87  */
  88 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  89 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  90 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  91 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  92 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  93 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  94 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  95 #define IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT    0x05240000
  96 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  97 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
  98 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
  99 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
 100 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
 101 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
 102
 103 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
 104 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
 105 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
 106
 107 #define IPR_DEFAULT_MAX_ERROR_DUMP                      984
 108 #define IPR_NUM_LOG_HCAMS                               2
 109 #define IPR_NUM_CFG_CHG_HCAMS                           2
 110 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 111 #define IPR_MAX_NUM_TARGETS_PER_BUS                     256
 112 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 113 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 114 #define IPR_VSET_BUS                                    0xff
 115 #define IPR_IOA_BUS                                             0xff
 116 #define IPR_IOA_TARGET                                  0xff
 117 #define IPR_IOA_LUN                                             0xff
 118 #define IPR_MAX_NUM_BUSES                               16
 119 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 120
 121 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 122
 123 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 124 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 125                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 126
 127 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 128 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 129                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 130
 131 #define IPR_MAX_PHYSICAL_DEVS                           192
 132
 133 #define IPR_MAX_SGLIST                                  64
 134 #define IPR_IOA_MAX_SECTORS                             32767
 135 #define IPR_VSET_MAX_SECTORS                            512
 136 #define IPR_MAX_CDB_LEN                                 16
 137
 138 #define IPR_DEFAULT_BUS_WIDTH                           16
 139 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 140 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 141 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 142 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 143
 144 #define IPR_IOA_RES_HANDLE                              0xffffffff
 145 #define IPR_INVALID_RES_HANDLE                  0
 146 #define IPR_IOA_RES_ADDR                                0x00ffffff
 147
 148 /*
 149  * Adapter Commands
 150  */
 151 #define IPR_QUERY_RSRC_STATE                            0xC2
 152 #define IPR_RESET_DEVICE                                0xC3
 153 #define IPR_RESET_TYPE_SELECT                           0x80
 154 #define IPR_LUN_RESET                                   0x40
 155 #define IPR_TARGET_RESET                                        0x20
 156 #define IPR_BUS_RESET                                   0x10
 157 #define IPR_ATA_PHY_RESET                                       0x80
 158 #define IPR_ID_HOST_RR_Q                                0xC4
 159 #define IPR_QUERY_IOA_CONFIG                            0xC5
 160 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 161 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 162 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 163 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 164 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 165 #define IPR_IOA_SHUTDOWN                                0xF7
 166 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 167
 168 /*
 169  * Timeouts
 170  */
 171 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 172 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 173 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 174 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 175 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 176 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 177 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 178 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 179 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 180 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 181 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 182 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 183 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 184 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 185 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 186
 187 /*
 188  * SCSI Literals
 189  */
 190 #define IPR_VENDOR_ID_LEN                       8
 191 #define IPR_PROD_ID_LEN                         16
 192 #define IPR_SERIAL_NUM_LEN                      8
 193
 194 /*
 195  * Hardware literals
 196  */
 197 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 198 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 199 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 200 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 201 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 202 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 203 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 204 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 205 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 206 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 207 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 208 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 209 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 210 #define IPR_DOORBELL                                    0x82800000
 211 #define IPR_RUNTIME_RESET                               0x40000000
 212
 213 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 214 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 215 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 216 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 217 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 218 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 219 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 220 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 221 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 222 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 223 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 224
 225 #define IPR_PCII_ERROR_INTERRUPTS \
 226 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 227 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 228
 229 #define IPR_PCII_OPER_INTERRUPTS \
 230 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 231
 232 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 233 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 234
 235 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 236 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 237
 238 /*
 239  * Dump literals
 240  */
 241 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 242 #define IPR_NUM_SDT_ENTRIES                             511
 243 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 244
 245 /*
 246  * Misc literals
 247  */
 248 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 249
 250 /*
 251  * Adapter interface types
 252  */
 253
 254 struct ipr_res_addr {
 255         u8 reserved;
 256         u8 bus;
 257         u8 target;
 258         u8 lun;
 259 #define IPR_GET_PHYS_LOC(res_addr) \
 260         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 261 }__attribute__((packed, aligned (4)));
 262
 263 struct ipr_std_inq_vpids {
 264         u8 vendor_id[IPR_VENDOR_ID_LEN];
 265         u8 product_id[IPR_PROD_ID_LEN];
 266 }__attribute__((packed));
 267
 268 struct ipr_vpd {
 269         struct ipr_std_inq_vpids vpids;
 270         u8 sn[IPR_SERIAL_NUM_LEN];
 271 }__attribute__((packed));
 272
 273 struct ipr_ext_vpd {
 274         struct ipr_vpd vpd;
 275         __be32 wwid[2];
 276 }__attribute__((packed));
 277
 278 struct ipr_std_inq_data {
 279         u8 peri_qual_dev_type;
 280 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 281 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 282
 283         u8 removeable_medium_rsvd;
 284 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 285
 286 #define IPR_IS_DASD_DEVICE(std_inq) \
 287 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 288 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 289
 290 #define IPR_IS_SES_DEVICE(std_inq) \
 291 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 292
 293         u8 version;
 294         u8 aen_naca_fmt;
 295         u8 additional_len;
 296         u8 sccs_rsvd;
 297         u8 bq_enc_multi;
 298         u8 sync_cmdq_flags;
 299
 300         struct ipr_std_inq_vpids vpids;
 301
 302         u8 ros_rsvd_ram_rsvd[4];
 303
 304         u8 serial_num[IPR_SERIAL_NUM_LEN];
 305 }__attribute__ ((packed));
 306
 307 struct ipr_config_table_entry {
 308         u8 proto;
 309 #define IPR_PROTO_SATA                  0x02
 310 #define IPR_PROTO_SATA_ATAPI            0x03
 311 #define IPR_PROTO_SAS_STP               0x06
 312 #define IPR_PROTO_SAS_STP_ATAPI 0x07
 313         u8 array_id;
 314         u8 flags;
 315 #define IPR_IS_IOA_RESOURCE     0x80
 316 #define IPR_IS_ARRAY_MEMBER 0x20
 317 #define IPR_IS_HOT_SPARE        0x10
 318
 319         u8 rsvd_subtype;
 320 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 321 #define IPR_SUBTYPE_AF_DASD                     0
 322 #define IPR_SUBTYPE_GENERIC_SCSI        1
 323 #define IPR_SUBTYPE_VOLUME_SET          2
 324 #define IPR_SUBTYPE_GENERIC_ATA 4
 325
 326 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 327 #define IPR_QUEUE_FROZEN_MODEL  0
 328 #define IPR_QUEUE_NACA_MODEL            1
 329
 330         struct ipr_res_addr res_addr;
 331         __be32 res_handle;
 332         __be32 reserved4[2];
 333         struct ipr_std_inq_data std_inq_data;
 334 }__attribute__ ((packed, aligned (4)));
 335
 336 struct ipr_config_table_hdr {
 337         u8 num_entries;
 338         u8 flags;
 339 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 340         __be16 reserved;
 341 }__attribute__((packed, aligned (4)));
 342
 343 struct ipr_config_table {
 344         struct ipr_config_table_hdr hdr;
 345         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 346 }__attribute__((packed, aligned (4)));
 347
 348 struct ipr_hostrcb_cfg_ch_not {
 349         struct ipr_config_table_entry cfgte;
 350         u8 reserved[936];
 351 }__attribute__((packed, aligned (4)));
 352
 353 struct ipr_supported_device {
 354         __be16 data_length;
 355         u8 reserved;
 356         u8 num_records;
 357         struct ipr_std_inq_vpids vpids;
 358         u8 reserved2[16];
 359 }__attribute__((packed, aligned (4)));
 360
 361 /* Command packet structure */
 362 struct ipr_cmd_pkt {
 363         __be16 reserved;                /* Reserved by IOA */
 364         u8 request_type;
 365 #define IPR_RQTYPE_SCSICDB              0x00
 366 #define IPR_RQTYPE_IOACMD               0x01
 367 #define IPR_RQTYPE_HCAM                 0x02
 368 #define IPR_RQTYPE_ATA_PASSTHRU 0x04
 369
 370         u8 luntar_luntrn;
 371
 372         u8 flags_hi;
 373 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 374 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 375 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 376 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 377 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 378
 379         u8 flags_lo;
 380 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 381 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 382 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 383 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 384 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 385 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 386 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 387
 388         u8 cdb[16];
 389         __be16 timeout;
 390 }__attribute__ ((packed, aligned(4)));
 391
 392 struct ipr_ioarcb_ata_regs {
 393         u8 flags;
 394 #define IPR_ATA_FLAG_PACKET_CMD                 0x80
 395 #define IPR_ATA_FLAG_XFER_TYPE_DMA                      0x40
 396 #define IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION  0x20
 397         u8 reserved[3];
 398
 399         __be16 data;
 400         u8 feature;
 401         u8 nsect;
 402         u8 lbal;
 403         u8 lbam;
 404         u8 lbah;
 405         u8 device;
 406         u8 command;
 407         u8 reserved2[3];
 408         u8 hob_feature;
 409         u8 hob_nsect;
 410         u8 hob_lbal;
 411         u8 hob_lbam;
 412         u8 hob_lbah;
 413         u8 ctl;
 414 }__attribute__ ((packed, aligned(4)));
 415
 416 struct ipr_ioarcb_add_data {
 417         union {
 418                 struct ipr_ioarcb_ata_regs regs;
 419                 __be32 add_cmd_parms[10];
 420         }u;
 421 }__attribute__ ((packed, aligned(4)));
 422
 423 /* IOA Request Control Block    128 bytes  */
 424 struct ipr_ioarcb {
 425         __be32 ioarcb_host_pci_addr;
 426         __be32 reserved;
 427         __be32 res_handle;
 428         __be32 host_response_handle;
 429         __be32 reserved1;
 430         __be32 reserved2;
 431         __be32 reserved3;
 432
 433         __be32 write_data_transfer_length;
 434         __be32 read_data_transfer_length;
 435         __be32 write_ioadl_addr;
 436         __be32 write_ioadl_len;
 437         __be32 read_ioadl_addr;
 438         __be32 read_ioadl_len;
 439
 440         __be32 ioasa_host_pci_addr;
 441         __be16 ioasa_len;
 442         __be16 reserved4;
 443
 444         struct ipr_cmd_pkt cmd_pkt;
 445
 446         __be32 add_cmd_parms_len;
 447         struct ipr_ioarcb_add_data add_data;
 448 }__attribute__((packed, aligned (4)));
 449
 450 struct ipr_ioadl_desc {
 451         __be32 flags_and_data_len;
 452 #define IPR_IOADL_FLAGS_MASK            0xff000000
 453 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 454 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 455 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 456 #define IPR_IOADL_FLAGS_READ            0x48000000
 457 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 458 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 459 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 460 #define IPR_IOADL_FLAGS_LAST            0x01000000
 461
 462         __be32 address;
 463 }__attribute__((packed, aligned (8)));
 464
 465 struct ipr_ioasa_vset {
 466         __be32 failing_lba_hi;
 467         __be32 failing_lba_lo;
 468         __be32 reserved;
 469 }__attribute__((packed, aligned (4)));
 470
 471 struct ipr_ioasa_af_dasd {
 472         __be32 failing_lba;
 473         __be32 reserved[2];
 474 }__attribute__((packed, aligned (4)));
 475
 476 struct ipr_ioasa_gpdd {
 477         u8 end_state;
 478         u8 bus_phase;
 479         __be16 reserved;
 480         __be32 ioa_data[2];
 481 }__attribute__((packed, aligned (4)));
 482
 483 struct ipr_ioasa_gata {
 484         u8 error;
 485         u8 nsect;               /* Interrupt reason */
 486         u8 lbal;
 487         u8 lbam;
 488         u8 lbah;
 489         u8 device;
 490         u8 status;
 491         u8 alt_status;  /* ATA CTL */
 492         u8 hob_nsect;
 493         u8 hob_lbal;
 494         u8 hob_lbam;
 495         u8 hob_lbah;
 496 }__attribute__((packed, aligned (4)));
 497
 498 struct ipr_auto_sense {
 499         __be16 auto_sense_len;
 500         __be16 ioa_data_len;
 501         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 502 };
 503
 504 struct ipr_ioasa {
 505         __be32 ioasc;
 506 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 507 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 508 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 509 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 510
 511         __be16 ret_stat_len;    /* Length of the returned IOASA */
 512
 513         __be16 avail_stat_len;  /* Total Length of status available. */
 514
 515         __be32 residual_data_len;       /* number of bytes in the host data */
 516         /* buffers that were not used by the IOARCB command. */
 517
 518         __be32 ilid;
 519 #define IPR_NO_ILID                     0
 520 #define IPR_DRIVER_ILID         0xffffffff
 521
 522         __be32 fd_ioasc;
 523
 524         __be32 fd_phys_locator;
 525
 526         __be32 fd_res_handle;
 527
 528         __be32 ioasc_specific;  /* status code specific field */
 529 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 530 #define IPR_AUTOSENSE_VALID                     0x40000000
 531 #define IPR_ATA_DEVICE_WAS_RESET                0x20000000
 532 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 533 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 534 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 535
 536         union {
 537                 struct ipr_ioasa_vset vset;
 538                 struct ipr_ioasa_af_dasd dasd;
 539                 struct ipr_ioasa_gpdd gpdd;
 540                 struct ipr_ioasa_gata gata;
 541         } u;
 542
 543         struct ipr_auto_sense auto_sense;
 544 }__attribute__((packed, aligned (4)));
 545
 546 struct ipr_mode_parm_hdr {
 547         u8 length;
 548         u8 medium_type;
 549         u8 device_spec_parms;
 550         u8 block_desc_len;
 551 }__attribute__((packed));
 552
 553 struct ipr_mode_pages {
 554         struct ipr_mode_parm_hdr hdr;
 555         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 556 }__attribute__((packed));
 557
 558 struct ipr_mode_page_hdr {
 559         u8 ps_page_code;
 560 #define IPR_MODE_PAGE_PS        0x80
 561 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 562         u8 page_length;
 563 }__attribute__ ((packed));
 564
 565 struct ipr_dev_bus_entry {
 566         struct ipr_res_addr res_addr;
 567         u8 flags;
 568 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 569 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 570 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 571 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 572 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 573 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 574 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 575
 576         u8 scsi_id;
 577         u8 bus_width;
 578         u8 extended_reset_delay;
 579 #define IPR_EXTENDED_RESET_DELAY        7
 580
 581         __be32 max_xfer_rate;
 582
 583         u8 spinup_delay;
 584         u8 reserved3;
 585         __be16 reserved4;
 586 }__attribute__((packed, aligned (4)));
 587
 588 struct ipr_mode_page28 {
 589         struct ipr_mode_page_hdr hdr;
 590         u8 num_entries;
 591         u8 entry_length;
 592         struct ipr_dev_bus_entry bus[0];
 593 }__attribute__((packed));
 594
 595 struct ipr_ioa_vpd {
 596         struct ipr_std_inq_data std_inq_data;
 597         u8 ascii_part_num[12];
 598         u8 reserved[40];
 599         u8 ascii_plant_code[4];
 600 }__attribute__((packed));
 601
 602 struct ipr_inquiry_page3 {
 603         u8 peri_qual_dev_type;
 604         u8 page_code;
 605         u8 reserved1;
 606         u8 page_length;
 607         u8 ascii_len;
 608         u8 reserved2[3];
 609         u8 load_id[4];
 610         u8 major_release;
 611         u8 card_type;
 612         u8 minor_release[2];
 613         u8 ptf_number[4];
 614         u8 patch_number[4];
 615 }__attribute__((packed));
 616
 617 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 618 struct ipr_inquiry_page0 {
 619         u8 peri_qual_dev_type;
 620         u8 page_code;
 621         u8 reserved1;
 622         u8 len;
 623         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 624 }__attribute__((packed));
 625
 626 struct ipr_hostrcb_device_data_entry {
 627         struct ipr_vpd vpd;
 628         struct ipr_res_addr dev_res_addr;
 629         struct ipr_vpd new_vpd;
 630         struct ipr_vpd ioa_last_with_dev_vpd;
 631         struct ipr_vpd cfc_last_with_dev_vpd;
 632         __be32 ioa_data[5];
 633 }__attribute__((packed, aligned (4)));
 634
 635 struct ipr_hostrcb_device_data_entry_enhanced {
 636         struct ipr_ext_vpd vpd;
 637         u8 ccin[4];
 638         struct ipr_res_addr dev_res_addr;
 639         struct ipr_ext_vpd new_vpd;
 640         u8 new_ccin[4];
 641         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 642         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 643 }__attribute__((packed, aligned (4)));
 644
 645 struct ipr_hostrcb_array_data_entry {
 646         struct ipr_vpd vpd;
 647         struct ipr_res_addr expected_dev_res_addr;
 648         struct ipr_res_addr dev_res_addr;
 649 }__attribute__((packed, aligned (4)));
 650
 651 struct ipr_hostrcb_array_data_entry_enhanced {
 652         struct ipr_ext_vpd vpd;
 653         u8 ccin[4];
 654         struct ipr_res_addr expected_dev_res_addr;
 655         struct ipr_res_addr dev_res_addr;
 656 }__attribute__((packed, aligned (4)));
 657
 658 struct ipr_hostrcb_type_ff_error {
 659         __be32 ioa_data[502];
 660 }__attribute__((packed, aligned (4)));
 661
 662 struct ipr_hostrcb_type_01_error {
 663         __be32 seek_counter;
 664         __be32 read_counter;
 665         u8 sense_data[32];
 666         __be32 ioa_data[236];
 667 }__attribute__((packed, aligned (4)));
 668
 669 struct ipr_hostrcb_type_02_error {
 670         struct ipr_vpd ioa_vpd;
 671         struct ipr_vpd cfc_vpd;
 672         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 673         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 674         __be32 ioa_data[3];
 675 }__attribute__((packed, aligned (4)));
 676
 677 struct ipr_hostrcb_type_12_error {
 678         struct ipr_ext_vpd ioa_vpd;
 679         struct ipr_ext_vpd cfc_vpd;
 680         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 681         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 682         __be32 ioa_data[3];
 683 }__attribute__((packed, aligned (4)));
 684
 685 struct ipr_hostrcb_type_03_error {
 686         struct ipr_vpd ioa_vpd;
 687         struct ipr_vpd cfc_vpd;
 688         __be32 errors_detected;
 689         __be32 errors_logged;
 690         u8 ioa_data[12];
 691         struct ipr_hostrcb_device_data_entry dev[3];
 692 }__attribute__((packed, aligned (4)));
 693
 694 struct ipr_hostrcb_type_13_error {
 695         struct ipr_ext_vpd ioa_vpd;
 696         struct ipr_ext_vpd cfc_vpd;
 697         __be32 errors_detected;
 698         __be32 errors_logged;
 699         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 700 }__attribute__((packed, aligned (4)));
 701
 702 struct ipr_hostrcb_type_04_error {
 703         struct ipr_vpd ioa_vpd;
 704         struct ipr_vpd cfc_vpd;
 705         u8 ioa_data[12];
 706         struct ipr_hostrcb_array_data_entry array_member[10];
 707         __be32 exposed_mode_adn;
 708         __be32 array_id;
 709         struct ipr_vpd incomp_dev_vpd;
 710         __be32 ioa_data2;
 711         struct ipr_hostrcb_array_data_entry array_member2[8];
 712         struct ipr_res_addr last_func_vset_res_addr;
 713         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 714         u8 protection_level[8];
 715 }__attribute__((packed, aligned (4)));
 716
 717 struct ipr_hostrcb_type_14_error {
 718         struct ipr_ext_vpd ioa_vpd;
 719         struct ipr_ext_vpd cfc_vpd;
 720         __be32 exposed_mode_adn;
 721         __be32 array_id;
 722         struct ipr_res_addr last_func_vset_res_addr;
 723         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 724         u8 protection_level[8];
 725         __be32 num_entries;
 726         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 727 }__attribute__((packed, aligned (4)));
 728
 729 struct ipr_hostrcb_type_07_error {
 730         u8 failure_reason[64];
 731         struct ipr_vpd vpd;
 732         u32 data[222];
 733 }__attribute__((packed, aligned (4)));
 734
 735 struct ipr_hostrcb_type_17_error {
 736         u8 failure_reason[64];
 737         struct ipr_ext_vpd vpd;
 738         u32 data[476];
 739 }__attribute__((packed, aligned (4)));
 740
 741 struct ipr_hostrcb_config_element {
 742         u8 type_status;
 743 #define IPR_PATH_CFG_TYPE_MASK  0xF0
 744 #define IPR_PATH_CFG_NOT_EXIST  0x00
 745 #define IPR_PATH_CFG_IOA_PORT           0x10
 746 #define IPR_PATH_CFG_EXP_PORT           0x20
 747 #define IPR_PATH_CFG_DEVICE_PORT        0x30
 748 #define IPR_PATH_CFG_DEVICE_LUN 0x40
 749
 750 #define IPR_PATH_CFG_STATUS_MASK        0x0F
 751 #define IPR_PATH_CFG_NO_PROB            0x00
 752 #define IPR_PATH_CFG_DEGRADED           0x01
 753 #define IPR_PATH_CFG_FAILED             0x02
 754 #define IPR_PATH_CFG_SUSPECT            0x03
 755 #define IPR_PATH_NOT_DETECTED           0x04
 756 #define IPR_PATH_INCORRECT_CONN 0x05
 757
 758         u8 cascaded_expander;
 759         u8 phy;
 760         u8 link_rate;
 761 #define IPR_PHY_LINK_RATE_MASK  0x0F
 762
 763         __be32 wwid[2];
 764 }__attribute__((packed, aligned (4)));
 765
 766 struct ipr_hostrcb_fabric_desc {
 767         __be16 length;
 768         u8 ioa_port;
 769         u8 cascaded_expander;
 770         u8 phy;
 771         u8 path_state;
 772 #define IPR_PATH_ACTIVE_MASK            0xC0
 773 #define IPR_PATH_NO_INFO                0x00
 774 #define IPR_PATH_ACTIVE                 0x40
 775 #define IPR_PATH_NOT_ACTIVE             0x80
 776
 777 #define IPR_PATH_STATE_MASK             0x0F
 778 #define IPR_PATH_STATE_NO_INFO  0x00
 779 #define IPR_PATH_HEALTHY                0x01
 780 #define IPR_PATH_DEGRADED               0x02
 781 #define IPR_PATH_FAILED                 0x03
 782
 783         __be16 num_entries;
 784         struct ipr_hostrcb_config_element elem[1];
 785 }__attribute__((packed, aligned (4)));
 786
 787 #define for_each_fabric_cfg(fabric, cfg) \
 788                 for (cfg = (fabric)->elem; \
 789                         cfg < ((fabric)->elem + be16_to_cpu((fabric)->num_entries)); \
 790                         cfg++)
 791
 792 struct ipr_hostrcb_type_20_error {
 793         u8 failure_reason[64];
 794         u8 reserved[3];
 795         u8 num_entries;
 796         struct ipr_hostrcb_fabric_desc desc[1];
 797 }__attribute__((packed, aligned (4)));
 798
 799 struct ipr_hostrcb_error {
 800         __be32 failing_dev_ioasc;
 801         struct ipr_res_addr failing_dev_res_addr;
 802         __be32 failing_dev_res_handle;
 803         __be32 prc;
 804         union {
 805                 struct ipr_hostrcb_type_ff_error type_ff_error;
 806                 struct ipr_hostrcb_type_01_error type_01_error;
 807                 struct ipr_hostrcb_type_02_error type_02_error;
 808                 struct ipr_hostrcb_type_03_error type_03_error;
 809                 struct ipr_hostrcb_type_04_error type_04_error;
 810                 struct ipr_hostrcb_type_07_error type_07_error;
 811                 struct ipr_hostrcb_type_12_error type_12_error;
 812                 struct ipr_hostrcb_type_13_error type_13_error;
 813                 struct ipr_hostrcb_type_14_error type_14_error;
 814                 struct ipr_hostrcb_type_17_error type_17_error;
 815                 struct ipr_hostrcb_type_20_error type_20_error;
 816         } u;
 817 }__attribute__((packed, aligned (4)));
 818
 819 struct ipr_hostrcb_raw {
 820         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 821 }__attribute__((packed, aligned (4)));
 822
 823 struct ipr_hcam {
 824         u8 op_code;
 825 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 826 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 827
 828         u8 notify_type;
 829 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 830 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 831 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 832 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 833 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 834
 835         u8 notifications_lost;
 836 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 837 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 838
 839         u8 flags;
 840 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 841 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 842
 843         u8 overlay_id;
 844 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 845 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 846 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 847 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 848 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 849 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 850 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 851 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 852 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 853 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 854 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 855 #define IPR_HOST_RCB_OVERLAY_ID_20                              0x20
 856 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 857
 858         u8 reserved1[3];
 859         __be32 ilid;
 860         __be32 time_since_last_ioa_reset;
 861         __be32 reserved2;
 862         __be32 length;
 863
 864         union {
 865                 struct ipr_hostrcb_error error;
 866                 struct ipr_hostrcb_cfg_ch_not ccn;
 867                 struct ipr_hostrcb_raw raw;
 868         } u;
 869 }__attribute__((packed, aligned (4)));
 870
 871 struct ipr_hostrcb {
 872         struct ipr_hcam hcam;
 873         dma_addr_t hostrcb_dma;
 874         struct list_head queue;
 875         struct ipr_ioa_cfg *ioa_cfg;
 876 };
 877
 878 /* IPR smart dump table structures */
 879 struct ipr_sdt_entry {
 880         __be32 bar_str_offset;
 881         __be32 end_offset;
 882         u8 entry_byte;
 883         u8 reserved[3];
 884
 885         u8 flags;
 886 #define IPR_SDT_ENDIAN          0x80
 887 #define IPR_SDT_VALID_ENTRY     0x20
 888
 889         u8 resv;
 890         __be16 priority;
 891 }__attribute__((packed, aligned (4)));
 892
 893 struct ipr_sdt_header {
 894         __be32 state;
 895         __be32 num_entries;
 896         __be32 num_entries_used;
 897         __be32 dump_size;
 898 }__attribute__((packed, aligned (4)));
 899
 900 struct ipr_sdt {
 901         struct ipr_sdt_header hdr;
 902         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 903 }__attribute__((packed, aligned (4)));
 904
 905 struct ipr_uc_sdt {
 906         struct ipr_sdt_header hdr;
 907         struct ipr_sdt_entry entry[1];
 908 }__attribute__((packed, aligned (4)));
 909
 910 /*
 911  * Driver types
 912  */
 913 struct ipr_bus_attributes {
 914         u8 bus;
 915         u8 qas_enabled;
 916         u8 bus_width;
 917         u8 reserved;
 918         u32 max_xfer_rate;
 919 };
 920
 921 struct ipr_sata_port {
 922         struct ipr_ioa_cfg *ioa_cfg;
 923         struct ata_port *ap;
 924         struct ipr_resource_entry *res;
 925         struct ipr_ioasa_gata ioasa;
 926 };
 927
 928 struct ipr_resource_entry {
 929         struct ipr_config_table_entry cfgte;
 930         u8 needs_sync_complete:1;
 931         u8 in_erp:1;
 932         u8 add_to_ml:1;
 933         u8 del_from_ml:1;
 934         u8 resetting_device:1;
 935
 936         struct scsi_device *sdev;
 937         struct ipr_sata_port *sata_port;
 938         struct list_head queue;
 939 };
 940
 941 struct ipr_resource_hdr {
 942         u16 num_entries;
 943         u16 reserved;
 944 };
 945
 946 struct ipr_resource_table {
 947         struct ipr_resource_hdr hdr;
 948         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 949 };
 950
 951 struct ipr_misc_cbs {
 952         struct ipr_ioa_vpd ioa_vpd;
 953         struct ipr_inquiry_page0 page0_data;
 954         struct ipr_inquiry_page3 page3_data;
 955         struct ipr_mode_pages mode_pages;
 956         struct ipr_supported_device supp_dev;
 957 };
 958
 959 struct ipr_interrupt_offsets {
 960         unsigned long set_interrupt_mask_reg;
 961         unsigned long clr_interrupt_mask_reg;
 962         unsigned long sense_interrupt_mask_reg;
 963         unsigned long clr_interrupt_reg;
 964
 965         unsigned long sense_interrupt_reg;
 966         unsigned long ioarrin_reg;
 967         unsigned long sense_uproc_interrupt_reg;
 968         unsigned long set_uproc_interrupt_reg;
 969         unsigned long clr_uproc_interrupt_reg;
 970 };
 971
 972 struct ipr_interrupts {
 973         void __iomem *set_interrupt_mask_reg;
 974         void __iomem *clr_interrupt_mask_reg;
 975         void __iomem *sense_interrupt_mask_reg;
 976         void __iomem *clr_interrupt_reg;
 977
 978         void __iomem *sense_interrupt_reg;
 979         void __iomem *ioarrin_reg;
 980         void __iomem *sense_uproc_interrupt_reg;
 981         void __iomem *set_uproc_interrupt_reg;
 982         void __iomem *clr_uproc_interrupt_reg;
 983 };
 984
 985 struct ipr_chip_cfg_t {
 986         u32 mailbox;
 987         u8 cache_line_size;
 988         struct ipr_interrupt_offsets regs;
 989 };
 990
 991 struct ipr_chip_t {
 992         u16 vendor;
 993         u16 device;
 994         const struct ipr_chip_cfg_t *cfg;
 995 };
 996
 997 enum ipr_shutdown_type {
 998         IPR_SHUTDOWN_NORMAL = 0x00,
 999         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
1000         IPR_SHUTDOWN_ABBREV = 0x80,
1001         IPR_SHUTDOWN_NONE = 0x100
1002 };
1003
1004 struct ipr_trace_entry {
1005         u32 time;
1006
1007         u8 op_code;
1008         u8 ata_op_code;
1009         u8 type;
1010 #define IPR_TRACE_START                 0x00
1011 #define IPR_TRACE_FINISH                0xff
1012         u8 cmd_index;
1013
1014         __be32 res_handle;
1015         union {
1016                 u32 ioasc;
1017                 u32 add_data;
1018                 u32 res_addr;
1019         } u;
1020 };
1021
1022 struct ipr_sglist {
1023         u32 order;
1024         u32 num_sg;
1025         u32 num_dma_sg;
1026         u32 buffer_len;
1027         struct scatterlist scatterlist[1];
1028 };
1029
1030 enum ipr_sdt_state {
1031         INACTIVE,
1032         WAIT_FOR_DUMP,
1033         GET_DUMP,
1034         ABORT_DUMP,
1035         DUMP_OBTAINED
1036 };
1037
1038 enum ipr_cache_state {
1039         CACHE_NONE,
1040         CACHE_DISABLED,
1041         CACHE_ENABLED,
1042         CACHE_INVALID
1043 };
1044
1045 /* Per-controller data */
1046 struct ipr_ioa_cfg {
1047         char eye_catcher[8];
1048 #define IPR_EYECATCHER                  "iprcfg"
1049
1050         struct list_head queue;
1051
1052         u8 allow_interrupts:1;
1053         u8 in_reset_reload:1;
1054         u8 in_ioa_bringdown:1;
1055         u8 ioa_unit_checked:1;
1056         u8 ioa_is_dead:1;
1057         u8 dump_taken:1;
1058         u8 allow_cmds:1;
1059         u8 allow_ml_add_del:1;
1060         u8 needs_hard_reset:1;
1061
1062         enum ipr_cache_state cache_state;
1063         u16 type; /* CCIN of the card */
1064
1065         u8 log_level;
1066 #define IPR_MAX_LOG_LEVEL                       4
1067 #define IPR_DEFAULT_LOG_LEVEL           2
1068
1069 #define IPR_NUM_TRACE_INDEX_BITS        8
1070 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
1071 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1072         char trace_start[8];
1073 #define IPR_TRACE_START_LABEL                   "trace"
1074         struct ipr_trace_entry *trace;
1075         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
1076
1077         /*
1078          * Queue for free command blocks
1079          */
1080         char ipr_free_label[8];
1081 #define IPR_FREEQ_LABEL                 "free-q"
1082         struct list_head free_q;
1083
1084         /*
1085          * Queue for command blocks outstanding to the adapter
1086          */
1087         char ipr_pending_label[8];
1088 #define IPR_PENDQ_LABEL                 "pend-q"
1089         struct list_head pending_q;
1090
1091         char cfg_table_start[8];
1092 #define IPR_CFG_TBL_START               "cfg"
1093         struct ipr_config_table *cfg_table;
1094         dma_addr_t cfg_table_dma;
1095
1096         char resource_table_label[8];
1097 #define IPR_RES_TABLE_LABEL             "res_tbl"
1098         struct ipr_resource_entry *res_entries;
1099         struct list_head free_res_q;
1100         struct list_head used_res_q;
1101
1102         char ipr_hcam_label[8];
1103 #define IPR_HCAM_LABEL                  "hcams"
1104         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
1105         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
1106         struct list_head hostrcb_free_q;
1107         struct list_head hostrcb_pending_q;
1108
1109         __be32 *host_rrq;
1110         dma_addr_t host_rrq_dma;
1111 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
1112 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
1113 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
1114 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
1115         volatile __be32 *hrrq_start;
1116         volatile __be32 *hrrq_end;
1117         volatile __be32 *hrrq_curr;
1118         volatile u32 toggle_bit;
1119
1120         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
1121
1122         const struct ipr_chip_cfg_t *chip_cfg;
1123
1124         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
1125         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
1126         void __iomem *ioa_mailbox;
1127         struct ipr_interrupts regs;
1128
1129         u16 saved_pcix_cmd_reg;
1130         u16 reset_retries;
1131
1132         u32 errors_logged;
1133         u32 doorbell;
1134
1135         struct Scsi_Host *host;
1136         struct pci_dev *pdev;
1137         struct ipr_sglist *ucode_sglist;
1138         u8 saved_mode_page_len;
1139
1140         struct work_struct work_q;
1141
1142         wait_queue_head_t reset_wait_q;
1143
1144         struct ipr_dump *dump;
1145         enum ipr_sdt_state sdt_state;
1146
1147         struct ipr_misc_cbs *vpd_cbs;
1148         dma_addr_t vpd_cbs_dma;
1149
1150         struct pci_pool *ipr_cmd_pool;
1151
1152         struct ipr_cmnd *reset_cmd;
1153
1154         struct ata_host ata_host;
1155         char ipr_cmd_label[8];
1156 #define IPR_CMD_LABEL           "ipr_cmnd"
1157         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1158         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1159 };
1160
1161 struct ipr_cmnd {
1162         struct ipr_ioarcb ioarcb;
1163         struct ipr_ioasa ioasa;
1164         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1165         struct list_head queue;
1166         struct scsi_cmnd *scsi_cmd;
1167         struct ata_queued_cmd *qc;
1168         struct completion completion;
1169         struct timer_list timer;
1170         void (*done) (struct ipr_cmnd *);
1171         int (*job_step) (struct ipr_cmnd *);
1172         int (*job_step_failed) (struct ipr_cmnd *);
1173         u16 cmd_index;
1174         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1175         dma_addr_t sense_buffer_dma;
1176         unsigned short dma_use_sg;
1177         dma_addr_t dma_handle;
1178         struct ipr_cmnd *sibling;
1179         union {
1180                 enum ipr_shutdown_type shutdown_type;
1181                 struct ipr_hostrcb *hostrcb;
1182                 unsigned long time_left;
1183                 unsigned long scratch;
1184                 struct ipr_resource_entry *res;
1185                 struct scsi_device *sdev;
1186         } u;
1187
1188         struct ipr_ioa_cfg *ioa_cfg;
1189 };
1190
1191 struct ipr_ses_table_entry {
1192         char product_id[17];
1193         char compare_product_id_byte[17];
1194         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1195 };
1196
1197 struct ipr_dump_header {
1198         u32 eye_catcher;
1199 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1200         u32 len;
1201         u32 num_entries;
1202         u32 first_entry_offset;
1203         u32 status;
1204 #define IPR_DUMP_STATUS_SUCCESS                 0
1205 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1206 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1207         u32 os;
1208 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1209         u32 driver_name;
1210 #define IPR_DUMP_DRIVER_NAME    0x49505232
1211 }__attribute__((packed, aligned (4)));
1212
1213 struct ipr_dump_entry_header {
1214         u32 eye_catcher;
1215 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1216         u32 len;
1217         u32 num_elems;
1218         u32 offset;
1219         u32 data_type;
1220 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1221 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1222         u32 id;
1223 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1224 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1225 #define IPR_DUMP_TRACE_ID               0x54524143
1226 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1227 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1228 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1229 #define IPR_DUMP_PEND_OPS               0x414F5053
1230         u32 status;
1231 }__attribute__((packed, aligned (4)));
1232
1233 struct ipr_dump_location_entry {
1234         struct ipr_dump_entry_header hdr;
1235         u8 location[BUS_ID_SIZE];
1236 }__attribute__((packed));
1237
1238 struct ipr_dump_trace_entry {
1239         struct ipr_dump_entry_header hdr;
1240         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1241 }__attribute__((packed, aligned (4)));
1242
1243 struct ipr_dump_version_entry {
1244         struct ipr_dump_entry_header hdr;
1245         u8 version[sizeof(IPR_DRIVER_VERSION)];
1246 };
1247
1248 struct ipr_dump_ioa_type_entry {
1249         struct ipr_dump_entry_header hdr;
1250         u32 type;
1251         u32 fw_version;
1252 };
1253
1254 struct ipr_driver_dump {
1255         struct ipr_dump_header hdr;
1256         struct ipr_dump_version_entry version_entry;
1257         struct ipr_dump_location_entry location_entry;
1258         struct ipr_dump_ioa_type_entry ioa_type_entry;
1259         struct ipr_dump_trace_entry trace_entry;
1260 }__attribute__((packed));
1261
1262 struct ipr_ioa_dump {
1263         struct ipr_dump_entry_header hdr;
1264         struct ipr_sdt sdt;
1265         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1266         u32 reserved;
1267         u32 next_page_index;
1268         u32 page_offset;
1269         u32 format;
1270 #define IPR_SDT_FMT2            2
1271 #define IPR_SDT_UNKNOWN         3
1272 }__attribute__((packed, aligned (4)));
1273
1274 struct ipr_dump {
1275         struct kref kref;
1276         struct ipr_ioa_cfg *ioa_cfg;
1277         struct ipr_driver_dump driver_dump;
1278         struct ipr_ioa_dump ioa_dump;
1279 };
1280
1281 struct ipr_error_table_t {
1282         u32 ioasc;
1283         int log_ioasa;
1284         int log_hcam;
1285         char *error;
1286 };
1287
1288 struct ipr_software_inq_lid_info {
1289         __be32 load_id;
1290         __be32 timestamp[3];
1291 }__attribute__((packed, aligned (4)));
1292
1293 struct ipr_ucode_image_header {
1294         __be32 header_length;
1295         __be32 lid_table_offset;
1296         u8 major_release;
1297         u8 card_type;
1298         u8 minor_release[2];
1299         u8 reserved[20];
1300         char eyecatcher[16];
1301         __be32 num_lids;
1302         struct ipr_software_inq_lid_info lid[1];
1303 }__attribute__((packed, aligned (4)));
1304
1305 /*
1306  * Macros
1307  */
1308 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1309
1310 #ifdef CONFIG_SCSI_IPR_TRACE
1311 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1312 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1313 #else
1314 #define ipr_create_trace_file(kobj, attr) 0
1315 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1316 #endif
1317
1318 #ifdef CONFIG_SCSI_IPR_DUMP
1319 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1320 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1321 #else
1322 #define ipr_create_dump_file(kobj, attr) 0
1323 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1324 #endif
1325
1326 /*
1327  * Error logging macros
1328  */
1329 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1330 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1331 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1332
1333 #define ipr_ra_printk(level, ioa_cfg, ra, fmt, ...) \
1334         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, (ioa_cfg)->host->host_no, \
1335                 (ra).bus, (ra).target, (ra).lun, ##__VA_ARGS__)
1336
1337 #define ipr_ra_err(ioa_cfg, ra, fmt, ...) \
1338         ipr_ra_printk(KERN_ERR, ioa_cfg, ra, fmt, ##__VA_ARGS__)
1339
1340 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1341         ipr_ra_err(ioa_cfg, (res)->cfgte.res_addr, fmt, ##__VA_ARGS__)
1342
1343 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1344 {                                                                       \
1345         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1346                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1347         } else {                                                        \
1348                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1349                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1350                         (res).bus, (res).target, (res).lun);            \
1351         }                                                               \
1352 }
1353
1354 #define ipr_hcam_err(hostrcb, fmt, ...)                                 \
1355 {                                                                                                       \
1356         if (ipr_is_device(&(hostrcb)->hcam.u.error.failing_dev_res_addr)) {             \
1357                 ipr_ra_err((hostrcb)->ioa_cfg,                                                  \
1358                                 (hostrcb)->hcam.u.error.failing_dev_res_addr,                   \
1359                                 fmt, ##__VA_ARGS__);                                                    \
1360         } else {                                                                                        \
1361                 dev_err(&(hostrcb)->ioa_cfg->pdev->dev, fmt, ##__VA_ARGS__);            \
1362         }                                                                                               \
1363 }
1364
1365 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1366         __FILE__, __FUNCTION__, __LINE__)
1367
1368 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1369 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1370
1371 #define ipr_err_separator \
1372 ipr_err("----------------------------------------------------------\n")
1373
1374
1375 /*
1376  * Inlines
1377  */
1378
1379 /**
1380  * ipr_is_ioa_resource - Determine if a resource is the IOA
1381  * @res:        resource entry struct
1382  *
1383  * Return value:
1384  *      1 if IOA / 0 if not IOA
1385  **/
1386 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1387 {
1388         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1389 }
1390
1391 /**
1392  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1393  * @res:        resource entry struct
1394  *
1395  * Return value:
1396  *      1 if AF DASD / 0 if not AF DASD
1397  **/
1398 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1399 {
1400         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1401             !ipr_is_ioa_resource(res) &&
1402             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1403                 return 1;
1404         else
1405                 return 0;
1406 }
1407
1408 /**
1409  * ipr_is_vset_device - Determine if a resource is a VSET
1410  * @res:        resource entry struct
1411  *
1412  * Return value:
1413  *      1 if VSET / 0 if not VSET
1414  **/
1415 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1416 {
1417         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1418             !ipr_is_ioa_resource(res) &&
1419             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1420                 return 1;
1421         else
1422                 return 0;
1423 }
1424
1425 /**
1426  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1427  * @res:        resource entry struct
1428  *
1429  * Return value:
1430  *      1 if GSCSI / 0 if not GSCSI
1431  **/
1432 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1433 {
1434         if (!ipr_is_ioa_resource(res) &&
1435             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1436                 return 1;
1437         else
1438                 return 0;
1439 }
1440
1441 /**
1442  * ipr_is_scsi_disk - Determine if a resource is a SCSI disk
1443  * @res:        resource entry struct
1444  *
1445  * Return value:
1446  *      1 if SCSI disk / 0 if not SCSI disk
1447  **/
1448 static inline int ipr_is_scsi_disk(struct ipr_resource_entry *res)
1449 {
1450         if (ipr_is_af_dasd_device(res) ||
1451             (ipr_is_gscsi(res) && IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data)))
1452                 return 1;
1453         else
1454                 return 0;
1455 }
1456
1457 /**
1458  * ipr_is_gata - Determine if a resource is a generic ATA resource
1459  * @res:        resource entry struct
1460  *
1461  * Return value:
1462  *      1 if GATA / 0 if not GATA
1463  **/
1464 static inline int ipr_is_gata(struct ipr_resource_entry *res)
1465 {
1466         if (!ipr_is_ioa_resource(res) &&
1467             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_ATA)
1468                 return 1;
1469         else
1470                 return 0;
1471 }
1472
1473 /**
1474  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1475  * @res:        resource entry struct
1476  *
1477  * Return value:
1478  *      1 if NACA queueing model / 0 if not NACA queueing model
1479  **/
1480 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1481 {
1482         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1483                 return 1;
1484         return 0;
1485 }
1486
1487 /**
1488  * ipr_is_device - Determine if resource address is that of a device
1489  * @res_addr:   resource address struct
1490  *
1491  * Return value:
1492  *      1 if AF / 0 if not AF
1493  **/
1494 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1495 {
1496         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1497             (res_addr->target < (IPR_MAX_NUM_TARGETS_PER_BUS - 1)))
1498                 return 1;
1499
1500         return 0;
1501 }
1502
1503 /**
1504  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1505  * @sdt_word:   SDT address
1506  *
1507  * Return value:
1508  *      1 if format 2 / 0 if not
1509  **/
1510 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1511 {
1512         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1513
1514         switch (bar_sel) {
1515         case IPR_SDT_FMT2_BAR0_SEL:
1516         case IPR_SDT_FMT2_BAR1_SEL:
1517         case IPR_SDT_FMT2_BAR2_SEL:
1518         case IPR_SDT_FMT2_BAR3_SEL:
1519         case IPR_SDT_FMT2_BAR4_SEL:
1520         case IPR_SDT_FMT2_BAR5_SEL:
1521         case IPR_SDT_FMT2_EXP_ROM_SEL:
1522                 return 1;
1523         };
1524
1525         return 0;
1526 }
1527
1528 #endif