2 * Procedures for creating, accessing and interpreting the device tree.
4 * Paul Mackerras August 1996.
5 * Copyright (C) 1996-2005 Paul Mackerras.
7 * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8 * {engebret|bergner}@us.ibm.com
10 * Adapted for sparc64 by David S. Miller davem@davemloft.net
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/string.h>
23 #include <linux/bootmem.h>
24 #include <linux/module.h>
27 #include <asm/of_device.h>
28 #include <asm/oplib.h>
33 static struct device_node
*allnodes
;
35 /* use when traversing tree through the allnext, child, sibling,
36 * or parent members of struct device_node.
38 static DEFINE_RWLOCK(devtree_lock
);
40 int of_device_is_compatible(struct device_node
*device
, const char *compat
)
45 cp
= (char *) of_get_property(device
, "compatible", &cplen
);
49 if (strncmp(cp
, compat
, strlen(compat
)) == 0)
58 EXPORT_SYMBOL(of_device_is_compatible
);
60 struct device_node
*of_get_parent(const struct device_node
*node
)
62 struct device_node
*np
;
71 EXPORT_SYMBOL(of_get_parent
);
73 struct device_node
*of_get_next_child(const struct device_node
*node
,
74 struct device_node
*prev
)
76 struct device_node
*next
;
78 next
= prev
? prev
->sibling
: node
->child
;
79 for (; next
!= 0; next
= next
->sibling
) {
85 EXPORT_SYMBOL(of_get_next_child
);
87 struct device_node
*of_find_node_by_path(const char *path
)
89 struct device_node
*np
= allnodes
;
91 for (; np
!= 0; np
= np
->allnext
) {
92 if (np
->full_name
!= 0 && strcmp(np
->full_name
, path
) == 0)
98 EXPORT_SYMBOL(of_find_node_by_path
);
100 struct device_node
*of_find_node_by_phandle(phandle handle
)
102 struct device_node
*np
;
104 for (np
= allnodes
; np
!= 0; np
= np
->allnext
)
105 if (np
->node
== handle
)
110 EXPORT_SYMBOL(of_find_node_by_phandle
);
112 struct device_node
*of_find_node_by_name(struct device_node
*from
,
115 struct device_node
*np
;
117 np
= from
? from
->allnext
: allnodes
;
118 for (; np
!= NULL
; np
= np
->allnext
)
119 if (np
->name
!= NULL
&& strcmp(np
->name
, name
) == 0)
124 EXPORT_SYMBOL(of_find_node_by_name
);
126 struct device_node
*of_find_node_by_type(struct device_node
*from
,
129 struct device_node
*np
;
131 np
= from
? from
->allnext
: allnodes
;
132 for (; np
!= 0; np
= np
->allnext
)
133 if (np
->type
!= 0 && strcmp(np
->type
, type
) == 0)
138 EXPORT_SYMBOL(of_find_node_by_type
);
140 struct device_node
*of_find_compatible_node(struct device_node
*from
,
141 const char *type
, const char *compatible
)
143 struct device_node
*np
;
145 np
= from
? from
->allnext
: allnodes
;
146 for (; np
!= 0; np
= np
->allnext
) {
148 && !(np
->type
!= 0 && strcmp(np
->type
, type
) == 0))
150 if (of_device_is_compatible(np
, compatible
))
156 EXPORT_SYMBOL(of_find_compatible_node
);
158 struct property
*of_find_property(struct device_node
*np
, const char *name
,
163 for (pp
= np
->properties
; pp
!= 0; pp
= pp
->next
) {
164 if (strcmp(pp
->name
, name
) == 0) {
172 EXPORT_SYMBOL(of_find_property
);
175 * Find a property with a given name for a given node
176 * and return the value.
178 void *of_get_property(struct device_node
*np
, const char *name
, int *lenp
)
180 struct property
*pp
= of_find_property(np
,name
,lenp
);
181 return pp
? pp
->value
: NULL
;
183 EXPORT_SYMBOL(of_get_property
);
185 int of_getintprop_default(struct device_node
*np
, const char *name
, int def
)
187 struct property
*prop
;
190 prop
= of_find_property(np
, name
, &len
);
191 if (!prop
|| len
!= 4)
194 return *(int *) prop
->value
;
196 EXPORT_SYMBOL(of_getintprop_default
);
198 int of_n_addr_cells(struct device_node
*np
)
204 ip
= of_get_property(np
, "#address-cells", NULL
);
207 } while (np
->parent
);
208 /* No #address-cells property for the root node, default to 2 */
211 EXPORT_SYMBOL(of_n_addr_cells
);
213 int of_n_size_cells(struct device_node
*np
)
219 ip
= of_get_property(np
, "#size-cells", NULL
);
222 } while (np
->parent
);
223 /* No #size-cells property for the root node, default to 1 */
226 EXPORT_SYMBOL(of_n_size_cells
);
228 int of_set_property(struct device_node
*dp
, const char *name
, void *val
, int len
)
230 struct property
**prevp
;
234 new_val
= kmalloc(len
, GFP_KERNEL
);
238 memcpy(new_val
, val
, len
);
242 write_lock(&devtree_lock
);
243 prevp
= &dp
->properties
;
245 struct property
*prop
= *prevp
;
247 if (!strcmp(prop
->name
, name
)) {
248 void *old_val
= prop
->value
;
251 ret
= prom_setprop(dp
->node
, name
, val
, len
);
254 prop
->value
= new_val
;
257 if (OF_IS_DYNAMIC(prop
))
260 OF_MARK_DYNAMIC(prop
);
266 prevp
= &(*prevp
)->next
;
268 write_unlock(&devtree_lock
);
270 /* XXX Upate procfs if necessary... */
274 EXPORT_SYMBOL(of_set_property
);
276 static unsigned int prom_early_allocated
;
278 static void * __init
prom_early_alloc(unsigned long size
)
282 ret
= __alloc_bootmem(size
, SMP_CACHE_BYTES
, 0UL);
284 memset(ret
, 0, size
);
286 prom_early_allocated
+= size
;
292 /* PSYCHO interrupt mapping support. */
293 #define PSYCHO_IMAP_A_SLOT0 0x0c00UL
294 #define PSYCHO_IMAP_B_SLOT0 0x0c20UL
295 static unsigned long psycho_pcislot_imap_offset(unsigned long ino
)
297 unsigned int bus
= (ino
& 0x10) >> 4;
298 unsigned int slot
= (ino
& 0x0c) >> 2;
301 return PSYCHO_IMAP_A_SLOT0
+ (slot
* 8);
303 return PSYCHO_IMAP_B_SLOT0
+ (slot
* 8);
306 #define PSYCHO_IMAP_SCSI 0x1000UL
307 #define PSYCHO_IMAP_ETH 0x1008UL
308 #define PSYCHO_IMAP_BPP 0x1010UL
309 #define PSYCHO_IMAP_AU_REC 0x1018UL
310 #define PSYCHO_IMAP_AU_PLAY 0x1020UL
311 #define PSYCHO_IMAP_PFAIL 0x1028UL
312 #define PSYCHO_IMAP_KMS 0x1030UL
313 #define PSYCHO_IMAP_FLPY 0x1038UL
314 #define PSYCHO_IMAP_SHW 0x1040UL
315 #define PSYCHO_IMAP_KBD 0x1048UL
316 #define PSYCHO_IMAP_MS 0x1050UL
317 #define PSYCHO_IMAP_SER 0x1058UL
318 #define PSYCHO_IMAP_TIM0 0x1060UL
319 #define PSYCHO_IMAP_TIM1 0x1068UL
320 #define PSYCHO_IMAP_UE 0x1070UL
321 #define PSYCHO_IMAP_CE 0x1078UL
322 #define PSYCHO_IMAP_A_ERR 0x1080UL
323 #define PSYCHO_IMAP_B_ERR 0x1088UL
324 #define PSYCHO_IMAP_PMGMT 0x1090UL
325 #define PSYCHO_IMAP_GFX 0x1098UL
326 #define PSYCHO_IMAP_EUPA 0x10a0UL
328 static unsigned long __psycho_onboard_imap_off
[] = {
329 /*0x20*/ PSYCHO_IMAP_SCSI
,
330 /*0x21*/ PSYCHO_IMAP_ETH
,
331 /*0x22*/ PSYCHO_IMAP_BPP
,
332 /*0x23*/ PSYCHO_IMAP_AU_REC
,
333 /*0x24*/ PSYCHO_IMAP_AU_PLAY
,
334 /*0x25*/ PSYCHO_IMAP_PFAIL
,
335 /*0x26*/ PSYCHO_IMAP_KMS
,
336 /*0x27*/ PSYCHO_IMAP_FLPY
,
337 /*0x28*/ PSYCHO_IMAP_SHW
,
338 /*0x29*/ PSYCHO_IMAP_KBD
,
339 /*0x2a*/ PSYCHO_IMAP_MS
,
340 /*0x2b*/ PSYCHO_IMAP_SER
,
341 /*0x2c*/ PSYCHO_IMAP_TIM0
,
342 /*0x2d*/ PSYCHO_IMAP_TIM1
,
343 /*0x2e*/ PSYCHO_IMAP_UE
,
344 /*0x2f*/ PSYCHO_IMAP_CE
,
345 /*0x30*/ PSYCHO_IMAP_A_ERR
,
346 /*0x31*/ PSYCHO_IMAP_B_ERR
,
347 /*0x32*/ PSYCHO_IMAP_PMGMT
349 #define PSYCHO_ONBOARD_IRQ_BASE 0x20
350 #define PSYCHO_ONBOARD_IRQ_LAST 0x32
351 #define psycho_onboard_imap_offset(__ino) \
352 __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
354 #define PSYCHO_ICLR_A_SLOT0 0x1400UL
355 #define PSYCHO_ICLR_SCSI 0x1800UL
357 #define psycho_iclr_offset(ino) \
358 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
359 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
361 static unsigned int psycho_irq_build(struct device_node
*dp
,
365 unsigned long controller_regs
= (unsigned long) _data
;
366 unsigned long imap
, iclr
;
367 unsigned long imap_off
, iclr_off
;
371 if (ino
< PSYCHO_ONBOARD_IRQ_BASE
) {
373 imap_off
= psycho_pcislot_imap_offset(ino
);
376 if (ino
> PSYCHO_ONBOARD_IRQ_LAST
) {
377 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino
);
380 imap_off
= psycho_onboard_imap_offset(ino
);
383 /* Now build the IRQ bucket. */
384 imap
= controller_regs
+ imap_off
;
387 iclr_off
= psycho_iclr_offset(ino
);
388 iclr
= controller_regs
+ iclr_off
;
391 if ((ino
& 0x20) == 0)
392 inofixup
= ino
& 0x03;
394 return build_irq(inofixup
, iclr
, imap
);
397 static void psycho_irq_trans_init(struct device_node
*dp
)
399 struct linux_prom64_registers
*regs
;
401 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
402 dp
->irq_trans
->irq_build
= psycho_irq_build
;
404 regs
= of_get_property(dp
, "reg", NULL
);
405 dp
->irq_trans
->data
= (void *) regs
[2].phys_addr
;
408 #define sabre_read(__reg) \
410 __asm__ __volatile__("ldxa [%1] %2, %0" \
412 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
417 struct sabre_irq_data
{
418 unsigned long controller_regs
;
419 unsigned int pci_first_busno
;
421 #define SABRE_CONFIGSPACE 0x001000000UL
422 #define SABRE_WRSYNC 0x1c20UL
424 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
425 (CONFIG_SPACE | (1UL << 24))
426 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
427 (((unsigned long)(BUS) << 16) | \
428 ((unsigned long)(DEVFN) << 8) | \
429 ((unsigned long)(REG)))
431 /* When a device lives behind a bridge deeper in the PCI bus topology
432 * than APB, a special sequence must run to make sure all pending DMA
433 * transfers at the time of IRQ delivery are visible in the coherency
434 * domain by the cpu. This sequence is to perform a read on the far
435 * side of the non-APB bridge, then perform a read of Sabre's DMA
436 * write-sync register.
438 static void sabre_wsync_handler(unsigned int ino
, void *_arg1
, void *_arg2
)
440 unsigned int phys_hi
= (unsigned int) (unsigned long) _arg1
;
441 struct sabre_irq_data
*irq_data
= _arg2
;
442 unsigned long controller_regs
= irq_data
->controller_regs
;
443 unsigned long sync_reg
= controller_regs
+ SABRE_WRSYNC
;
444 unsigned long config_space
= controller_regs
+ SABRE_CONFIGSPACE
;
445 unsigned int bus
, devfn
;
448 config_space
= SABRE_CONFIG_BASE(config_space
);
450 bus
= (phys_hi
>> 16) & 0xff;
451 devfn
= (phys_hi
>> 8) & 0xff;
453 config_space
|= SABRE_CONFIG_ENCODE(bus
, devfn
, 0x00);
455 __asm__
__volatile__("membar #Sync\n\t"
456 "lduha [%1] %2, %0\n\t"
459 : "r" ((u16
*) config_space
),
460 "i" (ASI_PHYS_BYPASS_EC_E_L
)
463 sabre_read(sync_reg
);
466 #define SABRE_IMAP_A_SLOT0 0x0c00UL
467 #define SABRE_IMAP_B_SLOT0 0x0c20UL
468 #define SABRE_IMAP_SCSI 0x1000UL
469 #define SABRE_IMAP_ETH 0x1008UL
470 #define SABRE_IMAP_BPP 0x1010UL
471 #define SABRE_IMAP_AU_REC 0x1018UL
472 #define SABRE_IMAP_AU_PLAY 0x1020UL
473 #define SABRE_IMAP_PFAIL 0x1028UL
474 #define SABRE_IMAP_KMS 0x1030UL
475 #define SABRE_IMAP_FLPY 0x1038UL
476 #define SABRE_IMAP_SHW 0x1040UL
477 #define SABRE_IMAP_KBD 0x1048UL
478 #define SABRE_IMAP_MS 0x1050UL
479 #define SABRE_IMAP_SER 0x1058UL
480 #define SABRE_IMAP_UE 0x1070UL
481 #define SABRE_IMAP_CE 0x1078UL
482 #define SABRE_IMAP_PCIERR 0x1080UL
483 #define SABRE_IMAP_GFX 0x1098UL
484 #define SABRE_IMAP_EUPA 0x10a0UL
485 #define SABRE_ICLR_A_SLOT0 0x1400UL
486 #define SABRE_ICLR_B_SLOT0 0x1480UL
487 #define SABRE_ICLR_SCSI 0x1800UL
488 #define SABRE_ICLR_ETH 0x1808UL
489 #define SABRE_ICLR_BPP 0x1810UL
490 #define SABRE_ICLR_AU_REC 0x1818UL
491 #define SABRE_ICLR_AU_PLAY 0x1820UL
492 #define SABRE_ICLR_PFAIL 0x1828UL
493 #define SABRE_ICLR_KMS 0x1830UL
494 #define SABRE_ICLR_FLPY 0x1838UL
495 #define SABRE_ICLR_SHW 0x1840UL
496 #define SABRE_ICLR_KBD 0x1848UL
497 #define SABRE_ICLR_MS 0x1850UL
498 #define SABRE_ICLR_SER 0x1858UL
499 #define SABRE_ICLR_UE 0x1870UL
500 #define SABRE_ICLR_CE 0x1878UL
501 #define SABRE_ICLR_PCIERR 0x1880UL
503 static unsigned long sabre_pcislot_imap_offset(unsigned long ino
)
505 unsigned int bus
= (ino
& 0x10) >> 4;
506 unsigned int slot
= (ino
& 0x0c) >> 2;
509 return SABRE_IMAP_A_SLOT0
+ (slot
* 8);
511 return SABRE_IMAP_B_SLOT0
+ (slot
* 8);
514 static unsigned long __sabre_onboard_imap_off
[] = {
515 /*0x20*/ SABRE_IMAP_SCSI
,
516 /*0x21*/ SABRE_IMAP_ETH
,
517 /*0x22*/ SABRE_IMAP_BPP
,
518 /*0x23*/ SABRE_IMAP_AU_REC
,
519 /*0x24*/ SABRE_IMAP_AU_PLAY
,
520 /*0x25*/ SABRE_IMAP_PFAIL
,
521 /*0x26*/ SABRE_IMAP_KMS
,
522 /*0x27*/ SABRE_IMAP_FLPY
,
523 /*0x28*/ SABRE_IMAP_SHW
,
524 /*0x29*/ SABRE_IMAP_KBD
,
525 /*0x2a*/ SABRE_IMAP_MS
,
526 /*0x2b*/ SABRE_IMAP_SER
,
527 /*0x2c*/ 0 /* reserved */,
528 /*0x2d*/ 0 /* reserved */,
529 /*0x2e*/ SABRE_IMAP_UE
,
530 /*0x2f*/ SABRE_IMAP_CE
,
531 /*0x30*/ SABRE_IMAP_PCIERR
,
533 #define SABRE_ONBOARD_IRQ_BASE 0x20
534 #define SABRE_ONBOARD_IRQ_LAST 0x30
535 #define sabre_onboard_imap_offset(__ino) \
536 __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
538 #define sabre_iclr_offset(ino) \
539 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
540 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
542 static unsigned int sabre_irq_build(struct device_node
*dp
,
546 struct sabre_irq_data
*irq_data
= _data
;
547 unsigned long controller_regs
= irq_data
->controller_regs
;
548 struct linux_prom_pci_registers
*regs
;
549 unsigned long imap
, iclr
;
550 unsigned long imap_off
, iclr_off
;
555 if (ino
< SABRE_ONBOARD_IRQ_BASE
) {
557 imap_off
= sabre_pcislot_imap_offset(ino
);
560 if (ino
> SABRE_ONBOARD_IRQ_LAST
) {
561 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino
);
564 imap_off
= sabre_onboard_imap_offset(ino
);
567 /* Now build the IRQ bucket. */
568 imap
= controller_regs
+ imap_off
;
571 iclr_off
= sabre_iclr_offset(ino
);
572 iclr
= controller_regs
+ iclr_off
;
575 if ((ino
& 0x20) == 0)
576 inofixup
= ino
& 0x03;
578 virt_irq
= build_irq(inofixup
, iclr
, imap
);
580 regs
= of_get_property(dp
, "reg", NULL
);
582 ((regs
->phys_hi
>> 16) & 0xff) != irq_data
->pci_first_busno
) {
583 irq_install_pre_handler(virt_irq
,
585 (void *) (long) regs
->phys_hi
,
594 static void sabre_irq_trans_init(struct device_node
*dp
)
596 struct linux_prom64_registers
*regs
;
597 struct sabre_irq_data
*irq_data
;
600 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
601 dp
->irq_trans
->irq_build
= sabre_irq_build
;
603 irq_data
= prom_early_alloc(sizeof(struct sabre_irq_data
));
605 regs
= of_get_property(dp
, "reg", NULL
);
606 irq_data
->controller_regs
= regs
[0].phys_addr
;
608 busrange
= of_get_property(dp
, "bus-range", NULL
);
609 irq_data
->pci_first_busno
= busrange
[0];
611 dp
->irq_trans
->data
= irq_data
;
614 /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
615 * imap/iclr registers are per-PBM.
617 #define SCHIZO_IMAP_BASE 0x1000UL
618 #define SCHIZO_ICLR_BASE 0x1400UL
620 static unsigned long schizo_imap_offset(unsigned long ino
)
622 return SCHIZO_IMAP_BASE
+ (ino
* 8UL);
625 static unsigned long schizo_iclr_offset(unsigned long ino
)
627 return SCHIZO_ICLR_BASE
+ (ino
* 8UL);
630 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs
,
633 return pbm_regs
+ schizo_iclr_offset(ino
) + 4;
636 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs
,
639 return pbm_regs
+ schizo_imap_offset(ino
) + 4;
642 #define schizo_read(__reg) \
644 __asm__ __volatile__("ldxa [%1] %2, %0" \
646 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
650 #define schizo_write(__reg, __val) \
651 __asm__ __volatile__("stxa %0, [%1] %2" \
653 : "r" (__val), "r" (__reg), \
654 "i" (ASI_PHYS_BYPASS_EC_E) \
657 static void tomatillo_wsync_handler(unsigned int ino
, void *_arg1
, void *_arg2
)
659 unsigned long sync_reg
= (unsigned long) _arg2
;
660 u64 mask
= 1UL << (ino
& IMAP_INO
);
664 schizo_write(sync_reg
, mask
);
669 val
= schizo_read(sync_reg
);
674 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
679 static unsigned char cacheline
[64]
680 __attribute__ ((aligned (64)));
682 __asm__
__volatile__("rd %%fprs, %0\n\t"
684 "wr %1, 0x0, %%fprs\n\t"
685 "stda %%f0, [%5] %6\n\t"
686 "wr %0, 0x0, %%fprs\n\t"
688 : "=&r" (mask
), "=&r" (val
)
689 : "0" (mask
), "1" (val
),
690 "i" (FPRS_FEF
), "r" (&cacheline
[0]),
691 "i" (ASI_BLK_COMMIT_P
));
695 struct schizo_irq_data
{
696 unsigned long pbm_regs
;
697 unsigned long sync_reg
;
702 static unsigned int schizo_irq_build(struct device_node
*dp
,
706 struct schizo_irq_data
*irq_data
= _data
;
707 unsigned long pbm_regs
= irq_data
->pbm_regs
;
708 unsigned long imap
, iclr
;
715 /* Now build the IRQ bucket. */
716 imap
= schizo_ino_to_imap(pbm_regs
, ino
);
717 iclr
= schizo_ino_to_iclr(pbm_regs
, ino
);
719 /* On Schizo, no inofixup occurs. This is because each
720 * INO has it's own IMAP register. On Psycho and Sabre
721 * there is only one IMAP register for each PCI slot even
722 * though four different INOs can be generated by each
725 * But, for JBUS variants (essentially, Tomatillo), we have
726 * to fixup the lowest bit of the interrupt group number.
730 is_tomatillo
= (irq_data
->sync_reg
!= 0UL);
733 if (irq_data
->portid
& 1)
734 ign_fixup
= (1 << 6);
737 virt_irq
= build_irq(ign_fixup
, iclr
, imap
);
740 irq_install_pre_handler(virt_irq
,
741 tomatillo_wsync_handler
,
742 ((irq_data
->chip_version
<= 4) ?
743 (void *) 1 : (void *) 0),
744 (void *) irq_data
->sync_reg
);
750 static void schizo_irq_trans_init(struct device_node
*dp
)
752 struct linux_prom64_registers
*regs
;
753 struct schizo_irq_data
*irq_data
;
755 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
756 dp
->irq_trans
->irq_build
= schizo_irq_build
;
758 irq_data
= prom_early_alloc(sizeof(struct schizo_irq_data
));
760 regs
= of_get_property(dp
, "reg", NULL
);
761 dp
->irq_trans
->data
= irq_data
;
763 irq_data
->pbm_regs
= regs
[0].phys_addr
;
764 irq_data
->sync_reg
= regs
[3].phys_addr
+ 0x1a18UL
;
765 irq_data
->portid
= of_getintprop_default(dp
, "portid", 0);
766 irq_data
->chip_version
= of_getintprop_default(dp
, "version#", 0);
769 static unsigned int pci_sun4v_irq_build(struct device_node
*dp
,
773 u32 devhandle
= (u32
) (unsigned long) _data
;
775 return sun4v_build_irq(devhandle
, devino
);
778 static void pci_sun4v_irq_trans_init(struct device_node
*dp
)
780 struct linux_prom64_registers
*regs
;
782 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
783 dp
->irq_trans
->irq_build
= pci_sun4v_irq_build
;
785 regs
= of_get_property(dp
, "reg", NULL
);
786 dp
->irq_trans
->data
= (void *) (unsigned long)
787 ((regs
->phys_addr
>> 32UL) & 0x0fffffff);
789 #endif /* CONFIG_PCI */
792 /* INO number to IMAP register offset for SYSIO external IRQ's.
793 * This should conform to both Sunfire/Wildfire server and Fusion
796 #define SYSIO_IMAP_SLOT0 0x2c04UL
797 #define SYSIO_IMAP_SLOT1 0x2c0cUL
798 #define SYSIO_IMAP_SLOT2 0x2c14UL
799 #define SYSIO_IMAP_SLOT3 0x2c1cUL
800 #define SYSIO_IMAP_SCSI 0x3004UL
801 #define SYSIO_IMAP_ETH 0x300cUL
802 #define SYSIO_IMAP_BPP 0x3014UL
803 #define SYSIO_IMAP_AUDIO 0x301cUL
804 #define SYSIO_IMAP_PFAIL 0x3024UL
805 #define SYSIO_IMAP_KMS 0x302cUL
806 #define SYSIO_IMAP_FLPY 0x3034UL
807 #define SYSIO_IMAP_SHW 0x303cUL
808 #define SYSIO_IMAP_KBD 0x3044UL
809 #define SYSIO_IMAP_MS 0x304cUL
810 #define SYSIO_IMAP_SER 0x3054UL
811 #define SYSIO_IMAP_TIM0 0x3064UL
812 #define SYSIO_IMAP_TIM1 0x306cUL
813 #define SYSIO_IMAP_UE 0x3074UL
814 #define SYSIO_IMAP_CE 0x307cUL
815 #define SYSIO_IMAP_SBERR 0x3084UL
816 #define SYSIO_IMAP_PMGMT 0x308cUL
817 #define SYSIO_IMAP_GFX 0x3094UL
818 #define SYSIO_IMAP_EUPA 0x309cUL
820 #define bogon ((unsigned long) -1)
821 static unsigned long sysio_irq_offsets
[] = {
822 /* SBUS Slot 0 --> 3, level 1 --> 7 */
823 SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
,
824 SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
, SYSIO_IMAP_SLOT0
,
825 SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
,
826 SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
, SYSIO_IMAP_SLOT1
,
827 SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
,
828 SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
, SYSIO_IMAP_SLOT2
,
829 SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
,
830 SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
, SYSIO_IMAP_SLOT3
,
832 /* Onboard devices (not relevant/used on SunFire). */
861 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
863 /* Convert Interrupt Mapping register pointer to associated
864 * Interrupt Clear register pointer, SYSIO specific version.
866 #define SYSIO_ICLR_UNUSED0 0x3400UL
867 #define SYSIO_ICLR_SLOT0 0x340cUL
868 #define SYSIO_ICLR_SLOT1 0x344cUL
869 #define SYSIO_ICLR_SLOT2 0x348cUL
870 #define SYSIO_ICLR_SLOT3 0x34ccUL
871 static unsigned long sysio_imap_to_iclr(unsigned long imap
)
873 unsigned long diff
= SYSIO_ICLR_UNUSED0
- SYSIO_IMAP_SLOT0
;
877 static unsigned int sbus_of_build_irq(struct device_node
*dp
,
881 unsigned long reg_base
= (unsigned long) _data
;
882 struct linux_prom_registers
*regs
;
883 unsigned long imap
, iclr
;
889 regs
= of_get_property(dp
, "reg", NULL
);
891 sbus_slot
= regs
->which_io
;
894 ino
+= (sbus_slot
* 8);
896 imap
= sysio_irq_offsets
[ino
];
897 if (imap
== ((unsigned long)-1)) {
898 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
904 /* SYSIO inconsistency. For external SLOTS, we have to select
905 * the right ICLR register based upon the lower SBUS irq level
909 iclr
= sysio_imap_to_iclr(imap
);
911 sbus_level
= ino
& 0x7;
915 iclr
= reg_base
+ SYSIO_ICLR_SLOT0
;
918 iclr
= reg_base
+ SYSIO_ICLR_SLOT1
;
921 iclr
= reg_base
+ SYSIO_ICLR_SLOT2
;
925 iclr
= reg_base
+ SYSIO_ICLR_SLOT3
;
929 iclr
+= ((unsigned long)sbus_level
- 1UL) * 8UL;
931 return build_irq(sbus_level
, iclr
, imap
);
934 static void sbus_irq_trans_init(struct device_node
*dp
)
936 struct linux_prom64_registers
*regs
;
938 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
939 dp
->irq_trans
->irq_build
= sbus_of_build_irq
;
941 regs
= of_get_property(dp
, "reg", NULL
);
942 dp
->irq_trans
->data
= (void *) (unsigned long) regs
->phys_addr
;
944 #endif /* CONFIG_SBUS */
947 static unsigned int central_build_irq(struct device_node
*dp
,
951 struct device_node
*central_dp
= _data
;
952 struct of_device
*central_op
= of_find_device_by_node(central_dp
);
953 struct resource
*res
;
954 unsigned long imap
, iclr
;
957 if (!strcmp(dp
->name
, "eeprom")) {
958 res
= ¢ral_op
->resource
[5];
959 } else if (!strcmp(dp
->name
, "zs")) {
960 res
= ¢ral_op
->resource
[4];
961 } else if (!strcmp(dp
->name
, "clock-board")) {
962 res
= ¢ral_op
->resource
[3];
967 imap
= res
->start
+ 0x00UL
;
968 iclr
= res
->start
+ 0x10UL
;
970 /* Set the INO state to idle, and disable. */
974 tmp
= upa_readl(imap
);
976 upa_writel(tmp
, imap
);
978 return build_irq(0, iclr
, imap
);
981 static void central_irq_trans_init(struct device_node
*dp
)
983 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
984 dp
->irq_trans
->irq_build
= central_build_irq
;
986 dp
->irq_trans
->data
= dp
;
991 void (*init
)(struct device_node
*);
995 static struct irq_trans pci_irq_trans_table
[] = {
996 { "SUNW,sabre", sabre_irq_trans_init
},
997 { "pci108e,a000", sabre_irq_trans_init
},
998 { "pci108e,a001", sabre_irq_trans_init
},
999 { "SUNW,psycho", psycho_irq_trans_init
},
1000 { "pci108e,8000", psycho_irq_trans_init
},
1001 { "SUNW,schizo", schizo_irq_trans_init
},
1002 { "pci108e,8001", schizo_irq_trans_init
},
1003 { "SUNW,schizo+", schizo_irq_trans_init
},
1004 { "pci108e,8002", schizo_irq_trans_init
},
1005 { "SUNW,tomatillo", schizo_irq_trans_init
},
1006 { "pci108e,a801", schizo_irq_trans_init
},
1007 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init
},
1011 static unsigned int sun4v_vdev_irq_build(struct device_node
*dp
,
1012 unsigned int devino
,
1015 u32 devhandle
= (u32
) (unsigned long) _data
;
1017 return sun4v_build_irq(devhandle
, devino
);
1020 static void sun4v_vdev_irq_trans_init(struct device_node
*dp
)
1022 struct linux_prom64_registers
*regs
;
1024 dp
->irq_trans
= prom_early_alloc(sizeof(struct of_irq_controller
));
1025 dp
->irq_trans
->irq_build
= sun4v_vdev_irq_build
;
1027 regs
= of_get_property(dp
, "reg", NULL
);
1028 dp
->irq_trans
->data
= (void *) (unsigned long)
1029 ((regs
->phys_addr
>> 32UL) & 0x0fffffff);
1032 static void irq_trans_init(struct device_node
*dp
)
1039 model
= of_get_property(dp
, "model", NULL
);
1041 model
= of_get_property(dp
, "compatible", NULL
);
1046 for (i
= 0; i
< ARRAY_SIZE(pci_irq_trans_table
); i
++) {
1047 struct irq_trans
*t
= &pci_irq_trans_table
[i
];
1049 if (!strcmp(model
, t
->name
))
1054 if (!strcmp(dp
->name
, "sbus") ||
1055 !strcmp(dp
->name
, "sbi"))
1056 return sbus_irq_trans_init(dp
);
1058 if (!strcmp(dp
->name
, "central"))
1059 return central_irq_trans_init(dp
->child
);
1060 if (!strcmp(dp
->name
, "virtual-devices"))
1061 return sun4v_vdev_irq_trans_init(dp
);
1064 static int is_root_node(const struct device_node
*dp
)
1069 return (dp
->parent
== NULL
);
1072 /* The following routines deal with the black magic of fully naming a
1075 * Certain well known named nodes are just the simple name string.
1077 * Actual devices have an address specifier appended to the base name
1078 * string, like this "foo@addr". The "addr" can be in any number of
1079 * formats, and the platform plus the type of the node determine the
1080 * format and how it is constructed.
1082 * For children of the ROOT node, the naming convention is fixed and
1083 * determined by whether this is a sun4u or sun4v system.
1085 * For children of other nodes, it is bus type specific. So
1086 * we walk up the tree until we discover a "device_type" property
1087 * we recognize and we go from there.
1089 * As an example, the boot device on my workstation has a full path:
1091 * /pci@1e,600000/ide@d/disk@0,0:c
1093 static void __init
sun4v_path_component(struct device_node
*dp
, char *tmp_buf
)
1095 struct linux_prom64_registers
*regs
;
1096 struct property
*rprop
;
1097 u32 high_bits
, low_bits
, type
;
1099 rprop
= of_find_property(dp
, "reg", NULL
);
1103 regs
= rprop
->value
;
1104 if (!is_root_node(dp
->parent
)) {
1105 sprintf(tmp_buf
, "%s@%x,%x",
1107 (unsigned int) (regs
->phys_addr
>> 32UL),
1108 (unsigned int) (regs
->phys_addr
& 0xffffffffUL
));
1112 type
= regs
->phys_addr
>> 60UL;
1113 high_bits
= (regs
->phys_addr
>> 32UL) & 0x0fffffffUL
;
1114 low_bits
= (regs
->phys_addr
& 0xffffffffUL
);
1116 if (type
== 0 || type
== 8) {
1117 const char *prefix
= (type
== 0) ? "m" : "i";
1120 sprintf(tmp_buf
, "%s@%s%x,%x",
1122 high_bits
, low_bits
);
1124 sprintf(tmp_buf
, "%s@%s%x",
1128 } else if (type
== 12) {
1129 sprintf(tmp_buf
, "%s@%x",
1130 dp
->name
, high_bits
);
1134 static void __init
sun4u_path_component(struct device_node
*dp
, char *tmp_buf
)
1136 struct linux_prom64_registers
*regs
;
1137 struct property
*prop
;
1139 prop
= of_find_property(dp
, "reg", NULL
);
1144 if (!is_root_node(dp
->parent
)) {
1145 sprintf(tmp_buf
, "%s@%x,%x",
1147 (unsigned int) (regs
->phys_addr
>> 32UL),
1148 (unsigned int) (regs
->phys_addr
& 0xffffffffUL
));
1152 prop
= of_find_property(dp
, "upa-portid", NULL
);
1154 prop
= of_find_property(dp
, "portid", NULL
);
1156 unsigned long mask
= 0xffffffffUL
;
1158 if (tlb_type
>= cheetah
)
1161 sprintf(tmp_buf
, "%s@%x,%x",
1163 *(u32
*)prop
->value
,
1164 (unsigned int) (regs
->phys_addr
& mask
));
1168 /* "name@slot,offset" */
1169 static void __init
sbus_path_component(struct device_node
*dp
, char *tmp_buf
)
1171 struct linux_prom_registers
*regs
;
1172 struct property
*prop
;
1174 prop
= of_find_property(dp
, "reg", NULL
);
1179 sprintf(tmp_buf
, "%s@%x,%x",
1185 /* "name@devnum[,func]" */
1186 static void __init
pci_path_component(struct device_node
*dp
, char *tmp_buf
)
1188 struct linux_prom_pci_registers
*regs
;
1189 struct property
*prop
;
1192 prop
= of_find_property(dp
, "reg", NULL
);
1197 devfn
= (regs
->phys_hi
>> 8) & 0xff;
1199 sprintf(tmp_buf
, "%s@%x,%x",
1204 sprintf(tmp_buf
, "%s@%x",
1210 /* "name@UPA_PORTID,offset" */
1211 static void __init
upa_path_component(struct device_node
*dp
, char *tmp_buf
)
1213 struct linux_prom64_registers
*regs
;
1214 struct property
*prop
;
1216 prop
= of_find_property(dp
, "reg", NULL
);
1222 prop
= of_find_property(dp
, "upa-portid", NULL
);
1226 sprintf(tmp_buf
, "%s@%x,%x",
1228 *(u32
*) prop
->value
,
1229 (unsigned int) (regs
->phys_addr
& 0xffffffffUL
));
1233 static void __init
vdev_path_component(struct device_node
*dp
, char *tmp_buf
)
1235 struct property
*prop
;
1238 prop
= of_find_property(dp
, "reg", NULL
);
1244 sprintf(tmp_buf
, "%s@%x", dp
->name
, *regs
);
1247 /* "name@addrhi,addrlo" */
1248 static void __init
ebus_path_component(struct device_node
*dp
, char *tmp_buf
)
1250 struct linux_prom64_registers
*regs
;
1251 struct property
*prop
;
1253 prop
= of_find_property(dp
, "reg", NULL
);
1259 sprintf(tmp_buf
, "%s@%x,%x",
1261 (unsigned int) (regs
->phys_addr
>> 32UL),
1262 (unsigned int) (regs
->phys_addr
& 0xffffffffUL
));
1265 /* "name@bus,addr" */
1266 static void __init
i2c_path_component(struct device_node
*dp
, char *tmp_buf
)
1268 struct property
*prop
;
1271 prop
= of_find_property(dp
, "reg", NULL
);
1277 /* This actually isn't right... should look at the #address-cells
1278 * property of the i2c bus node etc. etc.
1280 sprintf(tmp_buf
, "%s@%x,%x",
1281 dp
->name
, regs
[0], regs
[1]);
1284 /* "name@reg0[,reg1]" */
1285 static void __init
usb_path_component(struct device_node
*dp
, char *tmp_buf
)
1287 struct property
*prop
;
1290 prop
= of_find_property(dp
, "reg", NULL
);
1296 if (prop
->length
== sizeof(u32
) || regs
[1] == 1) {
1297 sprintf(tmp_buf
, "%s@%x",
1300 sprintf(tmp_buf
, "%s@%x,%x",
1301 dp
->name
, regs
[0], regs
[1]);
1305 /* "name@reg0reg1[,reg2reg3]" */
1306 static void __init
ieee1394_path_component(struct device_node
*dp
, char *tmp_buf
)
1308 struct property
*prop
;
1311 prop
= of_find_property(dp
, "reg", NULL
);
1317 if (regs
[2] || regs
[3]) {
1318 sprintf(tmp_buf
, "%s@%08x%08x,%04x%08x",
1319 dp
->name
, regs
[0], regs
[1], regs
[2], regs
[3]);
1321 sprintf(tmp_buf
, "%s@%08x%08x",
1322 dp
->name
, regs
[0], regs
[1]);
1326 static void __init
__build_path_component(struct device_node
*dp
, char *tmp_buf
)
1328 struct device_node
*parent
= dp
->parent
;
1330 if (parent
!= NULL
) {
1331 if (!strcmp(parent
->type
, "pci") ||
1332 !strcmp(parent
->type
, "pciex"))
1333 return pci_path_component(dp
, tmp_buf
);
1334 if (!strcmp(parent
->type
, "sbus"))
1335 return sbus_path_component(dp
, tmp_buf
);
1336 if (!strcmp(parent
->type
, "upa"))
1337 return upa_path_component(dp
, tmp_buf
);
1338 if (!strcmp(parent
->type
, "ebus"))
1339 return ebus_path_component(dp
, tmp_buf
);
1340 if (!strcmp(parent
->name
, "usb") ||
1341 !strcmp(parent
->name
, "hub"))
1342 return usb_path_component(dp
, tmp_buf
);
1343 if (!strcmp(parent
->type
, "i2c"))
1344 return i2c_path_component(dp
, tmp_buf
);
1345 if (!strcmp(parent
->type
, "firewire"))
1346 return ieee1394_path_component(dp
, tmp_buf
);
1347 if (!strcmp(parent
->type
, "virtual-devices"))
1348 return vdev_path_component(dp
, tmp_buf
);
1350 /* "isa" is handled with platform naming */
1353 /* Use platform naming convention. */
1354 if (tlb_type
== hypervisor
)
1355 return sun4v_path_component(dp
, tmp_buf
);
1357 return sun4u_path_component(dp
, tmp_buf
);
1360 static char * __init
build_path_component(struct device_node
*dp
)
1362 char tmp_buf
[64], *n
;
1365 __build_path_component(dp
, tmp_buf
);
1366 if (tmp_buf
[0] == '\0')
1367 strcpy(tmp_buf
, dp
->name
);
1369 n
= prom_early_alloc(strlen(tmp_buf
) + 1);
1375 static char * __init
build_full_name(struct device_node
*dp
)
1377 int len
, ourlen
, plen
;
1380 plen
= strlen(dp
->parent
->full_name
);
1381 ourlen
= strlen(dp
->path_component_name
);
1382 len
= ourlen
+ plen
+ 2;
1384 n
= prom_early_alloc(len
);
1385 strcpy(n
, dp
->parent
->full_name
);
1386 if (!is_root_node(dp
->parent
)) {
1387 strcpy(n
+ plen
, "/");
1390 strcpy(n
+ plen
, dp
->path_component_name
);
1395 static unsigned int unique_id
;
1397 static struct property
* __init
build_one_prop(phandle node
, char *prev
, char *special_name
, void *special_val
, int special_len
)
1399 static struct property
*tmp
= NULL
;
1404 memset(p
, 0, sizeof(*p
) + 32);
1407 p
= prom_early_alloc(sizeof(struct property
) + 32);
1408 p
->unique_id
= unique_id
++;
1411 p
->name
= (char *) (p
+ 1);
1413 strcpy(p
->name
, special_name
);
1414 p
->length
= special_len
;
1415 p
->value
= prom_early_alloc(special_len
);
1416 memcpy(p
->value
, special_val
, special_len
);
1419 prom_firstprop(node
, p
->name
);
1421 prom_nextprop(node
, prev
, p
->name
);
1423 if (strlen(p
->name
) == 0) {
1427 p
->length
= prom_getproplen(node
, p
->name
);
1428 if (p
->length
<= 0) {
1431 p
->value
= prom_early_alloc(p
->length
+ 1);
1432 prom_getproperty(node
, p
->name
, p
->value
, p
->length
);
1433 ((unsigned char *)p
->value
)[p
->length
] = '\0';
1439 static struct property
* __init
build_prop_list(phandle node
)
1441 struct property
*head
, *tail
;
1443 head
= tail
= build_one_prop(node
, NULL
,
1444 ".node", &node
, sizeof(node
));
1446 tail
->next
= build_one_prop(node
, NULL
, NULL
, NULL
, 0);
1449 tail
->next
= build_one_prop(node
, tail
->name
,
1457 static char * __init
get_one_property(phandle node
, const char *name
)
1459 char *buf
= "<NULL>";
1462 len
= prom_getproplen(node
, name
);
1464 buf
= prom_early_alloc(len
);
1465 prom_getproperty(node
, name
, buf
, len
);
1471 static struct device_node
* __init
create_node(phandle node
)
1473 struct device_node
*dp
;
1478 dp
= prom_early_alloc(sizeof(*dp
));
1479 dp
->unique_id
= unique_id
++;
1481 kref_init(&dp
->kref
);
1483 dp
->name
= get_one_property(node
, "name");
1484 dp
->type
= get_one_property(node
, "device_type");
1487 dp
->properties
= build_prop_list(node
);
1494 static struct device_node
* __init
build_tree(struct device_node
*parent
, phandle node
, struct device_node
***nextp
)
1496 struct device_node
*dp
;
1498 dp
= create_node(node
);
1501 *nextp
= &dp
->allnext
;
1503 dp
->parent
= parent
;
1504 dp
->path_component_name
= build_path_component(dp
);
1505 dp
->full_name
= build_full_name(dp
);
1507 dp
->child
= build_tree(dp
, prom_getchild(node
), nextp
);
1509 dp
->sibling
= build_tree(parent
, prom_getsibling(node
), nextp
);
1515 void __init
prom_build_devicetree(void)
1517 struct device_node
**nextp
;
1519 allnodes
= create_node(prom_root_node
);
1520 allnodes
->path_component_name
= "";
1521 allnodes
->full_name
= "/";
1523 nextp
= &allnodes
->allnext
;
1524 allnodes
->child
= build_tree(allnodes
,
1525 prom_getchild(allnodes
->node
),
1527 printk("PROM: Built device tree with %u bytes of memory.\n",
1528 prom_early_allocated
);