x86: change ioremap() to default to uncached
[linux-2.6/openmoko-kernel/knife-kernel.git] / include / asm-x86 / io_32.h
blobdb39788463791a627215f465eac1487ba866bdea
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/string.h>
5 #include <linux/compiler.h>
7 /*
8 * This file contains the definitions for the x86 IO instructions
9 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
10 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
11 * versions of the single-IO instructions (inb_p/inw_p/..).
13 * This file is not meant to be obfuscating: it's just complicated
14 * to (a) handle it all in a way that makes gcc able to optimize it
15 * as well as possible and (b) trying to avoid writing the same thing
16 * over and over again with slight variations and possibly making a
17 * mistake somewhere.
21 * Thanks to James van Artsdalen for a better timing-fix than
22 * the two short jumps: using outb's to a nonexistent port seems
23 * to guarantee better timings even on fast machines.
25 * On the other hand, I'd like to be sure of a non-existent port:
26 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 * Linus
32 * Bit simplified and optimized by Jan Hubicka
33 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
36 * isa_read[wl] and isa_write[wl] fixed
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
40 #define IO_SPACE_LIMIT 0xffff
42 #define XQUAD_PORTIO_BASE 0xfe400000
43 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
45 #ifdef __KERNEL__
47 #include <asm-generic/iomap.h>
49 #include <linux/vmalloc.h>
52 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
53 * access
55 #define xlate_dev_mem_ptr(p) __va(p)
58 * Convert a virtual cached pointer to an uncached pointer
60 #define xlate_dev_kmem_ptr(p) p
62 /**
63 * virt_to_phys - map virtual addresses to physical
64 * @address: address to remap
66 * The returned physical address is the physical (CPU) mapping for
67 * the memory address given. It is only valid to use this function on
68 * addresses directly mapped or allocated via kmalloc.
70 * This function does not give bus mappings for DMA transfers. In
71 * almost all conceivable cases a device driver should not be using
72 * this function
75 static inline unsigned long virt_to_phys(volatile void * address)
77 return __pa(address);
80 /**
81 * phys_to_virt - map physical address to virtual
82 * @address: address to remap
84 * The returned virtual address is a current CPU mapping for
85 * the memory address given. It is only valid to use this function on
86 * addresses that have a kernel mapping
88 * This function does not handle bus mappings for DMA transfers. In
89 * almost all conceivable cases a device driver should not be using
90 * this function
93 static inline void * phys_to_virt(unsigned long address)
95 return __va(address);
99 * Change "struct page" to physical address.
101 #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
103 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
106 * ioremap - map bus memory into CPU space
107 * @offset: bus address of the memory
108 * @size: size of the resource to map
110 * ioremap performs a platform specific sequence of operations to
111 * make bus memory CPU accessible via the readb/readw/readl/writeb/
112 * writew/writel functions and the other mmio helpers. The returned
113 * address is not guaranteed to be usable directly as a virtual
114 * address.
116 * If the area you are trying to map is a PCI BAR you should have a
117 * look at pci_iomap().
119 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
121 static inline void __iomem *
122 ioremap_cache(unsigned long offset, unsigned long size)
124 return __ioremap(offset, size, 0);
128 * The default ioremap() behavior is non-cached:
130 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
132 return ioremap_nocache(offset, size);
135 extern void iounmap(volatile void __iomem *addr);
138 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
139 * mappings, before the real ioremap() is functional.
140 * A boot-time mapping is currently limited to at most 16 pages.
142 extern void *bt_ioremap(unsigned long offset, unsigned long size);
143 extern void bt_iounmap(void *addr, unsigned long size);
144 extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
146 /* Use early IO mappings for DMI because it's initialized early */
147 #define dmi_ioremap bt_ioremap
148 #define dmi_iounmap bt_iounmap
149 #define dmi_alloc alloc_bootmem
152 * ISA I/O bus memory addresses are 1:1 with the physical address.
154 #define isa_virt_to_bus virt_to_phys
155 #define isa_page_to_bus page_to_phys
156 #define isa_bus_to_virt phys_to_virt
159 * However PCI ones are not necessarily 1:1 and therefore these interfaces
160 * are forbidden in portable PCI drivers.
162 * Allow them on x86 for legacy drivers, though.
164 #define virt_to_bus virt_to_phys
165 #define bus_to_virt phys_to_virt
168 * readX/writeX() are used to access memory mapped devices. On some
169 * architectures the memory mapped IO stuff needs to be accessed
170 * differently. On the x86 architecture, we just read/write the
171 * memory location directly.
174 static inline unsigned char readb(const volatile void __iomem *addr)
176 return *(volatile unsigned char __force *) addr;
178 static inline unsigned short readw(const volatile void __iomem *addr)
180 return *(volatile unsigned short __force *) addr;
182 static inline unsigned int readl(const volatile void __iomem *addr)
184 return *(volatile unsigned int __force *) addr;
186 #define readb_relaxed(addr) readb(addr)
187 #define readw_relaxed(addr) readw(addr)
188 #define readl_relaxed(addr) readl(addr)
189 #define __raw_readb readb
190 #define __raw_readw readw
191 #define __raw_readl readl
193 static inline void writeb(unsigned char b, volatile void __iomem *addr)
195 *(volatile unsigned char __force *) addr = b;
197 static inline void writew(unsigned short b, volatile void __iomem *addr)
199 *(volatile unsigned short __force *) addr = b;
201 static inline void writel(unsigned int b, volatile void __iomem *addr)
203 *(volatile unsigned int __force *) addr = b;
205 #define __raw_writeb writeb
206 #define __raw_writew writew
207 #define __raw_writel writel
209 #define mmiowb()
211 static inline void
212 memset_io(volatile void __iomem *addr, unsigned char val, int count)
214 memset((void __force *)addr, val, count);
217 static inline void
218 memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
220 __memcpy(dst, (const void __force *)src, count);
223 static inline void
224 memcpy_toio(volatile void __iomem *dst, const void *src, int count)
226 __memcpy((void __force *)dst, src, count);
230 * ISA space is 'always mapped' on a typical x86 system, no need to
231 * explicitly ioremap() it. The fact that the ISA IO space is mapped
232 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
233 * are physical addresses. The following constant pointer can be
234 * used as the IO-area pointer (it can be iounmapped as well, so the
235 * analogy with PCI is quite large):
237 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
240 * Cache management
242 * This needed for two cases
243 * 1. Out of order aware processors
244 * 2. Accidentally out of order processors (PPro errata #51)
247 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
249 static inline void flush_write_buffers(void)
251 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
254 #else
256 #define flush_write_buffers() do { } while (0)
258 #endif
260 #endif /* __KERNEL__ */
262 extern void native_io_delay(void);
264 extern int io_delay_type;
265 extern void io_delay_init(void);
267 #if defined(CONFIG_PARAVIRT)
268 #include <asm/paravirt.h>
269 #else
271 static inline void slow_down_io(void) {
272 native_io_delay();
273 #ifdef REALLY_SLOW_IO
274 native_io_delay();
275 native_io_delay();
276 native_io_delay();
277 #endif
280 #endif
282 #ifdef CONFIG_X86_NUMAQ
283 extern void *xquad_portio; /* Where the IO area was mapped */
284 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
285 #define __BUILDIO(bwl,bw,type) \
286 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
287 if (xquad_portio) \
288 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
289 else \
290 out##bwl##_local(value, port); \
292 static inline void out##bwl(unsigned type value, int port) { \
293 out##bwl##_quad(value, port, 0); \
295 static inline unsigned type in##bwl##_quad(int port, int quad) { \
296 if (xquad_portio) \
297 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
298 else \
299 return in##bwl##_local(port); \
301 static inline unsigned type in##bwl(int port) { \
302 return in##bwl##_quad(port, 0); \
304 #else
305 #define __BUILDIO(bwl,bw,type) \
306 static inline void out##bwl(unsigned type value, int port) { \
307 out##bwl##_local(value, port); \
309 static inline unsigned type in##bwl(int port) { \
310 return in##bwl##_local(port); \
312 #endif
315 #define BUILDIO(bwl,bw,type) \
316 static inline void out##bwl##_local(unsigned type value, int port) { \
317 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
319 static inline unsigned type in##bwl##_local(int port) { \
320 unsigned type value; \
321 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
322 return value; \
324 static inline void out##bwl##_local_p(unsigned type value, int port) { \
325 out##bwl##_local(value, port); \
326 slow_down_io(); \
328 static inline unsigned type in##bwl##_local_p(int port) { \
329 unsigned type value = in##bwl##_local(port); \
330 slow_down_io(); \
331 return value; \
333 __BUILDIO(bwl,bw,type) \
334 static inline void out##bwl##_p(unsigned type value, int port) { \
335 out##bwl(value, port); \
336 slow_down_io(); \
338 static inline unsigned type in##bwl##_p(int port) { \
339 unsigned type value = in##bwl(port); \
340 slow_down_io(); \
341 return value; \
343 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
344 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
346 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
347 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
350 BUILDIO(b,b,char)
351 BUILDIO(w,w,short)
352 BUILDIO(l,,int)
354 #endif