drivers/mmc/mmci.c

   1 /*
   2  *  linux/drivers/mmc/mmci.c - ARM PrimeCell MMCI PL180/1 driver
   3  *
   4  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/config.h>
  11 #include <linux/module.h>
  12 #include <linux/moduleparam.h>
  13 #include <linux/init.h>
  14 #include <linux/ioport.h>
  15 #include <linux/device.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/err.h>
  19 #include <linux/highmem.h>
  20 #include <linux/mmc/host.h>
  21 #include <linux/mmc/protocol.h>
  22 #include <linux/amba/bus.h>
  23 #include <linux/clk.h>
  24
  25 #include <asm/cacheflush.h>
  26 #include <asm/div64.h>
  27 #include <asm/io.h>
  28 #include <asm/scatterlist.h>
  29 #include <asm/sizes.h>
  30 #include <asm/mach/mmc.h>
  31
  32 #include "mmci.h"
  33
  34 #define DRIVER_NAME "mmci-pl18x"
  35
  36 #define DBG(host,fmt,args...)   \
  37         pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
  38
  39 static unsigned int fmax = 515633;
  40
  41 static void
  42 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
  43 {
  44         writel(0, host->base + MMCICOMMAND);
  45
  46         host->mrq = NULL;
  47         host->cmd = NULL;
  48
  49         if (mrq->data)
  50                 mrq->data->bytes_xfered = host->data_xfered;
  51
  52         /*
  53          * Need to drop the host lock here; mmc_request_done may call
  54          * back into the driver...
  55          */
  56         spin_unlock(&host->lock);
  57         mmc_request_done(host->mmc, mrq);
  58         spin_lock(&host->lock);
  59 }
  60
  61 static void mmci_stop_data(struct mmci_host *host)
  62 {
  63         writel(0, host->base + MMCIDATACTRL);
  64         writel(0, host->base + MMCIMASK1);
  65         host->data = NULL;
  66 }
  67
  68 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
  69 {
  70         unsigned int datactrl, timeout, irqmask;
  71         unsigned long long clks;
  72         void __iomem *base;
  73
  74         DBG(host, "blksz %04x blks %04x flags %08x\n",
  75             1 << data->blksz_bits, data->blocks, data->flags);
  76
  77         host->data = data;
  78         host->size = data->blocks << data->blksz_bits;
  79         host->data_xfered = 0;
  80
  81         mmci_init_sg(host, data);
  82
  83         clks = (unsigned long long)data->timeout_ns * host->cclk;
  84         do_div(clks, 1000000000UL);
  85
  86         timeout = data->timeout_clks + (unsigned int)clks;
  87
  88         base = host->base;
  89         writel(timeout, base + MMCIDATATIMER);
  90         writel(host->size, base + MMCIDATALENGTH);
  91
  92         datactrl = MCI_DPSM_ENABLE | data->blksz_bits << 4;
  93         if (data->flags & MMC_DATA_READ) {
  94                 datactrl |= MCI_DPSM_DIRECTION;
  95                 irqmask = MCI_RXFIFOHALFFULLMASK;
  96
  97                 /*
  98                  * If we have less than a FIFOSIZE of bytes to transfer,
  99                  * trigger a PIO interrupt as soon as any data is available.
 100                  */
 101                 if (host->size < MCI_FIFOSIZE)
 102                         irqmask |= MCI_RXDATAAVLBLMASK;
 103         } else {
 104                 /*
 105                  * We don't actually need to include "FIFO empty" here
 106                  * since its implicit in "FIFO half empty".
 107                  */
 108                 irqmask = MCI_TXFIFOHALFEMPTYMASK;
 109         }
 110
 111         writel(datactrl, base + MMCIDATACTRL);
 112         writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
 113         writel(irqmask, base + MMCIMASK1);
 114 }
 115
 116 static void
 117 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
 118 {
 119         void __iomem *base = host->base;
 120
 121         DBG(host, "op %02x arg %08x flags %08x\n",
 122             cmd->opcode, cmd->arg, cmd->flags);
 123
 124         if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
 125                 writel(0, base + MMCICOMMAND);
 126                 udelay(1);
 127         }
 128
 129         c |= cmd->opcode | MCI_CPSM_ENABLE;
 130         if (cmd->flags & MMC_RSP_PRESENT) {
 131                 if (cmd->flags & MMC_RSP_136)
 132                         c |= MCI_CPSM_LONGRSP;
 133                 c |= MCI_CPSM_RESPONSE;
 134         }
 135         if (/*interrupt*/0)
 136                 c |= MCI_CPSM_INTERRUPT;
 137
 138         host->cmd = cmd;
 139
 140         writel(cmd->arg, base + MMCIARGUMENT);
 141         writel(c, base + MMCICOMMAND);
 142 }
 143
 144 static void
 145 mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
 146               unsigned int status)
 147 {
 148         if (status & MCI_DATABLOCKEND) {
 149                 host->data_xfered += 1 << data->blksz_bits;
 150         }
 151         if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
 152                 if (status & MCI_DATACRCFAIL)
 153                         data->error = MMC_ERR_BADCRC;
 154                 else if (status & MCI_DATATIMEOUT)
 155                         data->error = MMC_ERR_TIMEOUT;
 156                 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
 157                         data->error = MMC_ERR_FIFO;
 158                 status |= MCI_DATAEND;
 159
 160                 /*
 161                  * We hit an error condition.  Ensure that any data
 162                  * partially written to a page is properly coherent.
 163                  */
 164                 if (host->sg_len && data->flags & MMC_DATA_READ)
 165                         flush_dcache_page(host->sg_ptr->page);
 166         }
 167         if (status & MCI_DATAEND) {
 168                 mmci_stop_data(host);
 169
 170                 if (!data->stop) {
 171                         mmci_request_end(host, data->mrq);
 172                 } else {
 173                         mmci_start_command(host, data->stop, 0);
 174                 }
 175         }
 176 }
 177
 178 static void
 179 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
 180              unsigned int status)
 181 {
 182         void __iomem *base = host->base;
 183
 184         host->cmd = NULL;
 185
 186         cmd->resp[0] = readl(base + MMCIRESPONSE0);
 187         cmd->resp[1] = readl(base + MMCIRESPONSE1);
 188         cmd->resp[2] = readl(base + MMCIRESPONSE2);
 189         cmd->resp[3] = readl(base + MMCIRESPONSE3);
 190
 191         if (status & MCI_CMDTIMEOUT) {
 192                 cmd->error = MMC_ERR_TIMEOUT;
 193         } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
 194                 cmd->error = MMC_ERR_BADCRC;
 195         }
 196
 197         if (!cmd->data || cmd->error != MMC_ERR_NONE) {
 198                 mmci_request_end(host, cmd->mrq);
 199         } else if (!(cmd->data->flags & MMC_DATA_READ)) {
 200                 mmci_start_data(host, cmd->data);
 201         }
 202 }
 203
 204 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
 205 {
 206         void __iomem *base = host->base;
 207         char *ptr = buffer;
 208         u32 status;
 209
 210         do {
 211                 int count = host->size - (readl(base + MMCIFIFOCNT) << 2);
 212
 213                 if (count > remain)
 214                         count = remain;
 215
 216                 if (count <= 0)
 217                         break;
 218
 219                 readsl(base + MMCIFIFO, ptr, count >> 2);
 220
 221                 ptr += count;
 222                 remain -= count;
 223
 224                 if (remain == 0)
 225                         break;
 226
 227                 status = readl(base + MMCISTATUS);
 228         } while (status & MCI_RXDATAAVLBL);
 229
 230         return ptr - buffer;
 231 }
 232
 233 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
 234 {
 235         void __iomem *base = host->base;
 236         char *ptr = buffer;
 237
 238         do {
 239                 unsigned int count, maxcnt;
 240
 241                 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
 242                 count = min(remain, maxcnt);
 243
 244                 writesl(base + MMCIFIFO, ptr, count >> 2);
 245
 246                 ptr += count;
 247                 remain -= count;
 248
 249                 if (remain == 0)
 250                         break;
 251
 252                 status = readl(base + MMCISTATUS);
 253         } while (status & MCI_TXFIFOHALFEMPTY);
 254
 255         return ptr - buffer;
 256 }
 257
 258 /*
 259  * PIO data transfer IRQ handler.
 260  */
 261 static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
 262 {
 263         struct mmci_host *host = dev_id;
 264         void __iomem *base = host->base;
 265         u32 status;
 266
 267         status = readl(base + MMCISTATUS);
 268
 269         DBG(host, "irq1 %08x\n", status);
 270
 271         do {
 272                 unsigned long flags;
 273                 unsigned int remain, len;
 274                 char *buffer;
 275
 276                 /*
 277                  * For write, we only need to test the half-empty flag
 278                  * here - if the FIFO is completely empty, then by
 279                  * definition it is more than half empty.
 280                  *
 281                  * For read, check for data available.
 282                  */
 283                 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
 284                         break;
 285
 286                 /*
 287                  * Map the current scatter buffer.
 288                  */
 289                 buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
 290                 remain = host->sg_ptr->length - host->sg_off;
 291
 292                 len = 0;
 293                 if (status & MCI_RXACTIVE)
 294                         len = mmci_pio_read(host, buffer, remain);
 295                 if (status & MCI_TXACTIVE)
 296                         len = mmci_pio_write(host, buffer, remain, status);
 297
 298                 /*
 299                  * Unmap the buffer.
 300                  */
 301                 mmci_kunmap_atomic(host, buffer, &flags);
 302
 303                 host->sg_off += len;
 304                 host->size -= len;
 305                 remain -= len;
 306
 307                 if (remain)
 308                         break;
 309
 310                 /*
 311                  * If we were reading, and we have completed this
 312                  * page, ensure that the data cache is coherent.
 313                  */
 314                 if (status & MCI_RXACTIVE)
 315                         flush_dcache_page(host->sg_ptr->page);
 316
 317                 if (!mmci_next_sg(host))
 318                         break;
 319
 320                 status = readl(base + MMCISTATUS);
 321         } while (1);
 322
 323         /*
 324          * If we're nearing the end of the read, switch to
 325          * "any data available" mode.
 326          */
 327         if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
 328                 writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
 329
 330         /*
 331          * If we run out of data, disable the data IRQs; this
 332          * prevents a race where the FIFO becomes empty before
 333          * the chip itself has disabled the data path, and
 334          * stops us racing with our data end IRQ.
 335          */
 336         if (host->size == 0) {
 337                 writel(0, base + MMCIMASK1);
 338                 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
 339         }
 340
 341         return IRQ_HANDLED;
 342 }
 343
 344 /*
 345  * Handle completion of command and data transfers.
 346  */
 347 static irqreturn_t mmci_irq(int irq, void *dev_id, struct pt_regs *regs)
 348 {
 349         struct mmci_host *host = dev_id;
 350         u32 status;
 351         int ret = 0;
 352
 353         spin_lock(&host->lock);
 354
 355         do {
 356                 struct mmc_command *cmd;
 357                 struct mmc_data *data;
 358
 359                 status = readl(host->base + MMCISTATUS);
 360                 status &= readl(host->base + MMCIMASK0);
 361                 writel(status, host->base + MMCICLEAR);
 362
 363                 DBG(host, "irq0 %08x\n", status);
 364
 365                 data = host->data;
 366                 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
 367                               MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
 368                         mmci_data_irq(host, data, status);
 369
 370                 cmd = host->cmd;
 371                 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
 372                         mmci_cmd_irq(host, cmd, status);
 373
 374                 ret = 1;
 375         } while (status);
 376
 377         spin_unlock(&host->lock);
 378
 379         return IRQ_RETVAL(ret);
 380 }
 381
 382 static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 383 {
 384         struct mmci_host *host = mmc_priv(mmc);
 385
 386         WARN_ON(host->mrq != NULL);
 387
 388         spin_lock_irq(&host->lock);
 389
 390         host->mrq = mrq;
 391
 392         if (mrq->data && mrq->data->flags & MMC_DATA_READ)
 393                 mmci_start_data(host, mrq->data);
 394
 395         mmci_start_command(host, mrq->cmd, 0);
 396
 397         spin_unlock_irq(&host->lock);
 398 }
 399
 400 static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 401 {
 402         struct mmci_host *host = mmc_priv(mmc);
 403         u32 clk = 0, pwr = 0;
 404
 405         if (ios->clock) {
 406                 if (ios->clock >= host->mclk) {
 407                         clk = MCI_CLK_BYPASS;
 408                         host->cclk = host->mclk;
 409                 } else {
 410                         clk = host->mclk / (2 * ios->clock) - 1;
 411                         if (clk > 256)
 412                                 clk = 255;
 413                         host->cclk = host->mclk / (2 * (clk + 1));
 414                 }
 415                 clk |= MCI_CLK_ENABLE;
 416         }
 417
 418         if (host->plat->translate_vdd)
 419                 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
 420
 421         switch (ios->power_mode) {
 422         case MMC_POWER_OFF:
 423                 break;
 424         case MMC_POWER_UP:
 425                 pwr |= MCI_PWR_UP;
 426                 break;
 427         case MMC_POWER_ON:
 428                 pwr |= MCI_PWR_ON;
 429                 break;
 430         }
 431
 432         if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
 433                 pwr |= MCI_ROD;
 434
 435         writel(clk, host->base + MMCICLOCK);
 436
 437         if (host->pwr != pwr) {
 438                 host->pwr = pwr;
 439                 writel(pwr, host->base + MMCIPOWER);
 440         }
 441 }
 442
 443 static struct mmc_host_ops mmci_ops = {
 444         .request        = mmci_request,
 445         .set_ios        = mmci_set_ios,
 446 };
 447
 448 static void mmci_check_status(unsigned long data)
 449 {
 450         struct mmci_host *host = (struct mmci_host *)data;
 451         unsigned int status;
 452
 453         status = host->plat->status(mmc_dev(host->mmc));
 454         if (status ^ host->oldstat)
 455                 mmc_detect_change(host->mmc, 0);
 456
 457         host->oldstat = status;
 458         mod_timer(&host->timer, jiffies + HZ);
 459 }
 460
 461 static int mmci_probe(struct amba_device *dev, void *id)
 462 {
 463         struct mmc_platform_data *plat = dev->dev.platform_data;
 464         struct mmci_host *host;
 465         struct mmc_host *mmc;
 466         int ret;
 467
 468         /* must have platform data */
 469         if (!plat) {
 470                 ret = -EINVAL;
 471                 goto out;
 472         }
 473
 474         ret = amba_request_regions(dev, DRIVER_NAME);
 475         if (ret)
 476                 goto out;
 477
 478         mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
 479         if (!mmc) {
 480                 ret = -ENOMEM;
 481                 goto rel_regions;
 482         }
 483
 484         host = mmc_priv(mmc);
 485         host->clk = clk_get(&dev->dev, "MCLK");
 486         if (IS_ERR(host->clk)) {
 487                 ret = PTR_ERR(host->clk);
 488                 host->clk = NULL;
 489                 goto host_free;
 490         }
 491
 492         ret = clk_enable(host->clk);
 493         if (ret)
 494                 goto clk_free;
 495
 496         host->plat = plat;
 497         host->mclk = clk_get_rate(host->clk);
 498         host->mmc = mmc;
 499         host->base = ioremap(dev->res.start, SZ_4K);
 500         if (!host->base) {
 501                 ret = -ENOMEM;
 502                 goto clk_disable;
 503         }
 504
 505         mmc->ops = &mmci_ops;
 506         mmc->f_min = (host->mclk + 511) / 512;
 507         mmc->f_max = min(host->mclk, fmax);
 508         mmc->ocr_avail = plat->ocr_mask;
 509
 510         /*
 511          * We can do SGIO
 512          */
 513         mmc->max_hw_segs = 16;
 514         mmc->max_phys_segs = NR_SG;
 515
 516         /*
 517          * Since we only have a 16-bit data length register, we must
 518          * ensure that we don't exceed 2^16-1 bytes in a single request.
 519          * Choose 64 (512-byte) sectors as the limit.
 520          */
 521         mmc->max_sectors = 64;
 522
 523         /*
 524          * Set the maximum segment size.  Since we aren't doing DMA
 525          * (yet) we are only limited by the data length register.
 526          */
 527         mmc->max_seg_size = mmc->max_sectors << 9;
 528
 529         spin_lock_init(&host->lock);
 530
 531         writel(0, host->base + MMCIMASK0);
 532         writel(0, host->base + MMCIMASK1);
 533         writel(0xfff, host->base + MMCICLEAR);
 534
 535         ret = request_irq(dev->irq[0], mmci_irq, SA_SHIRQ, DRIVER_NAME " (cmd)", host);
 536         if (ret)
 537                 goto unmap;
 538
 539         ret = request_irq(dev->irq[1], mmci_pio_irq, SA_SHIRQ, DRIVER_NAME " (pio)", host);
 540         if (ret)
 541                 goto irq0_free;
 542
 543         writel(MCI_IRQENABLE, host->base + MMCIMASK0);
 544
 545         amba_set_drvdata(dev, mmc);
 546
 547         mmc_add_host(mmc);
 548
 549         printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%08lx irq %d,%d\n",
 550                 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
 551                 dev->res.start, dev->irq[0], dev->irq[1]);
 552
 553         init_timer(&host->timer);
 554         host->timer.data = (unsigned long)host;
 555         host->timer.function = mmci_check_status;
 556         host->timer.expires = jiffies + HZ;
 557         add_timer(&host->timer);
 558
 559         return 0;
 560
 561  irq0_free:
 562         free_irq(dev->irq[0], host);
 563  unmap:
 564         iounmap(host->base);
 565  clk_disable:
 566         clk_disable(host->clk);
 567  clk_free:
 568         clk_put(host->clk);
 569  host_free:
 570         mmc_free_host(mmc);
 571  rel_regions:
 572         amba_release_regions(dev);
 573  out:
 574         return ret;
 575 }
 576
 577 static int mmci_remove(struct amba_device *dev)
 578 {
 579         struct mmc_host *mmc = amba_get_drvdata(dev);
 580
 581         amba_set_drvdata(dev, NULL);
 582
 583         if (mmc) {
 584                 struct mmci_host *host = mmc_priv(mmc);
 585
 586                 del_timer_sync(&host->timer);
 587
 588                 mmc_remove_host(mmc);
 589
 590                 writel(0, host->base + MMCIMASK0);
 591                 writel(0, host->base + MMCIMASK1);
 592
 593                 writel(0, host->base + MMCICOMMAND);
 594                 writel(0, host->base + MMCIDATACTRL);
 595
 596                 free_irq(dev->irq[0], host);
 597                 free_irq(dev->irq[1], host);
 598
 599                 iounmap(host->base);
 600                 clk_disable(host->clk);
 601                 clk_put(host->clk);
 602
 603                 mmc_free_host(mmc);
 604
 605                 amba_release_regions(dev);
 606         }
 607
 608         return 0;
 609 }
 610
 611 #ifdef CONFIG_PM
 612 static int mmci_suspend(struct amba_device *dev, pm_message_t state)
 613 {
 614         struct mmc_host *mmc = amba_get_drvdata(dev);
 615         int ret = 0;
 616
 617         if (mmc) {
 618                 struct mmci_host *host = mmc_priv(mmc);
 619
 620                 ret = mmc_suspend_host(mmc, state);
 621                 if (ret == 0)
 622                         writel(0, host->base + MMCIMASK0);
 623         }
 624
 625         return ret;
 626 }
 627
 628 static int mmci_resume(struct amba_device *dev)
 629 {
 630         struct mmc_host *mmc = amba_get_drvdata(dev);
 631         int ret = 0;
 632
 633         if (mmc) {
 634                 struct mmci_host *host = mmc_priv(mmc);
 635
 636                 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
 637
 638                 ret = mmc_resume_host(mmc);
 639         }
 640
 641         return ret;
 642 }
 643 #else
 644 #define mmci_suspend    NULL
 645 #define mmci_resume     NULL
 646 #endif
 647
 648 static struct amba_id mmci_ids[] = {
 649         {
 650                 .id     = 0x00041180,
 651                 .mask   = 0x000fffff,
 652         },
 653         {
 654                 .id     = 0x00041181,
 655                 .mask   = 0x000fffff,
 656         },
 657         { 0, 0 },
 658 };
 659
 660 static struct amba_driver mmci_driver = {
 661         .drv            = {
 662                 .name   = DRIVER_NAME,
 663         },
 664         .probe          = mmci_probe,
 665         .remove         = mmci_remove,
 666         .suspend        = mmci_suspend,
 667         .resume         = mmci_resume,
 668         .id_table       = mmci_ids,
 669 };
 670
 671 static int __init mmci_init(void)
 672 {
 673         return amba_driver_register(&mmci_driver);
 674 }
 675
 676 static void __exit mmci_exit(void)
 677 {
 678         amba_driver_unregister(&mmci_driver);
 679 }
 680
 681 module_init(mmci_init);
 682 module_exit(mmci_exit);
 683 module_param(fmax, uint, 0444);
 684
 685 MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
 686 MODULE_LICENSE("GPL");