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pcie: utilize pcie transaction pending bit
[linux-2.6/openmoko-kernel/knife-kernel.git] / include / linux / pci.h
blobbdff18b7fbc602a70c402294ed90f4745af05723
1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
19
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
22
23 /*
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
27 *
28 * 7:3 = slot
29 * 2:0 = function
30 */
31 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
41
42 #ifdef __KERNEL__
43
44 #include <linux/mod_devicetable.h>
45
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
53
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
56
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
58 enum pci_mmap_state {
59 pci_mmap_io,
60 pci_mmap_mem
61 };
62
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
68
69 #define DEVICE_COUNT_COMPATIBLE 4
70 #define DEVICE_COUNT_RESOURCE 12
71
72 typedef int __bitwise pci_power_t;
73
74 #define PCI_D0 ((pci_power_t __force) 0)
75 #define PCI_D1 ((pci_power_t __force) 1)
76 #define PCI_D2 ((pci_power_t __force) 2)
77 #define PCI_D3hot ((pci_power_t __force) 3)
78 #define PCI_D3cold ((pci_power_t __force) 4)
79 #define PCI_UNKNOWN ((pci_power_t __force) 5)
80 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
81
82 /** The pci_channel state describes connectivity between the CPU and
83 * the pci device. If some PCI bus between here and the pci device
84 * has crashed or locked up, this info is reflected here.
85 */
86 typedef unsigned int __bitwise pci_channel_state_t;
87
88 enum pci_channel_state {
89 /* I/O channel is in normal state */
90 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91
92 /* I/O to channel is blocked */
93 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94
95 /* PCI card is dead */
96 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
97 };
98
99 typedef unsigned int __bitwise pcie_reset_state_t;
100
101 enum pcie_reset_state {
102 /* Reset is NOT asserted (Use to deassert reset) */
103 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104
105 /* Use #PERST to reset PCI-E device */
106 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107
108 /* Use PCI-E Hot Reset to reset device */
109 pcie_hot_reset = (__force pcie_reset_state_t) 3
110 };
111
112 typedef unsigned short __bitwise pci_dev_flags_t;
113 enum pci_dev_flags {
114 /* INTX_DISABLE in PCI_COMMAND register disables MSI
115 * generation too.
116 */
117 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
118 };
119
120 typedef unsigned short __bitwise pci_bus_flags_t;
121 enum pci_bus_flags {
122 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
123 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
124 };
125
126 struct pci_cap_saved_state {
127 struct hlist_node next;
128 char cap_nr;
129 u32 data[0];
130 };
131
132 /*
133 * The pci_dev structure is used to describe PCI devices.
134 */
135 struct pci_dev {
136 struct list_head global_list; /* node in list of all PCI devices */
137 struct list_head bus_list; /* node in per-bus list */
138 struct pci_bus *bus; /* bus this device is on */
139 struct pci_bus *subordinate; /* bus this device bridges to */
140
141 void *sysdata; /* hook for sys-specific extension */
142 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
143
144 unsigned int devfn; /* encoded device & function index */
145 unsigned short vendor;
146 unsigned short device;
147 unsigned short subsystem_vendor;
148 unsigned short subsystem_device;
149 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
150 u8 revision; /* PCI revision, low byte of class word */
151 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
152 u8 pcie_type; /* PCI-E device/port type */
153 u8 rom_base_reg; /* which config register controls the ROM */
154 u8 pin; /* which interrupt pin this device uses */
155
156 struct pci_driver *driver; /* which driver has allocated this device */
157 u64 dma_mask; /* Mask of the bits of bus address this
158 device implements. Normally this is
159 0xffffffff. You only need to change
160 this if your device has broken DMA
161 or supports 64-bit transfers. */
162
163 pci_power_t current_state; /* Current operating state. In ACPI-speak,
164 this is D0-D3, D0 being fully functional,
165 and D3 being off. */
166
167 pci_channel_state_t error_state; /* current connectivity state */
168 struct device dev; /* Generic device interface */
169
170 /* device is compatible with these IDs */
171 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
172 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
173
174 int cfg_size; /* Size of configuration space */
175
176 /*
177 * Instead of touching interrupt line and base address registers
178 * directly, use the values stored here. They might be different!
179 */
180 unsigned int irq;
181 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
182
183 /* These fields are used by common fixups */
184 unsigned int transparent:1; /* Transparent PCI bridge */
185 unsigned int multifunction:1;/* Part of multi-function device */
186 /* keep track of device state */
187 unsigned int is_busmaster:1; /* device is busmaster */
188 unsigned int no_msi:1; /* device may not use msi */
189 unsigned int no_d1d2:1; /* only allow d0 or d3 */
190 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
191 unsigned int broken_parity_status:1; /* Device generates false positive parity */
192 unsigned int msi_enabled:1;
193 unsigned int msix_enabled:1;
194 unsigned int is_managed:1;
195 unsigned int is_pcie:1;
196 pci_dev_flags_t dev_flags;
197 atomic_t enable_cnt; /* pci_enable_device has been called */
198
199 u32 saved_config_space[16]; /* config space saved at suspend time */
200 struct hlist_head saved_cap_space;
201 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
202 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
203 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
204 #ifdef CONFIG_PCI_MSI
205 struct list_head msi_list;
206 #endif
207 };
208
209 extern struct pci_dev *alloc_pci_dev(void);
210
211 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
212 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
213 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
214 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
215
216 static inline int pci_channel_offline(struct pci_dev *pdev)
217 {
218 return (pdev->error_state != pci_channel_io_normal);
219 }
220
221 static inline struct pci_cap_saved_state *pci_find_saved_cap(
222 struct pci_dev *pci_dev,char cap)
223 {
224 struct pci_cap_saved_state *tmp;
225 struct hlist_node *pos;
226
227 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
228 if (tmp->cap_nr == cap)
229 return tmp;
230 }
231 return NULL;
232 }
233
234 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
235 struct pci_cap_saved_state *new_cap)
236 {
237 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
238 }
239
240 /*
241 * For PCI devices, the region numbers are assigned this way:
242 *
243 * 0-5 standard PCI regions
244 * 6 expansion ROM
245 * 7-10 bridges: address space assigned to buses behind the bridge
246 */
247
248 #define PCI_ROM_RESOURCE 6
249 #define PCI_BRIDGE_RESOURCES 7
250 #define PCI_NUM_RESOURCES 11
251
252 #ifndef PCI_BUS_NUM_RESOURCES
253 #define PCI_BUS_NUM_RESOURCES 8
254 #endif
255
256 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
257
258 struct pci_bus {
259 struct list_head node; /* node in list of buses */
260 struct pci_bus *parent; /* parent bus this bridge is on */
261 struct list_head children; /* list of child buses */
262 struct list_head devices; /* list of devices on this bus */
263 struct pci_dev *self; /* bridge device as seen by parent */
264 struct resource *resource[PCI_BUS_NUM_RESOURCES];
265 /* address space routed to this bus */
266
267 struct pci_ops *ops; /* configuration access functions */
268 void *sysdata; /* hook for sys-specific extension */
269 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
270
271 unsigned char number; /* bus number */
272 unsigned char primary; /* number of primary bridge */
273 unsigned char secondary; /* number of secondary bridge */
274 unsigned char subordinate; /* max number of subordinate buses */
275
276 char name[48];
277
278 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
279 pci_bus_flags_t bus_flags; /* Inherited by child busses */
280 struct device *bridge;
281 struct class_device class_dev;
282 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
283 struct bin_attribute *legacy_mem; /* legacy mem */
284 };
285
286 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
287 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
288
289 /*
290 * Error values that may be returned by PCI functions.
291 */
292 #define PCIBIOS_SUCCESSFUL 0x00
293 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
294 #define PCIBIOS_BAD_VENDOR_ID 0x83
295 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
296 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
297 #define PCIBIOS_SET_FAILED 0x88
298 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
299
300 /* Low-level architecture-dependent routines */
301
302 struct pci_ops {
303 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
304 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
305 };
306
307 struct pci_raw_ops {
308 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
309 int reg, int len, u32 *val);
310 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
311 int reg, int len, u32 val);
312 };
313
314 extern struct pci_raw_ops *raw_pci_ops;
315
316 struct pci_bus_region {
317 unsigned long start;
318 unsigned long end;
319 };
320
321 struct pci_dynids {
322 spinlock_t lock; /* protects list, index */
323 struct list_head list; /* for IDs added at runtime */
324 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
325 };
326
327 /* ---------------------------------------------------------------- */
328 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
329 * a set of callbacks in struct pci_error_handlers, then that device driver
330 * will be notified of PCI bus errors, and will be driven to recovery
331 * when an error occurs.
332 */
333
334 typedef unsigned int __bitwise pci_ers_result_t;
335
336 enum pci_ers_result {
337 /* no result/none/not supported in device driver */
338 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
339
340 /* Device driver can recover without slot reset */
341 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
342
343 /* Device driver wants slot to be reset. */
344 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
345
346 /* Device has completely failed, is unrecoverable */
347 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
348
349 /* Device driver is fully recovered and operational */
350 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
351 };
352
353 /* PCI bus error event callbacks */
354 struct pci_error_handlers
355 {
356 /* PCI bus error detected on this device */
357 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
358 enum pci_channel_state error);
359
360 /* MMIO has been re-enabled, but not DMA */
361 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
362
363 /* PCI Express link has been reset */
364 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
365
366 /* PCI slot has been reset */
367 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
368
369 /* Device driver may resume normal operations */
370 void (*resume)(struct pci_dev *dev);
371 };
372
373 /* ---------------------------------------------------------------- */
374
375 struct module;
376 struct pci_driver {
377 struct list_head node;
378 char *name;
379 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
380 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
381 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
382 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
383 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
384 int (*resume_early) (struct pci_dev *dev);
385 int (*resume) (struct pci_dev *dev); /* Device woken up */
386 void (*shutdown) (struct pci_dev *dev);
387
388 struct pci_error_handlers *err_handler;
389 struct device_driver driver;
390 struct pci_dynids dynids;
391 };
392
393 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
394
395 /**
396 * PCI_DEVICE - macro used to describe a specific pci device
397 * @vend: the 16 bit PCI Vendor ID
398 * @dev: the 16 bit PCI Device ID
399 *
400 * This macro is used to create a struct pci_device_id that matches a
401 * specific device. The subvendor and subdevice fields will be set to
402 * PCI_ANY_ID.
403 */
404 #define PCI_DEVICE(vend,dev) \
405 .vendor = (vend), .device = (dev), \
406 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
407
408 /**
409 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
410 * @dev_class: the class, subclass, prog-if triple for this device
411 * @dev_class_mask: the class mask for this device
412 *
413 * This macro is used to create a struct pci_device_id that matches a
414 * specific PCI class. The vendor, device, subvendor, and subdevice
415 * fields will be set to PCI_ANY_ID.
416 */
417 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
418 .class = (dev_class), .class_mask = (dev_class_mask), \
419 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
420 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
421
422 /**
423 * PCI_VDEVICE - macro used to describe a specific pci device in short form
424 * @vend: the vendor name
425 * @dev: the 16 bit PCI Device ID
426 *
427 * This macro is used to create a struct pci_device_id that matches a
428 * specific PCI device. The subvendor, and subdevice fields will be set
429 * to PCI_ANY_ID. The macro allows the next field to follow as the device
430 * private data.
431 */
432
433 #define PCI_VDEVICE(vendor, device) \
434 PCI_VENDOR_ID_##vendor, (device), \
435 PCI_ANY_ID, PCI_ANY_ID, 0, 0
436
437 /* these external functions are only available when PCI support is enabled */
438 #ifdef CONFIG_PCI
439
440 extern struct bus_type pci_bus_type;
441
442 /* Do NOT directly access these two variables, unless you are arch specific pci
443 * code, or pci core code. */
444 extern struct list_head pci_root_buses; /* list of all known PCI buses */
445 extern struct list_head pci_devices; /* list of all devices */
446 /* Some device drivers need know if pci is initiated */
447 extern int no_pci_devices(void);
448
449 void pcibios_fixup_bus(struct pci_bus *);
450 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
451 char *pcibios_setup (char *str);
452
453 /* Used only when drivers/pci/setup.c is used */
454 void pcibios_align_resource(void *, struct resource *, resource_size_t,
455 resource_size_t);
456 void pcibios_update_irq(struct pci_dev *, int irq);
457
458 /* Generic PCI functions used internally */
459
460 extern struct pci_bus *pci_find_bus(int domain, int busnr);
461 void pci_bus_add_devices(struct pci_bus *bus);
462 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
463 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
464 {
465 struct pci_bus *root_bus;
466 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
467 if (root_bus)
468 pci_bus_add_devices(root_bus);
469 return root_bus;
470 }
471 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
472 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
473 int pci_scan_slot(struct pci_bus *bus, int devfn);
474 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
475 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
476 unsigned int pci_scan_child_bus(struct pci_bus *bus);
477 int __must_check pci_bus_add_device(struct pci_dev *dev);
478 void pci_read_bridge_bases(struct pci_bus *child);
479 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
480 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
481 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
482 extern void pci_dev_put(struct pci_dev *dev);
483 extern void pci_remove_bus(struct pci_bus *b);
484 extern void pci_remove_bus_device(struct pci_dev *dev);
485 extern void pci_stop_bus_device(struct pci_dev *dev);
486 void pci_setup_cardbus(struct pci_bus *bus);
487 extern void pci_sort_breadthfirst(void);
488
489 /* Generic PCI functions exported to card drivers */
490
491 #ifdef CONFIG_PCI_LEGACY
492 struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
493 struct pci_dev __deprecated *pci_find_slot (unsigned int bus, unsigned int devfn);
494 #endif /* CONFIG_PCI_LEGACY */
495
496 int pci_find_capability (struct pci_dev *dev, int cap);
497 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
498 int pci_find_ext_capability (struct pci_dev *dev, int cap);
499 int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);
500 int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);
501 void pcie_wait_pending_transaction(struct pci_dev *dev);
502 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
503
504 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
505 struct pci_dev *from);
506 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
507 struct pci_dev *from);
508
509 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
510 unsigned int ss_vendor, unsigned int ss_device,
511 struct pci_dev *from);
512 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
513 struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);
514 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
515 int pci_dev_present(const struct pci_device_id *ids);
516 const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
517
518 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
519 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
520 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
521 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
522 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
523 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
524
525 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
526 {
527 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
528 }
529 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
530 {
531 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
532 }
533 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
534 {
535 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
536 }
537 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
538 {
539 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
540 }
541 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
542 {
543 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
544 }
545 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
546 {
547 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
548 }
549
550 int __must_check pci_enable_device(struct pci_dev *dev);
551 int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
552 int __must_check pci_reenable_device(struct pci_dev *);
553 int __must_check pcim_enable_device(struct pci_dev *pdev);
554 void pcim_pin_device(struct pci_dev *pdev);
555
556 static inline int pci_is_managed(struct pci_dev *pdev)
557 {
558 return pdev->is_managed;
559 }
560
561 void pci_disable_device(struct pci_dev *dev);
562 void pci_set_master(struct pci_dev *dev);
563 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
564 #define HAVE_PCI_SET_MWI
565 int __must_check pci_set_mwi(struct pci_dev *dev);
566 int pci_try_set_mwi(struct pci_dev *dev);
567 void pci_clear_mwi(struct pci_dev *dev);
568 void pci_intx(struct pci_dev *dev, int enable);
569 void pci_msi_off(struct pci_dev *dev);
570 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
571 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
572 int pcix_get_max_mmrbc(struct pci_dev *dev);
573 int pcix_get_mmrbc(struct pci_dev *dev);
574 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
575 int pcie_get_readrq(struct pci_dev *dev);
576 int pcie_set_readrq(struct pci_dev *dev, int rq);
577 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
578 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
579 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
580 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
581
582 /* ROM control related routines */
583 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
584 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
585 size_t pci_get_rom_size(void __iomem *rom, size_t size);
586
587 /* Power management related routines */
588 int pci_save_state(struct pci_dev *dev);
589 int pci_restore_state(struct pci_dev *dev);
590 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
591 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
592 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
593
594 /* Functions for PCI Hotplug drivers to use */
595 int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
596
597 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
598 void pci_bus_assign_resources(struct pci_bus *bus);
599 void pci_bus_size_bridges(struct pci_bus *bus);
600 int pci_claim_resource(struct pci_dev *, int);
601 void pci_assign_unassigned_resources(void);
602 void pdev_enable_device(struct pci_dev *);
603 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
604 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
605 int (*)(struct pci_dev *, u8, u8));
606 #define HAVE_PCI_REQ_REGIONS 2
607 int __must_check pci_request_regions(struct pci_dev *, const char *);
608 void pci_release_regions(struct pci_dev *);
609 int __must_check pci_request_region(struct pci_dev *, int, const char *);
610 void pci_release_region(struct pci_dev *, int);
611 int pci_request_selected_regions(struct pci_dev *, int, const char *);
612 void pci_release_selected_regions(struct pci_dev *, int);
613
614 /* drivers/pci/bus.c */
615 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
616 struct resource *res, resource_size_t size,
617 resource_size_t align, resource_size_t min,
618 unsigned int type_mask,
619 void (*alignf)(void *, struct resource *,
620 resource_size_t, resource_size_t),
621 void *alignf_data);
622 void pci_enable_bridges(struct pci_bus *bus);
623
624 /* Proper probing supporting hot-pluggable devices */
625 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
626 const char *mod_name);
627 static inline int __must_check pci_register_driver(struct pci_driver *driver)
628 {
629 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
630 }
631
632 void pci_unregister_driver(struct pci_driver *);
633 void pci_remove_behind_bridge(struct pci_dev *);
634 struct pci_driver *pci_dev_driver(const struct pci_dev *);
635 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
636 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
637
638 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
639 void *userdata);
640 int pci_cfg_space_size(struct pci_dev *dev);
641 unsigned char pci_bus_max_busnr(struct pci_bus* bus);
642
643 /* kmem_cache style wrapper around pci_alloc_consistent() */
644
645 #include <linux/dmapool.h>
646
647 #define pci_pool dma_pool
648 #define pci_pool_create(name, pdev, size, align, allocation) \
649 dma_pool_create(name, &pdev->dev, size, align, allocation)
650 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
651 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
652 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
653
654 enum pci_dma_burst_strategy {
655 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
656 strategy_parameter is N/A */
657 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
658 byte boundaries */
659 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
660 strategy_parameter byte boundaries */
661 };
662
663 struct msix_entry {
664 u16 vector; /* kernel uses to write allocated vector */
665 u16 entry; /* driver uses to specify entry, OS writes */
666 };
667
668
669 #ifndef CONFIG_PCI_MSI
670 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
671 static inline void pci_disable_msi(struct pci_dev *dev) {}
672 static inline int pci_enable_msix(struct pci_dev* dev,
673 struct msix_entry *entries, int nvec) {return -1;}
674 static inline void pci_disable_msix(struct pci_dev *dev) {}
675 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
676 #else
677 extern int pci_enable_msi(struct pci_dev *dev);
678 extern void pci_disable_msi(struct pci_dev *dev);
679 extern int pci_enable_msix(struct pci_dev* dev,
680 struct msix_entry *entries, int nvec);
681 extern void pci_disable_msix(struct pci_dev *dev);
682 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
683 #endif
684
685 #ifdef CONFIG_HT_IRQ
686 /* The functions a driver should call */
687 int ht_create_irq(struct pci_dev *dev, int idx);
688 void ht_destroy_irq(unsigned int irq);
689 #endif /* CONFIG_HT_IRQ */
690
691 extern void pci_block_user_cfg_access(struct pci_dev *dev);
692 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
693
694 /*
695 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
696 * a PCI domain is defined to be a set of PCI busses which share
697 * configuration space.
698 */
699 #ifdef CONFIG_PCI_DOMAINS
700 extern int pci_domains_supported;
701 #else
702 enum { pci_domains_supported = 0 };
703 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
704 static inline int pci_proc_domain(struct pci_bus *bus)
705 {
706 return 0;
707 }
708 #endif /* CONFIG_PCI_DOMAINS */
709
710 #else /* CONFIG_PCI is not enabled */
711
712 /*
713 * If the system does not have PCI, clearly these return errors. Define
714 * these as simple inline functions to avoid hair in drivers.
715 */
716
717 #define _PCI_NOP(o,s,t) \
718 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
719 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
720 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
721 _PCI_NOP(o,word,u16 x) \
722 _PCI_NOP(o,dword,u32 x)
723 _PCI_NOP_ALL(read, *)
724 _PCI_NOP_ALL(write,)
725
726 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
727 { return NULL; }
728
729 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
730 { return NULL; }
731
732 static inline struct pci_dev *pci_get_device(unsigned int vendor,
733 unsigned int device, struct pci_dev *from)
734 { return NULL; }
735
736 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
737 unsigned int device, struct pci_dev *from)
738 { return NULL; }
739
740 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
741 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
742 { return NULL; }
743
744 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
745 { return NULL; }
746
747 #define pci_dev_present(ids) (0)
748 #define no_pci_devices() (1)
749 #define pci_find_present(ids) (NULL)
750 #define pci_dev_put(dev) do { } while (0)
751
752 static inline void pci_set_master(struct pci_dev *dev) { }
753 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
754 static inline void pci_disable_device(struct pci_dev *dev) { }
755 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
756 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
757 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
758 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
759 static inline void pci_unregister_driver(struct pci_driver *drv) { }
760 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
761 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
762 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
763 static inline void pcie_wait_pending_transaction(struct pci_dev *dev) {}
764
765 /* Power management related routines */
766 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
767 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
768 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
769 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
770 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
771
772 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; }
773 static inline void pci_release_regions(struct pci_dev *dev) { }
774
775 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
776
777 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
778 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
779
780 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
781 { return NULL; }
782
783 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
784 unsigned int devfn)
785 { return NULL; }
786
787 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
788 unsigned int devfn)
789 { return NULL; }
790
791 #endif /* CONFIG_PCI */
792
793 /* Include architecture-dependent settings and functions */
794
795 #include <asm/pci.h>
796
797 /* these helpers provide future and backwards compatibility
798 * for accessing popular PCI BAR info */
799 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
800 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
801 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
802 #define pci_resource_len(dev,bar) \
803 ((pci_resource_start((dev),(bar)) == 0 && \
804 pci_resource_end((dev),(bar)) == \
805 pci_resource_start((dev),(bar))) ? 0 : \
806 \
807 (pci_resource_end((dev),(bar)) - \
808 pci_resource_start((dev),(bar)) + 1))
809
810 /* Similar to the helpers above, these manipulate per-pci_dev
811 * driver-specific data. They are really just a wrapper around
812 * the generic device structure functions of these calls.
813 */
814 static inline void *pci_get_drvdata (struct pci_dev *pdev)
815 {
816 return dev_get_drvdata(&pdev->dev);
817 }
818
819 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
820 {
821 dev_set_drvdata(&pdev->dev, data);
822 }
823
824 /* If you want to know what to call your pci_dev, ask this function.
825 * Again, it's a wrapper around the generic device.
826 */
827 static inline char *pci_name(struct pci_dev *pdev)
828 {
829 return pdev->dev.bus_id;
830 }
831
832
833 /* Some archs don't want to expose struct resource to userland as-is
834 * in sysfs and /proc
835 */
836 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
837 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
838 const struct resource *rsrc, resource_size_t *start,
839 resource_size_t *end)
840 {
841 *start = rsrc->start;
842 *end = rsrc->end;
843 }
844 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
845
846
847 /*
848 * The world is not perfect and supplies us with broken PCI devices.
849 * For at least a part of these bugs we need a work-around, so both
850 * generic (drivers/pci/quirks.c) and per-architecture code can define
851 * fixup hooks to be called for particular buggy devices.
852 */
853
854 struct pci_fixup {
855 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
856 void (*hook)(struct pci_dev *dev);
857 };
858
859 enum pci_fixup_pass {
860 pci_fixup_early, /* Before probing BARs */
861 pci_fixup_header, /* After reading configuration header */
862 pci_fixup_final, /* Final phase of device fixups */
863 pci_fixup_enable, /* pci_enable_device() time */
864 pci_fixup_resume, /* pci_enable_device() time */
865 };
866
867 /* Anonymous variables would be nice... */
868 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
869 static const struct pci_fixup __pci_fixup_##name __used \
870 __attribute__((__section__(#section))) = { vendor, device, hook };
871 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
872 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
873 vendor##device##hook, vendor, device, hook)
874 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
875 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
876 vendor##device##hook, vendor, device, hook)
877 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
878 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
879 vendor##device##hook, vendor, device, hook)
880 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
881 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
882 vendor##device##hook, vendor, device, hook)
883 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
884 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
885 resume##vendor##device##hook, vendor, device, hook)
886
887
888 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
889
890 void __iomem * pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
891 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
892 void __iomem * const * pcim_iomap_table(struct pci_dev *pdev);
893 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
894 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
895
896 extern int pci_pci_problems;
897 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
898 #define PCIPCI_TRITON 2
899 #define PCIPCI_NATOMA 4
900 #define PCIPCI_VIAETBF 8
901 #define PCIPCI_VSFX 16
902 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
903 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
904
905 extern unsigned long pci_cardbus_io_size;
906 extern unsigned long pci_cardbus_mem_size;
907
908 extern int pcibios_add_platform_entries(struct pci_dev *dev);
909
910 #endif /* __KERNEL__ */
911 #endif /* LINUX_PCI_H */
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