[PATCH] sata_via: convert to new EH, take #3
[linux-2.6/openmoko-kernel/knife-kernel.git] / include / asm-ppc / open_pic.h
blobec2f46629ca28ea177090589d972ed35e07cf95c
1 /*
2 * include/asm-ppc/open_pic.h -- OpenPIC Interrupt Handling
4 * Copyright (C) 1997 Geert Uytterhoeven
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
12 #ifndef _PPC_KERNEL_OPEN_PIC_H
13 #define _PPC_KERNEL_OPEN_PIC_H
15 #include <linux/config.h>
16 #include <linux/irq.h>
18 #define OPENPIC_SIZE 0x40000
21 * Non-offset'ed vector numbers
24 #define OPENPIC_VEC_TIMER 110 /* and up */
25 #define OPENPIC_VEC_IPI 118 /* and up */
26 #define OPENPIC_VEC_SPURIOUS 255
28 /* Priorities */
29 #define OPENPIC_PRIORITY_IPI_BASE 10
30 #define OPENPIC_PRIORITY_DEFAULT 4
31 #define OPENPIC_PRIORITY_NMI 9
33 /* OpenPIC IRQ controller structure */
34 extern struct hw_interrupt_type open_pic;
36 /* OpenPIC IPI controller structure */
37 #ifdef CONFIG_SMP
38 extern struct hw_interrupt_type open_pic_ipi;
39 #endif /* CONFIG_SMP */
41 extern u_int OpenPIC_NumInitSenses;
42 extern u_char *OpenPIC_InitSenses;
43 extern void __iomem * OpenPIC_Addr;
44 extern int epic_serial_mode;
46 /* Exported functions */
47 extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
48 extern void openpic_init(int linux_irq_offset);
49 extern void openpic_init_nmi_irq(u_int irq);
50 extern void openpic_set_irq_priority(u_int irq, u_int pri);
51 extern void openpic_hookup_cascade(u_int irq, char *name,
52 int (*cascade_fn)(struct pt_regs *));
53 extern u_int openpic_irq(void);
54 extern void openpic_eoi(void);
55 extern void openpic_request_IPIs(void);
56 extern void do_openpic_setup_cpu(void);
57 extern int openpic_get_irq(struct pt_regs *regs);
58 extern void openpic_reset_processor_phys(u_int cpumask);
59 extern void openpic_setup_ISU(int isu_num, unsigned long addr);
60 extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
61 extern void smp_openpic_message_pass(int target, int msg);
62 extern void openpic_set_k2_cascade(int irq);
63 extern void openpic_set_priority(u_int pri);
64 extern u_int openpic_get_priority(void);
66 extern inline int openpic_to_irq(int irq)
68 /* IRQ 0 usually means 'disabled'.. don't mess with it
69 * exceptions to this (sandpoint maybe?)
70 * shouldn't use openpic_to_irq
72 if (irq != 0){
73 return irq += NUM_8259_INTERRUPTS;
74 } else {
75 return 0;
78 /* Support for second openpic on G5 macs */
80 // FIXME: To be replaced by sane cascaded controller management */
82 #define PMAC_OPENPIC2_OFFSET 128
84 #define OPENPIC2_VEC_TIMER 110 /* and up */
85 #define OPENPIC2_VEC_IPI 118 /* and up */
86 #define OPENPIC2_VEC_SPURIOUS 127
89 extern void* OpenPIC2_Addr;
91 /* Exported functions */
92 extern void openpic2_set_sources(int first_irq, int num_irqs, void *isr);
93 extern void openpic2_init(int linux_irq_offset);
94 extern void openpic2_init_nmi_irq(u_int irq);
95 extern u_int openpic2_irq(void);
96 extern void openpic2_eoi(void);
97 extern int openpic2_get_irq(struct pt_regs *regs);
98 extern void openpic2_setup_ISU(int isu_num, unsigned long addr);
99 #endif /* _PPC_KERNEL_OPEN_PIC_H */