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iwlwifi: Add tx_ant_num hw setting variable
[linux-2.6/openmoko-kernel/knife-kernel.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
blob237d3b24dd200a0bf1d2b4858bcc9d0a8435b244
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40
41 #include "iwl-4965.h"
42 #include "iwl-helpers.h"
43
44 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
45
46 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_SISO_##s##M_PLCP, \
49 IWL_RATE_MIMO_##s##M_PLCP, \
50 IWL_RATE_##r##M_IEEE, \
51 IWL_RATE_##ip##M_INDEX, \
52 IWL_RATE_##in##M_INDEX, \
53 IWL_RATE_##rp##M_INDEX, \
54 IWL_RATE_##rn##M_INDEX, \
55 IWL_RATE_##pp##M_INDEX, \
56 IWL_RATE_##np##M_INDEX }
57
58 /*
59 * Parameter order:
60 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
61 *
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
64 *
65 */
66 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
67 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
80 };
81
82 #ifdef CONFIG_IWL4965_HT
83
84 static const u16 default_tid_to_tx_fifo[] = {
85 IWL_TX_FIFO_AC1,
86 IWL_TX_FIFO_AC0,
87 IWL_TX_FIFO_AC0,
88 IWL_TX_FIFO_AC1,
89 IWL_TX_FIFO_AC2,
90 IWL_TX_FIFO_AC2,
91 IWL_TX_FIFO_AC3,
92 IWL_TX_FIFO_AC3,
93 IWL_TX_FIFO_NONE,
94 IWL_TX_FIFO_NONE,
95 IWL_TX_FIFO_NONE,
96 IWL_TX_FIFO_NONE,
97 IWL_TX_FIFO_NONE,
98 IWL_TX_FIFO_NONE,
99 IWL_TX_FIFO_NONE,
100 IWL_TX_FIFO_NONE,
101 IWL_TX_FIFO_AC3
102 };
103
104 #endif /*CONFIG_IWL4965_HT */
105
106 static int is_fat_channel(__le32 rxon_flags)
107 {
108 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
109 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
110 }
111
112 static u8 is_single_stream(struct iwl4965_priv *priv)
113 {
114 #ifdef CONFIG_IWL4965_HT
115 if (!priv->current_ht_config.is_ht ||
116 (priv->current_ht_config.supp_mcs_set[1] == 0) ||
117 (priv->ps_mode == IWL_MIMO_PS_STATIC))
118 return 1;
119 #else
120 return 1;
121 #endif /*CONFIG_IWL4965_HT */
122 return 0;
123 }
124
125 /*
126 * Determine how many receiver/antenna chains to use.
127 * More provides better reception via diversity. Fewer saves power.
128 * MIMO (dual stream) requires at least 2, but works better with 3.
129 * This does not determine *which* chains to use, just how many.
130 */
131 static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
132 u8 *idle_state, u8 *rx_state)
133 {
134 u8 is_single = is_single_stream(priv);
135 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
136
137 /* # of Rx chains to use when expecting MIMO. */
138 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
139 *rx_state = 2;
140 else
141 *rx_state = 3;
142
143 /* # Rx chains when idling and maybe trying to save power */
144 switch (priv->ps_mode) {
145 case IWL_MIMO_PS_STATIC:
146 case IWL_MIMO_PS_DYNAMIC:
147 *idle_state = (is_cam) ? 2 : 1;
148 break;
149 case IWL_MIMO_PS_NONE:
150 *idle_state = (is_cam) ? *rx_state : 1;
151 break;
152 default:
153 *idle_state = 1;
154 break;
155 }
156
157 return 0;
158 }
159
160 int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
161 {
162 int rc;
163 unsigned long flags;
164
165 spin_lock_irqsave(&priv->lock, flags);
166 rc = iwl4965_grab_nic_access(priv);
167 if (rc) {
168 spin_unlock_irqrestore(&priv->lock, flags);
169 return rc;
170 }
171
172 /* stop Rx DMA */
173 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
174 rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
175 (1 << 24), 1000);
176 if (rc < 0)
177 IWL_ERROR("Can't stop Rx DMA.\n");
178
179 iwl4965_release_nic_access(priv);
180 spin_unlock_irqrestore(&priv->lock, flags);
181
182 return 0;
183 }
184
185 u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
186 {
187 int i;
188 int start = 0;
189 int ret = IWL_INVALID_STATION;
190 unsigned long flags;
191 DECLARE_MAC_BUF(mac);
192
193 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
194 (priv->iw_mode == IEEE80211_IF_TYPE_AP))
195 start = IWL_STA_ID;
196
197 if (is_broadcast_ether_addr(addr))
198 return IWL4965_BROADCAST_ID;
199
200 spin_lock_irqsave(&priv->sta_lock, flags);
201 for (i = start; i < priv->hw_setting.max_stations; i++)
202 if ((priv->stations[i].used) &&
203 (!compare_ether_addr
204 (priv->stations[i].sta.sta.addr, addr))) {
205 ret = i;
206 goto out;
207 }
208
209 IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
210 print_mac(mac, addr), priv->num_stations);
211
212 out:
213 spin_unlock_irqrestore(&priv->sta_lock, flags);
214 return ret;
215 }
216
217 static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
218 {
219 int ret;
220 unsigned long flags;
221
222 spin_lock_irqsave(&priv->lock, flags);
223 ret = iwl4965_grab_nic_access(priv);
224 if (ret) {
225 spin_unlock_irqrestore(&priv->lock, flags);
226 return ret;
227 }
228
229 if (!pwr_max) {
230 u32 val;
231
232 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
233 &val);
234
235 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
236 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
237 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
238 ~APMG_PS_CTRL_MSK_PWR_SRC);
239 } else
240 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
241 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
242 ~APMG_PS_CTRL_MSK_PWR_SRC);
243
244 iwl4965_release_nic_access(priv);
245 spin_unlock_irqrestore(&priv->lock, flags);
246
247 return ret;
248 }
249
250 static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
251 {
252 int rc;
253 unsigned long flags;
254 unsigned int rb_size;
255
256 spin_lock_irqsave(&priv->lock, flags);
257 rc = iwl4965_grab_nic_access(priv);
258 if (rc) {
259 spin_unlock_irqrestore(&priv->lock, flags);
260 return rc;
261 }
262
263 if (iwl4965_param_amsdu_size_8K)
264 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
265 else
266 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
267
268 /* Stop Rx DMA */
269 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
270
271 /* Reset driver's Rx queue write index */
272 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
273
274 /* Tell device where to find RBD circular buffer in DRAM */
275 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
276 rxq->dma_addr >> 8);
277
278 /* Tell device where in DRAM to update its Rx status */
279 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
280 (priv->hw_setting.shared_phys +
281 offsetof(struct iwl4965_shared, val0)) >> 4);
282
283 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
284 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
285 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
286 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
287 rb_size |
288 /*0x10 << 4 | */
289 (RX_QUEUE_SIZE_LOG <<
290 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
291
292 /*
293 * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
294 */
295
296 iwl4965_release_nic_access(priv);
297 spin_unlock_irqrestore(&priv->lock, flags);
298
299 return 0;
300 }
301
302 /* Tell 4965 where to find the "keep warm" buffer */
303 static int iwl4965_kw_init(struct iwl4965_priv *priv)
304 {
305 unsigned long flags;
306 int rc;
307
308 spin_lock_irqsave(&priv->lock, flags);
309 rc = iwl4965_grab_nic_access(priv);
310 if (rc)
311 goto out;
312
313 iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
314 priv->kw.dma_addr >> 4);
315 iwl4965_release_nic_access(priv);
316 out:
317 spin_unlock_irqrestore(&priv->lock, flags);
318 return rc;
319 }
320
321 static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
322 {
323 struct pci_dev *dev = priv->pci_dev;
324 struct iwl4965_kw *kw = &priv->kw;
325
326 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
327 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
328 if (!kw->v_addr)
329 return -ENOMEM;
330
331 return 0;
332 }
333
334 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
335 ? # x " " : "")
336
337 /**
338 * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
339 *
340 * Does not set up a command, or touch hardware.
341 */
342 int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv,
343 enum ieee80211_band band, u16 channel,
344 const struct iwl4965_eeprom_channel *eeprom_ch,
345 u8 fat_extension_channel)
346 {
347 struct iwl4965_channel_info *ch_info;
348
349 ch_info = (struct iwl4965_channel_info *)
350 iwl4965_get_channel_info(priv, band, channel);
351
352 if (!is_channel_valid(ch_info))
353 return -1;
354
355 IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
356 " %ddBm): Ad-Hoc %ssupported\n",
357 ch_info->channel,
358 is_channel_a_band(ch_info) ?
359 "5.2" : "2.4",
360 CHECK_AND_PRINT(IBSS),
361 CHECK_AND_PRINT(ACTIVE),
362 CHECK_AND_PRINT(RADAR),
363 CHECK_AND_PRINT(WIDE),
364 CHECK_AND_PRINT(NARROW),
365 CHECK_AND_PRINT(DFS),
366 eeprom_ch->flags,
367 eeprom_ch->max_power_avg,
368 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
369 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
370 "" : "not ");
371
372 ch_info->fat_eeprom = *eeprom_ch;
373 ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
374 ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
375 ch_info->fat_min_power = 0;
376 ch_info->fat_scan_power = eeprom_ch->max_power_avg;
377 ch_info->fat_flags = eeprom_ch->flags;
378 ch_info->fat_extension_channel = fat_extension_channel;
379
380 return 0;
381 }
382
383 /**
384 * iwl4965_kw_free - Free the "keep warm" buffer
385 */
386 static void iwl4965_kw_free(struct iwl4965_priv *priv)
387 {
388 struct pci_dev *dev = priv->pci_dev;
389 struct iwl4965_kw *kw = &priv->kw;
390
391 if (kw->v_addr) {
392 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
393 memset(kw, 0, sizeof(*kw));
394 }
395 }
396
397 /**
398 * iwl4965_txq_ctx_reset - Reset TX queue context
399 * Destroys all DMA structures and initialise them again
400 *
401 * @param priv
402 * @return error code
403 */
404 static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
405 {
406 int rc = 0;
407 int txq_id, slots_num;
408 unsigned long flags;
409
410 iwl4965_kw_free(priv);
411
412 /* Free all tx/cmd queues and keep-warm buffer */
413 iwl4965_hw_txq_ctx_free(priv);
414
415 /* Alloc keep-warm buffer */
416 rc = iwl4965_kw_alloc(priv);
417 if (rc) {
418 IWL_ERROR("Keep Warm allocation failed");
419 goto error_kw;
420 }
421
422 spin_lock_irqsave(&priv->lock, flags);
423
424 rc = iwl4965_grab_nic_access(priv);
425 if (unlikely(rc)) {
426 IWL_ERROR("TX reset failed");
427 spin_unlock_irqrestore(&priv->lock, flags);
428 goto error_reset;
429 }
430
431 /* Turn off all Tx DMA channels */
432 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
433 iwl4965_release_nic_access(priv);
434 spin_unlock_irqrestore(&priv->lock, flags);
435
436 /* Tell 4965 where to find the keep-warm buffer */
437 rc = iwl4965_kw_init(priv);
438 if (rc) {
439 IWL_ERROR("kw_init failed\n");
440 goto error_reset;
441 }
442
443 /* Alloc and init all (default 16) Tx queues,
444 * including the command queue (#4) */
445 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
446 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
447 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
448 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
449 txq_id);
450 if (rc) {
451 IWL_ERROR("Tx %d queue init failed\n", txq_id);
452 goto error;
453 }
454 }
455
456 return rc;
457
458 error:
459 iwl4965_hw_txq_ctx_free(priv);
460 error_reset:
461 iwl4965_kw_free(priv);
462 error_kw:
463 return rc;
464 }
465
466 int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
467 {
468 int rc;
469 unsigned long flags;
470 struct iwl4965_rx_queue *rxq = &priv->rxq;
471 u8 rev_id;
472 u32 val;
473 u8 val_link;
474
475 iwl4965_power_init_handle(priv);
476
477 /* nic_init */
478 spin_lock_irqsave(&priv->lock, flags);
479
480 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
481 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
482
483 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
484 rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
485 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
486 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
487 if (rc < 0) {
488 spin_unlock_irqrestore(&priv->lock, flags);
489 IWL_DEBUG_INFO("Failed to init the card\n");
490 return rc;
491 }
492
493 rc = iwl4965_grab_nic_access(priv);
494 if (rc) {
495 spin_unlock_irqrestore(&priv->lock, flags);
496 return rc;
497 }
498
499 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
500
501 iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
502 APMG_CLK_VAL_DMA_CLK_RQT |
503 APMG_CLK_VAL_BSM_CLK_RQT);
504 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
505
506 udelay(20);
507
508 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
509 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
510
511 iwl4965_release_nic_access(priv);
512 iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
513 spin_unlock_irqrestore(&priv->lock, flags);
514
515 /* Determine HW type */
516 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
517 if (rc)
518 return rc;
519
520 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
521
522 iwl4965_nic_set_pwr_src(priv, 1);
523 spin_lock_irqsave(&priv->lock, flags);
524
525 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
526 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
527 /* Enable No Snoop field */
528 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
529 val & ~(1 << 11));
530 }
531
532 spin_unlock_irqrestore(&priv->lock, flags);
533
534 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
535 IWL_ERROR("Older EEPROM detected! Aborting.\n");
536 return -EINVAL;
537 }
538
539 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
540
541 /* disable L1 entry -- workaround for pre-B1 */
542 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
543
544 spin_lock_irqsave(&priv->lock, flags);
545
546 /* set CSR_HW_CONFIG_REG for uCode use */
547
548 iwl4965_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
549 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
550 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
551
552 rc = iwl4965_grab_nic_access(priv);
553 if (rc < 0) {
554 spin_unlock_irqrestore(&priv->lock, flags);
555 IWL_DEBUG_INFO("Failed to init the card\n");
556 return rc;
557 }
558
559 iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
560 iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
561 APMG_PS_CTRL_VAL_RESET_REQ);
562 udelay(5);
563 iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
564 APMG_PS_CTRL_VAL_RESET_REQ);
565
566 iwl4965_release_nic_access(priv);
567 spin_unlock_irqrestore(&priv->lock, flags);
568
569 iwl4965_hw_card_show_info(priv);
570
571 /* end nic_init */
572
573 /* Allocate the RX queue, or reset if it is already allocated */
574 if (!rxq->bd) {
575 rc = iwl4965_rx_queue_alloc(priv);
576 if (rc) {
577 IWL_ERROR("Unable to initialize Rx queue\n");
578 return -ENOMEM;
579 }
580 } else
581 iwl4965_rx_queue_reset(priv, rxq);
582
583 iwl4965_rx_replenish(priv);
584
585 iwl4965_rx_init(priv, rxq);
586
587 spin_lock_irqsave(&priv->lock, flags);
588
589 rxq->need_update = 1;
590 iwl4965_rx_queue_update_write_ptr(priv, rxq);
591
592 spin_unlock_irqrestore(&priv->lock, flags);
593
594 /* Allocate and init all Tx and Command queues */
595 rc = iwl4965_txq_ctx_reset(priv);
596 if (rc)
597 return rc;
598
599 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
600 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
601
602 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
603 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
604
605 set_bit(STATUS_INIT, &priv->status);
606
607 return 0;
608 }
609
610 int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
611 {
612 int rc = 0;
613 u32 reg_val;
614 unsigned long flags;
615
616 spin_lock_irqsave(&priv->lock, flags);
617
618 /* set stop master bit */
619 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
620
621 reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
622
623 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
624 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
625 IWL_DEBUG_INFO("Card in power save, master is already "
626 "stopped\n");
627 else {
628 rc = iwl4965_poll_bit(priv, CSR_RESET,
629 CSR_RESET_REG_FLAG_MASTER_DISABLED,
630 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
631 if (rc < 0) {
632 spin_unlock_irqrestore(&priv->lock, flags);
633 return rc;
634 }
635 }
636
637 spin_unlock_irqrestore(&priv->lock, flags);
638 IWL_DEBUG_INFO("stop master\n");
639
640 return rc;
641 }
642
643 /**
644 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
645 */
646 void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
647 {
648
649 int txq_id;
650 unsigned long flags;
651
652 /* Stop each Tx DMA channel, and wait for it to be idle */
653 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
654 spin_lock_irqsave(&priv->lock, flags);
655 if (iwl4965_grab_nic_access(priv)) {
656 spin_unlock_irqrestore(&priv->lock, flags);
657 continue;
658 }
659
660 iwl4965_write_direct32(priv,
661 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
662 0x0);
663 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
664 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
665 (txq_id), 200);
666 iwl4965_release_nic_access(priv);
667 spin_unlock_irqrestore(&priv->lock, flags);
668 }
669
670 /* Deallocate memory for all Tx queues */
671 iwl4965_hw_txq_ctx_free(priv);
672 }
673
674 int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
675 {
676 int rc = 0;
677 unsigned long flags;
678
679 iwl4965_hw_nic_stop_master(priv);
680
681 spin_lock_irqsave(&priv->lock, flags);
682
683 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
684
685 udelay(10);
686
687 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
688 rc = iwl4965_poll_bit(priv, CSR_RESET,
689 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
690 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
691
692 udelay(10);
693
694 rc = iwl4965_grab_nic_access(priv);
695 if (!rc) {
696 iwl4965_write_prph(priv, APMG_CLK_EN_REG,
697 APMG_CLK_VAL_DMA_CLK_RQT |
698 APMG_CLK_VAL_BSM_CLK_RQT);
699
700 udelay(10);
701
702 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
703 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
704
705 iwl4965_release_nic_access(priv);
706 }
707
708 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
709 wake_up_interruptible(&priv->wait_command_queue);
710
711 spin_unlock_irqrestore(&priv->lock, flags);
712
713 return rc;
714
715 }
716
717 #define REG_RECALIB_PERIOD (60)
718
719 /**
720 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
721 *
722 * This callback is provided in order to queue the statistics_work
723 * in work_queue context (v. softirq)
724 *
725 * This timer function is continually reset to execute within
726 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
727 * was received. We need to ensure we receive the statistics in order
728 * to update the temperature used for calibrating the TXPOWER. However,
729 * we can't send the statistics command from softirq context (which
730 * is the context which timers run at) so we have to queue off the
731 * statistics_work to actually send the command to the hardware.
732 */
733 static void iwl4965_bg_statistics_periodic(unsigned long data)
734 {
735 struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
736
737 queue_work(priv->workqueue, &priv->statistics_work);
738 }
739
740 /**
741 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
742 *
743 * This is queued by iwl4965_bg_statistics_periodic.
744 */
745 static void iwl4965_bg_statistics_work(struct work_struct *work)
746 {
747 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
748 statistics_work);
749
750 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
751 return;
752
753 mutex_lock(&priv->mutex);
754 iwl4965_send_statistics_request(priv);
755 mutex_unlock(&priv->mutex);
756 }
757
758 #define CT_LIMIT_CONST 259
759 #define TM_CT_KILL_THRESHOLD 110
760
761 void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
762 {
763 struct iwl4965_ct_kill_config cmd;
764 u32 R1, R2, R3;
765 u32 temp_th;
766 u32 crit_temperature;
767 unsigned long flags;
768 int rc = 0;
769
770 spin_lock_irqsave(&priv->lock, flags);
771 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
772 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
773 spin_unlock_irqrestore(&priv->lock, flags);
774
775 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
776 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
777 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
778 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
779 } else {
780 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
781 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
782 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
783 }
784
785 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
786
787 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
788 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
789 rc = iwl4965_send_cmd_pdu(priv,
790 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
791 if (rc)
792 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
793 else
794 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
795 }
796
797 #ifdef CONFIG_IWL4965_SENSITIVITY
798
799 /* "false alarms" are signals that our DSP tries to lock onto,
800 * but then determines that they are either noise, or transmissions
801 * from a distant wireless network (also "noise", really) that get
802 * "stepped on" by stronger transmissions within our own network.
803 * This algorithm attempts to set a sensitivity level that is high
804 * enough to receive all of our own network traffic, but not so
805 * high that our DSP gets too busy trying to lock onto non-network
806 * activity/noise. */
807 static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
808 u32 norm_fa,
809 u32 rx_enable_time,
810 struct statistics_general_data *rx_info)
811 {
812 u32 max_nrg_cck = 0;
813 int i = 0;
814 u8 max_silence_rssi = 0;
815 u32 silence_ref = 0;
816 u8 silence_rssi_a = 0;
817 u8 silence_rssi_b = 0;
818 u8 silence_rssi_c = 0;
819 u32 val;
820
821 /* "false_alarms" values below are cross-multiplications to assess the
822 * numbers of false alarms within the measured period of actual Rx
823 * (Rx is off when we're txing), vs the min/max expected false alarms
824 * (some should be expected if rx is sensitive enough) in a
825 * hypothetical listening period of 200 time units (TU), 204.8 msec:
826 *
827 * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
828 *
829 * */
830 u32 false_alarms = norm_fa * 200 * 1024;
831 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
832 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
833 struct iwl4965_sensitivity_data *data = NULL;
834
835 data = &(priv->sensitivity_data);
836
837 data->nrg_auto_corr_silence_diff = 0;
838
839 /* Find max silence rssi among all 3 receivers.
840 * This is background noise, which may include transmissions from other
841 * networks, measured during silence before our network's beacon */
842 silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
843 ALL_BAND_FILTER) >> 8);
844 silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
845 ALL_BAND_FILTER) >> 8);
846 silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
847 ALL_BAND_FILTER) >> 8);
848
849 val = max(silence_rssi_b, silence_rssi_c);
850 max_silence_rssi = max(silence_rssi_a, (u8) val);
851
852 /* Store silence rssi in 20-beacon history table */
853 data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
854 data->nrg_silence_idx++;
855 if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
856 data->nrg_silence_idx = 0;
857
858 /* Find max silence rssi across 20 beacon history */
859 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
860 val = data->nrg_silence_rssi[i];
861 silence_ref = max(silence_ref, val);
862 }
863 IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
864 silence_rssi_a, silence_rssi_b, silence_rssi_c,
865 silence_ref);
866
867 /* Find max rx energy (min value!) among all 3 receivers,
868 * measured during beacon frame.
869 * Save it in 10-beacon history table. */
870 i = data->nrg_energy_idx;
871 val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
872 data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
873
874 data->nrg_energy_idx++;
875 if (data->nrg_energy_idx >= 10)
876 data->nrg_energy_idx = 0;
877
878 /* Find min rx energy (max value) across 10 beacon history.
879 * This is the minimum signal level that we want to receive well.
880 * Add backoff (margin so we don't miss slightly lower energy frames).
881 * This establishes an upper bound (min value) for energy threshold. */
882 max_nrg_cck = data->nrg_value[0];
883 for (i = 1; i < 10; i++)
884 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
885 max_nrg_cck += 6;
886
887 IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
888 rx_info->beacon_energy_a, rx_info->beacon_energy_b,
889 rx_info->beacon_energy_c, max_nrg_cck - 6);
890
891 /* Count number of consecutive beacons with fewer-than-desired
892 * false alarms. */
893 if (false_alarms < min_false_alarms)
894 data->num_in_cck_no_fa++;
895 else
896 data->num_in_cck_no_fa = 0;
897 IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
898 data->num_in_cck_no_fa);
899
900 /* If we got too many false alarms this time, reduce sensitivity */
901 if (false_alarms > max_false_alarms) {
902 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
903 false_alarms, max_false_alarms);
904 IWL_DEBUG_CALIB("... reducing sensitivity\n");
905 data->nrg_curr_state = IWL_FA_TOO_MANY;
906
907 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
908 /* Store for "fewer than desired" on later beacon */
909 data->nrg_silence_ref = silence_ref;
910
911 /* increase energy threshold (reduce nrg value)
912 * to decrease sensitivity */
913 if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
914 data->nrg_th_cck = data->nrg_th_cck
915 - NRG_STEP_CCK;
916 }
917
918 /* increase auto_corr values to decrease sensitivity */
919 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
920 data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
921 else {
922 val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
923 data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
924 }
925 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
926 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
927
928 /* Else if we got fewer than desired, increase sensitivity */
929 } else if (false_alarms < min_false_alarms) {
930 data->nrg_curr_state = IWL_FA_TOO_FEW;
931
932 /* Compare silence level with silence level for most recent
933 * healthy number or too many false alarms */
934 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
935 (s32)silence_ref;
936
937 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
938 false_alarms, min_false_alarms,
939 data->nrg_auto_corr_silence_diff);
940
941 /* Increase value to increase sensitivity, but only if:
942 * 1a) previous beacon did *not* have *too many* false alarms
943 * 1b) AND there's a significant difference in Rx levels
944 * from a previous beacon with too many, or healthy # FAs
945 * OR 2) We've seen a lot of beacons (100) with too few
946 * false alarms */
947 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
948 ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
949 (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
950
951 IWL_DEBUG_CALIB("... increasing sensitivity\n");
952 /* Increase nrg value to increase sensitivity */
953 val = data->nrg_th_cck + NRG_STEP_CCK;
954 data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
955
956 /* Decrease auto_corr values to increase sensitivity */
957 val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
958 data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
959
960 val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
961 data->auto_corr_cck_mrc =
962 max((u32)AUTO_CORR_MIN_CCK_MRC, val);
963
964 } else
965 IWL_DEBUG_CALIB("... but not changing sensitivity\n");
966
967 /* Else we got a healthy number of false alarms, keep status quo */
968 } else {
969 IWL_DEBUG_CALIB(" FA in safe zone\n");
970 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
971
972 /* Store for use in "fewer than desired" with later beacon */
973 data->nrg_silence_ref = silence_ref;
974
975 /* If previous beacon had too many false alarms,
976 * give it some extra margin by reducing sensitivity again
977 * (but don't go below measured energy of desired Rx) */
978 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
979 IWL_DEBUG_CALIB("... increasing margin\n");
980 data->nrg_th_cck -= NRG_MARGIN;
981 }
982 }
983
984 /* Make sure the energy threshold does not go above the measured
985 * energy of the desired Rx signals (reduced by backoff margin),
986 * or else we might start missing Rx frames.
987 * Lower value is higher energy, so we use max()!
988 */
989 data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
990 IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
991
992 data->nrg_prev_state = data->nrg_curr_state;
993
994 return 0;
995 }
996
997
998 static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
999 u32 norm_fa,
1000 u32 rx_enable_time)
1001 {
1002 u32 val;
1003 u32 false_alarms = norm_fa * 200 * 1024;
1004 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
1005 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
1006 struct iwl4965_sensitivity_data *data = NULL;
1007
1008 data = &(priv->sensitivity_data);
1009
1010 /* If we got too many false alarms this time, reduce sensitivity */
1011 if (false_alarms > max_false_alarms) {
1012
1013 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
1014 false_alarms, max_false_alarms);
1015
1016 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
1017 data->auto_corr_ofdm =
1018 min((u32)AUTO_CORR_MAX_OFDM, val);
1019
1020 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
1021 data->auto_corr_ofdm_mrc =
1022 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
1023
1024 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
1025 data->auto_corr_ofdm_x1 =
1026 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
1027
1028 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
1029 data->auto_corr_ofdm_mrc_x1 =
1030 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
1031 }
1032
1033 /* Else if we got fewer than desired, increase sensitivity */
1034 else if (false_alarms < min_false_alarms) {
1035
1036 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
1037 false_alarms, min_false_alarms);
1038
1039 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
1040 data->auto_corr_ofdm =
1041 max((u32)AUTO_CORR_MIN_OFDM, val);
1042
1043 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
1044 data->auto_corr_ofdm_mrc =
1045 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
1046
1047 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1048 data->auto_corr_ofdm_x1 =
1049 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1050
1051 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1052 data->auto_corr_ofdm_mrc_x1 =
1053 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1054 }
1055
1056 else
1057 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1058 min_false_alarms, false_alarms, max_false_alarms);
1059
1060 return 0;
1061 }
1062
1063 static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
1064 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1065 {
1066 /* We didn't cache the SKB; let the caller free it */
1067 return 1;
1068 }
1069
1070 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1071 static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
1072 {
1073 int rc = 0;
1074 struct iwl4965_sensitivity_cmd cmd ;
1075 struct iwl4965_sensitivity_data *data = NULL;
1076 struct iwl4965_host_cmd cmd_out = {
1077 .id = SENSITIVITY_CMD,
1078 .len = sizeof(struct iwl4965_sensitivity_cmd),
1079 .meta.flags = flags,
1080 .data = &cmd,
1081 };
1082
1083 data = &(priv->sensitivity_data);
1084
1085 memset(&cmd, 0, sizeof(cmd));
1086
1087 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1088 cpu_to_le16((u16)data->auto_corr_ofdm);
1089 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1090 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1091 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1092 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1093 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1094 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1095
1096 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1097 cpu_to_le16((u16)data->auto_corr_cck);
1098 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1099 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1100
1101 cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1102 cpu_to_le16((u16)data->nrg_th_cck);
1103 cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1104 cpu_to_le16((u16)data->nrg_th_ofdm);
1105
1106 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1107 __constant_cpu_to_le16(190);
1108 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1109 __constant_cpu_to_le16(390);
1110 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1111 __constant_cpu_to_le16(62);
1112
1113 IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1114 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1115 data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1116 data->nrg_th_ofdm);
1117
1118 IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1119 data->auto_corr_cck, data->auto_corr_cck_mrc,
1120 data->nrg_th_cck);
1121
1122 /* Update uCode's "work" table, and copy it to DSP */
1123 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1124
1125 if (flags & CMD_ASYNC)
1126 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1127
1128 /* Don't send command to uCode if nothing has changed */
1129 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1130 sizeof(u16)*HD_TABLE_SIZE)) {
1131 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1132 return 0;
1133 }
1134
1135 /* Copy table for comparison next time */
1136 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1137 sizeof(u16)*HD_TABLE_SIZE);
1138
1139 rc = iwl4965_send_cmd(priv, &cmd_out);
1140 if (!rc) {
1141 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1142 return rc;
1143 }
1144
1145 return 0;
1146 }
1147
1148 void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
1149 {
1150 int rc = 0;
1151 int i;
1152 struct iwl4965_sensitivity_data *data = NULL;
1153
1154 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1155
1156 if (force)
1157 memset(&(priv->sensitivity_tbl[0]), 0,
1158 sizeof(u16)*HD_TABLE_SIZE);
1159
1160 /* Clear driver's sensitivity algo data */
1161 data = &(priv->sensitivity_data);
1162 memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1163
1164 data->num_in_cck_no_fa = 0;
1165 data->nrg_curr_state = IWL_FA_TOO_MANY;
1166 data->nrg_prev_state = IWL_FA_TOO_MANY;
1167 data->nrg_silence_ref = 0;
1168 data->nrg_silence_idx = 0;
1169 data->nrg_energy_idx = 0;
1170
1171 for (i = 0; i < 10; i++)
1172 data->nrg_value[i] = 0;
1173
1174 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1175 data->nrg_silence_rssi[i] = 0;
1176
1177 data->auto_corr_ofdm = 90;
1178 data->auto_corr_ofdm_mrc = 170;
1179 data->auto_corr_ofdm_x1 = 105;
1180 data->auto_corr_ofdm_mrc_x1 = 220;
1181 data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1182 data->auto_corr_cck_mrc = 200;
1183 data->nrg_th_cck = 100;
1184 data->nrg_th_ofdm = 100;
1185
1186 data->last_bad_plcp_cnt_ofdm = 0;
1187 data->last_fa_cnt_ofdm = 0;
1188 data->last_bad_plcp_cnt_cck = 0;
1189 data->last_fa_cnt_cck = 0;
1190
1191 /* Clear prior Sensitivity command data to force send to uCode */
1192 if (force)
1193 memset(&(priv->sensitivity_tbl[0]), 0,
1194 sizeof(u16)*HD_TABLE_SIZE);
1195
1196 rc |= iwl4965_sensitivity_write(priv, flags);
1197 IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
1198
1199 return;
1200 }
1201
1202
1203 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1204 * Called after every association, but this runs only once!
1205 * ... once chain noise is calibrated the first time, it's good forever. */
1206 void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
1207 {
1208 struct iwl4965_chain_noise_data *data = NULL;
1209 int rc = 0;
1210
1211 data = &(priv->chain_noise_data);
1212 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1213 struct iwl4965_calibration_cmd cmd;
1214
1215 memset(&cmd, 0, sizeof(cmd));
1216 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1217 cmd.diff_gain_a = 0;
1218 cmd.diff_gain_b = 0;
1219 cmd.diff_gain_c = 0;
1220 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1221 sizeof(cmd), &cmd);
1222 msleep(4);
1223 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1224 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1225 }
1226 return;
1227 }
1228
1229 /*
1230 * Accumulate 20 beacons of signal and noise statistics for each of
1231 * 3 receivers/antennas/rx-chains, then figure out:
1232 * 1) Which antennas are connected.
1233 * 2) Differential rx gain settings to balance the 3 receivers.
1234 */
1235 static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
1236 struct iwl4965_notif_statistics *stat_resp)
1237 {
1238 struct iwl4965_chain_noise_data *data = NULL;
1239 int rc = 0;
1240
1241 u32 chain_noise_a;
1242 u32 chain_noise_b;
1243 u32 chain_noise_c;
1244 u32 chain_sig_a;
1245 u32 chain_sig_b;
1246 u32 chain_sig_c;
1247 u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1248 u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1249 u32 max_average_sig;
1250 u16 max_average_sig_antenna_i;
1251 u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1252 u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1253 u16 i = 0;
1254 u16 chan_num = INITIALIZATION_VALUE;
1255 u32 band = INITIALIZATION_VALUE;
1256 u32 active_chains = 0;
1257 unsigned long flags;
1258 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1259
1260 data = &(priv->chain_noise_data);
1261
1262 /* Accumulate just the first 20 beacons after the first association,
1263 * then we're done forever. */
1264 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1265 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1266 IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1267 return;
1268 }
1269
1270 spin_lock_irqsave(&priv->lock, flags);
1271 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1272 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1273 spin_unlock_irqrestore(&priv->lock, flags);
1274 return;
1275 }
1276
1277 band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1278 chan_num = le16_to_cpu(priv->staging_rxon.channel);
1279
1280 /* Make sure we accumulate data for just the associated channel
1281 * (even if scanning). */
1282 if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1283 ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1284 (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1285 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1286 chan_num, band);
1287 spin_unlock_irqrestore(&priv->lock, flags);
1288 return;
1289 }
1290
1291 /* Accumulate beacon statistics values across 20 beacons */
1292 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1293 IN_BAND_FILTER;
1294 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1295 IN_BAND_FILTER;
1296 chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1297 IN_BAND_FILTER;
1298
1299 chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1300 chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1301 chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1302
1303 spin_unlock_irqrestore(&priv->lock, flags);
1304
1305 data->beacon_count++;
1306
1307 data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1308 data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1309 data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1310
1311 data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1312 data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1313 data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1314
1315 IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1316 data->beacon_count);
1317 IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1318 chain_sig_a, chain_sig_b, chain_sig_c);
1319 IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1320 chain_noise_a, chain_noise_b, chain_noise_c);
1321
1322 /* If this is the 20th beacon, determine:
1323 * 1) Disconnected antennas (using signal strengths)
1324 * 2) Differential gain (using silence noise) to balance receivers */
1325 if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1326
1327 /* Analyze signal for disconnected antenna */
1328 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1329 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1330 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1331
1332 if (average_sig[0] >= average_sig[1]) {
1333 max_average_sig = average_sig[0];
1334 max_average_sig_antenna_i = 0;
1335 active_chains = (1 << max_average_sig_antenna_i);
1336 } else {
1337 max_average_sig = average_sig[1];
1338 max_average_sig_antenna_i = 1;
1339 active_chains = (1 << max_average_sig_antenna_i);
1340 }
1341
1342 if (average_sig[2] >= max_average_sig) {
1343 max_average_sig = average_sig[2];
1344 max_average_sig_antenna_i = 2;
1345 active_chains = (1 << max_average_sig_antenna_i);
1346 }
1347
1348 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1349 average_sig[0], average_sig[1], average_sig[2]);
1350 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1351 max_average_sig, max_average_sig_antenna_i);
1352
1353 /* Compare signal strengths for all 3 receivers. */
1354 for (i = 0; i < NUM_RX_CHAINS; i++) {
1355 if (i != max_average_sig_antenna_i) {
1356 s32 rssi_delta = (max_average_sig -
1357 average_sig[i]);
1358
1359 /* If signal is very weak, compared with
1360 * strongest, mark it as disconnected. */
1361 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1362 data->disconn_array[i] = 1;
1363 else
1364 active_chains |= (1 << i);
1365 IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
1366 "disconn_array[i] = %d\n",
1367 i, rssi_delta, data->disconn_array[i]);
1368 }
1369 }
1370
1371 /*If both chains A & B are disconnected -
1372 * connect B and leave A as is */
1373 if (data->disconn_array[CHAIN_A] &&
1374 data->disconn_array[CHAIN_B]) {
1375 data->disconn_array[CHAIN_B] = 0;
1376 active_chains |= (1 << CHAIN_B);
1377 IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1378 "W/A - declare B as connected\n");
1379 }
1380
1381 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1382 active_chains);
1383
1384 /* Save for use within RXON, TX, SCAN commands, etc. */
1385 priv->valid_antenna = active_chains;
1386
1387 /* Analyze noise for rx balance */
1388 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1389 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1390 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1391
1392 for (i = 0; i < NUM_RX_CHAINS; i++) {
1393 if (!(data->disconn_array[i]) &&
1394 (average_noise[i] <= min_average_noise)) {
1395 /* This means that chain i is active and has
1396 * lower noise values so far: */
1397 min_average_noise = average_noise[i];
1398 min_average_noise_antenna_i = i;
1399 }
1400 }
1401
1402 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1403
1404 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1405 average_noise[0], average_noise[1],
1406 average_noise[2]);
1407
1408 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1409 min_average_noise, min_average_noise_antenna_i);
1410
1411 for (i = 0; i < NUM_RX_CHAINS; i++) {
1412 s32 delta_g = 0;
1413
1414 if (!(data->disconn_array[i]) &&
1415 (data->delta_gain_code[i] ==
1416 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1417 delta_g = average_noise[i] - min_average_noise;
1418 data->delta_gain_code[i] = (u8)((delta_g *
1419 10) / 15);
1420 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1421 data->delta_gain_code[i])
1422 data->delta_gain_code[i] =
1423 CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1424
1425 data->delta_gain_code[i] =
1426 (data->delta_gain_code[i] | (1 << 2));
1427 } else
1428 data->delta_gain_code[i] = 0;
1429 }
1430 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1431 data->delta_gain_code[0],
1432 data->delta_gain_code[1],
1433 data->delta_gain_code[2]);
1434
1435 /* Differential gain gets sent to uCode only once */
1436 if (!data->radio_write) {
1437 struct iwl4965_calibration_cmd cmd;
1438 data->radio_write = 1;
1439
1440 memset(&cmd, 0, sizeof(cmd));
1441 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1442 cmd.diff_gain_a = data->delta_gain_code[0];
1443 cmd.diff_gain_b = data->delta_gain_code[1];
1444 cmd.diff_gain_c = data->delta_gain_code[2];
1445 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1446 sizeof(cmd), &cmd);
1447 if (rc)
1448 IWL_DEBUG_CALIB("fail sending cmd "
1449 "REPLY_PHY_CALIBRATION_CMD \n");
1450
1451 /* TODO we might want recalculate
1452 * rx_chain in rxon cmd */
1453
1454 /* Mark so we run this algo only once! */
1455 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1456 }
1457 data->chain_noise_a = 0;
1458 data->chain_noise_b = 0;
1459 data->chain_noise_c = 0;
1460 data->chain_signal_a = 0;
1461 data->chain_signal_b = 0;
1462 data->chain_signal_c = 0;
1463 data->beacon_count = 0;
1464 }
1465 return;
1466 }
1467
1468 static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
1469 struct iwl4965_notif_statistics *resp)
1470 {
1471 int rc = 0;
1472 u32 rx_enable_time;
1473 u32 fa_cck;
1474 u32 fa_ofdm;
1475 u32 bad_plcp_cck;
1476 u32 bad_plcp_ofdm;
1477 u32 norm_fa_ofdm;
1478 u32 norm_fa_cck;
1479 struct iwl4965_sensitivity_data *data = NULL;
1480 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1481 struct statistics_rx *statistics = &(resp->rx);
1482 unsigned long flags;
1483 struct statistics_general_data statis;
1484
1485 data = &(priv->sensitivity_data);
1486
1487 if (!iwl4965_is_associated(priv)) {
1488 IWL_DEBUG_CALIB("<< - not associated\n");
1489 return;
1490 }
1491
1492 spin_lock_irqsave(&priv->lock, flags);
1493 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1494 IWL_DEBUG_CALIB("<< invalid data.\n");
1495 spin_unlock_irqrestore(&priv->lock, flags);
1496 return;
1497 }
1498
1499 /* Extract Statistics: */
1500 rx_enable_time = le32_to_cpu(rx_info->channel_load);
1501 fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1502 fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1503 bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1504 bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1505
1506 statis.beacon_silence_rssi_a =
1507 le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1508 statis.beacon_silence_rssi_b =
1509 le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1510 statis.beacon_silence_rssi_c =
1511 le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1512 statis.beacon_energy_a =
1513 le32_to_cpu(statistics->general.beacon_energy_a);
1514 statis.beacon_energy_b =
1515 le32_to_cpu(statistics->general.beacon_energy_b);
1516 statis.beacon_energy_c =
1517 le32_to_cpu(statistics->general.beacon_energy_c);
1518
1519 spin_unlock_irqrestore(&priv->lock, flags);
1520
1521 IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1522
1523 if (!rx_enable_time) {
1524 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1525 return;
1526 }
1527
1528 /* These statistics increase monotonically, and do not reset
1529 * at each beacon. Calculate difference from last value, or just
1530 * use the new statistics value if it has reset or wrapped around. */
1531 if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1532 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1533 else {
1534 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1535 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1536 }
1537
1538 if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1539 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1540 else {
1541 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1542 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1543 }
1544
1545 if (data->last_fa_cnt_ofdm > fa_ofdm)
1546 data->last_fa_cnt_ofdm = fa_ofdm;
1547 else {
1548 fa_ofdm -= data->last_fa_cnt_ofdm;
1549 data->last_fa_cnt_ofdm += fa_ofdm;
1550 }
1551
1552 if (data->last_fa_cnt_cck > fa_cck)
1553 data->last_fa_cnt_cck = fa_cck;
1554 else {
1555 fa_cck -= data->last_fa_cnt_cck;
1556 data->last_fa_cnt_cck += fa_cck;
1557 }
1558
1559 /* Total aborted signal locks */
1560 norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1561 norm_fa_cck = fa_cck + bad_plcp_cck;
1562
1563 IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
1564 bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1565
1566 iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1567 iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1568 rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
1569
1570 return;
1571 }
1572
1573 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1574 {
1575 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1576 sensitivity_work);
1577
1578 mutex_lock(&priv->mutex);
1579
1580 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1581 test_bit(STATUS_SCANNING, &priv->status)) {
1582 mutex_unlock(&priv->mutex);
1583 return;
1584 }
1585
1586 if (priv->start_calib) {
1587 iwl4965_noise_calibration(priv, &priv->statistics);
1588
1589 if (priv->sensitivity_data.state ==
1590 IWL_SENS_CALIB_NEED_REINIT) {
1591 iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1592 priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1593 } else
1594 iwl4965_sensitivity_calibration(priv,
1595 &priv->statistics);
1596 }
1597
1598 mutex_unlock(&priv->mutex);
1599 return;
1600 }
1601 #endif /*CONFIG_IWL4965_SENSITIVITY*/
1602
1603 static void iwl4965_bg_txpower_work(struct work_struct *work)
1604 {
1605 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1606 txpower_work);
1607
1608 /* If a scan happened to start before we got here
1609 * then just return; the statistics notification will
1610 * kick off another scheduled work to compensate for
1611 * any temperature delta we missed here. */
1612 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1613 test_bit(STATUS_SCANNING, &priv->status))
1614 return;
1615
1616 mutex_lock(&priv->mutex);
1617
1618 /* Regardless of if we are assocaited, we must reconfigure the
1619 * TX power since frames can be sent on non-radar channels while
1620 * not associated */
1621 iwl4965_hw_reg_send_txpower(priv);
1622
1623 /* Update last_temperature to keep is_calib_needed from running
1624 * when it isn't needed... */
1625 priv->last_temperature = priv->temperature;
1626
1627 mutex_unlock(&priv->mutex);
1628 }
1629
1630 /*
1631 * Acquire priv->lock before calling this function !
1632 */
1633 static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
1634 {
1635 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
1636 (index & 0xff) | (txq_id << 8));
1637 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1638 }
1639
1640 /**
1641 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1642 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1643 * @scd_retry: (1) Indicates queue will be used in aggregation mode
1644 *
1645 * NOTE: Acquire priv->lock before calling this function !
1646 */
1647 static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
1648 struct iwl4965_tx_queue *txq,
1649 int tx_fifo_id, int scd_retry)
1650 {
1651 int txq_id = txq->q.id;
1652
1653 /* Find out whether to activate Tx queue */
1654 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1655
1656 /* Set up and activate */
1657 iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1658 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1659 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1660 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1661 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1662 SCD_QUEUE_STTS_REG_MSK);
1663
1664 txq->sched_retry = scd_retry;
1665
1666 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1667 active ? "Activate" : "Deactivate",
1668 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1669 }
1670
1671 static const u16 default_queue_to_tx_fifo[] = {
1672 IWL_TX_FIFO_AC3,
1673 IWL_TX_FIFO_AC2,
1674 IWL_TX_FIFO_AC1,
1675 IWL_TX_FIFO_AC0,
1676 IWL_CMD_FIFO_NUM,
1677 IWL_TX_FIFO_HCCA_1,
1678 IWL_TX_FIFO_HCCA_2
1679 };
1680
1681 static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
1682 {
1683 set_bit(txq_id, &priv->txq_ctx_active_msk);
1684 }
1685
1686 static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
1687 {
1688 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1689 }
1690
1691 int iwl4965_alive_notify(struct iwl4965_priv *priv)
1692 {
1693 u32 a;
1694 int i = 0;
1695 unsigned long flags;
1696 int rc;
1697
1698 spin_lock_irqsave(&priv->lock, flags);
1699
1700 #ifdef CONFIG_IWL4965_SENSITIVITY
1701 memset(&(priv->sensitivity_data), 0,
1702 sizeof(struct iwl4965_sensitivity_data));
1703 memset(&(priv->chain_noise_data), 0,
1704 sizeof(struct iwl4965_chain_noise_data));
1705 for (i = 0; i < NUM_RX_CHAINS; i++)
1706 priv->chain_noise_data.delta_gain_code[i] =
1707 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1708 #endif /* CONFIG_IWL4965_SENSITIVITY*/
1709 rc = iwl4965_grab_nic_access(priv);
1710 if (rc) {
1711 spin_unlock_irqrestore(&priv->lock, flags);
1712 return rc;
1713 }
1714
1715 /* Clear 4965's internal Tx Scheduler data base */
1716 priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1717 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1718 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1719 iwl4965_write_targ_mem(priv, a, 0);
1720 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1721 iwl4965_write_targ_mem(priv, a, 0);
1722 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1723 iwl4965_write_targ_mem(priv, a, 0);
1724
1725 /* Tel 4965 where to find Tx byte count tables */
1726 iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1727 (priv->hw_setting.shared_phys +
1728 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1729
1730 /* Disable chain mode for all queues */
1731 iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1732
1733 /* Initialize each Tx queue (including the command queue) */
1734 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1735
1736 /* TFD circular buffer read/write indexes */
1737 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1738 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1739
1740 /* Max Tx Window size for Scheduler-ACK mode */
1741 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1742 SCD_CONTEXT_QUEUE_OFFSET(i),
1743 (SCD_WIN_SIZE <<
1744 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1745 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1746
1747 /* Frame limit */
1748 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1749 SCD_CONTEXT_QUEUE_OFFSET(i) +
1750 sizeof(u32),
1751 (SCD_FRAME_LIMIT <<
1752 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1753 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1754
1755 }
1756 iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1757 (1 << priv->hw_setting.max_txq_num) - 1);
1758
1759 /* Activate all Tx DMA/FIFO channels */
1760 iwl4965_write_prph(priv, KDR_SCD_TXFACT,
1761 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1762
1763 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1764
1765 /* Map each Tx/cmd queue to its corresponding fifo */
1766 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1767 int ac = default_queue_to_tx_fifo[i];
1768 iwl4965_txq_ctx_activate(priv, i);
1769 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1770 }
1771
1772 iwl4965_release_nic_access(priv);
1773 spin_unlock_irqrestore(&priv->lock, flags);
1774
1775 return 0;
1776 }
1777
1778 /**
1779 * iwl4965_hw_set_hw_setting
1780 *
1781 * Called when initializing driver
1782 */
1783 int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
1784 {
1785 /* Allocate area for Tx byte count tables and Rx queue status */
1786 priv->hw_setting.shared_virt =
1787 pci_alloc_consistent(priv->pci_dev,
1788 sizeof(struct iwl4965_shared),
1789 &priv->hw_setting.shared_phys);
1790
1791 if (!priv->hw_setting.shared_virt)
1792 return -1;
1793
1794 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1795
1796 priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
1797 priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1798 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1799 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1800 if (iwl4965_param_amsdu_size_8K)
1801 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1802 else
1803 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1804 priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
1805 priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1806 priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1807
1808 priv->hw_setting.tx_ant_num = 2;
1809
1810 return 0;
1811 }
1812
1813 /**
1814 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1815 *
1816 * Destroy all TX DMA queues and structures
1817 */
1818 void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
1819 {
1820 int txq_id;
1821
1822 /* Tx queues */
1823 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1824 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1825
1826 /* Keep-warm buffer */
1827 iwl4965_kw_free(priv);
1828 }
1829
1830 /**
1831 * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1832 *
1833 * Does NOT advance any TFD circular buffer read/write indexes
1834 * Does NOT free the TFD itself (which is within circular buffer)
1835 */
1836 int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
1837 {
1838 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1839 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1840 struct pci_dev *dev = priv->pci_dev;
1841 int i;
1842 int counter = 0;
1843 int index, is_odd;
1844
1845 /* Host command buffers stay mapped in memory, nothing to clean */
1846 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1847 return 0;
1848
1849 /* Sanity check on number of chunks */
1850 counter = IWL_GET_BITS(*bd, num_tbs);
1851 if (counter > MAX_NUM_OF_TBS) {
1852 IWL_ERROR("Too many chunks: %i\n", counter);
1853 /* @todo issue fatal error, it is quite serious situation */
1854 return 0;
1855 }
1856
1857 /* Unmap chunks, if any.
1858 * TFD info for odd chunks is different format than for even chunks. */
1859 for (i = 0; i < counter; i++) {
1860 index = i / 2;
1861 is_odd = i & 0x1;
1862
1863 if (is_odd)
1864 pci_unmap_single(
1865 dev,
1866 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1867 (IWL_GET_BITS(bd->pa[index],
1868 tb2_addr_hi20) << 16),
1869 IWL_GET_BITS(bd->pa[index], tb2_len),
1870 PCI_DMA_TODEVICE);
1871
1872 else if (i > 0)
1873 pci_unmap_single(dev,
1874 le32_to_cpu(bd->pa[index].tb1_addr),
1875 IWL_GET_BITS(bd->pa[index], tb1_len),
1876 PCI_DMA_TODEVICE);
1877
1878 /* Free SKB, if any, for this chunk */
1879 if (txq->txb[txq->q.read_ptr].skb[i]) {
1880 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1881
1882 dev_kfree_skb(skb);
1883 txq->txb[txq->q.read_ptr].skb[i] = NULL;
1884 }
1885 }
1886 return 0;
1887 }
1888
1889 int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
1890 {
1891 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1892 return -EINVAL;
1893 }
1894
1895 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1896 {
1897 s32 sign = 1;
1898
1899 if (num < 0) {
1900 sign = -sign;
1901 num = -num;
1902 }
1903 if (denom < 0) {
1904 sign = -sign;
1905 denom = -denom;
1906 }
1907 *res = 1;
1908 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1909
1910 return 1;
1911 }
1912
1913 /**
1914 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1915 *
1916 * Determines power supply voltage compensation for txpower calculations.
1917 * Returns number of 1/2-dB steps to subtract from gain table index,
1918 * to compensate for difference between power supply voltage during
1919 * factory measurements, vs. current power supply voltage.
1920 *
1921 * Voltage indication is higher for lower voltage.
1922 * Lower voltage requires more gain (lower gain table index).
1923 */
1924 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1925 s32 current_voltage)
1926 {
1927 s32 comp = 0;
1928
1929 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1930 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1931 return 0;
1932
1933 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1934 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1935
1936 if (current_voltage > eeprom_voltage)
1937 comp *= 2;
1938 if ((comp < -2) || (comp > 2))
1939 comp = 0;
1940
1941 return comp;
1942 }
1943
1944 static const struct iwl4965_channel_info *
1945 iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv,
1946 enum ieee80211_band band, u16 channel)
1947 {
1948 const struct iwl4965_channel_info *ch_info;
1949
1950 ch_info = iwl4965_get_channel_info(priv, band, channel);
1951
1952 if (!is_channel_valid(ch_info))
1953 return NULL;
1954
1955 return ch_info;
1956 }
1957
1958 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1959 {
1960 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1961 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1962 return CALIB_CH_GROUP_5;
1963
1964 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1965 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1966 return CALIB_CH_GROUP_1;
1967
1968 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1969 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1970 return CALIB_CH_GROUP_2;
1971
1972 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1973 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1974 return CALIB_CH_GROUP_3;
1975
1976 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1977 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1978 return CALIB_CH_GROUP_4;
1979
1980 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1981 return -1;
1982 }
1983
1984 static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
1985 {
1986 s32 b = -1;
1987
1988 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1989 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
1990 continue;
1991
1992 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
1993 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
1994 break;
1995 }
1996
1997 return b;
1998 }
1999
2000 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
2001 {
2002 s32 val;
2003
2004 if (x2 == x1)
2005 return y1;
2006 else {
2007 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
2008 return val + y2;
2009 }
2010 }
2011
2012 /**
2013 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
2014 *
2015 * Interpolates factory measurements from the two sample channels within a
2016 * sub-band, to apply to channel of interest. Interpolation is proportional to
2017 * differences in channel frequencies, which is proportional to differences
2018 * in channel number.
2019 */
2020 static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
2021 struct iwl4965_eeprom_calib_ch_info *chan_info)
2022 {
2023 s32 s = -1;
2024 u32 c;
2025 u32 m;
2026 const struct iwl4965_eeprom_calib_measure *m1;
2027 const struct iwl4965_eeprom_calib_measure *m2;
2028 struct iwl4965_eeprom_calib_measure *omeas;
2029 u32 ch_i1;
2030 u32 ch_i2;
2031
2032 s = iwl4965_get_sub_band(priv, channel);
2033 if (s >= EEPROM_TX_POWER_BANDS) {
2034 IWL_ERROR("Tx Power can not find channel %d ", channel);
2035 return -1;
2036 }
2037
2038 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
2039 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
2040 chan_info->ch_num = (u8) channel;
2041
2042 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
2043 channel, s, ch_i1, ch_i2);
2044
2045 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
2046 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
2047 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
2048 measurements[c][m]);
2049 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
2050 measurements[c][m]);
2051 omeas = &(chan_info->measurements[c][m]);
2052
2053 omeas->actual_pow =
2054 (u8) iwl4965_interpolate_value(channel, ch_i1,
2055 m1->actual_pow,
2056 ch_i2,
2057 m2->actual_pow);
2058 omeas->gain_idx =
2059 (u8) iwl4965_interpolate_value(channel, ch_i1,
2060 m1->gain_idx, ch_i2,
2061 m2->gain_idx);
2062 omeas->temperature =
2063 (u8) iwl4965_interpolate_value(channel, ch_i1,
2064 m1->temperature,
2065 ch_i2,
2066 m2->temperature);
2067 omeas->pa_det =
2068 (s8) iwl4965_interpolate_value(channel, ch_i1,
2069 m1->pa_det, ch_i2,
2070 m2->pa_det);
2071
2072 IWL_DEBUG_TXPOWER
2073 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
2074 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
2075 IWL_DEBUG_TXPOWER
2076 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
2077 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
2078 IWL_DEBUG_TXPOWER
2079 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
2080 m1->pa_det, m2->pa_det, omeas->pa_det);
2081 IWL_DEBUG_TXPOWER
2082 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
2083 m1->temperature, m2->temperature,
2084 omeas->temperature);
2085 }
2086 }
2087
2088 return 0;
2089 }
2090
2091 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
2092 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
2093 static s32 back_off_table[] = {
2094 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
2095 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
2096 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
2097 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
2098 10 /* CCK */
2099 };
2100
2101 /* Thermal compensation values for txpower for various frequency ranges ...
2102 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2103 static struct iwl4965_txpower_comp_entry {
2104 s32 degrees_per_05db_a;
2105 s32 degrees_per_05db_a_denom;
2106 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2107 {9, 2}, /* group 0 5.2, ch 34-43 */
2108 {4, 1}, /* group 1 5.2, ch 44-70 */
2109 {4, 1}, /* group 2 5.2, ch 71-124 */
2110 {4, 1}, /* group 3 5.2, ch 125-200 */
2111 {3, 1} /* group 4 2.4, ch all */
2112 };
2113
2114 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2115 {
2116 if (!band) {
2117 if ((rate_power_index & 7) <= 4)
2118 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2119 }
2120 return MIN_TX_GAIN_INDEX;
2121 }
2122
2123 struct gain_entry {
2124 u8 dsp;
2125 u8 radio;
2126 };
2127
2128 static const struct gain_entry gain_table[2][108] = {
2129 /* 5.2GHz power gain index table */
2130 {
2131 {123, 0x3F}, /* highest txpower */
2132 {117, 0x3F},
2133 {110, 0x3F},
2134 {104, 0x3F},
2135 {98, 0x3F},
2136 {110, 0x3E},
2137 {104, 0x3E},
2138 {98, 0x3E},
2139 {110, 0x3D},
2140 {104, 0x3D},
2141 {98, 0x3D},
2142 {110, 0x3C},
2143 {104, 0x3C},
2144 {98, 0x3C},
2145 {110, 0x3B},
2146 {104, 0x3B},
2147 {98, 0x3B},
2148 {110, 0x3A},
2149 {104, 0x3A},
2150 {98, 0x3A},
2151 {110, 0x39},
2152 {104, 0x39},
2153 {98, 0x39},
2154 {110, 0x38},
2155 {104, 0x38},
2156 {98, 0x38},
2157 {110, 0x37},
2158 {104, 0x37},
2159 {98, 0x37},
2160 {110, 0x36},
2161 {104, 0x36},
2162 {98, 0x36},
2163 {110, 0x35},
2164 {104, 0x35},
2165 {98, 0x35},
2166 {110, 0x34},
2167 {104, 0x34},
2168 {98, 0x34},
2169 {110, 0x33},
2170 {104, 0x33},
2171 {98, 0x33},
2172 {110, 0x32},
2173 {104, 0x32},
2174 {98, 0x32},
2175 {110, 0x31},
2176 {104, 0x31},
2177 {98, 0x31},
2178 {110, 0x30},
2179 {104, 0x30},
2180 {98, 0x30},
2181 {110, 0x25},
2182 {104, 0x25},
2183 {98, 0x25},
2184 {110, 0x24},
2185 {104, 0x24},
2186 {98, 0x24},
2187 {110, 0x23},
2188 {104, 0x23},
2189 {98, 0x23},
2190 {110, 0x22},
2191 {104, 0x18},
2192 {98, 0x18},
2193 {110, 0x17},
2194 {104, 0x17},
2195 {98, 0x17},
2196 {110, 0x16},
2197 {104, 0x16},
2198 {98, 0x16},
2199 {110, 0x15},
2200 {104, 0x15},
2201 {98, 0x15},
2202 {110, 0x14},
2203 {104, 0x14},
2204 {98, 0x14},
2205 {110, 0x13},
2206 {104, 0x13},
2207 {98, 0x13},
2208 {110, 0x12},
2209 {104, 0x08},
2210 {98, 0x08},
2211 {110, 0x07},
2212 {104, 0x07},
2213 {98, 0x07},
2214 {110, 0x06},
2215 {104, 0x06},
2216 {98, 0x06},
2217 {110, 0x05},
2218 {104, 0x05},
2219 {98, 0x05},
2220 {110, 0x04},
2221 {104, 0x04},
2222 {98, 0x04},
2223 {110, 0x03},
2224 {104, 0x03},
2225 {98, 0x03},
2226 {110, 0x02},
2227 {104, 0x02},
2228 {98, 0x02},
2229 {110, 0x01},
2230 {104, 0x01},
2231 {98, 0x01},
2232 {110, 0x00},
2233 {104, 0x00},
2234 {98, 0x00},
2235 {93, 0x00},
2236 {88, 0x00},
2237 {83, 0x00},
2238 {78, 0x00},
2239 },
2240 /* 2.4GHz power gain index table */
2241 {
2242 {110, 0x3f}, /* highest txpower */
2243 {104, 0x3f},
2244 {98, 0x3f},
2245 {110, 0x3e},
2246 {104, 0x3e},
2247 {98, 0x3e},
2248 {110, 0x3d},
2249 {104, 0x3d},
2250 {98, 0x3d},
2251 {110, 0x3c},
2252 {104, 0x3c},
2253 {98, 0x3c},
2254 {110, 0x3b},
2255 {104, 0x3b},
2256 {98, 0x3b},
2257 {110, 0x3a},
2258 {104, 0x3a},
2259 {98, 0x3a},
2260 {110, 0x39},
2261 {104, 0x39},
2262 {98, 0x39},
2263 {110, 0x38},
2264 {104, 0x38},
2265 {98, 0x38},
2266 {110, 0x37},
2267 {104, 0x37},
2268 {98, 0x37},
2269 {110, 0x36},
2270 {104, 0x36},
2271 {98, 0x36},
2272 {110, 0x35},
2273 {104, 0x35},
2274 {98, 0x35},
2275 {110, 0x34},
2276 {104, 0x34},
2277 {98, 0x34},
2278 {110, 0x33},
2279 {104, 0x33},
2280 {98, 0x33},
2281 {110, 0x32},
2282 {104, 0x32},
2283 {98, 0x32},
2284 {110, 0x31},
2285 {104, 0x31},
2286 {98, 0x31},
2287 {110, 0x30},
2288 {104, 0x30},
2289 {98, 0x30},
2290 {110, 0x6},
2291 {104, 0x6},
2292 {98, 0x6},
2293 {110, 0x5},
2294 {104, 0x5},
2295 {98, 0x5},
2296 {110, 0x4},
2297 {104, 0x4},
2298 {98, 0x4},
2299 {110, 0x3},
2300 {104, 0x3},
2301 {98, 0x3},
2302 {110, 0x2},
2303 {104, 0x2},
2304 {98, 0x2},
2305 {110, 0x1},
2306 {104, 0x1},
2307 {98, 0x1},
2308 {110, 0x0},
2309 {104, 0x0},
2310 {98, 0x0},
2311 {97, 0},
2312 {96, 0},
2313 {95, 0},
2314 {94, 0},
2315 {93, 0},
2316 {92, 0},
2317 {91, 0},
2318 {90, 0},
2319 {89, 0},
2320 {88, 0},
2321 {87, 0},
2322 {86, 0},
2323 {85, 0},
2324 {84, 0},
2325 {83, 0},
2326 {82, 0},
2327 {81, 0},
2328 {80, 0},
2329 {79, 0},
2330 {78, 0},
2331 {77, 0},
2332 {76, 0},
2333 {75, 0},
2334 {74, 0},
2335 {73, 0},
2336 {72, 0},
2337 {71, 0},
2338 {70, 0},
2339 {69, 0},
2340 {68, 0},
2341 {67, 0},
2342 {66, 0},
2343 {65, 0},
2344 {64, 0},
2345 {63, 0},
2346 {62, 0},
2347 {61, 0},
2348 {60, 0},
2349 {59, 0},
2350 }
2351 };
2352
2353 static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
2354 u8 is_fat, u8 ctrl_chan_high,
2355 struct iwl4965_tx_power_db *tx_power_tbl)
2356 {
2357 u8 saturation_power;
2358 s32 target_power;
2359 s32 user_target_power;
2360 s32 power_limit;
2361 s32 current_temp;
2362 s32 reg_limit;
2363 s32 current_regulatory;
2364 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2365 int i;
2366 int c;
2367 const struct iwl4965_channel_info *ch_info = NULL;
2368 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2369 const struct iwl4965_eeprom_calib_measure *measurement;
2370 s16 voltage;
2371 s32 init_voltage;
2372 s32 voltage_compensation;
2373 s32 degrees_per_05db_num;
2374 s32 degrees_per_05db_denom;
2375 s32 factory_temp;
2376 s32 temperature_comp[2];
2377 s32 factory_gain_index[2];
2378 s32 factory_actual_pwr[2];
2379 s32 power_index;
2380
2381 /* Sanity check requested level (dBm) */
2382 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2383 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2384 priv->user_txpower_limit);
2385 return -EINVAL;
2386 }
2387 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2388 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2389 priv->user_txpower_limit);
2390 return -EINVAL;
2391 }
2392
2393 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2394 * are used for indexing into txpower table) */
2395 user_target_power = 2 * priv->user_txpower_limit;
2396
2397 /* Get current (RXON) channel, band, width */
2398 ch_info =
2399 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
2400
2401 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2402 is_fat);
2403
2404 if (!ch_info)
2405 return -EINVAL;
2406
2407 /* get txatten group, used to select 1) thermal txpower adjustment
2408 * and 2) mimo txpower balance between Tx chains. */
2409 txatten_grp = iwl4965_get_tx_atten_grp(channel);
2410 if (txatten_grp < 0)
2411 return -EINVAL;
2412
2413 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2414 channel, txatten_grp);
2415
2416 if (is_fat) {
2417 if (ctrl_chan_high)
2418 channel -= 2;
2419 else
2420 channel += 2;
2421 }
2422
2423 /* hardware txpower limits ...
2424 * saturation (clipping distortion) txpowers are in half-dBm */
2425 if (band)
2426 saturation_power = priv->eeprom.calib_info.saturation_power24;
2427 else
2428 saturation_power = priv->eeprom.calib_info.saturation_power52;
2429
2430 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2431 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2432 if (band)
2433 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2434 else
2435 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2436 }
2437
2438 /* regulatory txpower limits ... reg_limit values are in half-dBm,
2439 * max_power_avg values are in dBm, convert * 2 */
2440 if (is_fat)
2441 reg_limit = ch_info->fat_max_power_avg * 2;
2442 else
2443 reg_limit = ch_info->max_power_avg * 2;
2444
2445 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2446 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2447 if (band)
2448 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2449 else
2450 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2451 }
2452
2453 /* Interpolate txpower calibration values for this channel,
2454 * based on factory calibration tests on spaced channels. */
2455 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2456
2457 /* calculate tx gain adjustment based on power supply voltage */
2458 voltage = priv->eeprom.calib_info.voltage;
2459 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2460 voltage_compensation =
2461 iwl4965_get_voltage_compensation(voltage, init_voltage);
2462
2463 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2464 init_voltage,
2465 voltage, voltage_compensation);
2466
2467 /* get current temperature (Celsius) */
2468 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2469 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2470 current_temp = KELVIN_TO_CELSIUS(current_temp);
2471
2472 /* select thermal txpower adjustment params, based on channel group
2473 * (same frequency group used for mimo txatten adjustment) */
2474 degrees_per_05db_num =
2475 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2476 degrees_per_05db_denom =
2477 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2478
2479 /* get per-chain txpower values from factory measurements */
2480 for (c = 0; c < 2; c++) {
2481 measurement = &ch_eeprom_info.measurements[c][1];
2482
2483 /* txgain adjustment (in half-dB steps) based on difference
2484 * between factory and current temperature */
2485 factory_temp = measurement->temperature;
2486 iwl4965_math_div_round((current_temp - factory_temp) *
2487 degrees_per_05db_denom,
2488 degrees_per_05db_num,
2489 &temperature_comp[c]);
2490
2491 factory_gain_index[c] = measurement->gain_idx;
2492 factory_actual_pwr[c] = measurement->actual_pow;
2493
2494 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2495 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2496 "curr tmp %d, comp %d steps\n",
2497 factory_temp, current_temp,
2498 temperature_comp[c]);
2499
2500 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2501 factory_gain_index[c],
2502 factory_actual_pwr[c]);
2503 }
2504
2505 /* for each of 33 bit-rates (including 1 for CCK) */
2506 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2507 u8 is_mimo_rate;
2508 union iwl4965_tx_power_dual_stream tx_power;
2509
2510 /* for mimo, reduce each chain's txpower by half
2511 * (3dB, 6 steps), so total output power is regulatory
2512 * compliant. */
2513 if (i & 0x8) {
2514 current_regulatory = reg_limit -
2515 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2516 is_mimo_rate = 1;
2517 } else {
2518 current_regulatory = reg_limit;
2519 is_mimo_rate = 0;
2520 }
2521
2522 /* find txpower limit, either hardware or regulatory */
2523 power_limit = saturation_power - back_off_table[i];
2524 if (power_limit > current_regulatory)
2525 power_limit = current_regulatory;
2526
2527 /* reduce user's txpower request if necessary
2528 * for this rate on this channel */
2529 target_power = user_target_power;
2530 if (target_power > power_limit)
2531 target_power = power_limit;
2532
2533 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2534 i, saturation_power - back_off_table[i],
2535 current_regulatory, user_target_power,
2536 target_power);
2537
2538 /* for each of 2 Tx chains (radio transmitters) */
2539 for (c = 0; c < 2; c++) {
2540 s32 atten_value;
2541
2542 if (is_mimo_rate)
2543 atten_value =
2544 (s32)le32_to_cpu(priv->card_alive_init.
2545 tx_atten[txatten_grp][c]);
2546 else
2547 atten_value = 0;
2548
2549 /* calculate index; higher index means lower txpower */
2550 power_index = (u8) (factory_gain_index[c] -
2551 (target_power -
2552 factory_actual_pwr[c]) -
2553 temperature_comp[c] -
2554 voltage_compensation +
2555 atten_value);
2556
2557 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2558 power_index); */
2559
2560 if (power_index < get_min_power_index(i, band))
2561 power_index = get_min_power_index(i, band);
2562
2563 /* adjust 5 GHz index to support negative indexes */
2564 if (!band)
2565 power_index += 9;
2566
2567 /* CCK, rate 32, reduce txpower for CCK */
2568 if (i == POWER_TABLE_CCK_ENTRY)
2569 power_index +=
2570 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2571
2572 /* stay within the table! */
2573 if (power_index > 107) {
2574 IWL_WARNING("txpower index %d > 107\n",
2575 power_index);
2576 power_index = 107;
2577 }
2578 if (power_index < 0) {
2579 IWL_WARNING("txpower index %d < 0\n",
2580 power_index);
2581 power_index = 0;
2582 }
2583
2584 /* fill txpower command for this rate/chain */
2585 tx_power.s.radio_tx_gain[c] =
2586 gain_table[band][power_index].radio;
2587 tx_power.s.dsp_predis_atten[c] =
2588 gain_table[band][power_index].dsp;
2589
2590 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2591 "gain 0x%02x dsp %d\n",
2592 c, atten_value, power_index,
2593 tx_power.s.radio_tx_gain[c],
2594 tx_power.s.dsp_predis_atten[c]);
2595 }/* for each chain */
2596
2597 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2598
2599 }/* for each rate */
2600
2601 return 0;
2602 }
2603
2604 /**
2605 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2606 *
2607 * Uses the active RXON for channel, band, and characteristics (fat, high)
2608 * The power limit is taken from priv->user_txpower_limit.
2609 */
2610 int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
2611 {
2612 struct iwl4965_txpowertable_cmd cmd = { 0 };
2613 int rc = 0;
2614 u8 band = 0;
2615 u8 is_fat = 0;
2616 u8 ctrl_chan_high = 0;
2617
2618 if (test_bit(STATUS_SCANNING, &priv->status)) {
2619 /* If this gets hit a lot, switch it to a BUG() and catch
2620 * the stack trace to find out who is calling this during
2621 * a scan. */
2622 IWL_WARNING("TX Power requested while scanning!\n");
2623 return -EAGAIN;
2624 }
2625
2626 band = priv->band == IEEE80211_BAND_2GHZ;
2627
2628 is_fat = is_fat_channel(priv->active_rxon.flags);
2629
2630 if (is_fat &&
2631 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2632 ctrl_chan_high = 1;
2633
2634 cmd.band = band;
2635 cmd.channel = priv->active_rxon.channel;
2636
2637 rc = iwl4965_fill_txpower_tbl(priv, band,
2638 le16_to_cpu(priv->active_rxon.channel),
2639 is_fat, ctrl_chan_high, &cmd.tx_power);
2640 if (rc)
2641 return rc;
2642
2643 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2644 return rc;
2645 }
2646
2647 int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
2648 {
2649 int rc;
2650 u8 band = 0;
2651 u8 is_fat = 0;
2652 u8 ctrl_chan_high = 0;
2653 struct iwl4965_channel_switch_cmd cmd = { 0 };
2654 const struct iwl4965_channel_info *ch_info;
2655
2656 band = priv->band == IEEE80211_BAND_2GHZ;
2657
2658 ch_info = iwl4965_get_channel_info(priv, priv->band, channel);
2659
2660 is_fat = is_fat_channel(priv->staging_rxon.flags);
2661
2662 if (is_fat &&
2663 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2664 ctrl_chan_high = 1;
2665
2666 cmd.band = band;
2667 cmd.expect_beacon = 0;
2668 cmd.channel = cpu_to_le16(channel);
2669 cmd.rxon_flags = priv->active_rxon.flags;
2670 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2671 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2672 if (ch_info)
2673 cmd.expect_beacon = is_channel_radar(ch_info);
2674 else
2675 cmd.expect_beacon = 1;
2676
2677 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2678 ctrl_chan_high, &cmd.tx_power);
2679 if (rc) {
2680 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2681 return rc;
2682 }
2683
2684 rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2685 return rc;
2686 }
2687
2688 #define RTS_HCCA_RETRY_LIMIT 3
2689 #define RTS_DFAULT_RETRY_LIMIT 60
2690
2691 void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
2692 struct iwl4965_cmd *cmd,
2693 struct ieee80211_tx_control *ctrl,
2694 struct ieee80211_hdr *hdr, int sta_id,
2695 int is_hcca)
2696 {
2697 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
2698 u8 rts_retry_limit = 0;
2699 u8 data_retry_limit = 0;
2700 u16 fc = le16_to_cpu(hdr->frame_control);
2701 u8 rate_plcp;
2702 u16 rate_flags = 0;
2703 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
2704
2705 rate_plcp = iwl4965_rates[rate_idx].plcp;
2706
2707 rts_retry_limit = (is_hcca) ?
2708 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2709
2710 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
2711 rate_flags |= RATE_MCS_CCK_MSK;
2712
2713
2714 if (ieee80211_is_probe_response(fc)) {
2715 data_retry_limit = 3;
2716 if (data_retry_limit < rts_retry_limit)
2717 rts_retry_limit = data_retry_limit;
2718 } else
2719 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2720
2721 if (priv->data_retry_limit != -1)
2722 data_retry_limit = priv->data_retry_limit;
2723
2724
2725 if (ieee80211_is_data(fc)) {
2726 tx->initial_rate_index = 0;
2727 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
2728 } else {
2729 switch (fc & IEEE80211_FCTL_STYPE) {
2730 case IEEE80211_STYPE_AUTH:
2731 case IEEE80211_STYPE_DEAUTH:
2732 case IEEE80211_STYPE_ASSOC_REQ:
2733 case IEEE80211_STYPE_REASSOC_REQ:
2734 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
2735 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2736 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
2737 }
2738 break;
2739 default:
2740 break;
2741 }
2742
2743 /* Alternate between antenna A and B for successive frames */
2744 if (priv->use_ant_b_for_management_frame) {
2745 priv->use_ant_b_for_management_frame = 0;
2746 rate_flags |= RATE_MCS_ANT_B_MSK;
2747 } else {
2748 priv->use_ant_b_for_management_frame = 1;
2749 rate_flags |= RATE_MCS_ANT_A_MSK;
2750 }
2751 }
2752
2753 tx->rts_retry_limit = rts_retry_limit;
2754 tx->data_retry_limit = data_retry_limit;
2755 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2756 }
2757
2758 int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
2759 {
2760 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2761
2762 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2763 }
2764
2765 int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
2766 {
2767 return priv->temperature;
2768 }
2769
2770 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
2771 struct iwl4965_frame *frame, u8 rate)
2772 {
2773 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2774 unsigned int frame_size;
2775
2776 tx_beacon_cmd = &frame->u.beacon;
2777 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2778
2779 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2780 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2781
2782 frame_size = iwl4965_fill_beacon_frame(priv,
2783 tx_beacon_cmd->frame,
2784 iwl4965_broadcast_addr,
2785 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2786
2787 BUG_ON(frame_size > MAX_MPDU_SIZE);
2788 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2789
2790 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2791 tx_beacon_cmd->tx.rate_n_flags =
2792 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2793 else
2794 tx_beacon_cmd->tx.rate_n_flags =
2795 iwl4965_hw_set_rate_n_flags(rate, 0);
2796
2797 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2798 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2799 return (sizeof(*tx_beacon_cmd) + frame_size);
2800 }
2801
2802 /*
2803 * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2804 * given Tx queue, and enable the DMA channel used for that queue.
2805 *
2806 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2807 * channels supported in hardware.
2808 */
2809 int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
2810 {
2811 int rc;
2812 unsigned long flags;
2813 int txq_id = txq->q.id;
2814
2815 spin_lock_irqsave(&priv->lock, flags);
2816 rc = iwl4965_grab_nic_access(priv);
2817 if (rc) {
2818 spin_unlock_irqrestore(&priv->lock, flags);
2819 return rc;
2820 }
2821
2822 /* Circular buffer (TFD queue in DRAM) physical base address */
2823 iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2824 txq->q.dma_addr >> 8);
2825
2826 /* Enable DMA channel, using same id as for TFD queue */
2827 iwl4965_write_direct32(
2828 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2829 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2830 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2831 iwl4965_release_nic_access(priv);
2832 spin_unlock_irqrestore(&priv->lock, flags);
2833
2834 return 0;
2835 }
2836
2837 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
2838 dma_addr_t addr, u16 len)
2839 {
2840 int index, is_odd;
2841 struct iwl4965_tfd_frame *tfd = ptr;
2842 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2843
2844 /* Each TFD can point to a maximum 20 Tx buffers */
2845 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2846 IWL_ERROR("Error can not send more than %d chunks\n",
2847 MAX_NUM_OF_TBS);
2848 return -EINVAL;
2849 }
2850
2851 index = num_tbs / 2;
2852 is_odd = num_tbs & 0x1;
2853
2854 if (!is_odd) {
2855 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2856 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2857 iwl_get_dma_hi_address(addr));
2858 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2859 } else {
2860 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2861 (u32) (addr & 0xffff));
2862 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2863 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2864 }
2865
2866 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2867
2868 return 0;
2869 }
2870
2871 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
2872 {
2873 u16 hw_version = priv->eeprom.board_revision_4965;
2874
2875 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2876 ((hw_version >> 8) & 0x0F),
2877 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2878
2879 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2880 priv->eeprom.board_pba_number_4965);
2881 }
2882
2883 #define IWL_TX_CRC_SIZE 4
2884 #define IWL_TX_DELIMITER_SIZE 4
2885
2886 /**
2887 * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
2888 */
2889 int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
2890 struct iwl4965_tx_queue *txq, u16 byte_cnt)
2891 {
2892 int len;
2893 int txq_id = txq->q.id;
2894 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2895
2896 if (txq->need_update == 0)
2897 return 0;
2898
2899 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2900
2901 /* Set up byte count within first 256 entries */
2902 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2903 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2904
2905 /* If within first 64 entries, duplicate at end */
2906 if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
2907 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2908 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
2909 byte_cnt, len);
2910
2911 return 0;
2912 }
2913
2914 /**
2915 * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2916 *
2917 * Selects how many and which Rx receivers/antennas/chains to use.
2918 * This should not be used for scan command ... it puts data in wrong place.
2919 */
2920 void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
2921 {
2922 u8 is_single = is_single_stream(priv);
2923 u8 idle_state, rx_state;
2924
2925 priv->staging_rxon.rx_chain = 0;
2926 rx_state = idle_state = 3;
2927
2928 /* Tell uCode which antennas are actually connected.
2929 * Before first association, we assume all antennas are connected.
2930 * Just after first association, iwl4965_noise_calibration()
2931 * checks which antennas actually *are* connected. */
2932 priv->staging_rxon.rx_chain |=
2933 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2934
2935 /* How many receivers should we use? */
2936 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2937 priv->staging_rxon.rx_chain |=
2938 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2939 priv->staging_rxon.rx_chain |=
2940 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2941
2942 if (!is_single && (rx_state >= 2) &&
2943 !test_bit(STATUS_POWER_PMI, &priv->status))
2944 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2945 else
2946 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2947
2948 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2949 }
2950
2951 /**
2952 * sign_extend - Sign extend a value using specified bit as sign-bit
2953 *
2954 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2955 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2956 *
2957 * @param oper value to sign extend
2958 * @param index 0 based bit index (0<=index<32) to sign bit
2959 */
2960 static s32 sign_extend(u32 oper, int index)
2961 {
2962 u8 shift = 31 - index;
2963
2964 return (s32)(oper << shift) >> shift;
2965 }
2966
2967 /**
2968 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2969 * @statistics: Provides the temperature reading from the uCode
2970 *
2971 * A return of <0 indicates bogus data in the statistics
2972 */
2973 int iwl4965_get_temperature(const struct iwl4965_priv *priv)
2974 {
2975 s32 temperature;
2976 s32 vt;
2977 s32 R1, R2, R3;
2978 u32 R4;
2979
2980 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2981 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2982 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2983 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2984 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2985 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2986 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2987 } else {
2988 IWL_DEBUG_TEMP("Running temperature calibration\n");
2989 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2990 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2991 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2992 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2993 }
2994
2995 /*
2996 * Temperature is only 23 bits, so sign extend out to 32.
2997 *
2998 * NOTE If we haven't received a statistics notification yet
2999 * with an updated temperature, use R4 provided to us in the
3000 * "initialize" ALIVE response.
3001 */
3002 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
3003 vt = sign_extend(R4, 23);
3004 else
3005 vt = sign_extend(
3006 le32_to_cpu(priv->statistics.general.temperature), 23);
3007
3008 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
3009 R1, R2, R3, vt);
3010
3011 if (R3 == R1) {
3012 IWL_ERROR("Calibration conflict R1 == R3\n");
3013 return -1;
3014 }
3015
3016 /* Calculate temperature in degrees Kelvin, adjust by 97%.
3017 * Add offset to center the adjustment around 0 degrees Centigrade. */
3018 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
3019 temperature /= (R3 - R1);
3020 temperature = (temperature * 97) / 100 +
3021 TEMPERATURE_CALIB_KELVIN_OFFSET;
3022
3023 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
3024 KELVIN_TO_CELSIUS(temperature));
3025
3026 return temperature;
3027 }
3028
3029 /* Adjust Txpower only if temperature variance is greater than threshold. */
3030 #define IWL_TEMPERATURE_THRESHOLD 3
3031
3032 /**
3033 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
3034 *
3035 * If the temperature changed has changed sufficiently, then a recalibration
3036 * is needed.
3037 *
3038 * Assumes caller will replace priv->last_temperature once calibration
3039 * executed.
3040 */
3041 static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
3042 {
3043 int temp_diff;
3044
3045 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
3046 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
3047 return 0;
3048 }
3049
3050 temp_diff = priv->temperature - priv->last_temperature;
3051
3052 /* get absolute value */
3053 if (temp_diff < 0) {
3054 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
3055 temp_diff = -temp_diff;
3056 } else if (temp_diff == 0)
3057 IWL_DEBUG_POWER("Same temp, \n");
3058 else
3059 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
3060
3061 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
3062 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
3063 return 0;
3064 }
3065
3066 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
3067
3068 return 1;
3069 }
3070
3071 /* Calculate noise level, based on measurements during network silence just
3072 * before arriving beacon. This measurement can be done only if we know
3073 * exactly when to expect beacons, therefore only when we're associated. */
3074 static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
3075 {
3076 struct statistics_rx_non_phy *rx_info
3077 = &(priv->statistics.rx.general);
3078 int num_active_rx = 0;
3079 int total_silence = 0;
3080 int bcn_silence_a =
3081 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
3082 int bcn_silence_b =
3083 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
3084 int bcn_silence_c =
3085 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
3086
3087 if (bcn_silence_a) {
3088 total_silence += bcn_silence_a;
3089 num_active_rx++;
3090 }
3091 if (bcn_silence_b) {
3092 total_silence += bcn_silence_b;
3093 num_active_rx++;
3094 }
3095 if (bcn_silence_c) {
3096 total_silence += bcn_silence_c;
3097 num_active_rx++;
3098 }
3099
3100 /* Average among active antennas */
3101 if (num_active_rx)
3102 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
3103 else
3104 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3105
3106 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
3107 bcn_silence_a, bcn_silence_b, bcn_silence_c,
3108 priv->last_rx_noise);
3109 }
3110
3111 void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3112 {
3113 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3114 int change;
3115 s32 temp;
3116
3117 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
3118 (int)sizeof(priv->statistics), pkt->len);
3119
3120 change = ((priv->statistics.general.temperature !=
3121 pkt->u.stats.general.temperature) ||
3122 ((priv->statistics.flag &
3123 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
3124 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
3125
3126 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
3127
3128 set_bit(STATUS_STATISTICS, &priv->status);
3129
3130 /* Reschedule the statistics timer to occur in
3131 * REG_RECALIB_PERIOD seconds to ensure we get a
3132 * thermal update even if the uCode doesn't give
3133 * us one */
3134 mod_timer(&priv->statistics_periodic, jiffies +
3135 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
3136
3137 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3138 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
3139 iwl4965_rx_calc_noise(priv);
3140 #ifdef CONFIG_IWL4965_SENSITIVITY
3141 queue_work(priv->workqueue, &priv->sensitivity_work);
3142 #endif
3143 }
3144
3145 /* If the hardware hasn't reported a change in
3146 * temperature then don't bother computing a
3147 * calibrated temperature value */
3148 if (!change)
3149 return;
3150
3151 temp = iwl4965_get_temperature(priv);
3152 if (temp < 0)
3153 return;
3154
3155 if (priv->temperature != temp) {
3156 if (priv->temperature)
3157 IWL_DEBUG_TEMP("Temperature changed "
3158 "from %dC to %dC\n",
3159 KELVIN_TO_CELSIUS(priv->temperature),
3160 KELVIN_TO_CELSIUS(temp));
3161 else
3162 IWL_DEBUG_TEMP("Temperature "
3163 "initialized to %dC\n",
3164 KELVIN_TO_CELSIUS(temp));
3165 }
3166
3167 priv->temperature = temp;
3168 set_bit(STATUS_TEMPERATURE, &priv->status);
3169
3170 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3171 iwl4965_is_temp_calib_needed(priv))
3172 queue_work(priv->workqueue, &priv->txpower_work);
3173 }
3174
3175 static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
3176 struct sk_buff *skb,
3177 struct iwl4965_rx_phy_res *rx_start,
3178 struct ieee80211_rx_status *stats,
3179 u32 ampdu_status)
3180 {
3181 s8 signal = stats->ssi;
3182 s8 noise = 0;
3183 int rate = stats->rate_idx;
3184 u64 tsf = stats->mactime;
3185 __le16 phy_flags_hw = rx_start->phy_flags;
3186 struct iwl4965_rt_rx_hdr {
3187 struct ieee80211_radiotap_header rt_hdr;
3188 __le64 rt_tsf; /* TSF */
3189 u8 rt_flags; /* radiotap packet flags */
3190 u8 rt_rate; /* rate in 500kb/s */
3191 __le16 rt_channelMHz; /* channel in MHz */
3192 __le16 rt_chbitmask; /* channel bitfield */
3193 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
3194 s8 rt_dbmnoise;
3195 u8 rt_antenna; /* antenna number */
3196 } __attribute__ ((packed)) *iwl4965_rt;
3197
3198 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
3199 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
3200 if (net_ratelimit())
3201 printk(KERN_ERR "not enough headroom [%d] for "
3202 "radiotap head [%zd]\n",
3203 skb_headroom(skb), sizeof(*iwl4965_rt));
3204 return;
3205 }
3206
3207 /* put radiotap header in front of 802.11 header and data */
3208 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
3209
3210 /* initialise radiotap header */
3211 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3212 iwl4965_rt->rt_hdr.it_pad = 0;
3213
3214 /* total header + data */
3215 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
3216 &iwl4965_rt->rt_hdr.it_len);
3217
3218 /* Indicate all the fields we add to the radiotap header */
3219 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3220 (1 << IEEE80211_RADIOTAP_FLAGS) |
3221 (1 << IEEE80211_RADIOTAP_RATE) |
3222 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3223 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3224 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3225 (1 << IEEE80211_RADIOTAP_ANTENNA)),
3226 &iwl4965_rt->rt_hdr.it_present);
3227
3228 /* Zero the flags, we'll add to them as we go */
3229 iwl4965_rt->rt_flags = 0;
3230
3231 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
3232
3233 iwl4965_rt->rt_dbmsignal = signal;
3234 iwl4965_rt->rt_dbmnoise = noise;
3235
3236 /* Convert the channel frequency and set the flags */
3237 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
3238 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3239 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3240 IEEE80211_CHAN_5GHZ),
3241 &iwl4965_rt->rt_chbitmask);
3242 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3243 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
3244 IEEE80211_CHAN_2GHZ),
3245 &iwl4965_rt->rt_chbitmask);
3246 else /* 802.11g */
3247 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
3248 IEEE80211_CHAN_2GHZ),
3249 &iwl4965_rt->rt_chbitmask);
3250
3251 if (rate == -1)
3252 iwl4965_rt->rt_rate = 0;
3253 else
3254 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
3255
3256 /*
3257 * "antenna number"
3258 *
3259 * It seems that the antenna field in the phy flags value
3260 * is actually a bitfield. This is undefined by radiotap,
3261 * it wants an actual antenna number but I always get "7"
3262 * for most legacy frames I receive indicating that the
3263 * same frame was received on all three RX chains.
3264 *
3265 * I think this field should be removed in favour of a
3266 * new 802.11n radiotap field "RX chains" that is defined
3267 * as a bitmask.
3268 */
3269 iwl4965_rt->rt_antenna =
3270 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3271
3272 /* set the preamble flag if appropriate */
3273 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3274 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3275
3276 stats->flag |= RX_FLAG_RADIOTAP;
3277 }
3278
3279 static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
3280 int include_phy,
3281 struct iwl4965_rx_mem_buffer *rxb,
3282 struct ieee80211_rx_status *stats)
3283 {
3284 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3285 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3286 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3287 struct ieee80211_hdr *hdr;
3288 u16 len;
3289 __le32 *rx_end;
3290 unsigned int skblen;
3291 u32 ampdu_status;
3292
3293 if (!include_phy && priv->last_phy_res[0])
3294 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3295
3296 if (!rx_start) {
3297 IWL_ERROR("MPDU frame without a PHY data\n");
3298 return;
3299 }
3300 if (include_phy) {
3301 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3302 rx_start->cfg_phy_cnt);
3303
3304 len = le16_to_cpu(rx_start->byte_count);
3305
3306 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3307 sizeof(struct iwl4965_rx_phy_res) +
3308 rx_start->cfg_phy_cnt + len);
3309
3310 } else {
3311 struct iwl4965_rx_mpdu_res_start *amsdu =
3312 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3313
3314 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3315 sizeof(struct iwl4965_rx_mpdu_res_start));
3316 len = le16_to_cpu(amsdu->byte_count);
3317 rx_start->byte_count = amsdu->byte_count;
3318 rx_end = (__le32 *) (((u8 *) hdr) + len);
3319 }
3320 if (len > priv->hw_setting.max_pkt_size || len < 16) {
3321 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
3322 return;
3323 }
3324
3325 ampdu_status = le32_to_cpu(*rx_end);
3326 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3327
3328 /* start from MAC */
3329 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3330 skb_put(rxb->skb, len); /* end where data ends */
3331
3332 /* We only process data packets if the interface is open */
3333 if (unlikely(!priv->is_open)) {
3334 IWL_DEBUG_DROP_LIMIT
3335 ("Dropping packet while interface is not open.\n");
3336 return;
3337 }
3338
3339 stats->flag = 0;
3340 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3341
3342 if (iwl4965_param_hwcrypto)
3343 iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3344
3345 if (priv->add_radiotap)
3346 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
3347
3348 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3349 priv->alloc_rxb_skb--;
3350 rxb->skb = NULL;
3351 #ifdef LED
3352 priv->led_packets += len;
3353 iwl4965_setup_activity_timer(priv);
3354 #endif
3355 }
3356
3357 /* Calc max signal level (dBm) among 3 possible receivers */
3358 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3359 {
3360 /* data from PHY/DSP regarding signal strength, etc.,
3361 * contents are always there, not configurable by host. */
3362 struct iwl4965_rx_non_cfg_phy *ncphy =
3363 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3364 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3365 >> IWL_AGC_DB_POS;
3366
3367 u32 valid_antennae =
3368 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3369 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3370 u8 max_rssi = 0;
3371 u32 i;
3372
3373 /* Find max rssi among 3 possible receivers.
3374 * These values are measured by the digital signal processor (DSP).
3375 * They should stay fairly constant even as the signal strength varies,
3376 * if the radio's automatic gain control (AGC) is working right.
3377 * AGC value (see below) will provide the "interesting" info. */
3378 for (i = 0; i < 3; i++)
3379 if (valid_antennae & (1 << i))
3380 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3381
3382 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3383 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3384 max_rssi, agc);
3385
3386 /* dBm = max_rssi dB - agc dB - constant.
3387 * Higher AGC (higher radio gain) means lower signal. */
3388 return (max_rssi - agc - IWL_RSSI_OFFSET);
3389 }
3390
3391 #ifdef CONFIG_IWL4965_HT
3392
3393 /* Parsed Information Elements */
3394 struct ieee802_11_elems {
3395 u8 *ds_params;
3396 u8 ds_params_len;
3397 u8 *tim;
3398 u8 tim_len;
3399 u8 *ibss_params;
3400 u8 ibss_params_len;
3401 u8 *erp_info;
3402 u8 erp_info_len;
3403 u8 *ht_cap_param;
3404 u8 ht_cap_param_len;
3405 u8 *ht_extra_param;
3406 u8 ht_extra_param_len;
3407 };
3408
3409 static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3410 {
3411 size_t left = len;
3412 u8 *pos = start;
3413 int unknown = 0;
3414
3415 memset(elems, 0, sizeof(*elems));
3416
3417 while (left >= 2) {
3418 u8 id, elen;
3419
3420 id = *pos++;
3421 elen = *pos++;
3422 left -= 2;
3423
3424 if (elen > left)
3425 return -1;
3426
3427 switch (id) {
3428 case WLAN_EID_DS_PARAMS:
3429 elems->ds_params = pos;
3430 elems->ds_params_len = elen;
3431 break;
3432 case WLAN_EID_TIM:
3433 elems->tim = pos;
3434 elems->tim_len = elen;
3435 break;
3436 case WLAN_EID_IBSS_PARAMS:
3437 elems->ibss_params = pos;
3438 elems->ibss_params_len = elen;
3439 break;
3440 case WLAN_EID_ERP_INFO:
3441 elems->erp_info = pos;
3442 elems->erp_info_len = elen;
3443 break;
3444 case WLAN_EID_HT_CAPABILITY:
3445 elems->ht_cap_param = pos;
3446 elems->ht_cap_param_len = elen;
3447 break;
3448 case WLAN_EID_HT_EXTRA_INFO:
3449 elems->ht_extra_param = pos;
3450 elems->ht_extra_param_len = elen;
3451 break;
3452 default:
3453 unknown++;
3454 break;
3455 }
3456
3457 left -= elen;
3458 pos += elen;
3459 }
3460
3461 return 0;
3462 }
3463
3464 void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
3465 enum ieee80211_band band)
3466 {
3467 ht_info->cap = 0;
3468 memset(ht_info->supp_mcs_set, 0, 16);
3469
3470 ht_info->ht_supported = 1;
3471
3472 if (band == IEEE80211_BAND_5GHZ) {
3473 ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
3474 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
3475 ht_info->supp_mcs_set[4] = 0x01;
3476 }
3477 ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
3478 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
3479 ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
3480 (IWL_MIMO_PS_NONE << 2));
3481 if (iwl4965_param_amsdu_size_8K) {
3482 printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
3483 ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
3484 }
3485
3486 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3487 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3488
3489 ht_info->supp_mcs_set[0] = 0xFF;
3490 ht_info->supp_mcs_set[1] = 0xFF;
3491 }
3492 #endif /* CONFIG_IWL4965_HT */
3493
3494 static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
3495 {
3496 unsigned long flags;
3497
3498 spin_lock_irqsave(&priv->sta_lock, flags);
3499 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3500 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3501 priv->stations[sta_id].sta.sta.modify_mask = 0;
3502 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3503 spin_unlock_irqrestore(&priv->sta_lock, flags);
3504
3505 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3506 }
3507
3508 static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
3509 {
3510 /* FIXME: need locking over ps_status ??? */
3511 u8 sta_id = iwl4965_hw_find_station(priv, addr);
3512
3513 if (sta_id != IWL_INVALID_STATION) {
3514 u8 sta_awake = priv->stations[sta_id].
3515 ps_status == STA_PS_STATUS_WAKE;
3516
3517 if (sta_awake && ps_bit)
3518 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3519 else if (!sta_awake && !ps_bit) {
3520 iwl4965_sta_modify_ps_wake(priv, sta_id);
3521 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3522 }
3523 }
3524 }
3525
3526 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
3527
3528 /* Called for REPLY_4965_RX (legacy ABG frames), or
3529 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3530 static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
3531 struct iwl4965_rx_mem_buffer *rxb)
3532 {
3533 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3534 /* Use phy data (Rx signal strength, etc.) contained within
3535 * this rx packet for legacy frames,
3536 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3537 int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
3538 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3539 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3540 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3541 __le32 *rx_end;
3542 unsigned int len = 0;
3543 struct ieee80211_hdr *header;
3544 u16 fc;
3545 struct ieee80211_rx_status stats = {
3546 .mactime = le64_to_cpu(rx_start->timestamp),
3547 .freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel)),
3548 .band =
3549 (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3550 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ,
3551 .antenna = 0,
3552 .rate_idx = iwl4965_rate_index_from_plcp(
3553 le32_to_cpu(rx_start->rate_n_flags)),
3554 .flag = 0,
3555 };
3556 u8 network_packet;
3557
3558 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3559 IWL_DEBUG_DROP
3560 ("dsp size out of range [0,20]: "
3561 "%d/n", rx_start->cfg_phy_cnt);
3562 return;
3563 }
3564 if (!include_phy) {
3565 if (priv->last_phy_res[0])
3566 rx_start = (struct iwl4965_rx_phy_res *)
3567 &priv->last_phy_res[1];
3568 else
3569 rx_start = NULL;
3570 }
3571
3572 if (!rx_start) {
3573 IWL_ERROR("MPDU frame without a PHY data\n");
3574 return;
3575 }
3576
3577 if (include_phy) {
3578 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3579 + rx_start->cfg_phy_cnt);
3580
3581 len = le16_to_cpu(rx_start->byte_count);
3582 rx_end = (__le32 *) (pkt->u.raw + rx_start->cfg_phy_cnt +
3583 sizeof(struct iwl4965_rx_phy_res) + len);
3584 } else {
3585 struct iwl4965_rx_mpdu_res_start *amsdu =
3586 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3587
3588 header = (void *)(pkt->u.raw +
3589 sizeof(struct iwl4965_rx_mpdu_res_start));
3590 len = le16_to_cpu(amsdu->byte_count);
3591 rx_end = (__le32 *) (pkt->u.raw +
3592 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3593 }
3594
3595 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3596 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3597 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3598 le32_to_cpu(*rx_end));
3599 return;
3600 }
3601
3602 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3603
3604 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3605 stats.ssi = iwl4965_calc_rssi(rx_start);
3606
3607 /* Meaningful noise values are available only from beacon statistics,
3608 * which are gathered only when associated, and indicate noise
3609 * only for the associated network channel ...
3610 * Ignore these noise values while scanning (other channels) */
3611 if (iwl4965_is_associated(priv) &&
3612 !test_bit(STATUS_SCANNING, &priv->status)) {
3613 stats.noise = priv->last_rx_noise;
3614 stats.signal = iwl4965_calc_sig_qual(stats.ssi, stats.noise);
3615 } else {
3616 stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3617 stats.signal = iwl4965_calc_sig_qual(stats.ssi, 0);
3618 }
3619
3620 /* Reset beacon noise level if not associated. */
3621 if (!iwl4965_is_associated(priv))
3622 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3623
3624 #ifdef CONFIG_IWL4965_DEBUG
3625 /* TODO: Parts of iwl4965_report_frame are broken for 4965 */
3626 if (iwl4965_debug_level & (IWL_DL_RX))
3627 /* Set "1" to report good data frames in groups of 100 */
3628 iwl4965_report_frame(priv, pkt, header, 1);
3629
3630 if (iwl4965_debug_level & (IWL_DL_RX | IWL_DL_STATS))
3631 IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n",
3632 stats.ssi, stats.noise, stats.signal,
3633 (long unsigned int)le64_to_cpu(rx_start->timestamp));
3634 #endif
3635
3636 network_packet = iwl4965_is_network_packet(priv, header);
3637 if (network_packet) {
3638 priv->last_rx_rssi = stats.ssi;
3639 priv->last_beacon_time = priv->ucode_beacon_time;
3640 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3641 }
3642
3643 fc = le16_to_cpu(header->frame_control);
3644 switch (fc & IEEE80211_FCTL_FTYPE) {
3645 case IEEE80211_FTYPE_MGMT:
3646
3647 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3648 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3649 header->addr2);
3650 switch (fc & IEEE80211_FCTL_STYPE) {
3651 case IEEE80211_STYPE_PROBE_RESP:
3652 case IEEE80211_STYPE_BEACON:
3653 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
3654 !compare_ether_addr(header->addr2, priv->bssid)) ||
3655 (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
3656 !compare_ether_addr(header->addr3, priv->bssid))) {
3657 struct ieee80211_mgmt *mgmt =
3658 (struct ieee80211_mgmt *)header;
3659 u64 timestamp =
3660 le64_to_cpu(mgmt->u.beacon.timestamp);
3661
3662 priv->timestamp0 = timestamp & 0xFFFFFFFF;
3663 priv->timestamp1 =
3664 (timestamp >> 32) & 0xFFFFFFFF;
3665 priv->beacon_int = le16_to_cpu(
3666 mgmt->u.beacon.beacon_int);
3667 if (priv->call_post_assoc_from_beacon &&
3668 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
3669 priv->call_post_assoc_from_beacon = 0;
3670 queue_work(priv->workqueue,
3671 &priv->post_associate.work);
3672 }
3673 }
3674 break;
3675
3676 case IEEE80211_STYPE_ACTION:
3677 break;
3678
3679 /*
3680 * TODO: Use the new callback function from
3681 * mac80211 instead of sniffing these packets.
3682 */
3683 case IEEE80211_STYPE_ASSOC_RESP:
3684 case IEEE80211_STYPE_REASSOC_RESP:
3685 if (network_packet) {
3686 #ifdef CONFIG_IWL4965_HT
3687 u8 *pos = NULL;
3688 struct ieee802_11_elems elems;
3689 #endif /*CONFIG_IWL4965_HT */
3690 struct ieee80211_mgmt *mgnt =
3691 (struct ieee80211_mgmt *)header;
3692
3693 /* We have just associated, give some
3694 * time for the 4-way handshake if
3695 * any. Don't start scan too early. */
3696 priv->next_scan_jiffies = jiffies +
3697 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
3698
3699 priv->assoc_id = (~((1 << 15) | (1 << 14))
3700 & le16_to_cpu(mgnt->u.assoc_resp.aid));
3701 priv->assoc_capability =
3702 le16_to_cpu(
3703 mgnt->u.assoc_resp.capab_info);
3704 #ifdef CONFIG_IWL4965_HT
3705 pos = mgnt->u.assoc_resp.variable;
3706 if (!parse_elems(pos,
3707 len - (pos - (u8 *) mgnt),
3708 &elems)) {
3709 if (elems.ht_extra_param &&
3710 elems.ht_cap_param)
3711 break;
3712 }
3713 #endif /*CONFIG_IWL4965_HT */
3714 /* assoc_id is 0 no association */
3715 if (!priv->assoc_id)
3716 break;
3717 if (priv->beacon_int)
3718 queue_work(priv->workqueue,
3719 &priv->post_associate.work);
3720 else
3721 priv->call_post_assoc_from_beacon = 1;
3722 }
3723
3724 break;
3725
3726 case IEEE80211_STYPE_PROBE_REQ:
3727 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
3728 !iwl4965_is_associated(priv)) {
3729 DECLARE_MAC_BUF(mac1);
3730 DECLARE_MAC_BUF(mac2);
3731 DECLARE_MAC_BUF(mac3);
3732
3733 IWL_DEBUG_DROP("Dropping (non network): "
3734 "%s, %s, %s\n",
3735 print_mac(mac1, header->addr1),
3736 print_mac(mac2, header->addr2),
3737 print_mac(mac3, header->addr3));
3738 return;
3739 }
3740 }
3741 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &stats);
3742 break;
3743
3744 case IEEE80211_FTYPE_CTL:
3745 #ifdef CONFIG_IWL4965_HT
3746 switch (fc & IEEE80211_FCTL_STYPE) {
3747 case IEEE80211_STYPE_BACK_REQ:
3748 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3749 iwl4965_handle_data_packet(priv, 0, include_phy,
3750 rxb, &stats);
3751 break;
3752 default:
3753 break;
3754 }
3755 #endif
3756 break;
3757
3758 case IEEE80211_FTYPE_DATA: {
3759 DECLARE_MAC_BUF(mac1);
3760 DECLARE_MAC_BUF(mac2);
3761 DECLARE_MAC_BUF(mac3);
3762
3763 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3764 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3765 header->addr2);
3766
3767 if (unlikely(!network_packet))
3768 IWL_DEBUG_DROP("Dropping (non network): "
3769 "%s, %s, %s\n",
3770 print_mac(mac1, header->addr1),
3771 print_mac(mac2, header->addr2),
3772 print_mac(mac3, header->addr3));
3773 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3774 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3775 print_mac(mac1, header->addr1),
3776 print_mac(mac2, header->addr2),
3777 print_mac(mac3, header->addr3));
3778 else
3779 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3780 &stats);
3781 break;
3782 }
3783 default:
3784 break;
3785
3786 }
3787 }
3788
3789 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3790 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3791 static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
3792 struct iwl4965_rx_mem_buffer *rxb)
3793 {
3794 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3795 priv->last_phy_res[0] = 1;
3796 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3797 sizeof(struct iwl4965_rx_phy_res));
3798 }
3799
3800 static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
3801 struct iwl4965_rx_mem_buffer *rxb)
3802
3803 {
3804 #ifdef CONFIG_IWL4965_SENSITIVITY
3805 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3806 struct iwl4965_missed_beacon_notif *missed_beacon;
3807
3808 missed_beacon = &pkt->u.missed_beacon;
3809 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3810 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3811 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3812 le32_to_cpu(missed_beacon->total_missed_becons),
3813 le32_to_cpu(missed_beacon->num_recvd_beacons),
3814 le32_to_cpu(missed_beacon->num_expected_beacons));
3815 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
3816 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
3817 queue_work(priv->workqueue, &priv->sensitivity_work);
3818 }
3819 #endif /*CONFIG_IWL4965_SENSITIVITY*/
3820 }
3821
3822 #ifdef CONFIG_IWL4965_HT
3823
3824 /**
3825 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
3826 */
3827 static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
3828 int sta_id, int tid)
3829 {
3830 unsigned long flags;
3831
3832 /* Remove "disable" flag, to enable Tx for this TID */
3833 spin_lock_irqsave(&priv->sta_lock, flags);
3834 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3835 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3836 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3837 spin_unlock_irqrestore(&priv->sta_lock, flags);
3838
3839 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3840 }
3841
3842 /**
3843 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3844 *
3845 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3846 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3847 */
3848 static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
3849 struct iwl4965_ht_agg *agg,
3850 struct iwl4965_compressed_ba_resp*
3851 ba_resp)
3852
3853 {
3854 int i, sh, ack;
3855 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3856 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3857 u64 bitmap;
3858 int successes = 0;
3859 struct ieee80211_tx_status *tx_status;
3860
3861 if (unlikely(!agg->wait_for_ba)) {
3862 IWL_ERROR("Received BA when not expected\n");
3863 return -EINVAL;
3864 }
3865
3866 /* Mark that the expected block-ack response arrived */
3867 agg->wait_for_ba = 0;
3868 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3869
3870 /* Calculate shift to align block-ack bits with our Tx window bits */
3871 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3872 if (sh < 0) /* tbw something is wrong with indices */
3873 sh += 0x100;
3874
3875 /* don't use 64-bit values for now */
3876 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3877
3878 if (agg->frame_count > (64 - sh)) {
3879 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3880 return -1;
3881 }
3882
3883 /* check for success or failure according to the
3884 * transmitted bitmap and block-ack bitmap */
3885 bitmap &= agg->bitmap;
3886
3887 /* For each frame attempted in aggregation,
3888 * update driver's record of tx frame's status. */
3889 for (i = 0; i < agg->frame_count ; i++) {
3890 ack = bitmap & (1 << i);
3891 successes += !!ack;
3892 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3893 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3894 agg->start_idx + i);
3895 }
3896
3897 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3898 tx_status->flags = IEEE80211_TX_STATUS_ACK;
3899 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3900 tx_status->ampdu_ack_map = successes;
3901 tx_status->ampdu_ack_len = agg->frame_count;
3902 /* FIXME Wrong rate
3903 tx_status->control.tx_rate = agg->rate_n_flags;
3904 */
3905
3906 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", bitmap);
3907
3908 return 0;
3909 }
3910
3911 /**
3912 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3913 */
3914 static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
3915 u16 txq_id)
3916 {
3917 /* Simply stop the queue, but don't change any configuration;
3918 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3919 iwl4965_write_prph(priv,
3920 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
3921 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3922 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3923 }
3924
3925 /**
3926 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3927 */
3928 static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
3929 u16 ssn_idx, u8 tx_fifo)
3930 {
3931 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3932 IWL_WARNING("queue number too small: %d, must be > %d\n",
3933 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3934 return -EINVAL;
3935 }
3936
3937 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3938
3939 iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3940
3941 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3942 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3943 /* supposes that ssn_idx is valid (!= 0xFFF) */
3944 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3945
3946 iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
3947 iwl4965_txq_ctx_deactivate(priv, txq_id);
3948 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3949
3950 return 0;
3951 }
3952
3953 int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
3954 u8 tid, int txq_id)
3955 {
3956 struct iwl4965_queue *q = &priv->txq[txq_id].q;
3957 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3958 struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3959
3960 switch (priv->stations[sta_id].tid[tid].agg.state) {
3961 case IWL_EMPTYING_HW_QUEUE_DELBA:
3962 /* We are reclaiming the last packet of the */
3963 /* aggregated HW queue */
3964 if (txq_id == tid_data->agg.txq_id &&
3965 q->read_ptr == q->write_ptr) {
3966 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3967 int tx_fifo = default_tid_to_tx_fifo[tid];
3968 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3969 iwl4965_tx_queue_agg_disable(priv, txq_id,
3970 ssn, tx_fifo);
3971 tid_data->agg.state = IWL_AGG_OFF;
3972 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3973 }
3974 break;
3975 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3976 /* We are reclaiming the last packet of the queue */
3977 if (tid_data->tfds_in_queue == 0) {
3978 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3979 tid_data->agg.state = IWL_AGG_ON;
3980 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3981 }
3982 break;
3983 }
3984 return 0;
3985 }
3986
3987 /**
3988 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
3989 * @index -- current index
3990 * @n_bd -- total number of entries in queue (s/b power of 2)
3991 */
3992 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
3993 {
3994 return (index == 0) ? n_bd - 1 : index - 1;
3995 }
3996
3997 /**
3998 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3999 *
4000 * Handles block-acknowledge notification from device, which reports success
4001 * of frames sent via aggregation.
4002 */
4003 static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
4004 struct iwl4965_rx_mem_buffer *rxb)
4005 {
4006 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4007 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4008 int index;
4009 struct iwl4965_tx_queue *txq = NULL;
4010 struct iwl4965_ht_agg *agg;
4011 DECLARE_MAC_BUF(mac);
4012
4013 /* "flow" corresponds to Tx queue */
4014 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
4015
4016 /* "ssn" is start of block-ack Tx window, corresponds to index
4017 * (in Tx queue's circular buffer) of first TFD/frame in window */
4018 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4019
4020 if (scd_flow >= ARRAY_SIZE(priv->txq)) {
4021 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
4022 return;
4023 }
4024
4025 txq = &priv->txq[scd_flow];
4026 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4027
4028 /* Find index just before block-ack window */
4029 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4030
4031 /* TODO: Need to get this copy more safely - now good for debug */
4032
4033 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
4034 "sta_id = %d\n",
4035 agg->wait_for_ba,
4036 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
4037 ba_resp->sta_id);
4038 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
4039 "%d, scd_ssn = %d\n",
4040 ba_resp->tid,
4041 ba_resp->seq_ctl,
4042 ba_resp->bitmap,
4043 ba_resp->scd_flow,
4044 ba_resp->scd_ssn);
4045 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
4046 agg->start_idx,
4047 agg->bitmap);
4048
4049 /* Update driver's record of ACK vs. not for each frame in window */
4050 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4051
4052 /* Release all TFDs before the SSN, i.e. all TFDs in front of
4053 * block-ack window (we assume that they've been successfully
4054 * transmitted ... if not, it's too late anyway). */
4055 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
4056 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
4057 priv->stations[ba_resp->sta_id].
4058 tid[ba_resp->tid].tfds_in_queue -= freed;
4059 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
4060 priv->mac80211_registered &&
4061 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
4062 ieee80211_wake_queue(priv->hw, scd_flow);
4063 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
4064 ba_resp->tid, scd_flow);
4065 }
4066 }
4067
4068 /**
4069 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
4070 */
4071 static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
4072 u16 txq_id)
4073 {
4074 u32 tbl_dw_addr;
4075 u32 tbl_dw;
4076 u16 scd_q2ratid;
4077
4078 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
4079
4080 tbl_dw_addr = priv->scd_base_addr +
4081 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4082
4083 tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
4084
4085 if (txq_id & 0x1)
4086 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4087 else
4088 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4089
4090 iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4091
4092 return 0;
4093 }
4094
4095
4096 /**
4097 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
4098 *
4099 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
4100 * i.e. it must be one of the higher queues used for aggregation
4101 */
4102 static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
4103 int tx_fifo, int sta_id, int tid,
4104 u16 ssn_idx)
4105 {
4106 unsigned long flags;
4107 int rc;
4108 u16 ra_tid;
4109
4110 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
4111 IWL_WARNING("queue number too small: %d, must be > %d\n",
4112 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4113
4114 ra_tid = BUILD_RAxTID(sta_id, tid);
4115
4116 /* Modify device's station table to Tx this TID */
4117 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4118
4119 spin_lock_irqsave(&priv->lock, flags);
4120 rc = iwl4965_grab_nic_access(priv);
4121 if (rc) {
4122 spin_unlock_irqrestore(&priv->lock, flags);
4123 return rc;
4124 }
4125
4126 /* Stop this Tx queue before configuring it */
4127 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4128
4129 /* Map receiver-address / traffic-ID to this queue */
4130 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4131
4132 /* Set this queue as a chain-building queue */
4133 iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4134
4135 /* Place first TFD at index corresponding to start sequence number.
4136 * Assumes that ssn_idx is valid (!= 0xFFF) */
4137 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4138 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4139 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4140
4141 /* Set up Tx window size and frame limit for this queue */
4142 iwl4965_write_targ_mem(priv,
4143 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4144 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4145 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4146
4147 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
4148 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4149 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4150 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4151
4152 iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4153
4154 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
4155 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4156
4157 iwl4965_release_nic_access(priv);
4158 spin_unlock_irqrestore(&priv->lock, flags);
4159
4160 return 0;
4161 }
4162
4163 #endif /* CONFIG_IWL4965_HT */
4164
4165 /**
4166 * iwl4965_add_station - Initialize a station's hardware rate table
4167 *
4168 * The uCode's station table contains a table of fallback rates
4169 * for automatic fallback during transmission.
4170 *
4171 * NOTE: This sets up a default set of values. These will be replaced later
4172 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
4173 * rc80211_simple.
4174 *
4175 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
4176 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
4177 * which requires station table entry to exist).
4178 */
4179 void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
4180 {
4181 int i, r;
4182 struct iwl4965_link_quality_cmd link_cmd = {
4183 .reserved1 = 0,
4184 };
4185 u16 rate_flags;
4186
4187 /* Set up the rate scaling to start at selected rate, fall back
4188 * all the way down to 1M in IEEE order, and then spin on 1M */
4189 if (is_ap)
4190 r = IWL_RATE_54M_INDEX;
4191 else if (priv->band == IEEE80211_BAND_5GHZ)
4192 r = IWL_RATE_6M_INDEX;
4193 else
4194 r = IWL_RATE_1M_INDEX;
4195
4196 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
4197 rate_flags = 0;
4198 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
4199 rate_flags |= RATE_MCS_CCK_MSK;
4200
4201 /* Use Tx antenna B only */
4202 rate_flags |= RATE_MCS_ANT_B_MSK;
4203 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4204
4205 link_cmd.rs_table[i].rate_n_flags =
4206 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
4207 r = iwl4965_get_prev_ieee_rate(r);
4208 }
4209
4210 link_cmd.general_params.single_stream_ant_msk = 2;
4211 link_cmd.general_params.dual_stream_ant_msk = 3;
4212 link_cmd.agg_params.agg_dis_start_th = 3;
4213 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
4214
4215 /* Update the rate scaling for control frame Tx to AP */
4216 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
4217
4218 iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4219 &link_cmd);
4220 }
4221
4222 #ifdef CONFIG_IWL4965_HT
4223
4224 static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv,
4225 enum ieee80211_band band,
4226 u16 channel, u8 extension_chan_offset)
4227 {
4228 const struct iwl4965_channel_info *ch_info;
4229
4230 ch_info = iwl4965_get_channel_info(priv, band, channel);
4231 if (!is_channel_valid(ch_info))
4232 return 0;
4233
4234 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
4235 return 0;
4236
4237 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
4238 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
4239 return 1;
4240
4241 return 0;
4242 }
4243
4244 static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
4245 struct ieee80211_ht_info *sta_ht_inf)
4246 {
4247 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
4248
4249 if ((!iwl_ht_conf->is_ht) ||
4250 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
4251 (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO))
4252 return 0;
4253
4254 if (sta_ht_inf) {
4255 if ((!sta_ht_inf->ht_supported) ||
4256 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
4257 return 0;
4258 }
4259
4260 return (iwl4965_is_channel_extension(priv, priv->band,
4261 iwl_ht_conf->control_channel,
4262 iwl_ht_conf->extension_chan_offset));
4263 }
4264
4265 void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
4266 {
4267 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
4268 u32 val;
4269
4270 if (!ht_info->is_ht)
4271 return;
4272
4273 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
4274 if (iwl4965_is_fat_tx_allowed(priv, NULL))
4275 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4276 else
4277 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
4278 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
4279
4280 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
4281 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
4282 le16_to_cpu(rxon->channel),
4283 ht_info->control_channel);
4284 rxon->channel = cpu_to_le16(ht_info->control_channel);
4285 return;
4286 }
4287
4288 /* Note: control channel is opposite of extension channel */
4289 switch (ht_info->extension_chan_offset) {
4290 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
4291 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
4292 break;
4293 case IWL_EXT_CHANNEL_OFFSET_BELOW:
4294 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
4295 break;
4296 case IWL_EXT_CHANNEL_OFFSET_AUTO:
4297 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4298 break;
4299 default:
4300 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4301 break;
4302 }
4303
4304 val = ht_info->ht_protection;
4305
4306 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4307
4308 iwl4965_set_rxon_chain(priv);
4309
4310 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4311 "rxon flags 0x%X operation mode :0x%X "
4312 "extension channel offset 0x%x "
4313 "control chan %d\n",
4314 ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
4315 le32_to_cpu(rxon->flags), ht_info->ht_protection,
4316 ht_info->extension_chan_offset,
4317 ht_info->control_channel);
4318 return;
4319 }
4320
4321 void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
4322 struct ieee80211_ht_info *sta_ht_inf)
4323 {
4324 __le32 sta_flags;
4325 u8 mimo_ps_mode;
4326
4327 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
4328 goto done;
4329
4330 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
4331
4332 sta_flags = priv->stations[index].sta.station_flags;
4333
4334 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
4335
4336 switch (mimo_ps_mode) {
4337 case WLAN_HT_CAP_MIMO_PS_STATIC:
4338 sta_flags |= STA_FLG_MIMO_DIS_MSK;
4339 break;
4340 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
4341 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4342 break;
4343 case WLAN_HT_CAP_MIMO_PS_DISABLED:
4344 break;
4345 default:
4346 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
4347 break;
4348 }
4349
4350 sta_flags |= cpu_to_le32(
4351 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4352
4353 sta_flags |= cpu_to_le32(
4354 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4355
4356 if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
4357 sta_flags |= STA_FLG_FAT_EN_MSK;
4358 else
4359 sta_flags &= ~STA_FLG_FAT_EN_MSK;
4360
4361 priv->stations[index].sta.station_flags = sta_flags;
4362 done:
4363 return;
4364 }
4365
4366 static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
4367 int sta_id, int tid, u16 ssn)
4368 {
4369 unsigned long flags;
4370
4371 spin_lock_irqsave(&priv->sta_lock, flags);
4372 priv->stations[sta_id].sta.station_flags_msk = 0;
4373 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4374 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4375 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4377 spin_unlock_irqrestore(&priv->sta_lock, flags);
4378
4379 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4380 }
4381
4382 static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
4383 int sta_id, int tid)
4384 {
4385 unsigned long flags;
4386
4387 spin_lock_irqsave(&priv->sta_lock, flags);
4388 priv->stations[sta_id].sta.station_flags_msk = 0;
4389 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4390 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4391 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4392 spin_unlock_irqrestore(&priv->sta_lock, flags);
4393
4394 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4395 }
4396
4397 /*
4398 * Find first available (lowest unused) Tx Queue, mark it "active".
4399 * Called only when finding queue for aggregation.
4400 * Should never return anything < 7, because they should already
4401 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
4402 */
4403 static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
4404 {
4405 int txq_id;
4406
4407 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
4408 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4409 return txq_id;
4410 return -1;
4411 }
4412
4413 static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
4414 u16 tid, u16 *start_seq_num)
4415 {
4416 struct iwl4965_priv *priv = hw->priv;
4417 int sta_id;
4418 int tx_fifo;
4419 int txq_id;
4420 int ssn = -1;
4421 int rc = 0;
4422 unsigned long flags;
4423 struct iwl4965_tid_data *tid_data;
4424 DECLARE_MAC_BUF(mac);
4425
4426 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4427 tx_fifo = default_tid_to_tx_fifo[tid];
4428 else
4429 return -EINVAL;
4430
4431 IWL_WARNING("%s on da = %s tid = %d\n",
4432 __func__, print_mac(mac, da), tid);
4433
4434 sta_id = iwl4965_hw_find_station(priv, da);
4435 if (sta_id == IWL_INVALID_STATION)
4436 return -ENXIO;
4437
4438 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
4439 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
4440 return -ENXIO;
4441 }
4442
4443 txq_id = iwl4965_txq_ctx_activate_free(priv);
4444 if (txq_id == -1)
4445 return -ENXIO;
4446
4447 spin_lock_irqsave(&priv->sta_lock, flags);
4448 tid_data = &priv->stations[sta_id].tid[tid];
4449 ssn = SEQ_TO_SN(tid_data->seq_number);
4450 tid_data->agg.txq_id = txq_id;
4451 spin_unlock_irqrestore(&priv->sta_lock, flags);
4452
4453 *start_seq_num = ssn;
4454 rc = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4455 sta_id, tid, ssn);
4456 if (rc)
4457 return rc;
4458
4459 rc = 0;
4460 if (tid_data->tfds_in_queue == 0) {
4461 printk(KERN_ERR "HW queue is empty\n");
4462 tid_data->agg.state = IWL_AGG_ON;
4463 ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
4464 } else {
4465 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
4466 tid_data->tfds_in_queue);
4467 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
4468 }
4469 return rc;
4470 }
4471
4472 static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
4473 u16 tid)
4474 {
4475
4476 struct iwl4965_priv *priv = hw->priv;
4477 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4478 struct iwl4965_tid_data *tid_data;
4479 int rc, write_ptr, read_ptr;
4480 unsigned long flags;
4481 DECLARE_MAC_BUF(mac);
4482
4483 if (!da) {
4484 IWL_ERROR("da = NULL\n");
4485 return -EINVAL;
4486 }
4487
4488 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4489 tx_fifo_id = default_tid_to_tx_fifo[tid];
4490 else
4491 return -EINVAL;
4492
4493 sta_id = iwl4965_hw_find_station(priv, da);
4494
4495 if (sta_id == IWL_INVALID_STATION)
4496 return -ENXIO;
4497
4498 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
4499 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
4500
4501 tid_data = &priv->stations[sta_id].tid[tid];
4502 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4503 txq_id = tid_data->agg.txq_id;
4504 write_ptr = priv->txq[txq_id].q.write_ptr;
4505 read_ptr = priv->txq[txq_id].q.read_ptr;
4506
4507 /* The queue is not empty */
4508 if (write_ptr != read_ptr) {
4509 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
4510 priv->stations[sta_id].tid[tid].agg.state =
4511 IWL_EMPTYING_HW_QUEUE_DELBA;
4512 return 0;
4513 }
4514
4515 IWL_DEBUG_HT("HW queue empty\n");;
4516 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
4517
4518 spin_lock_irqsave(&priv->lock, flags);
4519 rc = iwl4965_grab_nic_access(priv);
4520 if (rc) {
4521 spin_unlock_irqrestore(&priv->lock, flags);
4522 return rc;
4523 }
4524 rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4525 iwl4965_release_nic_access(priv);
4526 spin_unlock_irqrestore(&priv->lock, flags);
4527
4528 if (rc)
4529 return rc;
4530
4531 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
4532
4533 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4534 print_mac(mac, da), tid);
4535
4536 return 0;
4537 }
4538
4539 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
4540 enum ieee80211_ampdu_mlme_action action,
4541 const u8 *addr, u16 tid, u16 *ssn)
4542 {
4543 struct iwl4965_priv *priv = hw->priv;
4544 int sta_id;
4545 DECLARE_MAC_BUF(mac);
4546
4547 IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
4548 print_mac(mac, addr), tid);
4549 sta_id = iwl4965_hw_find_station(priv, addr);
4550 switch (action) {
4551 case IEEE80211_AMPDU_RX_START:
4552 IWL_DEBUG_HT("start Rx\n");
4553 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
4554 break;
4555 case IEEE80211_AMPDU_RX_STOP:
4556 IWL_DEBUG_HT("stop Rx\n");
4557 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4558 break;
4559 case IEEE80211_AMPDU_TX_START:
4560 IWL_DEBUG_HT("start Tx\n");
4561 return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
4562 case IEEE80211_AMPDU_TX_STOP:
4563 IWL_DEBUG_HT("stop Tx\n");
4564 return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
4565 default:
4566 IWL_DEBUG_HT("unknown\n");
4567 return -EINVAL;
4568 break;
4569 }
4570 return 0;
4571 }
4572
4573 #endif /* CONFIG_IWL4965_HT */
4574
4575 /* Set up 4965-specific Rx frame reply handlers */
4576 void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
4577 {
4578 /* Legacy Rx frames */
4579 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
4580
4581 /* High-throughput (HT) Rx frames */
4582 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4583 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4584
4585 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4586 iwl4965_rx_missed_beacon_notif;
4587
4588 #ifdef CONFIG_IWL4965_HT
4589 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4590 #endif /* CONFIG_IWL4965_HT */
4591 }
4592
4593 void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
4594 {
4595 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4596 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
4597 #ifdef CONFIG_IWL4965_SENSITIVITY
4598 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4599 #endif
4600 init_timer(&priv->statistics_periodic);
4601 priv->statistics_periodic.data = (unsigned long)priv;
4602 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4603 }
4604
4605 void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
4606 {
4607 del_timer_sync(&priv->statistics_periodic);
4608
4609 cancel_delayed_work(&priv->init_alive_start);
4610 }
4611
4612 struct pci_device_id iwl4965_hw_card_ids[] = {
4613 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
4614 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
4615 {0}
4616 };
4617
4618 /*
4619 * The device's EEPROM semaphore prevents conflicts between driver and uCode
4620 * when accessing the EEPROM; each access is a series of pulses to/from the
4621 * EEPROM chip, not a single event, so even reads could conflict if they
4622 * weren't arbitrated by the semaphore.
4623 */
4624 int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
4625 {
4626 u16 count;
4627 int rc;
4628
4629 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
4630 /* Request semaphore */
4631 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
4632 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4633
4634 /* See if we got it */
4635 rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
4636 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4637 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4638 EEPROM_SEM_TIMEOUT);
4639 if (rc >= 0) {
4640 IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
4641 count+1);
4642 return rc;
4643 }
4644 }
4645
4646 return rc;
4647 }
4648
4649 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
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