arch/arm/mach-s3c2410/mach-gta01.c

   1 /*
   2  * linux/arch/arm/mach-s3c2410/mach-gta01.c
   3  *
   4  * S3C2410 Machine Support for the FIC Neo1973 GTA01
   5  *
   6  * Copyright (C) 2006-2007 by Openmoko, Inc.
   7  * Author: Harald Welte <laforge@openmoko.org>
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  *
  25  */
  26
  27 #include <linux/kernel.h>
  28 #include <linux/types.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/list.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/serial_core.h>
  36 #include <asm/arch/ts.h>
  37 #include <linux/spi/spi.h>
  38 #include <linux/spi/spi_bitbang.h>
  39 #include <linux/mmc/mmc.h>
  40 #include <linux/mmc/host.h>
  41
  42 #include <linux/mtd/mtd.h>
  43 #include <linux/mtd/nand.h>
  44 #include <linux/mtd/nand_ecc.h>
  45 #include <linux/mtd/partitions.h>
  46
  47 #include <linux/mmc/host.h>
  48
  49 #include <linux/pcf50606.h>
  50
  51 #include <asm/mach/arch.h>
  52 #include <asm/mach/map.h>
  53 #include <asm/mach/irq.h>
  54
  55 #include <asm/hardware.h>
  56 #include <asm/io.h>
  57 #include <asm/irq.h>
  58 #include <asm/mach-types.h>
  59
  60 #include <asm/arch/regs-gpio.h>
  61 #include <asm/arch/fb.h>
  62 #include <asm/arch/mci.h>
  63 #include <asm/arch/spi.h>
  64 #include <asm/arch/spi-gpio.h>
  65 #include <asm/arch/usb-control.h>
  66
  67 #include <asm/arch/gta01.h>
  68
  69 #include <asm/plat-s3c/regs-serial.h>
  70 #include <asm/plat-s3c/nand.h>
  71 #include <asm/plat-s3c24xx/devs.h>
  72 #include <asm/plat-s3c24xx/cpu.h>
  73 #include <asm/plat-s3c24xx/pm.h>
  74 #include <asm/plat-s3c24xx/udc.h>
  75 #include <asm/plat-s3c24xx/neo1973.h>
  76 #include <linux/jbt6k74.h>
  77
  78 static struct map_desc gta01_iodesc[] __initdata = {
  79         {
  80                 .virtual        = 0xe0000000,
  81                 .pfn            = __phys_to_pfn(S3C2410_CS3+0x01000000),
  82                 .length         = SZ_1M,
  83                 .type           = MT_DEVICE
  84         },
  85 };
  86
  87 #define UCON S3C2410_UCON_DEFAULT
  88 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  89 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  90 /* UFCON for the gta01 sets the FIFO trigger level at 4, not 8 */
  91 #define UFCON_GTA01_PORT0 S3C2410_UFCON_FIFOMODE
  92
  93 static struct s3c2410_uartcfg gta01_uartcfgs[] = {
  94         [0] = {
  95                 .hwport      = 0,
  96                 .flags       = 0,
  97                 .ucon        = UCON,
  98                 .ulcon       = ULCON,
  99                 .ufcon       = UFCON_GTA01_PORT0,
 100         },
 101         [1] = {
 102                 .hwport      = 1,
 103                 .flags       = 0,
 104                 .ucon        = UCON,
 105                 .ulcon       = ULCON,
 106                 .ufcon       = UFCON,
 107         },
 108 };
 109
 110 /* PMU driver info */
 111
 112 static int pmu_callback(struct device *dev, unsigned int feature,
 113                         enum pmu_event event)
 114 {
 115         switch (feature) {
 116         case PCF50606_FEAT_ACD:
 117                 switch (event) {
 118                 case PMU_EVT_INSERT:
 119                         pcf50606_charge_fast(pcf50606_global, 1);
 120                         break;
 121                 case PMU_EVT_REMOVE:
 122                         pcf50606_charge_fast(pcf50606_global, 0);
 123                         break;
 124                 default:
 125                         break;
 126                 }
 127                 break;
 128         default:
 129                 break;
 130         }
 131
 132         return 0;
 133 }
 134
 135 static struct pcf50606_platform_data gta01_pcf_pdata = {
 136         .used_features  = PCF50606_FEAT_EXTON |
 137                           PCF50606_FEAT_MBC |
 138                           PCF50606_FEAT_BBC |
 139                           PCF50606_FEAT_RTC |
 140                           PCF50606_FEAT_WDT |
 141                           PCF50606_FEAT_CHGCUR |
 142                           PCF50606_FEAT_BATVOLT |
 143                           PCF50606_FEAT_BATTEMP,
 144         .onkey_seconds_required = 3,
 145         .cb             = &pmu_callback,
 146         .r_fix_batt     = 10000,
 147         .r_fix_batt_par = 10000,
 148         .r_sense_milli  = 220,
 149         .rails  = {
 150                 [PCF50606_REGULATOR_D1REG] = {
 151                         .name           = "bt_3v15",
 152                         .voltage        = {
 153                                 .init   = 3150,
 154                                 .max    = 3150,
 155                         },
 156                 },
 157                 [PCF50606_REGULATOR_D2REG] = {
 158                         .name           = "gl_2v5",
 159                         .voltage        = {
 160                                 .init   = 2500,
 161                                 .max    = 2500,
 162                         },
 163                 },
 164                 [PCF50606_REGULATOR_D3REG] = {
 165                         .name           = "stby_1v8",
 166                         .flags          = PMU_VRAIL_F_SUSPEND_ON,
 167                         .voltage        = {
 168                                 .init   = 1800,
 169                                 .max    = 2100,
 170                         },
 171                 },
 172                 [PCF50606_REGULATOR_DCD] = {
 173                         .name           = "gl_1v5",
 174                         .voltage        = {
 175                                 .init   = 1500,
 176                                 .max    = 1500,
 177                         },
 178                 },
 179                 [PCF50606_REGULATOR_DCDE] = {
 180                         .name           = "io_3v3",
 181                         .flags          = PMU_VRAIL_F_SUSPEND_ON,
 182                         .voltage        = {
 183                                 .init   = 3300,
 184                                 .max    = 3330,
 185                         },
 186                 },
 187                 [PCF50606_REGULATOR_DCUD] = {
 188                         .name           = "core_1v8",
 189                         .flags          = PMU_VRAIL_F_SUSPEND_ON,
 190                         .voltage        = {
 191                                 .init   = 2100,
 192                                 .max    = 2100,
 193                         },
 194                 },
 195                 [PCF50606_REGULATOR_IOREG] = {
 196                         .name           = "codec_3v3",
 197                         .voltage        = {
 198                                 .init   = 3300,
 199                                 .max    = 3300,
 200                         },
 201                 },
 202                 [PCF50606_REGULATOR_LPREG] = {
 203                         .name           = "lcm_3v3",
 204                         .voltage        = {
 205                                 .init   = 3300,
 206                                 .max    = 3300,
 207                         },
 208                 }
 209         },
 210 };
 211
 212 static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name,
 213                           unsigned int flags, unsigned int init,
 214                           unsigned int max)
 215 {
 216         vrail->name = name;
 217         vrail->flags = flags;
 218         vrail->voltage.init = init;
 219         vrail->voltage.max = max;
 220 }
 221
 222 static void mangle_pmu_pdata_by_system_rev(void)
 223 {
 224         switch (system_rev) {
 225         case GTA01Bv4_SYSTEM_REV:
 226                 gta01_pcf_pdata.used_features |= PCF50606_FEAT_ACD;
 227                 break;
 228         case GTA01Bv3_SYSTEM_REV:
 229         case GTA01Bv2_SYSTEM_REV:
 230                 gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
 231                                         .name = "user1";
 232                 gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
 233                                         .flags &= ~PMU_VRAIL_F_SUSPEND_ON;
 234                 gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
 235                                         .flags = PMU_VRAIL_F_UNUSED;
 236                 break;
 237         case GTA01v4_SYSTEM_REV:
 238                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
 239                               "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
 240                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
 241                               "vrf_3v", 0, 3000, 3000);
 242                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
 243                               "vtcxo_2v8", 0, 2800, 2800);
 244                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
 245                               "gl_3v5", 0, 3500, 3500);
 246                 break;
 247         case GTA01v3_SYSTEM_REV:
 248                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
 249                               "vrf_3v", 0, 3000, 3000);
 250                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D2REG],
 251                               "sd_3v3", 0, 3300, 3300);
 252                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
 253                               "codec_3v3", 0, 3300, 3300);
 254                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
 255                               "gpsio_3v3", 0, 3300, 3300);
 256                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
 257                               "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
 258                 cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_IOREG],
 259                               "vtcxo_2v8", 0, 2800, 2800);
 260                 break;
 261         }
 262 }
 263
 264 static struct resource gta01_pmu_resources[] = {
 265         [0] = {
 266                 .flags  = IORESOURCE_IRQ,
 267                 .start  = GTA01_IRQ_PCF50606,
 268                 .end    = GTA01_IRQ_PCF50606,
 269         },
 270 };
 271
 272 struct platform_device gta01_pmu_dev = {
 273         .name           = "pcf50606",
 274         .num_resources  = ARRAY_SIZE(gta01_pmu_resources),
 275         .resource       = gta01_pmu_resources,
 276         .dev            = {
 277                 .platform_data = &gta01_pcf_pdata,
 278         },
 279 };
 280
 281 /* LCD driver info */
 282
 283 /* Configuration for 480x640 toppoly TD028TTEC1.
 284  * Do not mark this as __initdata or it will break! */
 285 static struct s3c2410fb_display gta01_displays[] =  {
 286         {
 287                 .type           = S3C2410_LCDCON1_TFT,
 288                 .width          = 43,
 289                 .height         = 58,
 290                 .xres           = 480,
 291                 .yres           = 640,
 292                 .bpp            = 16,
 293
 294                 .pixclock       = 40000,        /* HCLK/4 */
 295                 .left_margin    = 104,
 296                 .right_margin   = 8,
 297                 .hsync_len      = 8,
 298                 .upper_margin   = 2,
 299                 .lower_margin   = 16,
 300                 .vsync_len      = 2,
 301                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 302                                   S3C2410_LCDCON5_INVVCLK |
 303                                   S3C2410_LCDCON5_INVVLINE |
 304                                   S3C2410_LCDCON5_INVVFRAME |
 305                                   S3C2410_LCDCON5_PWREN |
 306                                   S3C2410_LCDCON5_HWSWP,
 307         },
 308         {
 309                 .type           = S3C2410_LCDCON1_TFT,
 310                 .width          = 43,
 311                 .height         = 58,
 312                 .xres           = 480,
 313                 .yres           = 640,
 314                 .bpp            = 32,
 315
 316                 .pixclock       = 40000,        /* HCLK/4 */
 317                 .left_margin    = 104,
 318                 .right_margin   = 8,
 319                 .hsync_len      = 8,
 320                 .upper_margin   = 2,
 321                 .lower_margin   = 16,
 322                 .vsync_len      = 2,
 323                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 324                                   S3C2410_LCDCON5_INVVCLK |
 325                                   S3C2410_LCDCON5_INVVLINE |
 326                                   S3C2410_LCDCON5_INVVFRAME |
 327                                   S3C2410_LCDCON5_PWREN |
 328                                   S3C2410_LCDCON5_HWSWP,
 329         },
 330         {
 331                 .type           = S3C2410_LCDCON1_TFT,
 332                 .width          = 43,
 333                 .height         = 58,
 334                 .xres           = 240,
 335                 .yres           = 320,
 336                 .bpp            = 16,
 337
 338                 .pixclock       = 40000,        /* HCLK/4 */
 339                 .left_margin    = 104,
 340                 .right_margin   = 8,
 341                 .hsync_len      = 8,
 342                 .upper_margin   = 2,
 343                 .lower_margin   = 16,
 344                 .vsync_len      = 2,
 345                 .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 346                                   S3C2410_LCDCON5_INVVCLK |
 347                                   S3C2410_LCDCON5_INVVLINE |
 348                                   S3C2410_LCDCON5_INVVFRAME |
 349                                   S3C2410_LCDCON5_PWREN |
 350                                   S3C2410_LCDCON5_HWSWP,
 351         },
 352 };
 353
 354 static struct s3c2410fb_mach_info gta01_lcd_cfg __initdata = {
 355         .displays       = gta01_displays,
 356         .num_displays   = ARRAY_SIZE(gta01_displays),
 357         .default_display = 0,
 358
 359         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 360 };
 361
 362 static struct platform_device *gta01_devices[] __initdata = {
 363         &s3c_device_usb,
 364         &s3c_device_lcd,
 365         &s3c_device_wdt,
 366         &s3c_device_i2c,
 367         &s3c_device_iis,
 368         &s3c_device_sdi,
 369         &s3c_device_usbgadget,
 370         &s3c_device_nand,
 371         &s3c_device_ts,
 372 };
 373
 374 static struct s3c2410_nand_set gta01_nand_sets[] = {
 375         [0] = {
 376                 .name           = "neo1973-nand",
 377                 .nr_chips       = 1,
 378                 .flags          = S3C2410_NAND_BBT,
 379         },
 380 };
 381
 382 static struct s3c2410_platform_nand gta01_nand_info = {
 383         .tacls          = 20,
 384         .twrph0         = 60,
 385         .twrph1         = 20,
 386         .nr_sets        = ARRAY_SIZE(gta01_nand_sets),
 387         .sets           = gta01_nand_sets,
 388 };
 389
 390 static void gta01_mmc_set_power(unsigned char power_mode, unsigned short vdd)
 391 {
 392         int bit;
 393         int mv = 1700; /* 1.7V for MMC_VDD_165_195 */
 394
 395         printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u)\n",
 396                power_mode, vdd);
 397
 398         switch (system_rev) {
 399         case GTA01v3_SYSTEM_REV:
 400                 switch (power_mode) {
 401                 case MMC_POWER_OFF:
 402                         pcf50606_onoff_set(pcf50606_global,
 403                                            PCF50606_REGULATOR_D2REG, 0);
 404                         break;
 405                 case MMC_POWER_ON:
 406                         /* translate MMC_VDD_* VDD bit to mv */
 407                         for (bit = 8; bit != 24; bit++)
 408                                 if (vdd == (1 << bit))
 409                                         mv += 100 * (bit - 4);
 410                         pcf50606_voltage_set(pcf50606_global,
 411                                              PCF50606_REGULATOR_D2REG, mv);
 412                         pcf50606_onoff_set(pcf50606_global,
 413                                            PCF50606_REGULATOR_D2REG, 1);
 414                         break;
 415                 }
 416                 break;
 417         case GTA01v4_SYSTEM_REV:
 418         case GTA01Bv2_SYSTEM_REV:
 419         case GTA01Bv3_SYSTEM_REV:
 420         case GTA01Bv4_SYSTEM_REV:
 421                 switch (power_mode) {
 422                 case MMC_POWER_OFF:
 423                         neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 1);
 424                         break;
 425                 case MMC_POWER_ON:
 426                         neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 0);
 427                         break;
 428                 }
 429                 break;
 430         }
 431 }
 432
 433 static struct s3c24xx_mci_pdata gta01_mmc_cfg = {
 434         .gpio_detect    = GTA01_GPIO_nSD_DETECT,
 435         .set_power      = &gta01_mmc_set_power,
 436         .ocr_avail      = MMC_VDD_165_195|MMC_VDD_20_21|
 437                           MMC_VDD_21_22|MMC_VDD_22_23|MMC_VDD_23_24|
 438                           MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
 439                           MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
 440                           MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33,
 441 };
 442
 443 static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
 444 {
 445         printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
 446
 447         switch (cmd) {
 448         case S3C2410_UDC_P_ENABLE:
 449                 neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 1);
 450                 break;
 451         case S3C2410_UDC_P_DISABLE:
 452                 neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 0);
 453                 break;
 454         default:
 455                 break;
 456         }
 457 }
 458
 459 /* use a work queue, since I2C API inherently schedules
 460  * and we get called in hardirq context from UDC driver */
 461
 462 struct vbus_draw {
 463         struct work_struct work;
 464         int ma;
 465 };
 466 static struct vbus_draw gta01_udc_vbus_drawer;
 467
 468 static void __gta01_udc_vbus_draw(struct work_struct *work)
 469 {
 470         /* this is a fix to work around boot-time ordering problems if the
 471          * s3c2410_udc is initialized before the pcf50606 driver has defined
 472          * pcf50606_global */
 473         if (!pcf50606_global)
 474                 return;
 475
 476         if (gta01_udc_vbus_drawer.ma >= 500) {
 477                 /* enable fast charge */
 478                 printk(KERN_DEBUG "udc: enabling fast charge\n");
 479                 pcf50606_charge_fast(pcf50606_global, 1);
 480         } else {
 481                 /* disable fast charge */
 482                 printk(KERN_DEBUG "udc: disabling fast charge\n");
 483                 pcf50606_charge_fast(pcf50606_global, 0);
 484         }
 485 }
 486
 487 static void gta01_udc_vbus_draw(unsigned int ma)
 488 {
 489         gta01_udc_vbus_drawer.ma = ma;
 490         schedule_work(&gta01_udc_vbus_drawer.work);
 491 }
 492
 493 static struct s3c2410_udc_mach_info gta01_udc_cfg = {
 494         .vbus_draw      = gta01_udc_vbus_draw,
 495 };
 496
 497 static struct s3c2410_ts_mach_info gta01_ts_cfg = {
 498         .delay = 10000,
 499         .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
 500         /* simple averaging, 2^n samples */
 501         .oversampling_shift = 5,
 502         /* averaging filter length, 2^n */
 503         .excursion_filter_len_bits = 5,
 504         /* flagged for beauty contest on next sample if differs from
 505          * average more than this
 506          */
 507         .reject_threshold_vs_avg = 2,
 508 };
 509
 510 /* SPI */
 511
 512 static void gta01_jbt6k74_reset(int devidx, int level)
 513 {
 514         /* empty place holder; gta01 does not yet use this */
 515         printk(KERN_DEBUG "gta01_jbt6k74_reset\n");
 516 }
 517
 518 static void gta01_jbt6k74_resuming(int devidx)
 519 {
 520         gta01bl_deferred_resume();
 521 }
 522
 523 const struct jbt6k74_platform_data gta01_jbt6k74_pdata = {
 524         .reset          = gta01_jbt6k74_reset,
 525         .resuming       = gta01_jbt6k74_resuming,
 526 };
 527
 528 static struct spi_board_info gta01_spi_board_info[] = {
 529         {
 530                 .modalias       = "jbt6k74",
 531                 .platform_data  = &gta01_jbt6k74_pdata,
 532                 /* controller_data */
 533                 /* irq */
 534                 .max_speed_hz   = 10 * 1000 * 1000,
 535                 .bus_num        = 1,
 536                 /* chip_select */
 537         },
 538 };
 539
 540 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
 541 {
 542         switch (cs) {
 543         case BITBANG_CS_ACTIVE:
 544                 s3c2410_gpio_setpin(S3C2410_GPG3, 0);
 545                 break;
 546         case BITBANG_CS_INACTIVE:
 547                 s3c2410_gpio_setpin(S3C2410_GPG3, 1);
 548                 break;
 549         }
 550 }
 551
 552 static struct s3c2410_spigpio_info spi_gpio_cfg = {
 553         .pin_clk        = S3C2410_GPG7,
 554         .pin_mosi       = S3C2410_GPG6,
 555         .pin_miso       = S3C2410_GPG5,
 556         .board_size     = ARRAY_SIZE(gta01_spi_board_info),
 557         .board_info     = gta01_spi_board_info,
 558         .chip_select    = &spi_gpio_cs,
 559         .num_chipselect = 2,   /*** Should be 1 or 2 for gta01? ***/
 560 };
 561
 562 static struct resource s3c_spi_lcm_resource[] = {
 563         [0] = {
 564                 .start = S3C2410_GPG3,
 565                 .end   = S3C2410_GPG3,
 566         },
 567         [1] = {
 568                 .start = S3C2410_GPG5,
 569                 .end   = S3C2410_GPG5,
 570         },
 571         [2] = {
 572                 .start = S3C2410_GPG6,
 573                 .end   = S3C2410_GPG6,
 574         },
 575         [3] = {
 576                 .start = S3C2410_GPG7,
 577                 .end   = S3C2410_GPG7,
 578         },
 579 };
 580
 581 struct platform_device s3c_device_spi_lcm = {
 582         .name             = "spi_s3c24xx_gpio",
 583         .id               = 1,
 584         .num_resources    = ARRAY_SIZE(s3c_spi_lcm_resource),
 585         .resource         = s3c_spi_lcm_resource,
 586         .dev = {
 587                 .platform_data = &spi_gpio_cfg,
 588         },
 589 };
 590
 591 static struct gta01bl_machinfo backlight_machinfo = {
 592         .default_intensity      = 1,
 593         .max_intensity          = 1,
 594         .limit_mask             = 1,
 595         .defer_resume_backlight = 1,
 596 };
 597
 598 static struct resource gta01_bl_resources[] = {
 599         [0] = {
 600                 .start  = GTA01_GPIO_BACKLIGHT,
 601                 .end    = GTA01_GPIO_BACKLIGHT,
 602         },
 603 };
 604
 605 struct platform_device gta01_bl_dev = {
 606         .name           = "gta01-bl",
 607         .num_resources  = ARRAY_SIZE(gta01_bl_resources),
 608         .resource       = gta01_bl_resources,
 609         .dev            = {
 610                 .platform_data = &backlight_machinfo,
 611         },
 612 };
 613
 614 static struct resource gta01_led_resources[] = {
 615         [0] = {
 616                 .start  = GTA01_GPIO_VIBRATOR_ON,
 617                 .end    = GTA01_GPIO_VIBRATOR_ON,
 618         },
 619 };
 620
 621 struct platform_device gta01_led_dev = {
 622         .name           = "neo1973-vibrator",
 623         .num_resources  = ARRAY_SIZE(gta01_led_resources),
 624         .resource       = gta01_led_resources,
 625 };
 626
 627 static struct resource gta01_button_resources[] = {
 628         [0] = {
 629                 .start = GTA01_GPIO_AUX_KEY,
 630                 .end   = GTA01_GPIO_AUX_KEY,
 631         },
 632         [1] = {
 633                 .start = GTA01_GPIO_HOLD_KEY,
 634                 .end   = GTA01_GPIO_HOLD_KEY,
 635         },
 636         [2] = {
 637                 .start = GTA01_GPIO_JACK_INSERT,
 638                 .end   = GTA01_GPIO_JACK_INSERT,
 639         },
 640 };
 641
 642 struct platform_device gta01_button_dev = {
 643         .name           = "neo1973-button",
 644         .num_resources  = ARRAY_SIZE(gta01_button_resources),
 645         .resource       = gta01_button_resources,
 646 };
 647
 648 static struct platform_device gta01_pm_gsm_dev = {
 649         .name           = "neo1973-pm-gsm",
 650 };
 651
 652 /* USB */
 653 static struct s3c2410_hcd_info gta01_usb_info = {
 654         .port[0]        = {
 655                 .flags  = S3C_HCDFLG_USED,
 656         },
 657         .port[1]        = {
 658                 .flags  = 0,
 659         },
 660 };
 661
 662 static void __init gta01_map_io(void)
 663 {
 664         s3c24xx_init_io(gta01_iodesc, ARRAY_SIZE(gta01_iodesc));
 665         s3c24xx_init_clocks(12*1000*1000);
 666         s3c24xx_init_uarts(gta01_uartcfgs, ARRAY_SIZE(gta01_uartcfgs));
 667 }
 668
 669 extern int gta_gsm_interrupts;
 670
 671 static irqreturn_t gta01_modem_irq(int irq, void *param)
 672 {
 673         printk(KERN_DEBUG "GSM wakeup interrupt (IRQ %d)\n", irq);
 674         gta_gsm_interrupts++;
 675         return IRQ_HANDLED;
 676 }
 677
 678 static void __init gta01_machine_init(void)
 679 {
 680         int rc;
 681
 682         if (system_rev == GTA01v4_SYSTEM_REV ||
 683             system_rev == GTA01Bv2_SYSTEM_REV ||
 684             system_rev == GTA01Bv3_SYSTEM_REV ||
 685             system_rev == GTA01Bv4_SYSTEM_REV) {
 686                 gta01_udc_cfg.udc_command = gta01_udc_command;
 687                 gta01_mmc_cfg.ocr_avail = MMC_VDD_32_33;
 688         }
 689
 690         s3c_device_usb.dev.platform_data = &gta01_usb_info;
 691         s3c_device_nand.dev.platform_data = &gta01_nand_info;
 692         s3c_device_sdi.dev.platform_data = &gta01_mmc_cfg;
 693
 694         s3c24xx_fb_set_platdata(&gta01_lcd_cfg);
 695
 696         INIT_WORK(&gta01_udc_vbus_drawer.work, __gta01_udc_vbus_draw);
 697         s3c24xx_udc_set_platdata(&gta01_udc_cfg);
 698         set_s3c2410ts_info(&gta01_ts_cfg);
 699
 700         /* Set LCD_RESET / XRES to high */
 701         s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT);
 702         s3c2410_gpio_setpin(S3C2410_GPC6, 1);
 703
 704         /* SPI chip select is gpio output */
 705         s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPIO_OUTPUT);
 706         s3c2410_gpio_setpin(S3C2410_GPG3, 1);
 707         platform_device_register(&s3c_device_spi_lcm);
 708
 709         platform_device_register(&gta01_bl_dev);
 710         platform_device_register(&gta01_button_dev);
 711         platform_device_register(&gta01_pm_gsm_dev);
 712
 713         switch (system_rev) {
 714         case GTA01v3_SYSTEM_REV:
 715         case GTA01v4_SYSTEM_REV:
 716                 /* just use the default (GTA01_IRQ_PCF50606) */
 717                 break;
 718         case GTA01Bv2_SYSTEM_REV:
 719         case GTA01Bv3_SYSTEM_REV:
 720                 /* just use the default (GTA01_IRQ_PCF50606) */
 721                 gta01_led_resources[0].start =
 722                         gta01_led_resources[0].end = GTA01Bv2_GPIO_VIBRATOR_ON;
 723                 break;
 724         case GTA01Bv4_SYSTEM_REV:
 725                 gta01_pmu_resources[0].start =
 726                         gta01_pmu_resources[0].end = GTA01Bv4_IRQ_PCF50606;
 727                 gta01_led_resources[0].start =
 728                         gta01_led_resources[0].end = GTA01Bv4_GPIO_VIBRATOR_ON;
 729                 break;
 730         }
 731         mangle_pmu_pdata_by_system_rev();
 732         platform_device_register(&gta01_pmu_dev);
 733         platform_device_register(&gta01_led_dev);
 734
 735         platform_add_devices(gta01_devices, ARRAY_SIZE(gta01_devices));
 736
 737         s3c2410_pm_init();
 738
 739         set_irq_type(GTA01_IRQ_MODEM, IRQT_RISING);
 740         rc = request_irq(GTA01_IRQ_MODEM, gta01_modem_irq, IRQF_DISABLED,
 741                          "modem", NULL);
 742         enable_irq_wake(GTA01_IRQ_MODEM);
 743         printk(KERN_DEBUG  "Enabled GSM wakeup IRQ %d (rc=%d)\n",
 744                GTA01_IRQ_MODEM, rc);
 745 }
 746
 747 MACHINE_START(NEO1973_GTA01, "GTA01")
 748         .phys_io        = S3C2410_PA_UART,
 749         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 750         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 751         .map_io         = gta01_map_io,
 752         .init_irq       = s3c24xx_init_irq,
 753         .init_machine   = gta01_machine_init,
 754         .timer          = &s3c24xx_timer,
 755 MACHINE_END