drivers/infiniband/hw/mthca/mthca_dev.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005 Cisco Systems.  All rights reserved.
   5  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   6  * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
   7  *
   8  * This software is available to you under a choice of one of two
   9  * licenses.  You may choose to be licensed under the terms of the GNU
  10  * General Public License (GPL) Version 2, available from the file
  11  * COPYING in the main directory of this source tree, or the
  12  * OpenIB.org BSD license below:
  13  *
  14  *     Redistribution and use in source and binary forms, with or
  15  *     without modification, are permitted provided that the following
  16  *     conditions are met:
  17  *
  18  *      - Redistributions of source code must retain the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer.
  21  *
  22  *      - Redistributions in binary form must reproduce the above
  23  *        copyright notice, this list of conditions and the following
  24  *        disclaimer in the documentation and/or other materials
  25  *        provided with the distribution.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34  * SOFTWARE.
  35  *
  36  * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
  37  */
  38
  39 #ifndef MTHCA_DEV_H
  40 #define MTHCA_DEV_H
  41
  42 #include <linux/spinlock.h>
  43 #include <linux/kernel.h>
  44 #include <linux/pci.h>
  45 #include <linux/dma-mapping.h>
  46 #include <asm/semaphore.h>
  47
  48 #include "mthca_provider.h"
  49 #include "mthca_doorbell.h"
  50
  51 #define DRV_NAME        "ib_mthca"
  52 #define PFX             DRV_NAME ": "
  53 #define DRV_VERSION     "0.06"
  54 #define DRV_RELDATE     "June 23, 2005"
  55
  56 enum {
  57         MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
  58         MTHCA_FLAG_SRQ        = 1 << 2,
  59         MTHCA_FLAG_MSI        = 1 << 3,
  60         MTHCA_FLAG_MSI_X      = 1 << 4,
  61         MTHCA_FLAG_NO_LAM     = 1 << 5,
  62         MTHCA_FLAG_FMR        = 1 << 6,
  63         MTHCA_FLAG_MEMFREE    = 1 << 7,
  64         MTHCA_FLAG_PCIE       = 1 << 8
  65 };
  66
  67 enum {
  68         MTHCA_MAX_PORTS = 2
  69 };
  70
  71 enum {
  72         MTHCA_EQ_CONTEXT_SIZE =  0x40,
  73         MTHCA_CQ_CONTEXT_SIZE =  0x40,
  74         MTHCA_QP_CONTEXT_SIZE = 0x200,
  75         MTHCA_RDB_ENTRY_SIZE  =  0x20,
  76         MTHCA_AV_SIZE         =  0x20,
  77         MTHCA_MGM_ENTRY_SIZE  =  0x40,
  78
  79         /* Arbel FW gives us these, but we need them for Tavor */
  80         MTHCA_MPT_ENTRY_SIZE  =  0x40,
  81         MTHCA_MTT_SEG_SIZE    =  0x40,
  82 };
  83
  84 enum {
  85         MTHCA_EQ_CMD,
  86         MTHCA_EQ_ASYNC,
  87         MTHCA_EQ_COMP,
  88         MTHCA_NUM_EQ
  89 };
  90
  91 enum {
  92         MTHCA_OPCODE_NOP            = 0x00,
  93         MTHCA_OPCODE_RDMA_WRITE     = 0x08,
  94         MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
  95         MTHCA_OPCODE_SEND           = 0x0a,
  96         MTHCA_OPCODE_SEND_IMM       = 0x0b,
  97         MTHCA_OPCODE_RDMA_READ      = 0x10,
  98         MTHCA_OPCODE_ATOMIC_CS      = 0x11,
  99         MTHCA_OPCODE_ATOMIC_FA      = 0x12,
 100         MTHCA_OPCODE_BIND_MW        = 0x18,
 101         MTHCA_OPCODE_INVALID        = 0xff
 102 };
 103
 104 struct mthca_cmd {
 105         struct pci_pool          *pool;
 106         int                       use_events;
 107         struct semaphore          hcr_sem;
 108         struct semaphore          poll_sem;
 109         struct semaphore          event_sem;
 110         int                       max_cmds;
 111         spinlock_t                context_lock;
 112         int                       free_head;
 113         struct mthca_cmd_context *context;
 114         u16                       token_mask;
 115 };
 116
 117 struct mthca_limits {
 118         int      num_ports;
 119         int      vl_cap;
 120         int      mtu_cap;
 121         int      gid_table_len;
 122         int      pkey_table_len;
 123         int      local_ca_ack_delay;
 124         int      num_uars;
 125         int      max_sg;
 126         int      num_qps;
 127         int      reserved_qps;
 128         int      num_srqs;
 129         int      reserved_srqs;
 130         int      num_eecs;
 131         int      reserved_eecs;
 132         int      num_cqs;
 133         int      reserved_cqs;
 134         int      num_eqs;
 135         int      reserved_eqs;
 136         int      num_mpts;
 137         int      num_mtt_segs;
 138         int      fmr_reserved_mtts;
 139         int      reserved_mtts;
 140         int      reserved_mrws;
 141         int      reserved_uars;
 142         int      num_mgms;
 143         int      num_amgms;
 144         int      reserved_mcgs;
 145         int      num_pds;
 146         int      reserved_pds;
 147 };
 148
 149 struct mthca_alloc {
 150         u32            last;
 151         u32            top;
 152         u32            max;
 153         u32            mask;
 154         spinlock_t     lock;
 155         unsigned long *table;
 156 };
 157
 158 struct mthca_array {
 159         struct {
 160                 void    **page;
 161                 int       used;
 162         } *page_list;
 163 };
 164
 165 struct mthca_uar_table {
 166         struct mthca_alloc alloc;
 167         u64                uarc_base;
 168         int                uarc_size;
 169 };
 170
 171 struct mthca_pd_table {
 172         struct mthca_alloc alloc;
 173 };
 174
 175 struct mthca_buddy {
 176         unsigned long **bits;
 177         int             max_order;
 178         spinlock_t      lock;
 179 };
 180
 181 struct mthca_mr_table {
 182         struct mthca_alloc      mpt_alloc;
 183         struct mthca_buddy      mtt_buddy;
 184         struct mthca_buddy     *fmr_mtt_buddy;
 185         u64                     mtt_base;
 186         u64                     mpt_base;
 187         struct mthca_icm_table *mtt_table;
 188         struct mthca_icm_table *mpt_table;
 189         struct {
 190                 void __iomem   *mpt_base;
 191                 void __iomem   *mtt_base;
 192                 struct mthca_buddy mtt_buddy;
 193         } tavor_fmr;
 194 };
 195
 196 struct mthca_eq_table {
 197         struct mthca_alloc alloc;
 198         void __iomem      *clr_int;
 199         u32                clr_mask;
 200         u32                arm_mask;
 201         struct mthca_eq    eq[MTHCA_NUM_EQ];
 202         u64                icm_virt;
 203         struct page       *icm_page;
 204         dma_addr_t         icm_dma;
 205         int                have_irq;
 206         u8                 inta_pin;
 207 };
 208
 209 struct mthca_cq_table {
 210         struct mthca_alloc      alloc;
 211         spinlock_t              lock;
 212         struct mthca_array      cq;
 213         struct mthca_icm_table *table;
 214 };
 215
 216 struct mthca_qp_table {
 217         struct mthca_alloc      alloc;
 218         u32                     rdb_base;
 219         int                     rdb_shift;
 220         int                     sqp_start;
 221         spinlock_t              lock;
 222         struct mthca_array      qp;
 223         struct mthca_icm_table *qp_table;
 224         struct mthca_icm_table *eqp_table;
 225         struct mthca_icm_table *rdb_table;
 226 };
 227
 228 struct mthca_av_table {
 229         struct pci_pool   *pool;
 230         int                num_ddr_avs;
 231         u64                ddr_av_base;
 232         void __iomem      *av_map;
 233         struct mthca_alloc alloc;
 234 };
 235
 236 struct mthca_mcg_table {
 237         struct semaphore        sem;
 238         struct mthca_alloc      alloc;
 239         struct mthca_icm_table *table;
 240 };
 241
 242 struct mthca_dev {
 243         struct ib_device  ib_dev;
 244         struct pci_dev   *pdev;
 245
 246         int              hca_type;
 247         unsigned long    mthca_flags;
 248         unsigned long    device_cap_flags;
 249
 250         u32              rev_id;
 251
 252         /* firmware info */
 253         u64              fw_ver;
 254         union {
 255                 struct {
 256                         u64 fw_start;
 257                         u64 fw_end;
 258                 }        tavor;
 259                 struct {
 260                         u64 clr_int_base;
 261                         u64 eq_arm_base;
 262                         u64 eq_set_ci_base;
 263                         struct mthca_icm *fw_icm;
 264                         struct mthca_icm *aux_icm;
 265                         u16 fw_pages;
 266                 }        arbel;
 267         }                fw;
 268
 269         u64              ddr_start;
 270         u64              ddr_end;
 271
 272         MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
 273         struct semaphore cap_mask_mutex;
 274
 275         void __iomem    *hcr;
 276         void __iomem    *kar;
 277         void __iomem    *clr_base;
 278         union {
 279                 struct {
 280                         void __iomem *ecr_base;
 281                 } tavor;
 282                 struct {
 283                         void __iomem *eq_arm;
 284                         void __iomem *eq_set_ci_base;
 285                 } arbel;
 286         } eq_regs;
 287
 288         struct mthca_cmd    cmd;
 289         struct mthca_limits limits;
 290
 291         struct mthca_uar_table uar_table;
 292         struct mthca_pd_table  pd_table;
 293         struct mthca_mr_table  mr_table;
 294         struct mthca_eq_table  eq_table;
 295         struct mthca_cq_table  cq_table;
 296         struct mthca_qp_table  qp_table;
 297         struct mthca_av_table  av_table;
 298         struct mthca_mcg_table mcg_table;
 299
 300         struct mthca_uar       driver_uar;
 301         struct mthca_db_table *db_tab;
 302         struct mthca_pd        driver_pd;
 303         struct mthca_mr        driver_mr;
 304
 305         struct ib_mad_agent  *send_agent[MTHCA_MAX_PORTS][2];
 306         struct ib_ah         *sm_ah[MTHCA_MAX_PORTS];
 307         spinlock_t            sm_lock;
 308 };
 309
 310 #define mthca_dbg(mdev, format, arg...) \
 311         dev_dbg(&mdev->pdev->dev, format, ## arg)
 312 #define mthca_err(mdev, format, arg...) \
 313         dev_err(&mdev->pdev->dev, format, ## arg)
 314 #define mthca_info(mdev, format, arg...) \
 315         dev_info(&mdev->pdev->dev, format, ## arg)
 316 #define mthca_warn(mdev, format, arg...) \
 317         dev_warn(&mdev->pdev->dev, format, ## arg)
 318
 319 extern void __buggy_use_of_MTHCA_GET(void);
 320 extern void __buggy_use_of_MTHCA_PUT(void);
 321
 322 #define MTHCA_GET(dest, source, offset)                               \
 323         do {                                                          \
 324                 void *__p = (char *) (source) + (offset);             \
 325                 switch (sizeof (dest)) {                              \
 326                         case 1: (dest) = *(u8 *) __p;       break;    \
 327                         case 2: (dest) = be16_to_cpup(__p); break;    \
 328                         case 4: (dest) = be32_to_cpup(__p); break;    \
 329                         case 8: (dest) = be64_to_cpup(__p); break;    \
 330                         default: __buggy_use_of_MTHCA_GET();          \
 331                 }                                                     \
 332         } while (0)
 333
 334 #define MTHCA_PUT(dest, source, offset)                               \
 335         do {                                                          \
 336                 __typeof__(source) *__p =                             \
 337                         (__typeof__(source) *) ((char *) (dest) + (offset)); \
 338                 switch (sizeof(source)) {                             \
 339                         case 1: *__p = (source);            break;    \
 340                         case 2: *__p = cpu_to_be16(source); break;    \
 341                         case 4: *__p = cpu_to_be32(source); break;    \
 342                         case 8: *__p = cpu_to_be64(source); break;    \
 343                         default: __buggy_use_of_MTHCA_PUT();          \
 344                 }                                                     \
 345         } while (0)
 346
 347 int mthca_reset(struct mthca_dev *mdev);
 348
 349 u32 mthca_alloc(struct mthca_alloc *alloc);
 350 void mthca_free(struct mthca_alloc *alloc, u32 obj);
 351 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
 352                      u32 reserved);
 353 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
 354 void *mthca_array_get(struct mthca_array *array, int index);
 355 int mthca_array_set(struct mthca_array *array, int index, void *value);
 356 void mthca_array_clear(struct mthca_array *array, int index);
 357 int mthca_array_init(struct mthca_array *array, int nent);
 358 void mthca_array_cleanup(struct mthca_array *array, int nent);
 359
 360 int mthca_init_uar_table(struct mthca_dev *dev);
 361 int mthca_init_pd_table(struct mthca_dev *dev);
 362 int mthca_init_mr_table(struct mthca_dev *dev);
 363 int mthca_init_eq_table(struct mthca_dev *dev);
 364 int mthca_init_cq_table(struct mthca_dev *dev);
 365 int mthca_init_qp_table(struct mthca_dev *dev);
 366 int mthca_init_av_table(struct mthca_dev *dev);
 367 int mthca_init_mcg_table(struct mthca_dev *dev);
 368
 369 void mthca_cleanup_uar_table(struct mthca_dev *dev);
 370 void mthca_cleanup_pd_table(struct mthca_dev *dev);
 371 void mthca_cleanup_mr_table(struct mthca_dev *dev);
 372 void mthca_cleanup_eq_table(struct mthca_dev *dev);
 373 void mthca_cleanup_cq_table(struct mthca_dev *dev);
 374 void mthca_cleanup_qp_table(struct mthca_dev *dev);
 375 void mthca_cleanup_av_table(struct mthca_dev *dev);
 376 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
 377
 378 int mthca_register_device(struct mthca_dev *dev);
 379 void mthca_unregister_device(struct mthca_dev *dev);
 380
 381 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
 382 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
 383
 384 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
 385 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
 386
 387 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
 388 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
 389 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
 390                     int start_index, u64 *buffer_list, int list_len);
 391 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
 392                    u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
 393 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
 394                            u32 access, struct mthca_mr *mr);
 395 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
 396                         u64 *buffer_list, int buffer_size_shift,
 397                         int list_len, u64 iova, u64 total_size,
 398                         u32 access, struct mthca_mr *mr);
 399 void mthca_free_mr(struct mthca_dev *dev,  struct mthca_mr *mr);
 400
 401 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
 402                     u32 access, struct mthca_fmr *fmr);
 403 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
 404                              int list_len, u64 iova);
 405 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
 406 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
 407                              int list_len, u64 iova);
 408 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
 409 int mthca_free_fmr(struct mthca_dev *dev,  struct mthca_fmr *fmr);
 410
 411 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
 412 void mthca_unmap_eq_icm(struct mthca_dev *dev);
 413
 414 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
 415                   struct ib_wc *entry);
 416 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 417 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 418 int mthca_init_cq(struct mthca_dev *dev, int nent,
 419                   struct mthca_ucontext *ctx, u32 pdn,
 420                   struct mthca_cq *cq);
 421 void mthca_free_cq(struct mthca_dev *dev,
 422                    struct mthca_cq *cq);
 423 void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
 424 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
 425
 426 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
 427                     enum ib_event_type event_type);
 428 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
 429 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 430                           struct ib_send_wr **bad_wr);
 431 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 432                              struct ib_recv_wr **bad_wr);
 433 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 434                           struct ib_send_wr **bad_wr);
 435 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 436                              struct ib_recv_wr **bad_wr);
 437 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
 438                        int index, int *dbd, u32 *new_wqe);
 439 int mthca_alloc_qp(struct mthca_dev *dev,
 440                    struct mthca_pd *pd,
 441                    struct mthca_cq *send_cq,
 442                    struct mthca_cq *recv_cq,
 443                    enum ib_qp_type type,
 444                    enum ib_sig_type send_policy,
 445                    struct ib_qp_cap *cap,
 446                    struct mthca_qp *qp);
 447 int mthca_alloc_sqp(struct mthca_dev *dev,
 448                     struct mthca_pd *pd,
 449                     struct mthca_cq *send_cq,
 450                     struct mthca_cq *recv_cq,
 451                     enum ib_sig_type send_policy,
 452                     struct ib_qp_cap *cap,
 453                     int qpn,
 454                     int port,
 455                     struct mthca_sqp *sqp);
 456 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
 457 int mthca_create_ah(struct mthca_dev *dev,
 458                     struct mthca_pd *pd,
 459                     struct ib_ah_attr *ah_attr,
 460                     struct mthca_ah *ah);
 461 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
 462 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
 463                   struct ib_ud_header *header);
 464
 465 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 466 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 467
 468 int mthca_process_mad(struct ib_device *ibdev,
 469                       int mad_flags,
 470                       u8 port_num,
 471                       struct ib_wc *in_wc,
 472                       struct ib_grh *in_grh,
 473                       struct ib_mad *in_mad,
 474                       struct ib_mad *out_mad);
 475 int mthca_create_agents(struct mthca_dev *dev);
 476 void mthca_free_agents(struct mthca_dev *dev);
 477
 478 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
 479 {
 480         return container_of(ibdev, struct mthca_dev, ib_dev);
 481 }
 482
 483 static inline int mthca_is_memfree(struct mthca_dev *dev)
 484 {
 485         return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
 486 }
 487
 488 #endif /* MTHCA_DEV_H */